1M. F. Chiang NOC 2007

M. F. Chiang, Z. Ghassemlooy, Wai Pang Ng,

and H. Le Minh

Optical Communication Research Group

Northumbria University, United Kingdom

http://soe.unn.ac.uk/ncrlab/

All-optical Packet Switched Router With Multiple Pulse Position Routing Tables

2M. F. Chiang NOC 2007

Contents

Introduction

PPM Routing Table (PPRT) & Multiple PPRTs

Address Correlation with Multiple PPRTs

Proposed Node Architecture

Simulation Results

Conclusions

3M. F. Chiang NOC 2007

Introduction

There is a growing demand for all optical switches and router at very high speed, to avoid the bottleneck imposed by the electronic switches.

The development of ultra high-speed all-optical switches & logic gates (such as AND, OR and XOR) with operating data rates above 40 Gbit/s have become the key enabling technology for realising all-optical routers.

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Introduction – – Optical networks

Client Network

Client Network

Low-speed packet

Low-speed packet

High-speed packet

Core Network

Proposed core optical router

Source / target node

Payload

Address

Clock

Optical Packet

Client Network

Client Network

Low-speed packet

Low-speed packet

High-speed packet

Core Network

5M. F. Chiang NOC 2007

Introduction- Research Aim

Packet processing in a large dimension network (routing table with hundreds or thousands of entries) results in throughput latency. Therefore by converting packet header and the routing table from a binary RZ into a pulse position modulation (PPM) format. The size of the PPM routing table is significantly reduced.

Furthermore, by employing multiple PPRTs, only a subset of the header address are converted into a PPM format, thus resulting in a reduced length of PPRT entries thus resulting in a faster packet processing.

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PPM Conversion

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Routing Table

Conventional RT Single PPRT Multiple PPRTs

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Address Correlation with Multiple PPRTs

E1A

(a4, a3) = (1, 1)

0 1 2 3 4 5 6 7

8 9 10 11 12 13 14 15

0 1 2 3 4 5 6 7

8 9 10 11 12 13 14 15

4 multiple PPM Header Address

4 multiple PPM Routing Table for E1

16 17 18 19 20 21 22 23

24 25 26 27 28 29 30 31

E1B

(a4, a3) = (1, 0)

E1C

(a4, a3) = (0, 1)

E1D

(a4, a3) = (0, 0)

16 17 18 19 20 21 22 23

24 25 26 27 28 29 30 31

(a4, a3) = (1, 1) (a4, a3) = (1, 0)

(a4, a3) = (0, 1) (a4, a3) = (0, 0) x(t)

Ts

#1 Ts

#1

11100 =28d

9M. F. Chiang NOC 2007

Multiple PPRTs

E1A E2A E3A E1B E2B E3B E1C E2C E3C E1D E2D E3D

EA (24 – 31) EB (16 – 23) EC (8 – 15) ED (0 – 7)

E1 E2 E3

Check MSBs a4 a3 (X=2)

a2 a1 a0

a4 a3 =11

a4 a3 a2 a1 a0 (N=5)

a4 a3 =10 a4 a3 =01 a4 a3 =00

10M. F. Chiang NOC 2007

Clk

Matched pulse…

…

CP 1CP 2

CP M

Port 1

Port 2

Port M

MultiplePPRT

Generator

All-optical Switch

…

&2

&M

ClockExtraction

HeaderExtraction

PPM Add.Conversion

OSWM

OSW2

OSW1

…

OSWC

OSWC

OSWC

Synchronisation

APL Clk

APL Clk

APL Clk

AP

LC

lk

PPMAa2a1a0

Node architecture

Entry 1

Entry 2

…

Group A

Multiple PPRT

Group B

Group C

Group D

SW4

SW3

SW3

a4

a3

a3

a4 a3 a2 a1 a0

1 1 x x x

…Entry M

…

&1

Unicast transmission

11M. F. Chiang NOC 2007

Clk

Matched pulse…

CP 1CP 2

CP M

Port 1

Port 2

Port M

MultiplePPRT

Generator

All-optical Switch

…

&M

ClockExtraction

HeaderExtraction

PPM Add.Conversion

OSWM

OSW1

…

OSWC

OSWC

OSWC

Synchronisation

APL Clk

APL Clk

APL Clk

AP

LC

lk

PPMAa2a1a0

Node architecture

Entry 1

Entry 2

…

Group A

Multiple PPRT

Group B

Group C

Group D

SW4

SW3

SW3

a4

a3

a3

a4 a3 a2 a1 a0

1 0 x x x

…Entry M

…

Matched pulse

&1

OSW2APL Clk

…

&2

Multicast transmission

12M. F. Chiang NOC 2007

Clk

Matched pulse…

CP 1CP 2

CP M

Port 1

Port 2

Port M

MultiplePPRT

Generator

All-optical Switch

…

ClockExtraction

HeaderExtraction

PPM Add.Conversion

OSWM

OSW1

…

OSWC

OSWC

OSWC

Synchronisation

APL Clk

APL Clk

APL Clk

AP

LC

lk

PPMAa2a1a0

Node architecture

Entry 1

Entry 2

…

Group A

Multiple PPRT

Group B

Group C

Group D

SW4

SW3

SW3

a4

a3

a3

a4 a3 a2 a1 a0

0 1 x x x

…Entry M

…

Matched pulse

&1

OSW2APL Clk

…

&2

Matched pulse&M

APL Clk

Broadcast transmission

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Simulation Results-Simulation Parameters

Simulation Tool: Virtual Photonic Inc. (VPI)

Parameter and description Value

Data packet bit rate – (Tb)-1 80 Gb/s

Packet payload length 53 bytes (424 bits)

Wavelength of data packet 1554 nm

Data & control pulse widths – FWHM 2 ps

PPM slot duration Ts ( =Tb ) 12.5 ps

Average transmitted power Pin 1 mW

Average power of Ck(t) 200 mW

Optical bandwidth Bo 300 GHz

Gos 20 dB

SOA length 500 m

SOA nsp 1.4

Inject current to SOA 150 mA

Splitting factor 0.4

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Simulation Results-Time Waveforms

(a) input packet (b) extracted clock signals

(c) matched signals at AND1

#0 #1 #4 #12 #20 #28

#0 #1 #28

(d) switched packets at router’s output 1

15M. F. Chiang NOC 2007

Simulation Results-Time Waveforms

(g) matched signals at AND3 (h) switched packets at router’s output 3

(e) matched signals at AND2 (f) switched packets at router’s output 2

#0 #1 #12

#0 #4 #20

16M. F. Chiang NOC 2007

Conclusions

In this paper, the principle of the new multiple PPRTs and the node architecture were proposed.

It was shown that by using multiple PPRTs, the number and the length of entries are significantly further reduced compared with existing RTs and PPRTs, respectively.

The proposed router offers a faster processing time especially for packets with long address bits. and is capable of operating in the unicast, multicast and broadcast transmission modes.

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Special ThanksSpecial Thanks for

Prof. Fary Ghassemlooy

Dr. Wai Pang Ng

Mr. Hoa Le Minh

All colleagues in NCRL

&

Your Attention

Acknowledgements

18M. F. Chiang NOC 2007

Thank You !

Question, please ?