F. Xiong, Stanford

Low-Power Resistive Memory with 1D and 2D Electrodes

Feng Xiong

Co-advisor: Prof. Yi CuiCo-advisor: Prof. Eric Pop

Electrical Engineering,Stanford University

F. Xiong, Stanford

Timeline of Data Storage

2

2000

2003

2001

1995

1981

1980

1966

1956

1928

1750

1440

100

BC

4000

0 B

CCave Painting Magnetic Tape

Printing DRAM

NAND Flash Blu-Ray

Paper

Punch Card

Hard Drive

3.5’’ Floppy

2.5’’ Portable Hard Drive

SD Card

USBKey

2012

PCRAM

F. Xiong, Stanford

Memory in Our Lives

3

32 GB

512 GB

128 GB

64 GB

32 GB

Memory Industry~ 500 GGB

~ $80 Billions

F. Xiong, Stanford

Memory Hierarchy

Off ChipSRAM, DRAM

On Line StorageFlash, Hard-Disk Drives

Off Line StorageOptical Drives, Tapes

On ChipSRAM

G.W. Burr et al, J. of Vac. Sci & Tech. 28, 223 (2010)

*SCM = Storage Class Memory

*

4

F. Xiong, Stanford

Why Power Dissipation in Memory?

J. Howard, ISSCC, p. 108 (2010)

Intel CPU power in 45nm CMOS, memory is a big piece of the pie!

ITRS 2010

trade-off between speed vs. energytrade-off between speed vs. energy

5

F. Xiong, Stanford

Phase Change Memory Scaling

• Phase change memory is highly scalable with electrode size

• Use carbon nanotube (CNT) electrodes!

H.-S. P. Wong et al, Proc. IEEE 98, 2201 (2010)

S. Raoux, et al, IBM J.R.Dev. 52, 468 (2008)

PCM “Mushroom” Cell

6

F. Xiong, Stanford

Outline

• Integrating CNT with PCMs– Phase change materials + CNT

– Nanotube-PCM Device

– Self-Aligned PCM Nanowire-Nanotube Device

• CNT Crossbar RRAM– Resistive Random Access Memory

– CNT Crossbar

• Graphene Ribbons with PCM– 2D graphene ribbons

– Scalable, flexible and inexpensive

• Summary

0 1 2 3 40

1

2

3

4

V (V)

I (

A)

1

2

VT

7

F. Xiong, Stanford

Phase Change Materials

Amorphous

‘0’ and ‘1’

>>

<<Optically

Electrically

Crystalline

Optical Drive

PCRAM

Ramorphous Rcrystalline

ρamorphous ρcrystalline

8

F. Xiong, Stanford

Phase Change Memory Working Principle

• “set”: crystallization data rate limiting (~10 ns)

• “reset”: melt-quench current and power limiting (>0.1 mA)

9

F. Xiong, Stanford

Carbon Nanotube Overview

• Carbon nanotubes 1D cylinder of carbon atoms

• Excellent electrical properties– High mobility ~104 cm2V-1s-1

– Current density ~109 Acm-2

(~1000× of Cu)– No electromigration

• 1D heater – diameter 1~5 nm

A. Liao et al., Phys. Rev. Lett. (2008)On-chip growth by Chemical Vapor Deposition (CVD)

~2 nm

10

F. Xiong, Stanford

Nanotube – PCM Device

• Make CNT nanogaps by AFM or electrical “cutting”• CNT nanogap filled with PCMs (here GST)• Iset ~ 1 μA, Ireset ~ 5 μA (~100× < conventional PCM)

0.1 1 101

10

100

I (A)

R (

M

)

OFF state

ON state

F. Xiong, A. Liao, D. Estrada, E. Pop, Science 332, 568 (2011, April 29 cover article)

Patent TF11023 Filed

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F. Xiong, Stanford

• Before switching, low current density low ∆T• After switching, high current density high ∆T crystallization• Small volume of PCM bit ~70 × 2.5 × 2.5 nm3 1 µA switching

current

Modeling of Nanotube – PCM DeviceF. Xiong, A. Liao, D. Estrada, E. Pop, Science 332, 568 (2011, April 29 cover article)

12

F. Xiong, Stanford

Scaling of Nanotube – PCM Devices

• Examined >100 devices

• Devices highly scalable with bit size

• Thresholds VT ~ 3-10 V, currents Iset ~ 1 μA,

Ireset ~ 5 μA (~100× < conventional PCM)

0 100 200 3000

10

20

30

40

AirArFitting

0 20 40 600.1

1

10

100

OFF

ON

prepared in airprepared in Ar

Nanogap (nm)

200 400

VT (V)

V T(V

)

F ~ 100 V/μm

nanogapsprepared in air

in Ar

Approx. nanogap (nm)0 600

R (

MΩ

)

BA

Nanogap Size

F. Xiong, A. Liao, D. Estrada, E. Pop, Science 332, 568 (2011, April 29 cover article)

13

F. Xiong, Stanford

Where Do We Go From Here?

CNT

• How can we improve the PCM memory with nanotube electrodes?

• Create nanotube + nanowire device!

PCMnanowire

F. Xiong, M.-H. Bae, Y. Dai, A. Liao, A. Behnam, E. Carrion, S. Hong, D. Ielmini, E. Pop, Nano Lett. 13, 464 (2013)

14

F. Xiong, Stanford

Where Do We Go From Here?

CNT

nanogapCNT covered

by PMMA

nanotrenchin PMMA

self-alignedPCM nanowire

• CNT heats PMMA creates nanotrench deposit PCM lift-off PMMA• PCM nanowire self-aligned with CNT electrodes

• How can we improve the PCM memory with nanotube electrodes?

• Create nanotube + nanowire device!

PCMnanowire

Patent TF11063 Filed

F. Xiong, M.-H. Bae, Y. Dai, A. Liao, A. Behnam, E. Carrion, S. Hong, D. Ielmini, E. Pop, Nano Lett. 13, 464 (2013)

15

F. Xiong, Stanford

Self-Aligned Nanotube-Nanowire Devices

even lower power…Iset ~ 0.4 μA

Ireset ~ 1.6 μA

0 2 4 6 80

0.2

0.4

0.6

0.8

1

V (V)

I (

A)

1st VT

10th VT

100th VT

10-1

100

101

102

103

104

10

OFF state

ON state

0.1 10.01I (μA)

R (

M

)0 2500 5000 7500 10000

10-1100101102103104105

Time (s)

R (

M

)

AmorphousCrystalline

crystalline

amorphous

>1000

• Threshold voltage (VT) shows some “burn-in”• Excellent ROFF/RON ratio (> 1000) approaches intrinsic GeSbTe limits• Great platform to probe other materials, self-aligned DNA, molecules…

~ 40 nm

F. Xiong, M.-H. Bae, Y. Dai, A. Liao, A. Behnam, E. Carrion, S. Hong, D. Ielmini, E. Pop, Nano Lett. 13, 464 (2013)

16

F. Xiong, Stanford

100 101 102 103 104100

101

102

103

Contact Area (nm2)

RES

ET c

urre

nt ( A

)

this work

literature

RESET Current Scaling

• Ireset ~ A0.83

• CNT electrode 100× reduction in Ireset

• Isotropic scaling (equal scaling of all three dimensions) Ireset ~ A1

• non-isotropic scaling exponent of 0.83• Ireset /A ~ A-0.17 higher current density as device scales

I ~ A0.83

100 101 102 103 104106

107

108

109

1010

1011

Contact Area (nm2)

this work

literature

RES

ET c

urre

nt d

ensi

ty

(A/c

m2 )

F. Xiong, M.-H. Bae, Y. Dai, A. Liao, A. Behnam, E. Carrion, S. Hong, D. Ielmini, E. Pop, Nano Lett. 13, 464 (2013)

17

F. Xiong, Stanford

Outline

• Integrating CNT with PCMs– Phase change memory + CNT

– Nanotube-PCM Device

– Self-Aligned PCM Nanowire-Nanotube Device

• CNT Crossbar RRAM– Resistive Random Access Memory

– CNT Crossbar

• Graphene Ribbons with PCM– 2D graphene ribbons

– Scalable, flexible and inexpensive

• Summary

0 1 2 3 40

1

2

3

4

V (V)

I (

A)

1

2

VT

18

F. Xiong, Stanford

Resistive Random Access Memory

Top Electrode

Bottom Electrode

V = + Vforming

V = 0

Top Electrode

Bottom Electrode

CF

Top Electrode

Bottom Electrode

V = - Vreset

V = 0Top Electrode

Bottom Electrode

Top Electrode

Bottom Electrode

V = + Vset

V = 0

Oxygen Vacancy

Oxygen Ion

Oxygen Atom

ON-state (LRS)

OFF-state (HRS)

• Metal oxides (AlOx, HfOx, TiOx)• Movement of oxygen ions in E-field

H.-S. P. Wong et al., Proc. IEEE (2012)

19

F. Xiong, Stanford

CNT Crossbar RRAMC.-L. Tsai, F. Xiong, E. Pop, M. Shim, ACS Nano 7, 5360-5366 (2013)

• CNT crossbar electrodes ~ 2 nm2

• High performance and low power

-4 -2 0 2 4 610-13

10-11

10-9

10-7

10-5

|C

urre

nt (A

)|

Top Electrode Voltage (V)

20

F. Xiong, Stanford

CNT Crossbar RRAM

105 106 107 108 109 1010 1011105

107

109

1011

R(high)CNT ()

Rde

vice

()

HRS

LRS

C.-L. Tsai, F. Xiong, E. Pop, M. Shim, ACS Nano 7, 5360-5366 (2013)

• High-resistance-state (HRS) dominated by OFF state AlOx bit• Low-resistance-state (LRS) scales with CNT resistance to ~ 10 MΩ

Rdevice = RAlOx + RCNT + Rcontact

21

F. Xiong, Stanford

Outline

• Integrating CNT with PCMs– Phase change memory + CNT

– Nanotube-PCM Device

– Self-Aligned PCM Nanowire-Nanotube Device

• CNT Crossbar RRAM– Resistive Random Access Memory

– CNT Crossbar

• Graphene Ribbons with PCM– 2D graphene ribbons

– Scalable, flexible and inexpensive

• Summary

0 1 2 3 40

1

2

3

4

V (V)

I (

A)

1

2

VT

22

F. Xiong, Stanford

2D Graphene Ribbons instead of 1D CNTs?

• Graphene Ribbons (GRs) as building blocks:– Interconnects: High current capacity, good scalability and

flexibility– Transistors: Semiconducting (<10 nm width) – Sensors: High chemical sensitivity

23

X. Li, et al., Science (2008). J. Cai, et al., Nature (2010). L. Jiao, et al., Nat. Nanotechnol. (2010).

F. Xiong, Stanford

Graphene-PCM Schematics

24

300 m

O2 etch

SiO2

Si++SiO2

Si++

Cu foilgraphenePMMA

S1 m

D

500 nm1 μm

S D

GSTAlOx

Ti/Au

Si++SiO2

Si++SiO2

O2 etchGST

Deposition gap

GST Window

Contacts

gap

A. Behnam, et al., Nano Lett. 12, 4424 (2012)A. Behnam, F. Xiong, et al., in review (2014)

GNR with GST bit

L = 2 μm, W = 40 nm, LG = 70 nm

F. Xiong, Stanford

Graphene-PCM Device Characteristics

25

0 5 100.0

0.5

1.0

1.5

2.0 ON State Sweeps SET Sweeps

Cur

rent

A

)

Voltage (V)

A. Behnam, F. Xiong, et al., in review (2014)

LG = 80 nmW = 30 nm

0 50 100 150 200

1

10

100

RO

N/O

FF (M

)

Time (sec)

OFF

ON

0 1 2 3 4 5 6 7 8 9 10 11 12

100

102

104

RO

N/O

FF (M

)

No. of Cycles

ON

OFF

F. Xiong, Stanford

• Layered materials (on SiO2 at T = 300 K)• Graphene

• μ ≈ 1000 – 5000 cm2V-1s-1

• Transition Metal Dichalcogenides (TMD)• MoS2, MoTe2, WS2, WSe2• μ (TMD) ≈ 10 – 250 cm2V-1s-1

• Silicon on Insulator (SOI)• μ degradation below d ≈ 4 nm• Poor hole mobility

[1] K. Nagashio et. al. (2009) [6] Liu, et. al. (2013)[2] W. Zhu et. al. (2010) [7] Fang, et. al. (2013)[4] K. Cheng, et. al. (2009) [8] Jariwala, et. al. (2013)[5] K. Uchida et. al. (2003) [9] Kis, et. al. (2012)[6] M. Schmidt et. al. (2009) [10] Sangwan, et. al. (2013)

d ~ 0.35 nm

Graphene

d ~ 0.65 nm

MoS2

Silicon on Insulator (SOI)

Interface roughnessThickness fluctuation

d

K. Uchida et. al. (2003)

SOI

MoS2

graphene

WSe2

0 1 2 3 4

101

102

103

d (nm)

(cm

2 V-1

s-1)

Two-Dimensional Materials

F. Xiong, Stanford

TLM

2 µm

• ρC ≈ 5x10-7 Ω·cm2 at T = 300 K• LT ≈ 50 nm at T = 300 K

• Lower deposition pressure (PD = 10-9 Torr) yields 3X improvement for Au contacts

Systematic study of contact resistance (RC)-Various contact metals: Ni, Ti, Au

-Different metal deposition pressures PD = 10-6 Torr, 10-9 Torr

[1] S. Das, et al. (2013)[2] A. T. Neal et al. (2012)

Contact Resistance to MoS2C. English, et al., DRC (2014) and submitted (2014)

F. Xiong, Stanford

0 200 400 6001.7

1.8

1.9

2

2.1

2.2

Time (s)

V w

rt L

i (V)

In-situ Li Intercalation in MoS2

28

Li+

I = -5 nA

I = -10 nA

I = -25 nA

I = -30 nA

• In-situ lithiation via electrochemical process

• Explore reversible LixMoS2 properties– optical, electrical,

thermal, thermoelectric

V+

MoS2Cu

Au

ElectrolyteLiPF6

Li pellet

V-

Lithiation / Delithiation

F. Xiong, Stanford

Summary• Integration of CNT and PCMs• Nanotube-PCM Device

– 100× lower programming current/power– Device scaling– Supported by FEM

• Self-Aligned Lithography-Free Technique– Improve device performance– High on/off ratio and better endurance

• CNT Crossbar RRAM– High performance and low power

• Graphene-PCM Device– Scalable, flexible and CMOS compatible– Proof-of-concept

100 101 102 103 104100

101

102

103

Contact Area (nm2)

RES

ET c

urre

nt ( A

)

this work

literature

29

F. Xiong, Stanford

• Pop Group

• Cui Group

• Collaborators

• Funding:– DARPA YFA– MSD MARCO– Office of Naval Research (ONR)– Beckman Institute Graduate Fellowship

Acknowledgments

30