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EE142 Lecture18 1 Amin Arbabian Jan M. Rabaey Lecture 18: LNA Design EE142 – Fall 2010 Oct. 28 th , 2010 University of California, Berkeley 2 EE142-Fall 2010 Midterm Results Ugrad Average: 42 (Max=83) Grad Average: 64 (Max=85) Total Average: 49

Lecture 18: LNA Design

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Page 1: Lecture 18: LNA Design

EE142 Lecture18

1

Amin ArbabianJan M. Rabaey

Lecture 18: LNA Design

EE142 – Fall 2010

Oct. 28th, 2010

University of California, Berkeley

2EE142-Fall 2010

Midterm Results

Ugrad Average: 42 (Max=83)

Grad Average: 64 (Max=85)

Total Average: 49

Page 2: Lecture 18: LNA Design

EE142 Lecture18

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3EE142-Fall 2010

Undergraduate Project Opportunities

1. High efficiency GSM power amplifier design for “The Village Base Station” project– Supply modulation / Switching supplies /…

– The efficiency of the PA drops if we reduce the output power. We wish to maintain the efficiency under “back-off”

The Technology and Infrastructure for Emerging Regions group seeks a talented undergraduate electrical engineer for the Village Base Station project. The Village Base Station is building a GSM base station optimized for low-density areas without existing coverage. We hope to provide cellular coverage to the billions of people currently without any network.

Eric Brewer

Kurtis Heimerl [email protected]

http://www.cs.berkeley.edu/~kheimerl/pubs/vbts_nsdr10.pdf

4EE142-Fall 2010

Ugrad Research Projects (2)

2. TUSI project (Prof. Niknejad’s group at BWRC)

90GHz carrier, 40GHz BW UWB imager

Design of high-speed analog/RF blocks

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5EE142-Fall 2010

Input Termination

Let's take the most optimistic situation where the MOSFET noise is negligible. Then the noise figure due to the input termination resistor is bounded by

The termination adds 3 dB of noise figure! In sub-dB applications this is totally intolerable. In other applications, though, this may be a cheap and simple solution.

6EE142-Fall 2010

Common-Gate LNA

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7EE142-Fall 2010

Common Gate Noise Figure

8EE142-Fall 2010

Common Source with I/P Matching Network

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9EE142-Fall 2010

Another Look at FET Noise Figure

From last lecture we had:

Optimum Noise Figure:

Simplifying:

10EE142-Fall 2010

MOS LNA Example

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Example (2)

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MOS LNA (3)

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Matching Option 1

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Matching Option 2

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Matching Option 3

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Matching Option 3

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Source/ Emitter Degeneration

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Inductive Degeneration

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Series Resonant Input

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Q-Boosting

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Equivalent Circuit at Resonance

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Noise with Inductive Degeneration

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Drain Noise (with Degeneration)

24EE142-Fall 2010

Drain Noise (2)

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25EE142-Fall 2010

Total Output Noise and Noise Figure

26EE142-Fall 2010

Noise Figure with Degeneration

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27EE142-Fall 2010

LNA Chip/Package/Board Interface

28EE142-Fall 2010

Bond Wire Inductance

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Package Parasitics

30EE142-Fall 2010

Cascode LNA

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Noise from Cascode Device

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Cascode Noise

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Differential LNA Design