September 25-27, 2017Centre Microélectronique de Provence, Gardanne, Aix en Provence area (France)

PROGRAMME

Leading-EdgeEmbedded NVM

Workshop

e-NVM 2017 ©STMicroelectronics Rousset

Monday, September 25, 2017

8:45am: Registration

9:15am: Workshop opening (Bernard POLI, ARCSIS and Philippe Lale-vée, Ecole des Mines de Saint-Etienne - CMP)

9:30am: Keynote speaker, Betty Prince, Memory Strategies Internatio-nal, USA - «Embedded Non-Volatile Memories for Intelligent IoT»

Session 1 - Embedded flash memories Technology: state of the art and trends - Part 1 Chairman: Didier Nee, WISeKey, France

10:15am: «TSMC eNVM Technology» – Dan Kochpatcharin, TSMC (The Netherlands)

10:40am: Break

11:05am: «A new core transistor equipped with NVM functionality without using any emerging memory materials» – Yasuhiro Taniguchi, Floadia (Japan)

11:30am: «Scaling and Demonstration of 28nm Logic-Process-Compa-tible Split-Gate Flash Memory Technology» – Nhan Do, SST (USA)

11:55am: «A Highly Scalable Floating-Gate Cell for Embedded-Flash Applications» – Weiran Kong, Huahong Grace Semiconductor (China)

12:20pm: Lunch

Session 2 - Emerging and leading edge technologies for embedded NVM - Part 1Chairman: David Naura, INVIA, France

2:00pm: «Embedded charge-trap non-volatile memory tech-nologies at 40-nm node and beyond» – Igor Kouznetsov, Cypress Spansion (USA)

2:25pm: «Non-Volatile Resistive Memory: a Started Revolu-tion Towards the Memory of the Future» – Gabriele Navarro, CEA- LETI, MINATEC Campus (France)

2:50pm: «Leading logic NVM technlogy advancing into 7NM finfet node: Challenges and Solutions» – James Huang, eMe-mory (Taiwan)

3:15pm: «Voltage Compatibility of ReRAM operation with CMOS» – Dirk Wouters, RWTH Aachen University (Germany)

3:40pm: «FeFET - The ideal embedded NVM for the age of IoT» – Stefan Müller, Ferroelectric Memory (Germany)

4:05pm: Break

Session 3 - Device and architecture - Part 3Chairman: Philippe Boivin, STMicroelectronics, France

4:30pm: «SMIC Advanced eNVM Solutions For Security IOT» – Stephen Zhou, SMIC (China)

Programme

4:55pm: «Split-Gate Flash on 28-nm HKMG Logic Process For High-Speed Embedded Secure-Element Chip Applications» – Yong Kyu Lee, Samsung Electronics (Korea)

5:20pm: «SE-RICH GESE-BASED OTS Selector Engineering Targeting High Density Crossbar Resistive Memory» – Anthonin Verdy, CEA-Leti (France)

5:45pm: End of the conference day

Tuesday, September 26, 2017

8:45am: Registration

Session 2 - Emerging and leading edge technologies for embedded NVM - Part 2Chairman: David Naura, INVIA, France

9:00am: «Unleash new system architectures with Crossbar ReRAM for embedded applications and storage class memories» – Sylvain Dubois, Crossbar (USA)

9:25am: «40nm embedded ReRAM platform in foundry with highly reliable TaOx cell technology» – Takumi Mikawa, Panasonic (Japan)

9:50am: «High-performance and Low-power Operations with RRAM-based FPGAs» – Pierre-Emmanuel Gaillardon, Utah University (USA)

10:15am: «High-speed voltage-Control spintronics memory having high-efficiency of writting, a potential of unlimited endurance, and broad design windows» – Hiroaki Yoda, Toshiba (Japan)

10:40am: Break

ProgrammeSession 4 - Users, focus on connected objects, IoTChairman: Philippe Boivin, STMicroelectronics, France

11:05am: «Emerging NVM technologies: toward mass pro-duction in MCU embedded market» – Jérôme Azémar, Yole Developpement (France)

11:30am : «Inkjet - Printed Flexible Conductive Bridge RAM» – Bernhard Huber, Munich University of Applied Sciences (Ger-many) / INRS-EMT (Canada)

11:55am : «NVM technologies: A hardware security point of view» – Franck Courbon, University of Cambridge (U.K)

12:20pm : «Secure Characterisation of the OxRAM Techno-logy» – Alexis Krakovinsky, CEA & IM2NP (France)

12:45pm: Lunch / Poster session

Session 3 - Device and architecture - Part 2Chairman: Romain Wacquez, CEA-EMSE, France

2:00pm: «Multiscale Modeling of RRAM Devices for Memory and Neuromorphic Computing Applications» – Luca Larcher, University of Modena and Reggio Emilia (Italy)

2:25pm: «Toward non-volatile digital flows» – Virgile Javer-liac, eVaderis (France)

2:50pm: «Formal Design Space Exploration for Memristor-based Crossbar Architecture» – Marcello Traiola, LIRMM/ University of Montpellier (France)

3:15pm: «Resistive switching in narrow gap Mott Insulators» – Marie-Paule Besland, IMN Nantes (France)

3:40pm: Break

Session 1 - Embedded flash memories Technology: state of the art and trends - Part 2 Chairman: Didier Nee, WISeKey, France

4:05pm: «High and medium voltage devices integration on advanced eNVM» – Dann Morillon, STMicrolectronics (France)

4:30pm: «Ultra Low Power single poly non volatile memory for passive RFID applications» – Terry Lin, eMemory (Taiwan)

4:55pm: «Anti-Fuse, OTP NVM, the Only Memory Enabled at Every CMOS Process Node to 10nm Providing Code, Encryption Keys, & Confidential Data Storages» – Paolo Piacentini, Kilopass (USA)

5:20pm: «FinFET Split-Gate MONOS for Embedded Flash in 16/14nm-node and beyond» – Tomohiro Yamashita, Renesas Electronics (Japan)

5:45pm: End of the conference day 2

8:30pm: Conference dinner

Wednesday, September 27, 2017 8:45am: Registration

Session 2 - Emerging and leading edge technologies for embedded NVM - Part 3Chairman: Romain Wacquez, CEA-EMSE, France

Programme9:00am: «ESF3 Memory: Endurance Capability and Post-Cy-cling Data Retention» – Viktor Markov, STT (USA)

9:25am: «Overview of Conductive Bridging RAM (CBRAM): an ideal NVM for IoT Applications» - Philippe Blanchard, Adesto Technologies (USA)

9:50am: «Spin Orbit Torque MRAM-based circuits for non-vo-latile logic and memories» - Gregory Di Pendina, University of Grenoble Alpes/CNRS/CEA, INAC - SpintecLab (France)

10:15am: «From material to circuit : lead the embedded NVM to the next stage» - Vincenzo Della Marca, IM2NP (France)

10:40am: Break

Session 3 - Device and architecture - Part 3Chairman : Philippe Boivin, STMicroelectronics, France

11:05am: «Innovative design solutions for emerging NVM tech-nologies» - Gabriele Navarro, CEA-Leti (France)

11:30am: «Unconventional uses of embedded non-volatile memory: toward the “natively intelligent” memory» - Damien Querlioz, Paris-Sud University (France)

11:55am: «NVM chip for Machine Learning Operations» - Dimitrios Rodopoulos, IMEC (Belgium)

12:20pm: Lunch, end of the conference

2:00pm: End of the Conference

Posters

«Resistive Non Volatile Memories Characterization by Conductive Atomic Force Microscopy in Ultra High Vacuum»

A.K. Singh1, 2, 3, 4, S. Blonkowski1, and M. Kogelschatz2, 4

1STMicroelectronics, Crolles (France), 2Laboratoire des Technologies de la Microélectronique (LTM), CNRS & UGA, Grenoble (France), 3CEA-Leti Grenoble (France), 4Université Grenoble Alpes (UGA), Grenoble (France).

«Characterizing embedded device security from the hard-ware»

Dr. Franck Courbon, Computer Laboratory, University of Cambridge (United Kingdom)

Exhibitors

eMemory Technology Inc.

eMemory Technology Inc.8F, No.5, Tai-Yuan 1st St., Jhubei City, Hsinchu County 30288, TAIWAN

Contact name: Viola SUNGE-mail: viola@ememory.com.tw

Tel: +886-3-5601169Fax: +886-3-5601110

www.ememory.com.tw

Floadia

Floadia Corporation.1-30-9, Ogawa-Higashi, Kodaira-Ci-ty, Tokyo,JAPAN 187-0031

Contact name: Shusaku MIYABEE-mail: miyabe.zf@floadia.com

Tel: +81-42-346-5510

www.floadia.com

Exhibitors

SST (Silicon Storage Technology)

SST Ltd720 Wharfedale RoadWinnersh, RG41 5TPUNITED KINGDOM

Contact name: Chris BROWNE-mail:chris.brown@microchip.comPhone: +44 7785 11 11 10

www.sst.com

Kilopass Technology

Kilopass Technology Inc.2895 Zanker Road San Jose, CA 95134UNITED STATES

Contact name: Jonah MCLEOD E-mail: j.mcleod@kilopass.comPhone: 408-709-2819Mobile: 510-449-8634

www.kilopass.com

Organizing Committee:Bernard Poli, Director - ARCSIS

Corinne Joachin, Event Manager - ARCSIS Séverine Lémeri, Event Assistant - ARCSIS

+33 (0)4 42 53 81 50email: contact@e-nvm.org

website: http://www.e-nvm.org

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