Introduction to Flash Memories And Flash Translation Layer System Software LAB xearo@hufs.ac.kr.

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<ul><li>Slide 1</li></ul> <p>Introduction to Flash Memories And Flash Translation Layer System Software LAB xearo@hufs.ac.kr Slide 2 Storage Technologies Magnetic recording Optical recording Electronic memories Slide 3 Applications of Flash Memories Flash memory is the major type of NVM (more than 90% of NVM market) mobile devices embedded systems flash disks Slide 4 What is a flash memory cell? Slide 5 Slide 6 Physics of Flash Memory Cell array in a flash memoryA flash memory cell (Floating gate) A flash memory cell can store charge. And the charge level represents data. Slide 7 How does a cell store a bit? 0 Slide 8 1 Inject electrons: Hot electron injection mechanism, or Fowler-Nordheim tunneling mechanism Remove electrons: Fowler-Nordheim tunneling mechanism Slide 9 Single-level cell and Multi-level cell Single-level cell: Two levels One bit 0 cell Multi-level cell: q levels bits 1 cell 0 1 2 q-1 cell Typical number of cell levels: 2, 4, 8, 16 Slide 10 How is a cell programmed? Through multiple rounds of charge injection Target level A flash cell Source: [Bandyopadhyay, Serrano, Hasler 2005] Slide 11 Speed and physical limits Read: Fast Write: Slower (due to multiple rounds of programming) Erase: Very slow Speed of operations: Physical limits: Endurance. (In NOR, a block can stand about 100,000 to 1,000,000 erasures. In NAND, it can stand 10,000 to 100,000 erasures.) Physical size (e.g., 34nm). Voltage. Number of electrons. Slide 12 NOR and NAND Flash Memories NOR: Older, still used. NAND: Newer, much more popular now. Slide 13 What is a NOR flash memory 1. Cells form blocks. A block has about 100,000 cells. 2. NOR is a random-access device. Every cell is directly addressable by the processor. That is, a cell can be individually read and programmed. Word line Bit line Control gate Floating gate (-) Oxide layer DrainSource flash memory cell Slide 14 What is a NOR flash memory Block erasure!!!!!! Slide 15 Block erasure In NOR, the level of a cell can be increased individually and multiple times. But to lower any cell level, the whole block must be erased at the same time. block of cells Block Slide 16 What is a NAND flash memory Cells form blocks. Every block is an array. Every row is a page. Block page Typically: 512 to 2048 cells in a row (page) Typically: 32 to 128 rows (pages) Block erasure!!!!!! Read and write: A page as a unit. Slide 17 Writing a page in NAND Why?: Programming is not very accurate, especially with multiple times of writing (for the same page, and for the interference between pages). A page can be written only once before the block is erased. It is even recommended that the pages are written sequentially. Page 1 Page 2 Page 64 Partial writing: A page is partitioned into 4 parts, and we can write a part at a time. Part 1Part 2Part 3Part 4 A page Note: This is logic partition. Slide 18 A typical NAND page with spare bytes 2KB of dataA page: 64 Bytes of spare area Metadata ECC Undefined bits Slide 19 Comparison of NOR &amp; NAND flash Basic difference: Different ways to connect cells in a block. Additional difference: Ways to inject charge, used voltages. NOR: cells are independent NAND: Cells in the same column are connected (and disturb each other). Slide 20 Comparison of NOR &amp; NAND flash NOR:NAND: 6. Mainly to store code. 6. Mainly to store data. 1. Lower density.1. Higher density. 2. Random access.2. Page access. 3. More reliable.3. Less reliable, error-prone. (Requires ECCs.) 4. Slower erase.4. Faster erase. 5. Faster random read.5. Faster streaming read. Slide 21 Flash File System Wear leveling Garbage collection Mapping Slide 22 Wear leveling How to know the blocks level of wearing out: Count the number of erasures, or Measure the performance of its cells (e.g., erase latencies), or Other methods? Alternative approach: Just use randomization (i.e., randomly use the blocks, and hopefully, things will even out). Wear leveling: Let the blocks be erased about the same number of times. Method: Write data in different places (instead of the same block). Slide 23 Wear leveling techniques If all the data in a block are obsolete, just erase it. Write in blocks that are less worn out. What if the blocks contain both obsolete and valid data? Page 3: obsolete Page 4: obsolete Page 64: valid Page 1: valid Page 2: obsolete Simple case: Slide 24 Combining wear leveling with garbage collection This happens when we want to re-use those blocks that contain both valid and invalid (obsolete) data. Approaches: (1) Use a cost/benefit ratio to decide which block to erase. (Before erasing it, the valid data need to be moved first.) (2) Store frequently-changing data together, and store data that do not change much together. (Reason: After a while, in a block containing frequently-changing data, most of the data are probably already invalid.) (3) Many heuristic approaches. (And many patents.) Most important: Design it based on the application. Slide 25 When garbage collection is done Garbage collection (of blocks) can happen when: (1) As background work, i.e., when CPU is idle; or (2) On demand, i.e., when there is not enough free space. Slide 26 Mapping One approach: Treat the flash memory as a block device, much like disk sectors. Advantage: Allow standard file systems to use flash. Problems with a simple linear mapping from virtual blocks to flash-memory pages: Some blocks can be erased too often. Unable (or inefficient) to write data smaller than a flash block. Solution: Wear leveling (that is, to move data around). Mapping between virtual blocks and physical pages is needed. The spare part in a page may have bits indicating if the page is free/used or valid/obsolete. How to use flash memories to store data? Slide 27 Mapping Virtual blocks Physical pages Direct map Stored in RAM, or partially in RAM and partially in flash. Physical pages Virtual blocks Inverse map Stored in flash. Flash Translation Layer (FTL): A technique to (1)store some of the direct map in flash, and (2) reduce the cost of updating the maps stored in flash. Slide 28 Flash file systems Tens of flash file systems (FFS) have been designed. Clearly, more of them will be designed Is a data structure that represents a collection of mutable random-access files in a hierarchical name space. A flash file system: Provides the block mapping technique. Does wear leveling and garbage collection. Maybe design a different, more flash-specific file system? Do the same for data structures, such as B-trees and R-trees. Slide 29 More flash-specific file systems Most of the flash-specific file systems use the same overall principle, that of a log-structured file system. Why? It is easier to record the small changes (and write them down sequentially), than to rewrite the whole file. Slide 30 What happens when the blocks are read/erased/written again and again Slide 31 Disturb mechanisms Write/read disturb: When a cell is programmed (or read), the cells in the same column/row are softly programmed. For some MLC, it is even recommended that after reading the same page 1000 times, write the clean data back again. Slide 32 Errors, Signal processing, and ECCs When a block is erased, its quality goes down. The rate of errors increases Types of errors: Random errors. Fixed-position errors (because the cells really become defected). Cells in the same column can become bad together. Ways to correct errors: Signal processing ECCs (Hamming, BCH codes.) (Reed-Solomn codes? LDPC codes? Under study.) Slide 33 New Area in Information Theory: Coding for Flash Memories Slide 34 Summary of recent results Rewriting codes: Rank modulation: Error correcting/scrubbing codes: [Cassuto,Schwartz,Bohossian,Bruck,ISIT07], [Jiang,ISIT07], [Jiang,Li,Wang,CWIT09] Data movement: [Jiang,Mateescu,Yaakobi,Bruck,Siegel,Vardy,Wolf,ISIT09], [Jiang,Langberg,Mateescu,Bruck,Allerton09] Capacity: [Jiang,Bruck,ISITA08], [Lastras-Montano,Franceschini,Mittelholzer,Sharma,ISITA'08], [Lastras-Montano,Franceschini,Mittelholzer,Karidis,Wegman,ISIT'09], [Jiang,Li,PACRIM09] Worst-case performance: [Jiang,Bohossian,Bruck,ISIT07], [Bohossian,Jiang,Bruck,ISIT07], [Jiang,Bruck,ISIT08], [Yaakobi,Siegel,Vardy,Wolf,Allerton08], [Jiang,Langberg,Schwartz,Bruck,ISIT09], [Mahdavifar,Siegel,Vardy,Wolf,Yaakobi,ISIT'09] Expected performance: [Finucane,Liu,Mitzenmacher,Allerton08], [Jiang,Langberg,Schwartz,Bruck,ISIT09] Rewriting: [Jiang,Mateescu,Schwartz,Bruck,ISIT08] Error-correction codes: [Jiang,Schwartz,Bruck,ISIT08] Sequences: [Jiang,Mateescu,Schwartz,Bruck,ISIT08], [Wang,Jiang,Burck,ISIT09] Slide 35 Rewriting codes WOM (write-once memory) code Floating code: Joint coding of multiple variables Example: 2 bits are stored in 3 cells with 4 levels. Every time one bit is changed. How many rewrites can be supported? 0,0 0,1 1,0 1,1 0,0 0,1 1,0 1,1 Now use floating codes. Slide 36 Floating codes Example: 2 bits are stored in 3 cells with 4 levels. Every time one bit is changed. cell levels data Slide 37 Rewriting codes WOM (write-once memory) code Floating code: Joint coding of multiple variables Example: 2 bits are stored in 3 cells with 4 levels. Every time one bit is changed. How many rewrites can be supported? 0,0 0,1 1,0 1,1 Now use floating codes. 0,0 0,1 1,0 1,1 3 writes 7 writes Slide 38 Floating codes When two binary variables are stored in n cells of q levels, an optimal floating code can support rewrites. When k variables of alphabet size L are stored in n cells of q levels, the number of rewrites that a floating code can support is: If n is large rewrites If k,L are large Roughly rewrites No coding Roughly rewrites times better Slide 39 More general model for rewriting Floating codes: Every rewrite changes one variable. State transitions of data Example: 3 binary variables 000100 010110 001101 011111 Hypercube Buffer codes: Remember most recent data. [BJB07] 011010100010010010111101 State transitions of data: De Bruijn graph More general: [JLSB09] The data change in a bounded-degree graph. Maximum degree: Slide 40 Trajectory code for bounded-degree rewrite Model: The state-transition diagram of the data has bounded degree. [Jiang, Langberg, Schwartz, Bruck, ISIT09] This code is asymptotically optimal. Slide 41 Rank Modulation [J, Mateescu, Schwartz, Bruck, ISIT08] Slide 42 Cell Programming Noisy, monotonic Trend: more levels, smaller cells Question: How to write data reliably when cells cannot be programmed reliably? Challenges: overshoot, worst-case constraint. Approach: adaptive cell-ensemble programming. Rank modulation is such an approach. Slide 43 Rank Modulation Analog cell levels induce permutations. Example: 3 cells can induce 3!=6 permutations Permutations represent data. Method of programming: from low to high. Advantage: no overshoot, adaptive coding. 123 132213231312321 Slide 44 Rewriting; Error correction Rewrite: How to rewrite data in the rank modulation scheme? Error correction: How to design error- correcting codes? What does error mean? Slide 45 A few other topics: (3) Data movement Block 1Block 2Block nEmpty block [Jiang, Mateescu, Yaakobi, Bruck, Siegel, Vardy, Wolf, ISIT09] No coding: erasures are needed. With coding: erasures are needed. Slide 46 Summary of recent results Rewriting codes: Rank modulation: Error correcting/scrubbing codes: [Cassuto,Schwartz,Bohossian,Bruck,ISIT07], [Jiang,ISIT07], [Jiang,Li,Wang,CWIT09] Data movement: [Jiang,Mateescu,Yaakobi,Bruck,Siegel,Vardy,Wolf,ISIT09], [Jiang,Langberg,Mateescu,Bruck,Allerton09] Capacity: [Jiang,Bruck,ISITA08], [Lastras-Montano,Franceschini,Mittelholzer,Sharma,ISITA'08], [Lastras-Montano,Franceschini,Mittelholzer,Karidis,Wegman,ISIT'09], [Jiang,Li,PACRIM09] Worst-case performance: [Jiang,Bohossian,Bruck,ISIT07], [Bohossian,Jiang,Bruck,ISIT07], [Jiang,Bruck,ISIT08], [Yaakobi,Siegel,Vardy,Wolf,Allerton08], [Jiang,Langberg,Schwartz,Bruck,ISIT09], [Mahdavifar,Siegel,Vardy,Wolf,Yaakobi,ISIT'09] Expected performance: [Finucane,Liu,Mitzenmacher,Allerton08], [Jiang,Langberg,Schwartz,Bruck,ISIT09] Rewriting: [Jiang,Mateescu,Schwartz,Bruck,ISIT08] Error-correction codes: [Jiang,Schwartz,Bruck,ISIT08] Sequences: [Jiang,Mateescu,Schwartz,Bruck,ISIT08], [Wang,Jiang,Burck,ISIT09] </p>