Institutionen för systemteknik - DiVA portalliu.diva-portal.org/smash/get/diva2:174382/FULLTEXT01.pdf · 2009. 2. 21. · chapter. References to sections, tables and ﬁgures within

Institutionen för systemteknikDepartment of Electrical Engineering

Examensarbete

Precision Amplifier for Applications inElectrical Metrology

Examensarbete utfört i Elektroniksystemvid Tekniska högskolan i Linköping

av

Stefan Johansson

LiTH-ISY-EX--09/4205--SE

Linköping 2009

Department of Electrical Engineering Linköpings tekniska högskolaLinköpings universitet Linköpings universitetSE-581 83 Linköping, Sweden 581 83 Linköping

Precision Amplifier for Applications inElectrical Metrology

Examensarbete utfört i Elektroniksystemvid Tekniska högskolan i Linköping

av

Stefan Johansson

LiTH-ISY-EX--09/4205--SE

Handledare: Valter TarassoSP, Sveriges Tekniska Forsknings Institut

Karl-Erik RydlerSP, Sveriges Tekniska Forsknings Institut

Examinator: Per Löwenborgisy, Linköpings universitet

Linköping, 13 February, 2009

Avdelning, InstitutionDivision, Department

Division of Electronics SystemsDepartment of Electrical EngineeringLinköpings universitetSE-581 83 Linköping, Sweden

DatumDate

2009-02-13

SpråkLanguage

Svenska/Swedish Engelska/English

RapporttypReport category

Licentiatavhandling Examensarbete C-uppsats D-uppsats Övrig rapport

URL för elektronisk versionhttp://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-16896

ISBN—

ISRNLiTH-ISY-EX--09/4205--SE

Serietitel och serienummerTitle of series, numbering

ISSN—

TitelTitle

Precisionsförstärkare för tillämpning inom elektrisk metrologiPrecision Amplifier for Applications inElectrical Metrology

FörfattareAuthor

Stefan Johansson

SammanfattningAbstract

This master’s thesis addresses two main problems. The first is how to suppress acommon mode voltage that appears for current shunts, and the second how to leta voltage divider work under an unloaded condition to prevent loading errors andthereby a decreased measurement accuracy. Both these problems occurs duringcalibration of power meters, and verification of current shunts and voltage dividers.

To the first problem three alternative solutions are presented; prototype a pro-posed instrumentation amplifier circuit, evaluate the commercial available instru-mentation amplifier Analog Devices AD8130 or let the voltage measuring devicesuppress the common mode voltage. It is up to the researchers at SP to choose asolution.

To address the second problem, a prototype buffer amplifier is built and ver-ified. Measurements of the buffer amplifier show that it performs very well. At100 kHz, the amplitude error is less than 20 µV/V, the phase error is less than20 µrad, and the input Rp is over 10 MΩ. This is performance in line with therequired to make accurate measurements possible at 100 kHz and over that.

NyckelordKeywords Electrical, Metrology, Precision, Buffer, Amplifier, CMRR

AbstractThis master’s thesis addresses two main problems. The first is how to suppress acommon mode voltage that appears for current shunts, and the second how to leta voltage divider work under an unloaded condition to prevent loading errors andthereby a decreased measurement accuracy. Both these problems occurs duringcalibration of power meters, and verification of current shunts and voltage dividers.

To the first problem three alternative solutions are presented; prototype a pro-posed instrumentation amplifier circuit, evaluate the commercial available instru-mentation amplifier Analog Devices AD8130 or let the voltage measuring devicesuppress the common mode voltage. It is up to the researchers at SP to choose asolution.

To address the second problem, a prototype buffer amplifier is built and ver-ified. Measurements of the buffer amplifier show that it performs very well. At100 kHz, the amplitude error is less than 20 µV/V, the phase error is less than20 µrad, and the input Rp is over 10 MΩ. This is performance in line with therequired to make accurate measurements possible at 100 kHz and over that.

SammanfattningDenna examensarbetesrapport behandlar två huvudsakliga problem. Det förstaär hur en common mode spänning som uppstår i strömshuntar ska undertryckasoch det andra hur spänningsdelare ska förmås att arbeta olastat för att undvikabelastningsfel och därmed minskad mätnoggrannhet. Båda dessa problem uppstårvid kalibrering av effektmätare och verifiering av spänningdelare och strömshuntar.

Till det förstnämnda problemet föreslås tre alternativa lösningar; tillverka enprototyp till en anslagen kretslösning, evaluera den kommersiellt tillgängliga in-strument förstärkaren Analog Devices AD8130 eller låt det spänningsmätandeinstrumentet undertrycka common mode spänningen. Det är upp till forskarna påSP att välja en lösning.

För att lösa problem nummer två, byggs och verifieras en buffertförstärkarpro-totyp. Mätningar på den visar ett amplitudfel på mindre än 20 µV/V, ett fasfelpå mindre än 20 µrad, och ett ingångs Rp på över 10 MΩ vid 100 kHz. Detta ärprestanda i linje med kraven för att möjliggöra precisa mätningar vid 100 kHz ochdäröver.

v

Acknowledgments

First I would like to thank SP, Technical research institute of Sweden for giving methe opportunity to write this thesis, especially my supervisors Valter Tarasso andKarl-Erik Rydler. I would also like to thank many other employees at SP for givingme support and advices during this work, Ilya Budowsky at National MeasurementInsitute Australia, NMIA, for the correspondence on the buffer amplifier and atlast my examiner at Linköpings universitet Per Löwenborg.

I would also like to thank my near and beloved for their constant support.

vii

Contents

1 Introduction 31.1 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3 Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Background 52.1 Current Shunts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 Voltage Dividers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.3 Why Amplifiers? . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.3.1 Calibration of Power Meters . . . . . . . . . . . . . . . . . . 62.3.2 Verification of Current Shunts . . . . . . . . . . . . . . . . . 72.3.3 Verification of Voltage Dividers . . . . . . . . . . . . . . . . 8

2.4 Performance Goals . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Theory 113.1 Properties of Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1.1 Amplifier Model . . . . . . . . . . . . . . . . . . . . . . . . 113.1.2 Input and Output Impedances . . . . . . . . . . . . . . . . 123.1.3 Offset Voltage and Bias Current . . . . . . . . . . . . . . . 123.1.4 Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.1.5 Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.1.6 THD and SINAD . . . . . . . . . . . . . . . . . . . . . . . . 133.1.7 Differential and Single-Ended . . . . . . . . . . . . . . . . . 143.1.8 Common Mode Voltage . . . . . . . . . . . . . . . . . . . . 143.1.9 Differential Mode Voltage . . . . . . . . . . . . . . . . . . . 143.1.10 Common Mode Rejection Ratio . . . . . . . . . . . . . . . . 15

3.2 Operational Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . 153.2.1 Operation of Ideal Op-Amps . . . . . . . . . . . . . . . . . 153.2.2 Feedback Circuits with Op-Amps . . . . . . . . . . . . . . . 16

3.3 Amplifier Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.3.1 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . 173.3.2 Non-Inverting Amplifier . . . . . . . . . . . . . . . . . . . . 183.3.3 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . 183.3.4 Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . 19

ix

x Contents

4 Differential Amplifier 214.1 Required Performance, Differential Amplifier . . . . . . . . . . . . 21

4.1.1 Common Mode Voltage Suppression . . . . . . . . . . . . . 214.1.2 Input Impedance . . . . . . . . . . . . . . . . . . . . . . . . 224.1.3 Slew Rate Calculation . . . . . . . . . . . . . . . . . . . . . 234.1.4 Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.1.5 Table of Performance . . . . . . . . . . . . . . . . . . . . . 24

4.2 Commercially Available Amplifiers . . . . . . . . . . . . . . . . . . 244.2.1 AD8221 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.2.2 AD8130 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.3 Custom Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.3.1 Bootstrapped Three Op-Amp Instrumentation Amplifier . . 254.3.2 Instrumentation Amplifier Using CCCII . . . . . . . . . . . 27

4.4 Digitizer in Differential Mode . . . . . . . . . . . . . . . . . . . . . 284.4.1 Digital Instrumentation Amplifier . . . . . . . . . . . . . . 29

4.5 Comparasion Between Different Options . . . . . . . . . . . . . . . 29

5 Single-Ended Amplifier 315.1 Required Performance, Single-Ended Amplifier . . . . . . . . . . . 31

5.1.1 Input Impedance . . . . . . . . . . . . . . . . . . . . . . . . 315.1.2 Table of Performance . . . . . . . . . . . . . . . . . . . . . 32

5.2 Commercially Available Buffer Amplifiers . . . . . . . . . . . . . . 335.3 Custom Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.3.1 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . 355.4 Comparasion Between Different Options . . . . . . . . . . . . . . . 36

6 Design of Buffer Amplifier 376.1 Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.1.1 Op-amp Used in Version 1.0 . . . . . . . . . . . . . . . . . . 376.1.2 Remaining Components . . . . . . . . . . . . . . . . . . . . 38

6.2 Power Supply Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 386.3 PCB Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

7 Verification of Buffer Amplifier 417.1 Amplitude and Phase Measurement System . . . . . . . . . . . . . 42

7.1.1 Alternative Phase Error Calculation . . . . . . . . . . . . . 437.1.2 Alternative Amplitude Error Measurement . . . . . . . . . 43

7.2 Input Impedance Measurements . . . . . . . . . . . . . . . . . . . . 447.3 Measurement Results Version 1.0 . . . . . . . . . . . . . . . . . . . 44

7.3.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 467.4 New Op-Amps, Buffer Amplifier 1.1 . . . . . . . . . . . . . . . . . 46

7.4.1 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . 477.5 Measurement Results Version 1.1 . . . . . . . . . . . . . . . . . . . 48

7.5.1 Amplitude and Phase . . . . . . . . . . . . . . . . . . . . . 487.5.2 Input Impedance . . . . . . . . . . . . . . . . . . . . . . . . 497.5.3 THD and SINAD . . . . . . . . . . . . . . . . . . . . . . . . 50

Contents xi

7.5.4 Power Supply Voltage Dependency . . . . . . . . . . . . . . 507.5.5 Ambient Temperature Dependency . . . . . . . . . . . . . . 517.5.6 Warm-Up Time . . . . . . . . . . . . . . . . . . . . . . . . . 527.5.7 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8 Discussion and Conclusions 578.1 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 578.2 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Bibliography 59

A Schematics 63

B Plots 67

List of Figures2.1 Present configuration for calibration of power meters at SP. . . . . 62.2 Calibration of power meter using a digitizer. The two marked nodes

will have the same potential. . . . . . . . . . . . . . . . . . . . . . 72.3 Calibration of power meter using a digitizer and amplifiers. . . . . 72.4 Verification of current shunts. The two marked nodes will have the

same potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.5 Verification of current shunts with differential amplifiers. . . . . . . 82.6 Verification of voltage dividers with buffer amplifiers. . . . . . . . . 9

3.1 Amplifier model, [15]. . . . . . . . . . . . . . . . . . . . . . . . . . 113.2 Definition of bandwidth, [15]. . . . . . . . . . . . . . . . . . . . . . 133.3 Differential amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . 143.4 Operational amplifier symbol. . . . . . . . . . . . . . . . . . . . . . 163.5 Inverting amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.6 Non-inverting amplifier. . . . . . . . . . . . . . . . . . . . . . . . . 183.7 Differential amplifier with a single op-amp. . . . . . . . . . . . . . 193.8 Three op-amp instrumentation amplifier . . . . . . . . . . . . . . . 20

4.1 Model used when calculating input impedance. . . . . . . . . . . . 224.2 Compensation stage of the instrumentation amplifier. . . . . . . . 264.3 IA with three CCCIIs. . . . . . . . . . . . . . . . . . . . . . . . . . 284.4 Specified CMRR for the PXI-5922 in differential mode, [9]. . . . . 29

5.1 Input impedance model. . . . . . . . . . . . . . . . . . . . . . . . . 325.2 Sketch of the buffer amplifier. . . . . . . . . . . . . . . . . . . . . . 335.3 Input stage of the buffer amplifier. . . . . . . . . . . . . . . . . . . 345.4 Vector diagram of correction principle. . . . . . . . . . . . . . . . . 355.5 Output stage of buffer amplifier. . . . . . . . . . . . . . . . . . . . 36

6.1 Power supply of the buffer amplifier prototype. . . . . . . . . . . . 386.2 PCB layout of the buffer amplifier prototype. . . . . . . . . . . . . 39

7.1 The assembled buffer amplifier prototype. . . . . . . . . . . . . . . 417.2 Principle of frequency sweep in Signal Express. . . . . . . . . . . . 427.3 Amplitude and phase error measuring setup with digitizer. . . . . . 437.4 Amplitude error of the buffer amplifier in version 1.0. . . . . . . . 457.5 Amplitude error of the buffer amplifier in version 1.0 measured with

AC-DC transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457.6 Phase error of the buffer amplifier in version 1.0. . . . . . . . . . . 467.7 The upper line shows the phase error of the buffer amplifier in ver-

sion 1.0 - from RMS. . . . . . . . . . . . . . . . . . . . . . . . . . . 467.8 Input impedance of buffer amplifier version 1.0. . . . . . . . . . . . 477.9 Amplitude and phase error average of the buffer amplifier in version

1.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 497.10 Standard deviation of three amplitude and phase error measurements. 50

2 Contents

7.11 Input Rp of the buffer amplifier in version 1.1. . . . . . . . . . . . 517.12 Input Cp of the buffer amplifier in version 1.1. . . . . . . . . . . . . 517.13 SINAD and THD of the buffer amplifier in version 1.1. . . . . . . . 527.14 Standard deviation with three different power supply voltages. . . 537.15 Ambient temperature dependency test setup. . . . . . . . . . . . . 547.16 Difference in amplitude and phase error from 23 to 15 and 25 . . 547.17 Amplitude and phase error the first 10 min after startup at 113 kHz. 55

A.1 Three op-amp instrumentation amplifier with compensation. . . . . 64A.2 IA with three CCCII. . . . . . . . . . . . . . . . . . . . . . . . . . 65A.3 Buffer amplifier version 1.1. . . . . . . . . . . . . . . . . . . . . . . 66

B.1 CMRR of three op-amp IA with compensation. . . . . . . . . . . . 68B.2 Amplitude and Phase of buffer amplifier with AD817. . . . . . . . 69B.3 Input Rp of buffer amplifier version 1.0. . . . . . . . . . . . . . . . 70B.4 Amplitude and phase error measurement with disturbances. . . . . 71B.5 Spectrum of the measurement environment. . . . . . . . . . . . . . 71B.6 Amplitude and phase error buffer amplifier version 1.1. . . . . . . . 72B.7 Difference in amplitude and phase error from 23 to 20 and 30 . . 72B.8 DC-offset change the first 15 min after startup. . . . . . . . . . . . 73

List of Tables2.1 Performance goals at 100 kHz for current shunts with 5 A input and

0.8 V voltage drop. . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.2 Performance goals at 100 kHz for voltage dividers with 240 V input

and 0.8 V output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1 Required performance of the differential amplifier at 100 kHz. . . . 244.2 Measured CMRR of PXI-5922 in differential mode. . . . . . . . . . 28

5.1 Required performance of the single ended amplifier at 100 kHz. . . 32

7.1 Input resistance, Rp, in MΩ of the buffer amplifier in version 1.1measured by AC-DC transfer standards. . . . . . . . . . . . . . . . 50

Chapter 1

Introduction

This final year master’s thesis in Applied Physics and Electrical Engineering wascarried out at SP, Technical Research Institute of Sweden.

1.1 Structure

After this introduction the background and theory chapters will give the reader afoundation needed to understand the contents of this thesis. Some of the expres-sions used in the background chapter are not explained until the theory chapter,so for some readers it might be a good idea to start with the latter. After this,the two problems occupy one chapter each and the design of a prototype and ver-ification of it occupies the two last chapters before the discussion and conclusionschapter.

References to sections, tables and figures within this report are written asplain numbers. The first digit represents the number of the chapter (or letterif appendix) and the second is a serial digit. Equations are referred to withincommon brackets ( ) and references to printed books, articles or websites thatwere used during research are written within square brackets [ ].

Large schematics and plots have been moved to appendix to not disturb theoutline of this report.

1.2 Method

The first step in this project was to translate the accuracy of the measurementparameters stated in Section 2.4 into properties of amplifiers. After that themarket was scanned for amplifiers meeting the requirements. Some examples ofamplifiers with performance at least somewhat close to the desired are describedin Section 4.2 and Section 5.2. When no amplifier with good enough performancewas found development of new designs were started.

3

4 Introduction

1.3 ResourcesThe main sources for this work have been scientific articles. Most of them havebeen PDF-files downloaded from databases e.g. IEEE Xplore. Documentation ofexisting amplifiers and components used in the design have been downloaded fromweb pages of hardware manufacturers. PSPICE models for components have alsobeen downloaded from manufacturers web pages. There are a lot of books andarticles on the topic of interest but since the performance needed is extraordinary,the amount of interesting literature is reduced substantially.

The simulation tool PSPICE and circuit layout application OrCAD Capturewas widely used to evaluate performance of different amplifier topologies andmonolithic integrated amplifiers. Later on when it was decided to build a pro-totype EDWin XP, was used to layout the printed circuit board (PCB). EDWinXP is a very powerful tool but has a quite complicated user interface. To measurethe performance of the built prototype available measurement apparatus at SPwas used and all data processing was performed in MathWorks MATLAB.

Chapter 2

Background

The Technical Research Institute of Sweden, SP, section of electrical measure-ments, manufactures and sells current shunts and voltage dividers designed foraccurate measurements in the power frequency range. Today the current shuntsand voltage dividers are specified from DC up to a few kHz but there is a demandto specify them for higher frequencies. Limitations in the measurement systemused at SP makes verification for higher frequencies impossible and as a step inthe development of the measurement system there is a need for precision amplifiers.

2.1 Current ShuntsA current shunt is basically a resistor in which a certain current flows that corre-sponds to a specified voltage drop. This is a way to convert a current into a voltagewhich is easier to measure. The current shunts developed at SP consist of severalhigh quality resistors mounted in a way that minimizes the effect of parasitics, thedesign is described in [19].

2.2 Voltage DividersVoltage dividers are used at SP to convert a high voltage to a lower one. Itimplements a common resistive voltage divider with several series resistors to sharethe power dissipation and a few features to improve the performance. Capacitivecompensation of the phase angle due to capacitive loading of the output, togetherwith a capacitive guard divider to minimize the effect of stray capacitances areexamples of this. More information about the voltage dividers can be found in[18].

2.3 Why Amplifiers?To be able to verify current shunts and voltage dividers, and calibrate powermeters up to 100 kHz with high accuracy, equipment with very good performance

5

6 Background

is needed. In the following sections the problems that occur for high frequencysignals are described and possible solutions are briefly introduced.

2.3.1 Calibration of Power MetersThe configuration in Figure 2.1 is the present configuration used for calibration ofpower meters at SP. This system is described in more detail in [23]. DVM is anabbreviation for Digital Volt Meter.

Figure 2.1. Present configuration for calibration of power meters at SP.

This configuration is limited to 20 kHz due to the sample frequency of theDVMs. Another voltmeter is needed and for this purpose a two channel digitizerthat can measure voltage up to 250 kHz with 24 bits resolution is available, seespecifications in [7]. The new measurement configuration can be seen in Figure2.2.

The problem with this configuration is that the two low terminals of the twochannel digitizer are internally connected – the high terminal of the current partof the power meter and the low terminal of the voltage input will have the samepotential. If the voltage source and current source are grounded, the current shuntis short-circuited. In other words, the two inputs of the digitizer must be separated.One way to do this is to use an instrumentation amplifier, see Section 3.3.4, andinput the differential voltage to the high input of the digitizer, as viewed in Figure2.3. To propose solutions to this problem is the first topic of this thesis.

The second topic of this thesis is how to make the voltage divider work under anunloaded condition. The relatively high output impedance of the voltage dividermeans that a very high input impedance load is needed to prevent loading errorsmaking accurate measurements possible.

2.3 Why Amplifiers? 7

Figure 2.2. Calibration of power meter using a digitizer. The two marked nodes willhave the same potential.

Figure 2.3. Calibration of power meter using a digitizer and amplifiers.

2.3.2 Verification of Current ShuntsA similar problem as described in Section 2.3.1 occurs when the amplitude andphase of current shunts is to be verified. Two shunts must lead the same currentand are therefore connected in series. The upper of the two has known phase-and amplitude characteristics and acts as a reference while the lower is verified,

8 Background

see Figure 2.4. When the digitizer is used, instead of two DVMs, to measure thevoltage over the two current shunts, the potential on the low side of the currentshunts will be the same, making the verification impossible.

Figure 2.4. Verification of current shunts. The two marked nodes will have the samepotential.

To solve the problem an instrumentation amplifier can be used to input thedifferential voltage to the digitizer and suppress the common mode voltage thatappears for the upper shunt. Figure 2.5 shows how this can be done.

Figure 2.5. Verification of current shunts with differential amplifiers.

2.3.3 Verification of Voltage DividersTo verify the phase- and amplitude characteristics of voltage dividers, two voltagedividers are connected in parallel. This configuration will not give any problemswith a common mode voltage since the voltage dividers share the reference point.The issue in this case is instead to let the voltage divider work under an unloadedcondition and thereby prevent loading errors. This is achieved by adding a highinput impedance amplifier between the current shunt and digitizer, see Figure 2.6.

2.4 Performance Goals 9

Figure 2.6. Verification of voltage dividers with buffer amplifiers.

2.4 Performance GoalsThe goal is to design or find amplifiers making verification with an accuracy ac-cording to Tables 2.1 and 2.2 possible at 100 kHz.

Table 2.1. Performance goals at 100 kHz for current shunts with 5 A input and 0.8 Vvoltage drop.

Amplitude ≤ 10 µV/VPhase ≤ 100 µrad

Table 2.2. Performance goals at 100 kHz for voltage dividers with 240 V input and0.8 V output.

Amplitude ≤ 20 µV/VPhase ≤ 200 µrad

Chapter 3

Theory

This chapter will give the reader a good foundation of theory needed to understandthe contents of this thesis. The reader is assumed to have basic knowledge inelectrical science.

3.1 Properties of AmplifiersThere are some important amplifier properties and relations that must be wellknown by the reader. This section will present some of the most important prop-erties for this work.

3.1.1 Amplifier Model

A simple but still very useful model of an amplifier is shown in Figure 3.1. Itis characterised by the input impedance, Rin, voltage amplification, Av, and theoutput impedance, Rut. If a load resistance, RL, is connected in parallel with theoutput, the transfer function of the amplifier can be derived using voltage division,see Equation (3.1), [15].

Figure 3.1. Amplifier model, [15].

11

12 Theory

UoutUin

= Av ·RL

RL +Rout⇒ Uout

Ug= RinRin +Rg

·Av ·RL

RL +Rout(3.1)

3.1.2 Input and Output ImpedancesWhen a load is connected to an amplifier the output impedance becomes impor-tant. The amplifier must be able to provide enough current without a change inoutput voltage. The maximum output current is of course limited in all amplifiers.The output impedance of the amplifier in Figure 3.1 is equal to Rout.

To prevent loading errors the input, impedance must be sufficiently high. Thisis especially important in measurement technology to get accurate measurements.For the amplifier model in Figure 3.1 the input impedance is easily calculated.Ohm’s law directly gives Equation (3.2).

Zin = UinIin

(3.2)

The input impedance of an amplifier can be modelled as a resitor, Rp, in parallelwith a capacitor, Cp. Due to the simple model Rp is often frequency dependent,Rp(f). Equation (3.4) and (3.5) show how Rp(f) and Cp are calculated when Uinand Iin are measured. See [16] for the equations in (3.3).

1Z = Y = G+ jB

Zin = UinIin

G = 1Rp

B = 2πfCp

⇒ (3.3)

Rp(f) = 1G

= 1Re(Y ) = 1

Re( 1Z )

= 1Re( IinUin )

(3.4)

Cp = B

2πf = Im(Y )2πf =

Im( 1Z )

2πf =Im( IinUin )

2πf (3.5)

3.1.3 Offset Voltage and Bias CurrentWhen an amplifier is fed with zero volts, the output should ideally be zero volts.Due to imbalances in the input stage, the output voltage can be slightly shiftedfrom zero. The voltage that must be applied to give zero volts at the output iscalled offset voltage.

The ideal operational amplifier, see Section 3.2.1, has no input currents, butthere are in reality small input currents, called input bias currents, that must bethere to drive the amplifier. To minimize the effect of the input bias currents theinput DC resistance should be kept the same for both inputs of the amplifier, [15].

3.1 Properties of Amplifiers 13

3.1.4 BandwidthThe bandwidth of an amplifier is usually defined as the frequency where the outputvoltage has dropped with a factor 1√

2 , which corresponds to a drop of 3 dB, seeFigure 3.2. This definition is inappropriate for an amplifier with high performanceand accuracy but gives a good hint of the performance when comparing differentamplifiers, [15].

Figure 3.2. Definition of bandwidth, [15].

3.1.5 Slew RateSlew rate describes how fast an amplifier is. In other words, how big voltage swingit can provide under a certain time. When working with high frequencies and largevoltage swings an amplifier with high slew rate is a must, [15].

slew rate =∣∣∣∣dU(t)dt

∣∣∣∣max

(3.6)

3.1.6 THD and SINADTHD is an abbreviation for Total Harmonic Distortion and can be defined inseveral different ways. Here it is defined as a percentage of how large the powerof the harmonics is relative the power of the fundamental frequency, see Equation(3.7).

THD =

n∑i=2

Pi

P1(3.7)

Signal-to-noise-and-distortion ratio, SINAD, is the ratio of the root-mean-square (RMS) value of the fundamental frequency to the mean value of the root-sum-square (RSS) of all other spectral components excluding DC, and is givenin dB. SINAD is a good metrics of the dynamic performance of an amplifier justbecause it includes both noise and harmonics. Equation (3.8) defines SINAD.

14 Theory

Under the same circumstances SINAD is equal to THD + N (Total HarmonicDistortion + Noise), with the difference that THD + N often is given as a per-centage, [10].

SINAD = 20 log(

PsignalPnoise + Pdistortion

)(3.8)

3.1.7 Differential and Single-EndedThe amplifier in Figure 3.1 is a single-ended amplifier. An amplifier with two inputsis called differential amplifier. It amplifies the difference between the two inputsignals, see Figure 3.3. A differential amplifier can have either one or two outputs,if there are two outputs the amplifier is called fully differential. Amplifiers with adifferential input and a single-ended output are more common and very useful inmany applications. The output voltage of such an amplifier can, for the ideal case,be expressed as in Equation (3.9). Where Av denotes the voltage amplificationand U1 and U2 the two voltage inputs, [15].

Figure 3.3. Differential amplifier.

Uout = Av · (U1 − U2) (3.9)

3.1.8 Common Mode VoltageThe part of the input voltage that is the same of the two inputs of an differentialamplifier is called common mode voltage (UCM ) and is equal to the mean of theinputs, see Equation (3.1.8), [15].

UCM = U1 + U2

2 (3.10)

3.1.9 Differential Mode VoltageThe difference between the input signals is called differential mode voltage (UDM ),see Equation (3.1.9), [15].

UDM = U1 − U2 (3.11)

3.2 Operational Amplifier 15

3.1.10 Common Mode Rejection RatioAs expressed earlier, an ideal differential amplifier only amplifies the differentialvoltage. But since an amplifier with zero common mode amplification does notexist, Equation (3.9) must be rewritten to Equation (3.12). Here AvDM is thedifferential mode gain and AvCM is the common mode gain.

Uout = AvDM · UDM +AvCM · UCM (3.12)

The ability of a differential amplifier to reject common mode voltages is calledcommon mode rejection ratio, CMRR, and is defined by Equation (3.13).

CMRR = AvDMAvCM

(3.13)

CMRR is usually given in dB according to Equation (3.14).

CMRRdB = 20 log(AvDMAvCM

)(3.14)

The common mode gain of a differential amplifier is normally an unknownparameter, this calls for a rewriting of Equation (3.14). When a common modesignal is applied to the differential amplifier the second part of Equation (3.12) iszero which gives Equation (3.15). Combining that and Equation (3.14) yields aneasier way to calculate and measure CMRR, see Equation (3.16), [6].

Uout = AvCM · UCM ⇒ AvCM = UoutUCM

(3.15)

CMRRdB = 20 log(AvDM · UCM

Uout

)(3.16)

3.2 Operational AmplifierThe operational amplifier (op-amp) is a common and very important buildingblock in analogue electronics. It was introduced in the end of 1940’s, in otherwords about the same time as the transistor. The first op-amps were built fromelectron tubes. A monolithic integrated circuit op-amp using transistors was firstdesigned by Bob Widlar at Fairchild semiconductors 1964. In the following yearshe designed many well known op-amps, one of them, the µA741 might be one ofthe most used op-amps ever, [13].

3.2.1 Operation of Ideal Op-AmpsThe symbol of an op-amp is shown in Figure 3.4. It consists of a differential inputpair, one inverting and one non-inverting input, and a single-ended output. Vccand Vee is the positive and negative power supply connections respectively. Theideal op-amp have infinite input impedance, no offset voltage and zero outputimpedance. The bandwidth of the ideal op-amp is infinite and so is the open-loop

16 Theory

Figure 3.4. Operational amplifier symbol.

gain. The ideal op-amp is far from reality, but it makes calculations of op-ampcircuits easy and is often a sufficient model. The behaviour of an ideal op-amp isdescribed by Equations (3.17) and (3.18).

Uout = Vcc for Uin+ > Uin− (3.17)

Uout = Vee for Uin+ < Uin− (3.18)

This behaviour makes the op-amp very suitable for comparator circuits, but mightseem to be a strange behaviour of an amplifier. To get a proper amplifier functionfrom an op-amp there is a need of feedback. The feedback circuit forces the op-ampto work in the active area between the two extreme values Vcc and Vee, [6].

3.2.2 Feedback Circuits with Op-AmpsOp-amps are almost always used in feedback circuits. The principle is that apart of the output signal is coupled back to the input to cancel parts of it. Thismakes it possible to get a predictable gain of op-amp circuits. Feedback has manyother benefits as well, for example increased linearity, which also leads to reduceddistortion, [6]. Equation (3.19) shows the transfer function of a feedback circuit.Where Avo denotes the open loop gain of the amplifier and β the feedback factor.

UoutUin

= Avo1 + βAvo

(3.19)

When Avo is large, or infinite, as for the ideal op-amp Equation (3.19) gives Equa-tion (3.20).

UoutUin

= limAvo→∞

Avo1 + βAvo

= 1β

(3.20)

This means that the total gain of the amplifier circuit is independent of the ampli-fier gain, as long as the open loop gain is high enough to satisfy Equation (3.20).The β network is usually resistors and or capacitors.

When analysing feedback circuits with op-amps, two rules are applied. Sincethe input impedance is infinite, there will be no current flowing into the op-amp,and due to zero offset voltage and infinite gain there will not be any voltage

3.3 Amplifier Circuits 17

difference between the two inputs. This is expressed in Equations (3.21) and(3.22), [15].

I+ = 0, I− = 0 (3.21)

U+ = U− (3.22)

3.3 Amplifier CircuitsIn this section a few amplifier circuits with op-amps are presented. Some of thecircuits, or versions of them, are used later in the thesis.

3.3.1 Inverting Amplifier

Consider the circuit in Figure 3.5. It is an op-amp with feedback resistor R2 andan input resistor R1. This is a common inverting amplifier.

Figure 3.5. Inverting amplifier.

If the op-amp is seen as ideal the analysis of the circuit in Figure 3.5 is simple.Using Equation (3.22) yields that the voltage over R1 is Uin and Uout over R2.The current through R1 and R2 is the same, according to Equation (3.21), andEquation (3.23) can be stated using Ohm’s law to calculate the current thrugh thetwo resistors.

UinR1

= −UoutR2

⇒ UoutUin

= −R2

R1(3.23)

The input impedance of the inverting amplifier is equal to R1 since the non-inverting input of the op-amp is at zero volts. This makes it impossible to combinehigh gain and high input impedance, which is the main disadvantage of the invert-ing amplifier.

18 Theory

3.3.2 Non-Inverting AmplifierFigure 3.6 shows a non-inverting amplifier. The transfer function of this topologycan be derived using the same rules as for the inverting amplifier, but the voltageat the input terminals comes from a voltage division between R2 and R1, seeEquation (3.24).

Uin = R1

R1 +R2· Uout ⇒ Uout

Uin= R1 +R2

R1(3.24)

The non-inverting amplifier has ideally infinite input impedance. In reality itis equal to the input impedance of the used op-amp.

If R2 is replaced by a short circuit and R1 is removed, an amplifier with unitygain is created. This special version of the non-inverting amplifier is called voltagefollower or buffer amplifier.

Figure 3.6. Non-inverting amplifier.

3.3.3 Differential AmplifierDifferential amplifiers are, as discussed in Section 3.1.7, used to amplify the dif-ference between two signals. A common differential amplifier using one op-ampis shown in Figure 3.7. The transfer function of this circuit, Equation (3.25), isderived below using Equations (3.17), (3.18), Ohm’s law and voltage division.

Uin+ = U1 · R2R1+R2

Uin+ = Uin−

U2−Uin−R1

= Uin−−UoutR2

⇒

U2 − U1 · R2R1+R2

R1=U1 · R2

R1+R2− Uout

R2⇒

3.3 Amplifier Circuits 19

Figure 3.7. Differential amplifier with a single op-amp.

Uout = R2

R1· (U1 − U2) (3.25)

To get a high CMRR there is a need for matching between the two resistorscalled R1 and the two called R2. Even a small deviation between the resistors willgive a large decrease in CMRR. The CMRR of single op-amp differential amplifiersis carefully analysed in [17] where it is found that with 0.1 % tolerance resistorsand unity gain a typical CMRR for this circuit is only 54 dB.

3.3.4 Instrumentation AmplifierTo get higher input impedance (and the same for both inputs) in the single op-ampdifferential amplifier, there is a need to implement input buffers. This can be doneby just adding two voltage followers, one at each input. But a more clever solutionis shown in Figure 3.8. The circuit is often called instrumentation amplifier (IA)because it is often used as a measurement amplifier. An instrumentation amplifieris characterized by high gain, high input impedance, and relatively high CMRR.

In this circuit the differential gain of the total amplifier can be adjusted witha single resistor (R1). The common mode gain is unity for the first stage, andsuppressed by the last op-amp. This circuit is not as sensitive as the single op-amp differential amplifier regarding resistor matching. The transfer function for athree op-amp is derived below, where I denotes the current through R1.

I = U2−U1R1

U3 = U1 −R2I

U4 = U2 +R2I

⇒

U3 − U4 = U1 − U2 − 2R2I = U1 − U2 − 2R2U2 − U1

R1=

= (U1 − U2)(

1 + 2R2

R1

)(3.26)

20 Theory

Figure 3.8. Three op-amp instrumentation amplifier

Combining the expression for the output voltage of a differential amplifier, Equa-tion (3.25), and the expression for U3 − U4 gives Equation (3.27).

Uout = R4

R3(U3 − U4) = R4

R3

(1 + 2R2

R1

)(U1 − U2) (3.27)

High differential gain in the first stage together with unity gain (R4R3

= 1) inthe differential stage will give a relatively high CMRR, [6]. Matching between thetwo input op-amps is nevertheless critical to achieve a really good CMRR. Alsothis circuits CMRR has been analysed in [17] where a CMRR of about 90 dB wasreached for low frequencies.

Chapter 4

Differential Amplifier

This chapter deals with the first problem of this thesis, described in Sections 2.3.1and 2.3.2, how to suppress the common mode voltage that appears for currentshunts during calibration of power meters and verification of current shunts.

4.1 Required Performance, Differential AmplifierThe first step towards a solution of this problem was to translate the measurementaccuracy goals given in Table 2.1 into properties of a differential amplifier.

4.1.1 Common Mode Voltage SuppressionThe common mode voltage that appears for the upper current shunt in Figure 2.4must be suppressed. This can, as earlier described, be done by a differential am-plifier with a single-ended output. To get an amplitude error as small as 10 µV/Vthe CMRR must be very high. The common mode voltage, UCM , of the currentshunt is determined in accordance with Equation (3.10),

UCM = U1 + U2

2 = 1.6 + 0.82 = 1.2 V (4.1)

Desired differential gain, AvDM , is unity and the output voltageUout = 0.8V ± 10 µV/V of 0.8 V. The output of a differential amplifier is accordingto Equation (3.12),

Uout = 1 · 0.8 +AvCM · 1.2 ⇒ AvCM ≤0.8 · 10 · 10−6

1.2 (4.2)

21

22 Differential Amplifier

This gives a CMRR of,

CMRRdB = 20 log(AvDMAvCM

)≥ (4.3)

≥ 20 log(

1.20.8 · 10 · 10−6

)≈ 103.5 dB (4.4)

Over 100 dB CMRR at 100 kHz is not easily achieved and will require a lot ofeffort.

4.1.2 Input ImpedanceThere are many versions of current shunts that SP is manufacturing. For examplea 5 A shunt has resistance of 0.16 Ω, which corresponds to a voltage drop of 0.8 V.The minimum input impedance to get an amplitude error less than 10 µV/V andphase error less than 100 µrad at 100 kHz is calculated here. Figure 4.1 showsthe model used for calculations, this model was discussed in Section 3.1.2. Thetransfer function from I to U is shown in Equation (4.5).

Figure 4.1. Model used when calculating input impedance.

Z = U

I= Rshunt ·RpRshunt +Rp

· 11 + jω · RshuntRpCpRshunt+Rp

(4.5)

Equation (4.6) is an approximation of the magnitude of the transfer functionfrom I to U. It is a Maclaurin series of the first order of the magnitude of Equation(4.5). Rs has been factored out since it is the original impedance without anamplifier. The term after 1 in the parentheses is the loading error caused by theamplifier.

|Z| =∣∣∣∣UI∣∣∣∣ ≈ Rshunt(1− 1

2

(2Rshunt

Rp+ R2

shunt

R2p

+ (ωCpRshunt)2))

(4.6)

RshuntRp

is signaficantly larger than R2shunt

R2p

and (ωCpRshunt)2 whereby they can beneglected and the minimum Rp can be calculated as below.

RshuntRp

≤ 10 µVV ⇒ Rp ≥

Rshunt10 · 10−6 = 0.16

10 · 10−6 = 16 kΩ (4.7)

4.1 Required Performance, Differential Amplifier 23

The phase lag of Equation (4.5) is,

Φ = arctan(ω · RshuntRpCp

Rshunt +Rp

)⇒

Cp = tan Φ(Rshunt +Rp)ωRshuntRp

(4.8)

Equation (4.8) gives a maximum Cp of about 1 nF forRp = 100 kΩ and Φ = 100 µrad.This shows that the input impedance is not really a problem in this case sinceRp ≥ 16 kΩ and Cp ≤ 1 nF is easily achieved, even for high frequencies.

4.1.3 Slew Rate CalculationThe gain of the amplifier does not need to be high. Since the purpose is to takethe difference between two signals and not really amplify them. This leads to theuse of a unity gain amplifier. The input voltage to the amplifier is not very higheither, what can cause a problem is high frequencies. The slew rate needed iscalculated according to Equation (4.9), which is derived from Equation (3.6) whena sinusoidal signal is applied.

fmax = Slew rate

2πU⇒ Slew rate = 2πfmaxU (4.9)

If fmax is given in MHz, slew rate is in V/µs. To have some margin a volt-age swing of URMS =1 V which gives U ≈ 1.41 V at 100 kHz was used in thecalculation. This leads to a required slew rate of approximately 0.9 V/µs.

Since many high performance op-amps on the market have a significantly higherslew rate than needed this will not be a big problem. However, the extremerequirements of linearity in phase and amplitude will lead to the requirement of afast amplifier.

4.1.4 BandwidthThe requirement of constant phase up to 100 kHz calls for a very high bandwidth ofthe amplifier. If no compensation is added and a first order (6 dB/octave) transferfunction, A, is assumed, an amplifier with -3 dB point at 1 GHz is required. Seethe calculations below.

A = 11 + j ωω1

⇒ |A| = 1√1 +

(ωω1

)2

Equation (4.10) shows the phase lag of A.

ΦA = arctan(ω

ω1

)≤ 100 µrad at 100 kHz ⇒ (4.10)

ω1 = 2π100 kHztan(100 µrad) ≈ 1 GHz (4.11)


Standard voltage feedback op-amps usually have a -3 dB bandwidth of about 1MHz. There are amplifiers with much higher bandwidth, but to find one with ashigh bandwidth as 1 GHz is not possible. Some kind of compensation network mustbe implemented to keep the phase and amplitude more constant with frequency.

4.1.5 Table of PerformancePerformance parameters of a differential amplifier that makes verification of cur-rent shunts and calibration of power meters according to Table 2.1 possible arelisted in Table 4.1.

Table 4.1. Required performance of the differential amplifier at 100 kHz.

Parameter ValueCMRR ≥ 103.5 dBAmplitude error ≤ 10 µV/VPhase error ≤ 100 µradSlew Rate ≥ 0.9 V/µsRp ≥ 16 kΩGain Unity

4.2 Commercially Available AmplifiersThe next step of this project was to scan the market for existing amplifiers thatfulfilled the requirements. It was found to be a hard task. Below are some examplesof amplifiers which performances have been tested in simulation using PSPICE.

4.2.1 AD8221Analog Devices AD8221 is a high performance instrumentation amplifier whichgain is set by an external resistor. The CMRR for this amplifier is high, over 110dB, but only for quite low frequencies, and starts to fall at about 1 kHz. At 100kHz the CMRR has fallen to about 75 dB. The phase start to fall at about 1 kHzand deviates several degreases from zero at 100 kHz and should in other wordsneed a lot of compensation to fit in the thought application.

This amplifier is too far from the requirements to motivate further investiga-tion.

4.2.2 AD8130Analog Devices AD8130 is a differential receiver amplifier generally used as a highspeed differential line driver, but is also used as a high speed instrumentationamplifier. The AD8130 is typically specified, [5], to have a CMRR of 100 dB atleast up to 300 kHz but when the minimum specification is considered the value

4.3 Custom Design 25

falls to 88 dB. The simulation model, which according to Analog Devices modelsthe minimum performance, shows a CMRR that stays at about 94 dB up to 10kHz where it starts to fall. The bandwidth of this amplifier is very good, it has-3 dB bandwidth of 250 MHz minimum, [5]. The phase response is, accordingto simulation, very linear and deviates 1.99 mrad at 100 kHz. But this value isnot good enough for this application and some kind of compensation is required,described in Section 4.3.1. Not in the same range as for the AD8221 though.

AD8130 has very good performance and no real competitors have been foundfrom other manufacturers. If the CMRR is somewhat better then the minimumspecification and the phase is compensated, this amplifier would be a simple andcheap solution to the common mode problem.

Further investigation of this amplifier is motivated.

4.3 Custom DesignSince no amplifier was found on the market that could assure performance thatwould fulfil the specifications in Table 2.1 development of a new design was startedto see how far such would reach.

4.3.1 Bootstrapped Three Op-Amp Instrumentation Am-plifier

The CMRR of a regular three op-amp instrumentation amplifier is not good enoughfor this application, see Sections 2.4 and 3.3.4. However, this is a good circuitto start with but some modifications are required. Many different circuits wereconsidered during the development work and the best alternative is presented in[6], see Figure A.1. It is a standard three op-amp instrumentation amplifier wherethe two input op-amps have bootstrapped power supplies. The common modevoltage is buffered by a fourth op-amp and fed to a small floating split supplyto the two input op-amps. This circuit removes the input common mode signalfrom the input op-amps because they do not see any voltage swing due to commonmode signals at their input relative their power supply. The CMRR of this circuitwas simulated to as much as 130 dB at 100 kHz and considerably higher for lowfrequencies, see Figure B.1. But this is with ideal resistors without any matchingerrors and no parasitic capacitances that will appear when a printed circuit boardis designed. The choice of op-amp is critical in this circuit. It must have highspeed, high bandwidth, and high CMRR to reach the required performance. Thetwo input op-amps must also be well matched to not degrade the CMRR. MAX477,[14], by Maxim is well suited for this task. It is a voltage feedback op-amp withvery high bandwidth and low gain and phase errors.

The amplitude and phase response of this circuit was not good enough fromthe beginning and some kind of compensation was required. An op-amp with acapacitor in the feedback network was added after the instrumentation amplifierto bend the phase back towards zero and the gain towards one. The value of thiscapacitor was tried out with repeated simulations. The compensation part of the


amplifier can be seen in Figure 4.2. This is a non-inverting amplifier with an added

Figure 4.2. Compensation stage of the instrumentation amplifier.

capacitor. There are also two resistors in parallel at the non-inverting for bothinputs to have the same DC input resistance. This reduces the effect of the inputbias currents, see Section 3.1.3 for more details. The ideal transfer function of thiscircuit is derived below.

UoutUin

=R29//

1jωC9

R29 +R28= R29 +R28 + jωC9R29R28

R29(4.12)

When there is a big difference between R29 and R28, equations for the ideal op-amp does no longer apply and it is possible to achieve a gain lower than unity forthe non-inverting amplifier. The amplifier stage in Figure 4.2 has a gain of 0.99990to compensate the gain of 1.0001 in the instrumentation amplifier. There are noreasons to trim the resistance values further in simulation since more trimming isa must when the circuit is built anyway, due to resistor matching and parasitics.

As mentioned above, the performance of the three op-amp instrumentationamplifier with bootstrapping is good in simulation with ideal components. Thesimulated CMRR can be seen in Figure B.1 and satisfies to the requirement. Theamplitude and phase response also stays within the requirement but not with avery large margin. The phase deviates 95 µrad from zero and the amplitude showsan error of 8 µV/V at 100 kHz.

The biggest problem with this circuit is that it is very sensitive to unbalancedparasitic capacitances at the input of the differential stage, as little as 0.1 pFdegrades the CMRR with as much as 57 dB. Matching of the resistors in thedifferential stage must also be kept at µV/V level to reach the goals. The influenceof parasitics can be lowered by keeping the resistance values low giving a smaller


RC product and thus higher pole frequency. But too low resistance values tendto lower the overall CMRR, the reason for this has not been found.

The reasons mentioned above are what make this amplifier hard to implement,but an experienced engineer has overlooked the design and thinks that it is possibleto keep the parasitics low enough to meet the performance requirements. Carefulsymmetric PCB layout and precise component matching is a must.

4.3.2 Instrumentation Amplifier Using CCCIICCCII is short for the second generation of current controlled conveyors. A currentconveyor is a analogue building block with very high bandwidth since it is notlimited by feedback as op-amps, [24]. The transfer function of CCCIIs is shownbelow, [12]. iy

Vxiz

=

0 0 01 Rx 00 p 1

VyixVz

(4.13)

CCCIIs are available in two versions, one with a Z+ output and one with aZ- output, p in Equation (4.13) indicates witch one the relation apply to. Theinteresting thing about current conveyors is that they can implement an amplifierwithout the use of any resistors. The gain is instead set by the bias current Iowhich controls the intrinsic resistance, Rx, of port x. This makes it possible tobuild an amplifier with transistors only and thereby avoid all resistor matchingproblems.

In [11] an instrumentation amplifier using CCCIIs is presented. Since thereare no discrete CCCIIs available (only Texas instruments OPA861 that can workas a CCCII+ are known by the author, Texas Instrument was contacted but theydo not market any CCCII-) on the market the circuit must be build from scratch.So was done in OrCAD Capture using transistor models and schematics for theCCCIIs presented in [12]. The schematic of this circuit can be seen in Figure A.2and a block schematic in Figure 4.3. Equtaion (4.14) shows the transfer functionof this instrumentation amplifier.

Vo = 2Rx3Rx1 +Rx2

(V1 − V2) (4.14)

This circuit has very high CMRR, 140 dB for low frequencies and still above 100dB up to almost 200 kHz. Neither the phase nor the amplitude response are withinthe requirements, but a compensation circuit as described in Section 4.3.1 cansolve that problem. The high CMRR and no influence of mismatched resistancesmake this circuit very interesting. The problem is that a custom integrated circuitlayout is probably needed. The schematic includes at least 30 transistors (someoptimization of the circuit showed can be done) and a discrete layout with thathigh numbers of components will cause a lot of parasitics and the performance willbe heavily degraded. A custom IC layout is out of range for this work and is alsoway to expensive.


Figure 4.3. IA with three CCCIIs.

4.4 Digitizer in Differential Mode

It was found that the digitizer, National Instruments PXI-5922, that is to mea-sure the voltage after the amplifier, see Section 2.3.1, can be used with the twochannels coupled as one differential. According to the first version of the detailedspecification of the PXI-5922, [7], the CMRR should typically stay over 90 dB upto 200 kHz. With this in mind measurements was carried out at the PXI-5922.The results from these measurements are presented in Table 4.2.

Table 4.2. Measured CMRR of PXI-5922 in differential mode.

Frequency [kHz] CMRR [dB] Nom. input imp., fs1 94.5 1 MΩ, 1 MHz100 76.1 1 MΩ, 5 MHz

The results was not as good as expected, some deviation can be acceptedsince the CMRR specification shows the typical performance and these tend to bea bit optimistic. But over 15 dB difference is more than acceptable. After someinvestigation it was found that National Instruments has changed the specificationsof the PXI-5922, see [9]. The updated CMRR specification is shown in Figure 4.4,which corresponds much better to the measurements.

The phase and amplitude properties of this solution would be very good sinceno additional error from an amplifier is added to the measurement. This solutiondoes however require that an additional digitizer is bought.

4.5 Comparasion Between Different Options 29

Figure 4.4. Specified CMRR for the PXI-5922 in differential mode, [9].

4.4.1 Digital Instrumentation AmplifierOne option that not has been discussed earlier would be to convert the analoguesignals to digital and implement an instrumentation amplifier in the digital do-main. This would also require a digital to analogue conversion after the amplifierto be able to input the signal to the digitizer. This, if it is not possible to tweakthe digitizer and make it possible to input digital signals. The number of ADCsand DACs must be kept at as low level as possible to maximize the performance.Each conversion will add errors to the signals.

Another option to reach the CMRR requirement would be to improve thecommon mode suppression ability of the digitizer by optimizing the hardware.

These two options have not been fully investigated why the performance ofthem is not known and hard to predict.

4.5 Comparasion Between Different OptionsIt is very hard to tell in advance how good an amplifier like the one presented inSection 4.3.1 will perform when built. One solution for SP would be to use twodigitizers, the CMRR performance is not as good as wanted and this will give anamplitude error. But since no additional amplifier is added in the measurementchain it will be possible to perform phase measurements on current shunts withvery high accuracy since the CMRR does not affect the phase of the signals thatis to be measured.

A less expensive solution would be to implement the purposed circuit in Section4.3.1 or to try Analog Devices AD8130. But both these solution will increase thephase and amplitude error which will result in decreased measurement accuracy.It is up to the researchers at SP to choose the solution they prefer.

Chapter 5

Single-Ended Amplifier

This chapter deals with the second problem of this thesis, described in Sections2.3.1 and 2.3.3. The voltage dividers in the power meter calibration and verificationof voltage dividers circuit must work under an unloaded condition to preventloading errors and thereby decreased measurement accuracy. This can, as shownin the same sections, be done by adding a buffer amplifier (i.e. gain = 1) betweenthe voltage divider and the digitizer. The buffer amplifier must be as transparentas possible to affect the measurement in an as small range as possible. Very highinput impedance is a must to provide an unloaded condition and prevent loadingerrors or large amplitude inaccuracy will be a fact in the measurement.

5.1 Required Performance, Single-Ended Ampli-fier

The goals in measurement accuracy that is desired by SP were listed in Table2.2. These parameters can be translated into performance requirements of theamplifiers in a similar way as for the differential amplifier. Slew rate and bandwidthare calculated in the same way as for the differential amplifier so these are leftout here. See Sections 4.1.3 and 4.1.4. The output impedance, DC-errors andtemperature dependency should be kept to a minimum, so should the THD andnoise.

5.1.1 Input Impedance

The input impedance required to get an amplitude error less than 20 µV/V andphase error less than 200 µrad at 100 kHz is calculated here. A similar model asfor the differential amplifier is used, see Figure 5.1.

In Section 4.1.2 an approximation of the magnitude of the transfer functionwas calculated and it is shown again in Equation (5.1) with the difference that theparameters are according to Figure 5.1.

31

32 Single-Ended Amplifier

Figure 5.1. Input impedance model.

|Z| =∣∣∣∣UI∣∣∣∣ ≈ Rdiv (1− 1

2

(2RdivRp

+ R2div

R2p

+ (ωCpRdiv)2))

(5.1)

The higher output impedance of the voltage divider (200 Ω compared to 0.16 Ω)gives a smaller difference between the error terms. But Rshunt

Rpis still significantly

larger than R2shunt

R2p

and (ωCpRshunt)2 whereby they can be neglected also here.The minimum Rp can thereby be calculated as below.

RdivRp≤ 20 µV

V ⇒ Rp ≥Rdiv

20 · 10−6 = 20020 · 10−6 = 10 MΩ (5.2)

Cp is also calculated in the same manner as in Section 4.1.2, see Equation (5.3).

Cp = tan(Φ)(Rdiv +Rp)ωRdivRp

(5.3)

The significantly higher output impedance, Rdiv, gives a maximum Cp of less than2 pF, which is impossible to achieve. But since the voltage dividers are designedto compensate for the capacitive load this will not be problem and a Cp of about10 pF is acceptable, see [18].

5.1.2 Table of PerformanceThe performance parameters of the single ended buffer amplifier are listed in Table5.1.

Table 5.1. Required performance of the single ended amplifier at 100 kHz.

Parameter ValueRp ≥ 10 MΩSlew Rate ≥ 0.9 V/µsAmplitude error ≤ 20 µV/VPhase error ≤ 200 µradGain Unity

5.2 Commercially Available Buffer Amplifiers 33

5.2 Commercially Available Buffer AmplifiersThere is of coarse also a market of buffer amplifiers. But to fulfil the performanceneeded in this application is not trivial. Some of the best buffer amplifiers arespecified to have a gain flatness of 0.1 dB and a phase error of 0.02 degrees at100 kHz, which is about 350 µrad. Together with these two requirements theinput resistance must be kept high enough and the DC-errors and temperaturedependency as low as possible.

Simulations of Analog Devices AD8079, which is one of the better buffer ampli-fiers on the market, [2], shows a gain error of 0.37 % at 100 kHz which is a bit lessthan the specification of 0.1 dB but much larger than the requirement of this ap-plication. The phase response has, according to the simulation, dropped 530 µradat 100 kHz, which is a bit more than the 350 µrad specified by the manufacturer.

Analog Devices AD8079 is too far from the requirements to motivate furtherinvestigation.

5.3 Custom DesignA buffer amplifier design that has very good performance was published in [1].A somewhat updated schematic of this amplifier can be seen in Figure A.3. Itimplements a form of bootstrapping, in a similar manner as the bootstrappedinstrumentation amplifier in Section 4.3.1. The bootstrapping corrects the ampli-tude and phase error of the op-amps. The amplifier can be considered as threedifferent stages that are explained step by step in the following paragraphs, seeFigure 5.2.

Figure 5.2. Sketch of the buffer amplifier.

The input stage makes sure that the input resistance and capacitance are keptat high and low level respectively, due to the FET transistors. Figure 5.3 showsthe input stage. The FET input stage is a source follower that has a gain slightlybelow unity, [6]. The op-amp circuit directly after is there to correct the gainerror of the FET stage and provide the bootstrap voltage to the first correctionstage. This circuit has a transfer function equal to Equation (4.12) but with again, Av, of 1.02 and a pole frequency, fpole, of 81.2 MHz to compensate some of


Figure 5.3. Input stage of the buffer amplifier.

the bandwidth limitations in the op-amp.After the input stage there are two compensation stages that correct most of the

amplitude and phase error of the input stage. They are regular voltage followersbut with bootstrapped power supplies. The output of the input stage serves asbootstrap voltage, shifted ±4.9 V (± 5.6 V ∓ 0.7 V) for the positive and negativerespectively, to the first compensation stage. This is done by the zener diodes.Above the zener diodes there is a current regulation diode J505 from Vishay toreduce the voltage dependency of the zener voltage. The voltage from the zenerdiodes controls the bipolar transistors that provide the power supply voltage tothe voltage followers.

As long as the voltage followers do not see any difference from the power supplyto the input there will just be a copy of the voltage from the input to the output.For higher frequencies, when the output from the input stage starts to drop due tothe limited bandwidth and there will be a difference from the input to the powersupply. The amplifier will then have a higher output voltage to be able to satisfyEquation (3.22), that the voltage is the same at the non-inverting and invertinginput respectively. This is how the correction works.

A slightly different way to look at the correction is to see the two correctionsteps as stages producing feedforward signals that are added absolutely to the


Figure 5.4. Vector diagram of correction principle.

output signal of the input stage. This is illustrated by the vector diagram inFigure 5.4. The ideal function would be two equal vectors, i.e. Vin = Vout. Butsince the amplifier will give both amplitude and phase error the first output, Vout1,differs both in magnitude and angle compared to Vin. The two following outputsVout2 and Vout3 correct Vout1 back to Vin almost perfectly.

The last op-amp is there to provide most of the output current when the bufferamplifier is to drive a significant current. Assuming that the voltage is the same atthe input of the last op-amp and the output node (Vin = Vin1 = Vin2) the valuesof the resistors are chosen according to Equation (5.4). See Figure 5.5, where R44represent the load of the buffer amplifier and Vout−op is the output of the op-amp(U21).

Vout−op−VinR48

= VinR44

Vout−op − Vin = VinR45R51

⇒ R45

R51= R48

R44(5.4)

5.3.1 Simulation Results

Simulations of this circuit in PSPICE show that the result of the correction isexcellent. Omitting the output stage an amplitude error of less than 0.2 µV/V andphase error less than 1 µrad, can be achieved with proper component selection anda load of 1 MΩ when Analog Devices AD817 is used as op-amp. The frequencydependent input resistance, Rp stays at 20 MΩ up till about 1 MHz where adiscontinuity occurs and the resistance changes to a negative value. More detailsabout component selection is given in Chapter 6. Simulation plots are availablein Figures B.2 and B.3.


Figure 5.5. Output stage of buffer amplifier.

5.4 Comparasion Between Different OptionsTo avoid loading errors when measuring on voltage dividers there is, as explained,a need of a buffer amplifier. Since the buffer amplifier published in [1] performsso well in simulation it is likely to reach the requirements even in reality. Thesimulations show results that are many times better than the best commercialavailable buffer amplifier found.

Chapter 6

Design of Buffer Amplifier

The simulation results of the buffer amplifier published in [1], further describedin Section 5.3, were so convincing that a decision was made to manufacture aprototype with this topology. It was decided to use surface mount devices (SMD)to minimize the signal paths and achieve good high frequency properties. The firstversion of the buffer amplifier prototype is called version 1.0.

6.1 Component SelectionTo carefully select the components is essential. The op-amps are especially im-portant in this circuit since they directly will affect the performance of the bufferamplifier. The small error that many other components, e.g. resistors, cause willbe corrected in the correction stages of the amplifier. Anyhow, to reach as goodperformance as possible resistors, with low tolerances have been used in criticalplaces.

6.1.1 Op-amp Used in Version 1.0To fulfil the requirements and work in this application the op-amp must be veryfast, have low noise and handle a large power supply span. Low input bias currentsand thus offset voltage is also important, so is the offset voltage drift with tem-perature. The requirement that the op-amp is fast, a lot faster than the 0.9 V/µscalculated in Section 4.1.3, makes the amplitude and phase requirements reach-able. Simulations with different op-amps have shown that a slew rate of at least60 V/µs is a must to fulfil the requirements. To have some margin the op-ampsthat were considered to use in the design have higher slew rate.

Analog Devices AD817, [3], has a slew rate of 350 V/µs and very wide supplyrange from ±5 to ±15 V. But the DC-performance of this amplifier is not that goodwith an offset of 0.5 mV typically and 10 µ V/ drift. Simulations of the bufferamplifier with this op-amp did however show really good performance. The phaseand amplitude responses stayed well under the requirements. Rp, the frequencydependent input resistance, was calculated in simulation according to Equation

37

38 Design of Buffer Amplifier

(3.4) and stayed at 20 MΩ up to 1 MHz. Simulation results with this op-amp werealso discussed in Section 5.3 and plots are available in Figures B.2 and B.3.

The first version of the buffer amplifier prototype used this op-amp.

6.1.2 Remaining ComponentsThe input resistor, R3, was changed from the original value of 10 MΩ to 20 MΩto have some margin to the required value of input resistance specified in Table5.1. The resistors used are standard ±1 % size 1206 SMD.

The N-channel FET input transistors do not have any high requirements ofperformance but a low input capacitance and input bias currents kept to a min-imum is important. Philips Semiconductor PMBFJ112 fulfil these specificationsand are used in the prototype.

Neither the choice of zener diodes nor the bipolar transistors in the bootstrapcircuits of the corrections steps are critical. BZT52C5V6 from Multicomp arezener diodes suitable for this task. BC817-25/PLP and BC807-25/PLP are thechoice of bipolar transistors, NPN and PNP respectively.

Since the current regulating diodes, J505 from Vishay, that were used in theoriginal circuit are obsolete an alternative had to be found. A direct substitute wasnot possible since there no longer are any current regulating diodes on the market.But National Semiconductor manufactures an integrated circuit with the samefunction with the difference that the output current is set by an external resistor.To get the desired current of 1 mA a resistor of 68 Ω shall be used according tothe datasheet, [20]. Precision resistors, ±0.1 % and low temperature coefficient,were used here to get a lower drift with temperature.

All capacitors are standard ceramic multi-layer capacitors in 1206 case. Thevalue of the bypass capacitors were chosen to 10 nF in the bootstrap circuit.

6.2 Power Supply CircuitTo feed the active circuits with a stable voltage, a power supply circuit with voltageregulators was designed, see Figure 6.1.

Figure 6.1. Power supply of the buffer amplifier prototype.

6.3 PCB Design 39

LM7815 and LM7915 were implemented according to the datasheet with thedifference that extra capacitors of 10 nF were added close to the voltage regulatorsto ensure good bypassing for high frequencies.

This circuit is fed by an unregulated DC-voltage of ±16 V to ±25 V (±35 Vabsolute maximum) and outputs a regulated voltage of ±15 V.

The op-amps and input stage are also bypassed by 100 nF capacitors physicallyclose to the components to reduce the effect of AC-signals superimposed on theDC-voltage.

6.3 PCB DesignA printed circuit board (PCB) was designed in EDwin, which is a PCB layouttool from Jeppson CAD/CAE center. The PCB uses both sides of the board.The component layer holds a ground plane and the bottom layer holds two powerplanes for Vcc and Vee.

Implementing a ground plane helps to reduce noise and ensures that all signalsare referred to the same ground potential. It also makes the design process aloteasier since all ground pins are routed directly to ground. The power planestogether with the ground plane form a large plate capacitor that contributes tothe filtering of the power supplies.

Since it is important to keep the power supply and signal paths separated theleft hand side of the PCB were dedicated to the power supply circuit and the righthand side to the amplifier circuit.

Layout of the PCB can be seen in Figure 6.2.

Figure 6.2. PCB layout of the buffer amplifier prototype.

Chapter 7

Verification of BufferAmplifier

When the PCB was assembled it was time to measure the performance and seeif the buffer amplifier was as good in practice as in simulation. The first twosections of this chapter focus on how the different measurement systems workwhile the following sections present measurement results and the consequences ofthe measurements. The assembled buffer amplifier can be seen in Figure 7.1.

Figure 7.1. The assembled buffer amplifier prototype.

41

42 Verification of Buffer Amplifier

7.1 Amplitude and Phase Measurement SystemThe amplitude and phase response was measured with National Instruments PXI-5922 digitizer, [9], together with National Instruments PXI-5441 100 MS/s arbi-trary waveform generator (AWG), [8]. PXI-5922 is an award winning two-channel24-bit flexible resolution digitizer based on National Instruments Flex II AD-converter. It has a resolution of 24 bits with a sample rate of 500 kS/s and16 bits with a sample rate of 15 MS/s. The digitizer can realize a large varietyof instruments such as oscilloscopes, spectrum analysers and AC-voltmeters. TheAWG and the digitizer are both controlled from a computer with Labview or ashere with Labview Signal Express, which is an interactive measurement softwarefor acquiring and analyzing signals.

Signals Express performs certain “steps” in a user configured order. A stepis for example a signal generator, data acquisition or different signal analysingtools. To start with the frequency response was measured with white noise. Butthe accuracy of this measurement was not good enough so instead a measurementsystem using swept sinusoidal signals was developed. The basic structure of thissystem is shown in Figure 7.2.

Figure 7.2. Principle of frequency sweep in Signal Express.

The step called “Tone Extraction” in Figure 7.2 performs a Fast Fourier Trans-form, FFT, of the acquired numbers of samples and exports the frequency, ampli-tude and relative phase of the fundamental frequency. The last step calculates thephase and amplitude errors with channel 0 as reference, since it is coupled directlyfrom the AWG, see Figure 7.3. The amplitude error is the difference between thetwo input signals divided by the reference signal at channel 0 to get the error as a

7.1 Amplitude and Phase Measurement System 43

Figure 7.3. Amplitude and phase error measuring setup with digitizer.

fraction. The phase error is simply the difference in detected phase. Many otherfunctions can be added to this measurement system as well, e.g. THD and SINADcalculations. But even with both channels of the digitizer coupled directly fromthe AWG there is a non-neglectable error that must be corrected for when reallyhigh accuracy is required. More about this in Section 7.5.1.

7.1.1 Alternative Phase Error CalculationAssuming that the amplitude is equal to one with a very small error compared tothe phase error, the latter can be calculated from the RMS value of the differencebetween the input and output voltage of the amplifier. Using the definition ofRMS and the difference between two arbitrary signals, u, the phase error is givenby Equation (7.1).

u = sin (ωt)− sin (ωt+ ϕ)

VRMS =

√√√√√ 1T

T∫0

u2(t) dt

⇒

VRMS =√

1− cosϕ ⇒ ϕ = arccos (1− V 2RMS) (7.1)

The value of ϕ is expected to be a bit higher than the phase error calculatedby the tone extraction step, since the amplitude error is neglected here. This wayof determining the phase error was used as a way to check that the tone extractionstep worked as supposed.

7.1.2 Alternative Amplitude Error MeasurementThe amplitude can also be determined with an available system for precision ACvoltage measurements at SP. It implements an AC-DC transfer method that con-verts the AC voltage into a corresponding DC voltage which is easier to measure


precisely. Fluke 792A is the transfer standard in use at SP. It is in principala heat sensing transistor that detects the heat emitted by a resistor that corre-sponds to the power dissipation in the latter. The transfer standard outputs a DCvoltage that corresponds to the RMS value of the AC input voltage. Repeatedmeasurements are performed at each frequency to minimize the error. The systemis interfaced to a computer that logs all measurements.

7.2 Input Impedance MeasurementsThe input impedance was measured with Wayne Kerr 6440 precision LCR meter,but measuring as high ”active“ impedances as about 20 MΩ is not trivial. Someproblems were encountered with this method, especially for low frequencies. Acapacitive and resistive coupling between the laboratory power supply, that feedsthe buffer amplifier, and the internal power supply of the LCR meter over thepower distribution grid was found to be the reason. To avoid affects of this inthe measurement, the amplifier was power supplied by a battery pack duringmeasurements.

The input impedance of version 1.1 of the buffer amplifier was also measuredwith a traditional method using the AC-DC transfer standard method describedin Section 7.1.2. The output voltage of the amplifier is observed with (Ux) andwithout (U0) a series impedance (Rs or Cs) at the input of the amplifier. Theseries impedance creates a voltage divider together with the input impedance, Rpand Cp. The higher the input impedance is the less the series impedance will affectthe output voltage. This method is described in [21] where Equations (7.2) and(7.3) are used to calculate Cp and Rp respectively. The inductance of the seriesresistor is denoted LR.

Cp ∼= Cs ·(∣∣∣∣ U0

UC

∣∣∣∣− 1)

(7.2)

Rp ∼=Rs√∣∣ U0

URs

∣∣+ ω2(2LRCp − (RsCp)2)− 1(7.3)

7.3 Measurement Results Version 1.0Some problems were encountered with the amplifier in the beginning. A quiteheavy load had to be connected to the amplifier to avoid oscillations. The op-ampin use, Analog Devices AD817, must drive a significant current not to oscillate. So,a load of 50 Ω was connected to the amplifier during the following measurements.The current driving stage was configured to drive a load of 50 Ω during thesemeasurements.

Figure 7.4 shows the amplitude error of the first version of the buffer amplifier.It can be seen that there is a quite large frequency independent error and theamplitude deviates about 100 µV/V from 2kHz to 100 kHz. This is a many timeslarger error than the simulation showed, see Section 5.3.1. The 50 Ω load degrades

7.3 Measurement Results Version 1.0 45

Figure 7.4. Amplitude error of the buffer amplifier in version 1.0.

the results, which also can be seen in simulation, but it is likely to affect even morein reality.

Figure 7.5. Amplitude error of the buffer amplifier in version 1.0 measured with AC-DCtransfer.

Figure 7.5 shows the amplitude error measured with the AC-DC transfer methoddescribed in Section 7.1.2. The error at 100 kHz is about 100 µV/V in both mea-surements, but the AC-DC measurement shows a more linear behaviour at lowfrequencies.

Also the phase error of the buffer amplifier is a lot larger than expected, about4 mrad at 100 kHz, see Figure 7.6. The upper line in Figure 7.7 shows the phaseerror calculated as described in Section 7.1.1. The phase errors are in the sameorder of magnitude in both measurements.

Neither the resistive part of the input impedance, Rp, was as good as expectedin this version of the buffer amplifier, see Figure 7.8. According to the simulation,Rp should stay at the value of the input resistor, R3, until a discontinuity occurand it changes to a negative value at about 1 MHz. The measurement shows that


Figure 7.6. Phase error of the buffer amplifier in version 1.0.

Figure 7.7. The upper line shows the phase error of the buffer amplifier in version 1.0- from RMS.

the discontinuity comes much earlier, at about 40 kHz. However, the capacitivepart of the input impedance, Cp, stays at about 12 pF for all measured frequencies.

Simulations and measurements on Analog Devices AD817 as a standard voltagefollower without bootstrapping shows that there is a discontinuity in Rp at lowerfrequencies, similar to the one seen in the measurements on the complete bufferamplifier. Since there are two voltage followers in parallel seen from the input ofthe buffer amplifier this must have been the reason why the measurement lookedas it did. The location of the discontinuity depends on the load as well but onlyto a small extent.

7.3.1 ConclusionsDue to the need of a heavy load to prevent oscillations and thereby large amplitudeand phase errors together with the unacceptable behaviour of the input impedancelead to the requirement of another op-amp. Selecting the perfect op-amp for ademanding application like this is not trivial.

7.4 New Op-Amps, Buffer Amplifier 1.1A long list of op-amps that were tried but did not comply with the requirementscould be listed but there is really no reason to do so. Instead the op-amps of choice

7.4 New Op-Amps, Buffer Amplifier 1.1 47

Figure 7.8. Input impedance of buffer amplifier version 1.0.

are presented. Op-amps that showed a similar behaviour in the input impedanceas the AD817 were directly disregarded.

As bootstrapped op-amps, i.e. the op-amps in the two correction steps, AnalogDevices ADA4899 were chosen, [4]. It is a unity gain stable bipolar input op-ampwith extremely low noise, high bandwidth, high slew rate, low output impedanceand descent DC properties. Good DC properties, such as low output offset andlow input bias currents are not easily combined with high speed. All op-amps thatfocus on DC properties are way to slow for this application. The drawback withADA4899 is that it can not handle as large variations in the power supply voltageas is required to work in all positions in the buffer amplifier, this also leads toa lowered maximum input voltage but the required 0.8 V (which is the outputvoltage of the voltage divider) can be applied with margin. The op-amp in theinput stage must also be able to handle a large differential input voltage since Vccis fed to its input when no input signal is applied.

So for the input stage and the optional output stage Analog Devices AD8510was chosen. It is a JFET op-amp with low noise and wide bandwidth. It canhandle power supplies from ±5 V to ±15 V and a differential input voltage aslarge as the power supply voltage.

Figure A.3 shows the buffer amplifier in version 1.1.

7.4.1 Simulation ResultsSimulations of the buffer amplifier with op-amp configuration as described aboveshows really good results. With no output stage and load of 1 MΩ, the amplitudeerror is less than 1 µV/V and a phase error less than 1 µrad at 100 kHz. Theresistive part of the input impedance, Rp does not deviate much from the earlierversion but the discontinuity is slightly shifted down in frequency and has its topat about 1 MHz. The capacitive part stays constant at 3 pF up to 1 MHz. TheDC offset is -500 nV which is a lot smaller than with AD817, however a larger DC


offset is expected in reality since ADA4899 is specified to have an offset of 35 µVtypically.

7.5 Measurement Results Version 1.1No large load is required to keep the buffer amplifier stable in version 1.1. Theonly load connected during the measurements is the measuring instrument, e.g.the digitizer, which has a nominal input impedance of 1 MΩ. In other words, nolarge currents are driven by the amplifier why the current driving stage has beenleft out during the following measurements.

The ability of the amplifier to drive a capacitive load was investigated andfound to be about 800 pF, which corresponds to 8 m of coaxial cable.

7.5.1 Amplitude and PhaseThe amplitude and phase error are so small in this version of the buffer amplifierthat the error from the digitizer itself must be corrected. First a measurementwith both channels coupled directly to the digitizer was performed. The measurederror is then subtracted from the measurement so that only the error of the bufferamplifier is left. All data processing was done in MATLAB whereto text files wereexported.

The environment in which the measurement is done in is essential. Electri-cal fields in the surroundings induce voltages that affect the measurement. Thefirst normalized measurements of the buffer amplifier showed quite a lot of distur-bances. But since they were seen in the measurements without the amplifier aswell they were not created by the amplifier. The frequency and amplitude of thedisturbances varied slightly with time why they are not completely eliminated inthe corrected measurement, see Figure B.4.

The spectrum of the surroundings was measured with an open cable, see FigureB.5. The frequencies of the tops in the spectrum approximately correspond to thefrequencies that are disturbed in the amplitude and phase measurement. Someexperimentation showed that the big disturbances are due to the LCD screen ofthe laptop that is coupled to the PXI system. When this computer is moved about2 m away the disturbances no longer appears in the measurements.

Figure 7.9 shows the average amplitude and phase error over three measure-ments. It is also slightly smoothed by the MATLAB function “smooth” which usesa five point moving average. The phase error is really small, less than 15 µrad at100 kHz which is a lot better than the required 200 µrad. The amplitude errorshows a frequency independent error but the amplitude does not deviate muchfrom the low frequency error at higher frequencies, less than 20 µV/V from 2 kHzto 100 kHz. The amplitude error is also within the requirements.

The standard deviation of these three measurements is shown in Figure 7.10,and stays at moderate levels over the whole frequency range. This means that theamplitude and phase measurements are robust and repeatable.

Figure B.6 shows the phase and amplitude error up to 2 MHz.


Figure 7.9. Amplitude and phase error average of the buffer amplifier in version 1.1.

7.5.2 Input Impedance

Figures 7.11 and 7.12 shows the resistive and capacitive part of the input impedancerespectively. The low frequency discontinuities that were seen in the input resis-tance measurement (Figure 7.8) of the amplifier in version 1.0 are now gone andonly one discontinuity is seen, just as in simulation. The location of the disconti-nuity also corresponds well to the simulation. Rp is equal to 10.5 MΩ at 100 kHzwhich is higher than the requirement.

Cp stays at a constants level as expected, not as low as the simulation shows butwell at 12.4 pF. The value was expected to deviate a few pF from the simulationsince only the SMB input contact adds 5-10 pF.

Due to the fact that the measurements with the LCR meter is not very robustthe traditional measurement method described in Section 7.2 was performed. Sincethe inductance in the series resistance, LR in Equation (7.3), plays a small role forthe result this term was neglected. The method does not give good accuracy forlow frequencies since the standard deviation of the measurement is larger than theratio U0

URfor the used Rs of 100 Ω (this means that Rp is high). Larger resistances

can be used to increase the resolution for low frequencies, so was not done since itis the input resistance at high frequencies that is interesting. Table 7.1 shows theresults of the measurements.

Two measurements with different input voltage and load were performed. When1 V was applied the load resistance of the buffer amplifier was 400 Ω and when200 mV was applied the load was 10 MΩ. This is due to the input resistance of


Figure 7.10. Standard deviation of three amplitude and phase error measurements.

Table 7.1. Input resistance, Rp, in MΩ of the buffer amplifier in version 1.1 measuredby AC-DC transfer standards.

Input voltage 100 kHz 500 kHz 1 MHz1 V 17.2 4.1 2.4200 mV 14.1 2.6 1.6

the AC-DC transfer standards which vary with the selected voltage range.

7.5.3 THD and SINADTHD and SINAD were measured with the PXI-5922 digitizer, in a similar manneras amplitude and phase. Figure 7.13 shows how the THD and SINAD vary withfrequency.

The noise and distortion properties of the buffer amplifier are very good. Thisis much thanks to the low noise op-amp, Analog Devices ADA4899.

7.5.4 Power Supply Voltage DependencyThe voltage regulators in the power supply circuit on the PCB are there to ensurethat the buffer amplifier does not depend on the voltage that is fed to it. To verifythis, repeated measurements with different power supply voltages were performed.Measurement confirms theory in this case, since the standard deviation is not much


Figure 7.11. Input Rp of the buffer amplifier in version 1.1.

Figure 7.12. Input Cp of the buffer amplifier in version 1.1.

larger when the power supplies are varied compared to repeated measurementswith constant power supply voltage. Compare Figure 7.14 and Figure 7.10.

7.5.5 Ambient Temperature DependencyThe effect of the ambient temperature was investigated by placing the amplifier ina temperature regulated box, see Figure 7.15. Measurements was carried out at15, 20, 25 and 30 which were compared to measurements at the normal ambienttemperature of 23 . The accuracy of the ambient temperatures are ±0.1 for20, 23 and 25 and ±0.2 for 15 and 30 . The amplifier was turned onfor at least 6 h in each temperature before the measurement was made. Figure7.16 shows how the amplitude and phase error changes from 23 to 30 ambienttemperature. Figure B.7 shows the remaining ambient temperatures.

No large deviations can be seen, the amplifier is very stable with temperature.


Figure 7.13. SINAD and THD of the buffer amplifier in version 1.1.

One interesting thing that can be observed is that the frequency independent errordecreases slightly in low temperatures.

7.5.6 Warm-Up TimeThe warm-up time was measured by doing a quick frequency sweep with only afew steps every 20 seconds until no large deviations were observed. After abouttwo minutes the changes in amplitude and phase error are small and the amplifieris close to a steady state. See Figure 7.17 where the error at 113 kHz is shown forthe first 10 min after startup, observe that the error of the digitizer itself not hasbeen removed in this measurement. Other frequencies show a similar behaviourexcept DC, for which it takes almost 15 minutes until no significant changes canbe seen, see Figure B.8.

7.5.7 ConclusionsThe measurements of the buffer amplifier prototype in version 1.1 show very goodresults. The phase response is well within the requirements and the THD andSINAD are impressively low. The input impedance stays within the requirementof 10 MΩ but the results from the two measurements differ. Both input impedancemeasurements do however show an input impedance that satisfy the requirements.The amplitude error complies with the requirement but not much more. Though,if the amplitude error of the buffer amplifier and the loading error due to the finite


Figure 7.14. Standard deviation with three different power supply voltages.

input impedance are summarized they will tend to cancel each other since theamplifier has a top in the frequency response for high frequencies.

The prototyped buffer amplifier can be modified to handle larger input voltagesif this is necessary but since the application in this case not requires a higher inputvoltage, this property has not been prioritized. If the buffer amplifier is to drivea significant load, it is recommended to match the output resistors according toEquation (5.4), to minimize the phase and amplitude errors. When high impedanceloads are driven the output stage is best disconnected.


Figure 7.15. Ambient temperature dependency test setup.

Figure 7.16. Difference in amplitude and phase error from 23 to 15 and 25 .


Figure 7.17. Amplitude and phase error the first 10 min after startup at 113 kHz.

Chapter 8

Discussion and Conclusions

8.1 DiscussionFor the second problem of this project, to provide an unloaded condition for thevoltage divider during calibration of power meters and verification of voltage di-viders, it was easier to find a good solution than to suppress the common modevoltage that occurs for current shunts in the corresponding situation. The require-ments of an extremely high CMRR together with a linear phase and amplitudeare what make the latter problem very complex.

The models used in simulation are according to the manufacturers specifiedby the minimum performance of the circuits. But the accuracy of these modelsmust be considered anyway. Conclusions from simulations must be questioned,they seldom reflect the reality when small deviations are simulated. Experiencefrom this project shows this, many times better results were reached in simulationthan measured for the prototyped buffer amplifier. This might be due to thelimited resolution i PSPICE, inaccurate component models or parasitics that arenot included in the simulations. Of course, parasitics could have been included insimulations but to place and size them properly is not trivial. This can lead to asimulation that is further away from reality if the parasitics are sized and placedincorrectly.

The fact that the simulations and measurements differ a lot for the bufferamplifier talks against the proposed bootstrapped instrumentation amplifier inwhich the simulations results live up the requirements with a quite small margin.The best solution is probably to use the digitizer in differential mode to solve thecommon mode voltage problem. It does not satisfy the requirement of CMRR butmaybe it is possible to do some hardware improvement of the digitizer.

Uncertainty in the measurements of the prototyped buffer amplifier must beconsidered. But since the standard deviation between different measurements is aslow as shown in Figure 7.10 the measurements are considered robust and clearlyrepeatable. The amplitude measurement also corresponds well to the precisionAC-DC amplitude measurement with transfer standards, and the phase with thealternative way of calculation in Section 7.1.1. The input impedance has been

57

58 Discussion and Conclusions

measured with two different methods with differing results, but both show thatthe input Rp exceeds 10 MΩ at 100 kHz which is the requirement.

The buffer amplifier prototype satisfies the requirements, and compared tosimilar published amplifiers it performs well. For example the millivolt-amplifierin [22], which has very high input impedance (> 20 MΩ) up to 100 kHz but anamplitude error of 70 µV/V at the same frequency. This is a much larger errorthan the prototyped buffer amplifier in this thesis.

Further work with the buffer amplifier would be a PCB optimized for the op-amps in version 1.1 and a more appropriate enclosure.

8.2 ConclusionsTo the first problem of this project three alternative solutions are presented; pro-totype a proposed instrumentation amplifier circuit, evaluate the commerciallyavailable instrumentation amplifier Analog Devices AD8130 or let the voltagemeasuring device suppress the common mode voltage. One fourth alternative,to improve the digitizer or suppress the common mode digitally before the dig-itizer, was also briefly discussed. It is up to the researchers at SP to choose asolution.

The second problem of this project, how to provide an unloaded conditionfor voltage dividers during calibration of power meters and verification of voltagedividers was solved by building a prototype buffer amplifier. Measurements of itshowed an amplitude error of less than 20 µV/V, a phase error of less than 20µrad, and an input impedance greater than 10 MΩ. This is performance in linewith the required in Table 2.2.

Bibliography

[1] Ilja Budovsky, A. Michael Gibbes, and Des C. Arthur. A high-frequency ther-mal power comparator. IEEE Transactions on instrumentations and measure-ment, 48(2):427–430, 1999.

[2] Analog Devices. Ad8079: Dual 260 mhz gain = +2.0 and +2.2 buffer. URL:http://www.analog.com/static/imported-files/data_sheets/AD8079.pdf, 2008-06-18, Revision A, 1996.

[3] Analog Devices. Ad817: High speed, low power wide supply range amplifier.URL: http://www.analog.com/static/imported-files/data_sheets/AD817.pdf, 2008-09-29, Revision B, 2006.

[4] Analog Devices. Ada4899-1: Unity-gain stable, ultralow distortion, 1nv/√Hz

voltage noise, high speed op amp. URL: http://www.analog.com/static/imported-files/data_sheets/ADA4899-1.pdf, 2008-11-20, Revision B,2007.

[5] Analog Devices. Analog devices ad8129/ad8130. URL:http://www.analog.com/static/imported-files/data_sheets/AD8129_8130.pdf, 2008-08-26, Revision C,2008.

[6] Paul Horowitz and Winfield Hill. The Art of Electronics. Cambridge Univer-sity Press, second edition, 1989. ISBN 0-521-37095-7.

[7] National Instruments. Ni pxi-5922 specifications. URL:http://www.ni.com/pdf/manuals/374049a.pdf, 2008-09-03, RevisionA, 2005.

[8] National Instruments. Ni pxi-5441 specifications. URL:http://www.ni.com/pdf/manuals/373846c.pdf, 2008-09-03, RevisionC, 2008.

[9] National Instruments. Ni pxi-5922 specifications. URL:http://www.ni.com/pdf/manuals/374049e.pdf, 2008-09-05, RevisionE, 2008.

59

60 Bibliography

[10] Walt Kester. Mt-003: Understand sinad, enob, snr, thd, thd + n,and sfdr so you don’t get lost in the noise floor. URL:http://www.analog.com/en/training-and-tutorials/tutorials/design-center/tutorials/CU_tutorials_MT-003/resources/fca.html,2008-10-29, Mars, 2005.

[11] Sudhanshu Maheshwari. High cmrr wide bandwidth instrumentation ampli-fier using current controlled conveyors. International Journal of Electronics,89(12):889–896, 2002.

[12] Sudhanshu Maheshwari and Iqbal A. Khan. Simple first-order translinear-ccurrent-mode all pass section. International Journal of Electronics, 90(2):79–85, 2003.

[13] Ron Mancini. Op-amps for everyone, design reference. URL:http://focus.ti.com/lit/an/slod006b/slod006b.pdf, 2008-10-15, Au-gust, 2002.

[14] Maxim. 300mhz high speed op-amp. URL:http://datasheets.maxim-ic.com/en/ds/MAX477.pdf, 2008-09-08, Revi-sion 2, 1997.

[15] Bengt Molin. Analog Elektronik. Studentlitteratur, Lund, 2001. ISBN 91-44-01435-X.

[16] Hewlett Packard. HP 4285A Precision LCR Meter Operational Manual.Yokogawa-Hewlett-Packard, 2 edition, June 22 1992.

[17] Ramón Pallás-Arney and John G Webster. Common mode rejection in differ-ential amplifiers. IEEE Transactions on instrumentations and measurement,40(4):669–676, 1991.

[18] Karl-Erik Rydler, Stefan Svensson, and Valter Tarasso. Voltage dividers withlow phase angle errors for a wideband power measuring system. PrecisionElectromagnetic Measurements, 2002. Conference Digest 2002, pages 382–383, 2002.

[19] Karl-Erik Rydler and Valter Tarasso. Extending ac-dc current transfer mea-surement to 100 a, 100 khz. Precision Electromagnetic Measurements, 2008.Conference Digest 2008, pages 28–29, 2008.

[20] National Semiconductor. Lm134/lm234/lm334 3-terminal adjustable currentsources. URL: http://www.national.com/ds/LM/LM134.pdf, 2008-10-01,Revision A, 2005.

[21] Pär Simonson and Karl-Erik Rydler. Lastberoende för växelspänningskali-bratorer. Konferenshandlingar till den 17 nordiska konferensen Måleteknikkog Kalibrering, (20), 1995.

Bibliography 61

[22] Milos Stojanovic, Manfred Klonz, and Borislav Stojanovic. High performancemillivolt-amplifier for the planar multĳunction thermal converter. IEEETransactions on instrumentations and measurement, 52(2):341–344, 2003.

[23] Stefan Svensson and Karl-Erik Rydler. A measuring system for the calibra-tion of power analyzers. IEEE Transactions on instrumentations and mea-surement, 44(2):316–317, 1995.

[24] Noman Ali Tassaduq. The translinear currentcontrolled conveyor and its applications. URL:http://library.kfupm.edu.sa/lib-downloads/1390786.pdf, 2008-08-26,May, 1998.

Appendix A

Schematics

63

64 Schematics

Figure A.1. Three op-amp instrumentation amplifier with compensation.

65

Figure A.2. IA with three CCCII.

66 Schematics

Figure A.3. Buffer amplifier version 1.1.

Appendix B

Plots

67

68 Plots

Figure B.1. CMRR of three op-amp IA with compensation.

69

Figure B.2. Amplitude and Phase of buffer amplifier with AD817.

70 Plots

Figure B.3. Input Rp of buffer amplifier version 1.0.

71

Figure B.4. Amplitude and phase error measurement with disturbances.

Figure B.5. Spectrum of the measurement environment.

72 Plots

Figure B.6. Amplitude and phase error buffer amplifier version 1.1.

Figure B.7. Difference in amplitude and phase error from 23 to 20 and 30 .

73

Figure B.8. DC-offset change the first 15 min after startup.

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