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® ® Intel Intel Labs Labs IA-64 Program Overview IA-64 Program Overview Ronald E Curry Ronald E Curry Director of Marketing Director of Marketing IA-64 Processor Division IA-64 Processor Division Intel Corporation Intel Corporation

IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Page 1: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

®®IntelIntel LabsLabs

IA-64 Program OverviewIA-64 Program Overview

Ronald E CurryRonald E CurryDirector of MarketingDirector of MarketingIA-64 Processor DivisionIA-64 Processor DivisionIntel CorporationIntel Corporation

Page 2: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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AgendaAgenda

ll The IA-64 Opportunity The IA-64 Opportunity

ll IA-64 Program Update IA-64 Program Update

ll Get Started on IA-64 Today Get Started on IA-64 Today

Page 3: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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SuperscalarSuperscalar Architectures Architectures1.5 - 3 instructions / cycle1.5 - 3 instructions / cycle

PerformancePerformance

TimeTime

20-30% increase per year 20-30% increase per year from semiconductor from semiconductor

technology advancestechnology advances

CISC/RISCCISC/RISC<< 1 instruction / cycle1 instruction / cycle

.3 ins / cycle.3 ins / cycle

IA-64 Next Generation ArchitectureIA-64 Next Generation Architecture

IA-64 Architecture:IA-64 Architecture:nn Explicit ParallelismExplicit Parallelismnn PredicationPredicationnn SpeculationSpeculationnn Massive ResourcesMassive Resources

Greater room for growth than traditional architecturesGreater room for growth than traditional architectures

Page 4: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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IA Server and Workstation RoadmapIA Server and Workstation Roadmap

MadisonIA-64 Perf

FutureIA-32

DeerfieldIA-64 Price/Perf

Per

form

ance

’02’00 ’01.25µ .18µ .13µ

. . .. . .

McKinley

Merced

’99

. . .. . .

. . .. . .

Foster

Outstanding Performance for

32 Bit Volume Apps

Outstanding Performance for

32 Bit Volume Apps

Extends IA Headroom, Scalability and Availability

for the Most Demanding Environments

Extends IA Headroom, Scalability and Availability

for the Most Demanding Environments

Cascades

Pentium®III Xeon™ Processor

Performance, Price/Performance, Scalability, Availability, CompatibilityPerformance, Price/Performance, Scalability, Availability, Compatibility

Page 5: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Public CommitmentsMerced Public Commitments

OEMsOEMsOperatingOperatingSystemSystemVendorsVendors

EnterpriseEnterpriseSoftwareSoftwareVendorsVendors

WorkstationWorkstationSoftwareSoftwareVendorsVendors

Best in class solutions from the leading vendorsBest in class solutions from the leading vendors

SoftwareSoftwareTools &Tools & Inf Inf..VendorsVendors

Third PartyThird PartyVendorsVendors

• Bull• Compaq• Data General• Dell• Fujitsu• HP• Hitachi• IBM• NCR• NEC• Sequent• SGI• Siemens• Unisys

• Adaptec• AmericanArium• AMI• ATITechnologies• Data General• Emulex• Evans &Sutherland• HP• LSI Logic• Matrox• Mylex• Phoenix• Q-logic• 3D Labs

• Compaq• HP• IBM/SCO• Microsoft• Novell• Sun• Linux

• EPC• Hummingbird• IBM• MetaWare• Microsoft• NAG• PGI• SCO• Sun• Viewlogic

• Adobe• Avid• Cadence• MSC• Mental Images• Mentor Graphics• Parametric• Softimage• Synopsys

• Ariba• Baan• IBM• Informix• Microsoft• Nuance• Open Market• Oracle• PeopleSoft• Persistence• SAP• SAS• Softway• SpeechWorks• TimesTen• Torrent• Weblogic

All trademarks and brands are the property of their respective owners

Page 6: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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OEM Merced CommitmentsOEM Merced Commitmentsll ““ CompaqCompaq is committed to be among the lead vendors offering Merced is committed to be among the lead vendors offering Merced

based IA64 solutions to our Enterprise and Workstation customers.”based IA64 solutions to our Enterprise and Workstation customers.”uu Mary McDowell, Vice President & General Manager, Compaq CorporationMary McDowell, Vice President & General Manager, Compaq Corporation

ll ““ FujitsuFujitsu is developing highly differentiated IA-64 based systems with is developing highly differentiated IA-64 based systems withMerced as well as its successors for mission critical environmentsMerced as well as its successors for mission critical environmentsand will provide the best enterprise solutions for customers”and will provide the best enterprise solutions for customers”uu Masahiro Kawakatsu, GM, Computer Systems Division II, FujitsuMasahiro Kawakatsu, GM, Computer Systems Division II, Fujitsu

ll ““ HP'sHP's commitment to deliver Merced-based servers affords the commitment to deliver Merced-based servers affords thedeveloper's community a robust platform for enterprise solutions.”developer's community a robust platform for enterprise solutions.”uu Barbara Barbara BraumBraum, R&D Manager, Hewlett Packard, R&D Manager, Hewlett Packard

ll ““ HitachiHitachi will launch Merced server systems, including 8way and will launch Merced server systems, including 8way andhigher systems, for the emerging Internet business market,"higher systems, for the emerging Internet business market,"uu Toshihiko Toshihiko OdakaOdaka, Senior Vice President and Director, President & Chief, Senior Vice President and Director, President & Chief

Executive Officer, Information & Telecommunication Systems, Hitachi,Executive Officer, Information & Telecommunication Systems, Hitachi, Ltd Ltd..

ll "As a strategic business partner with Intel, "As a strategic business partner with Intel, IBMIBM is committed to is committed toenterprise-class IA-64 servers. Delivered concurrent with Merced,enterprise-class IA-64 servers. Delivered concurrent with Merced,these systems will exploit progressive processor technologies,these systems will exploit progressive processor technologies,industry-leading OS, and IBM industry-leading OS, and IBM Netfinity Netfinity X-architecture innovations.”X-architecture innovations.”uu Randy Groves, Vice President of Randy Groves, Vice President of NetfinityNetfinity Product Development, IBM Corp. Product Development, IBM Corp.

All trademarks and brands are the property of their respective owners

Page 7: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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OEM Merced CommitmentsOEM Merced Commitmentsll ““ NECNEC is developing an original chipset to support scalable 16-way is developing an original chipset to support scalable 16-way

Merced processors SMP (64GB memory), large I/O with up to 128 PCIMerced processors SMP (64GB memory), large I/O with up to 128 PCIslots, and advanced RAS features.”slots, and advanced RAS features.”

uu Kazuhiko Kobayashi, Associate Senior VP,Kazuhiko Kobayashi, Associate Senior VP, NEC CorporationNEC Corporation

ll "" SequentSequent is building scalable, high availability, Merced processor is building scalable, high availability, Merced processorbased NUMA systems designed to deliver Project Monterey's UNIXbased NUMA systems designed to deliver Project Monterey's UNIXplatform for IA-64 to support the world's largest enterprises.”platform for IA-64 to support the world's largest enterprises.”uu JeffJeff Pancottine Pancottine, Vice President of Marketing, Sequent Computer Systems, Inc., Vice President of Marketing, Sequent Computer Systems, Inc.

ll "" SGISGI is committed to delivering modular, Terabyte+ shared physical is committed to delivering modular, Terabyte+ shared physicalmemory,memory, Linux Linux OS systems in 2000, scaling from 2 to 512 Merced OS systems in 2000, scaling from 2 to 512 MercedCPUs.”CPUs.”uu Jan Jan SilvermanSilverman, VP of Marketing, Computer Systems Business Unit, SGI, VP of Marketing, Computer Systems Business Unit, SGI

ll ““ SiemensSiemens will support its customers to deploy their corporate IT will support its customers to deploy their corporate ITinfrastructure on market standard servers based on Merced andinfrastructure on market standard servers based on Merced andfuture IA-64 processors”future IA-64 processors”uu Robert Hoog; President, Computer Systems; Siemens Computer SystemsRobert Hoog; President, Computer Systems; Siemens Computer Systems

ll ““ UnisysUnisys CMP is a breakthrough technology that provides mainframe- CMP is a breakthrough technology that provides mainframe-class scalability, Merced andclass scalability, Merced and Xeon Xeon coexistence in the same server,coexistence in the same server,partitioning, and a shared-everything design.”partitioning, and a shared-everything design.”uu Dave Dave Houseman Houseman, VP, Advanced Technology, Unisys Corporation, VP, Advanced Technology, Unisys Corporation

All trademarks and brands are the property of their respective owners

Page 8: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Massive Investment for IA-64 SuccessMassive Investment for IA-64 Successll Investment in processor technologyInvestment in processor technologyuu 5 IA-64 processors currently in development and definition5 IA-64 processors currently in development and definition

uuHundreds of experienced design engineers across IA-64 projectsHundreds of experienced design engineers across IA-64 projects

uuDedicated compiler and software tools teamsDedicated compiler and software tools teams

ll Investment in platform technologyInvestment in platform technologyuu Intel and OEM chipsets designed concurrent with Merced productIntel and OEM chipsets designed concurrent with Merced product

uu Intel IA-64 server and workstation platformsIntel IA-64 server and workstation platforms

uu “Big Iron” OEM platforms ready for first Merced samples“Big Iron” OEM platforms ready for first Merced samples

uu 4 - 4000 processor OEM platforms 4 - 4000 processor OEM platforms

ll Investment for complete IA-64 solutionsInvestment for complete IA-64 solutionsuu $250M Venture Fund with $100M investment from Intel, OEMs & IT$250M Venture Fund with $100M investment from Intel, OEMs & IT

uuMillions of dollars in additional equity and NRE investments by IntelMillions of dollars in additional equity and NRE investments by Intel

uuResource ramp-up targeted at industry software optimizationResource ramp-up targeted at industry software optimization

Page 9: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Launch Starts NowMerced Launch Starts Nowll Increased resources on software enablingIncreased resources on software enabling

uuAdding hundreds of people to Intel’s software enabling programsAdding hundreds of people to Intel’s software enabling programs

uu Increased focus on ASC and IT programsIncreased focus on ASC and IT programs

ll Ramping IT campaignRamping IT campaignuuStrong IA-64 component to Intel’s E-business visionStrong IA-64 component to Intel’s E-business vision

uuMajor focus on CIO, CEO, CTO for IA-64Major focus on CIO, CEO, CTO for IA-64

uuSeed system program planned for IT evaluation in 1H ‘00Seed system program planned for IT evaluation in 1H ‘00

ll Public rollout of Merced product/technologyPublic rollout of Merced product/technologyuuApplication Developers Architecture Guide released in JuneApplication Developers Architecture Guide released in June

uu Three days of content at Intel Developers Forum (8/31-9/2)Three days of content at Intel Developers Forum (8/31-9/2)

uuExpect many demos at Industry events this yearExpect many demos at Industry events this year

uuMajor technology/info disclosures through 2H ‘99 and into ‘00Major technology/info disclosures through 2H ‘99 and into ‘00nn Specific focus on Merced platforms and software developmentSpecific focus on Merced platforms and software development

Page 10: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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AgendaAgenda

ll The IA-64 Opportunity The IA-64 Opportunity

ll IA-64 Program Update IA-64 Program Update

ll Get Started on IA-64 Today Get Started on IA-64 Today

uu Attend the IA-64 Track to learn how Attend the IA-64 Track to learn how

Page 11: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Program ProgressMerced Program Progressll Last IDF (Feb ‘99):Last IDF (Feb ‘99):uuMerced processor designMerced processor design

on trackon track

uu Intel® 82460GX Intel® 82460GX PCIsetPCIsetdesign completedesign complete

uuOEM system designsOEM system designscompletecomplete

uuCompilers meetingCompilers meetingperformance targetsperformance targets

uuOperating systems runningOperating systems runningon simulatoron simulator

uu ISVs actively portingISVs actively portingapplicationsapplications

uu IHVs IHVs actively porting driversactively porting drivers

ll Today:Today:uuMerced processor in fabrication,Merced processor in fabrication,

samples underwaysamples underway

uu Intel® 460GX Intel® 460GX PCIsetPCIset components componentssamplingsampling

uuOEM systems ready for firstOEM systems ready for firstsamplessamples

uuCompiler focus now onCompiler focus now onproductizationproductization

uuOSVsOSVs porting drivers, shipping porting drivers, shippingdevelopment kitsdevelopment kits

uuKey applications running onKey applications running onsimulator, ready for systemssimulator, ready for systems

uuDrivers ready for first systemsDrivers ready for first systems

Focus shifting from pre-silicon development toFocus shifting from pre-silicon development toprototype debug and production rampprototype debug and production ramp

Page 12: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Program ConvergenceMerced Program ConvergencellMerced processor first silicon received - excellentMerced processor first silicon received - excellent

progressprogress

llDelivery of engineering samples to OEM’s has begunDelivery of engineering samples to OEM’s has begun

ll Intel® 460GX PCIset sampling nowIntel® 460GX PCIset sampling now

llMany OEM systems ready for initial samplesMany OEM systems ready for initial samples

ll All OS’s running on Merced simulator and working onAll OS’s running on Merced simulator and working onbring-up and testbring-up and test

llMajor applications running on Merced simulator andMajor applications running on Merced simulator andready starting initial silicon testingready starting initial silicon testing

ll Key drivers for major Key drivers for major OS’sOS’s in place in place

All elements in place for rapid debugAll elements in place for rapid debugand ramp to production in ‘00and ramp to production in ‘00

Page 13: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Bringing Merced to ProductionBringing Merced to Productionll Initial Step: Functional bring-upInitial Step: Functional bring-up

uu Testing teams will prioritize functional tests firstTesting teams will prioritize functional tests firstuuStrong focus on architecture validation, MP, and availability featuresStrong focus on architecture validation, MP, and availability featuresuuEnsure requirements of target segments are metEnsure requirements of target segments are metuuWork closely with external test partnersWork closely with external test partners

ll PlannedPlanned steppings steppings to production to productionuuBroad prototype system deployment by Intel and OEM’sBroad prototype system deployment by Intel and OEM’suuPerformance testing/tuning acceleratesPerformance testing/tuning acceleratesuuExtensive reliability testingExtensive reliability testing

ll Production scheduleProduction scheduleuu 9 -12 months after first silicon 9 -12 months after first siliconuu “Pre-production” samples to OEM’s for testing and qualification “Pre-production” samples to OEM’s for testing and qualification

about 3 months prior to production releaseabout 3 months prior to production release

Merced debug/prototype process and timeframe similar toMerced debug/prototype process and timeframe similar to386, 486, Pentium386, 486, Pentium®® Pentium Pentium®® Pro Pro

Page 14: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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IA-64 Validation FocusIA-64 Validation Focus

ll Significant pre-silicon testing activity completedSignificant pre-silicon testing activity completeduuSuccessful boot of OS kernels on Merced logic modelSuccessful boot of OS kernels on Merced logic modeluuPost tapeout analysis demonstrated excellent functionalityPost tapeout analysis demonstrated excellent functionalityuu 460GX system platforms assembled, powered-up and tested460GX system platforms assembled, powered-up and tested

ll Early silicon testing program in place and executingEarly silicon testing program in place and executinguuMultiple test platforms to test various configurationsMultiple test platforms to test various configurationsuuProcessor testing uses real OS’s and applicationsProcessor testing uses real OS’s and applications

ll OEM testing partners readyOEM testing partners readyuuVariety of system designs in place (from 4 to 64 processors)Variety of system designs in place (from 4 to 64 processors)uuMost OEM chipsets complete and integrated into systemsMost OEM chipsets complete and integrated into systemsuuWorking with Working with OSV’s OSV’s to test and bring up to test and bring up OS’sOS’s

Extensive testing for fastestExtensive testing for fastestproduction rampproduction ramp

Page 15: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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IA-64 OS and Tools StatusIA-64 OS and Tools Statusll All OS’s running in Merced simulation environmentAll OS’s running in Merced simulation environmentuuAll OSV’s on-track with hardware bring upAll OSV’s on-track with hardware bring upuuOutstanding Linux progress by Trillian teamOutstanding Linux progress by Trillian teamuuBeta OS releases targeted for 1H’00 IA-64Beta OS releases targeted for 1H’00 IA-64

ll Software developer training started Q4’98Software developer training started Q4’98uu ISV event in 4/99 with hundreds of attendeesISV event in 4/99 with hundreds of attendeesuu Technical training to developers - ~4 since Jan’99Technical training to developers - ~4 since Jan’99uuSoftware documents available e.g. ADAG, Program ConventionsSoftware documents available e.g. ADAG, Program Conventions

llKey compiler/development environments availableKey compiler/development environments availableuuMicrosoft, IBM/SCO, HP, Novell, othersMicrosoft, IBM/SCO, HP, Novell, othersuuCygnusCygnus and SGI have delivered prototype gcc and SGI have delivered prototype gcc

compiler toolscompiler tools

Page 16: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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IA-64 Compiler Technology ReadyIA-64 Compiler Technology Readyll Excellent functionalityExcellent functionalityuu IA-64 features applied to a wide variety of code - FP, Integer,IA-64 features applied to a wide variety of code - FP, Integer,

Transaction ProcessingTransaction ProcessinguuWithin 90% of key performance benchmark estimatesWithin 90% of key performance benchmark estimatesuuMicrosoft, IBM, EPC and other compilers on trackMicrosoft, IBM, EPC and other compilers on track

ll Technology Examples:Technology Examples:uu Inlining & cloning benefits object oriented code e.g. C++, JavaInlining & cloning benefits object oriented code e.g. C++, JavauuStrength reduction + post increment helps scientific applicationsStrength reduction + post increment helps scientific applicationsuuPredication directly benefits large database applicationsPredication directly benefits large database applicationsuuSoftware Pipelining improves performance of all integer and FPSoftware Pipelining improves performance of all integer and FP

codecode

Page 17: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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AvailabilityAvailabilitynn DetectDetect errors errorsnn CorrectCorrect errors errorsnn ContainContain errors errorsnn RecoverRecover from errors from errors

Designed to deliver the availability solutionsDesigned to deliver the availability solutionsfor mission critical applicationsfor mission critical applications

Merced High Availability FeaturesMerced High Availability Features

ll Enhanced Machine Check ArchitectureEnhanced Machine Check ArchitectureuuProcessor, firmware, and OS coordinate error handlingProcessor, firmware, and OS coordinate error handlinguuMaximizes error correction before they cause downtimeMaximizes error correction before they cause downtimeuuError tagging feature allows uncorrectable errors to be containedError tagging feature allows uncorrectable errors to be contained

without downtimewithout downtime

ll ECC on large and medium sized arraysECC on large and medium sized arrays

llBuilt-in self test to validate integrity of logic & cachesBuilt-in self test to validate integrity of logic & caches

llOn-die thermal sensorsOn-die thermal sensors

Page 18: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Scalability FeaturesMerced Scalability Features

ll Designed for massive multiprocessor scalabilityDesigned for massive multiprocessor scalabilityuu High bus bandwidth High bus bandwidthuu Transaction deferral - out of order, non-blocking transactions Transaction deferral - out of order, non-blocking transactionsuu Advanced inter-processor interrupt architecture Advanced inter-processor interrupt architecture

ll Enhanced memory supportEnhanced memory supportuu 64 bit memory architecture 64 bit memory architectureuu Flexible page sizes (4KB - 256MB) Flexible page sizes (4KB - 256MB)

ll Large 4MB on-cartridge L2 cacheLarge 4MB on-cartridge L2 cacheuu Keeps data local, reduces bus traffic Keeps data local, reduces bus traffic

Enhanced scalability for largeEnhanced scalability for largemultiprocessor systemsmultiprocessor systems

ScalabilityScalabilitynn 4 MB L2 Cache 4 MB L2 Cachenn Enhanced deferred transactions Enhanced deferred transactionsnn Flexible page sizes Flexible page sizes

Page 19: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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2000

IA-64

AlphaSun

21264-1.1G21264-933

US-III-600

US-III 750

MercedMerced

*Source: Intel Projections, 8/99, Micro Design Resources*Source: Intel Projections, 8/99, Micro Design Resources

4-Way TP4-Way TPRelative Performance*Relative Performance*

Merced Processor High PerformanceMerced Processor High PerformanceComputing for ServersComputing for Servers

Page 20: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Merced Processor High PerformanceMerced Processor High PerformanceComputing for WorkstationsComputing for Workstations

ll Features for outstanding graphics performance:Features for outstanding graphics performance:uu 44 FMACs FMACs perform multiply & add sequence in one cycle perform multiply & add sequence in one cycle

nn Over 6Over 6 Gigaflops Gigaflops peak performance peak performance

uu Two dedicated SIMD floating point execution unitsTwo dedicated SIMD floating point execution units

uuHigh bandwidth from processor to memory to graphics cardHigh bandwidth from processor to memory to graphics card

llArchitectural features for workstations:Architectural features for workstations:uu 128 floating-point registers: rotating, not stacking128 floating-point registers: rotating, not stacking

uu IA-64 can treat general registers as 8x8, 4x16, or 2x32 bitIA-64 can treat general registers as 8x8, 4x16, or 2x32 bitnn Speeds SIMD operationsSpeeds SIMD operations

uu IA-64 instructions semantically compatible with MMXIA-64 instructions semantically compatible with MMXTechnologyTechnology

uu Fully binary compatible with IA-32 codeFully binary compatible with IA-32 code

Page 21: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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NASTRAN Performance ProjectionsNASTRAN Performance Projections

Pentium® II Processor 300MHz/66 FSB

Pentium® II Processor 350 MHz/100 FSB

Pentium® II Processor 400 MHz/100 FSB

Pentium® II Xeon™ Processor 400 MHz/100 FSB

Pentium® II Xeon™ Processor 450 MHz/100 FSB

Pentium® III Xeon™ Processor 550 MHz/100 FSB

Merced Processor

Merced extends the outstandingMerced extends the outstandingperformance of IA workstationsperformance of IA workstations

* Projected

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference insystem hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they areconsidering purchasing. For more information on performance tests and on the performance of Intel products, reference www.Intel.com/procs/perf/limits.htm or call (U.S.) 1-800-628-8686 or 1-916-356-3104.

Source: Results performed by 1. Intel Corporation

*

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ll McKinley builds upon Merced Processor technologyMcKinley builds upon Merced Processor technologyuu Enhanced microarchitectureEnhanced microarchitecture

nn More execution units for greater IPC*More execution units for greater IPC*

nn Large, high speed, on-chip cachesLarge, high speed, on-chip caches

uu Target Frequency: >1Target Frequency: >1 GHz GHz

ll Full Merced & IA-32 software compatibilityFull Merced & IA-32 software compatibilityuuMerced software runs, and runs faster on McKinleyMerced software runs, and runs faster on McKinley

without recompilationwithout recompilation

ll Production target: Late ‘01Production target: Late ‘01

McKinley ProcessorMcKinley Processor

McKinley extends Merced Processor benefitsMcKinley extends Merced Processor benefits

*IPC = Instructions Per Clock Cycle

Page 23: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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AgendaAgenda

ll The IA-64 OpportunityThe IA-64 Opportunity

ll IA-64 Program Update IA-64 Program Update

ll Get Started on IA-64 Today Get Started on IA-64 Today

Page 24: IA-64 Program Overview · Intel Labs Superscalar Architectures 1.5 - 3 instructions / cycle Performance Time 20-30% increase per year from semiconductor technology advances CISC/RISC

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Broadening IA-64 DevelopmentBroadening IA-64 Developmentll Intel 64 Fund establishedIntel 64 Fund established

uuEquity investments in emerging IA-64 related technologiesEquity investments in emerging IA-64 related technologies

ll IA-64 Application Developer’s Architecture GuideIA-64 Application Developer’s Architecture Guidereleased to publicreleased to public

uuPrecursor to the “Programmers Reference Manual”Precursor to the “Programmers Reference Manual”

uuMore development guides throughout 2H ‘99More development guides throughout 2H ‘99

ll IA-64 Developer Information web site establishedIA-64 Developer Information web site established

uu http://developer.intel.com/design/ia64/http://developer.intel.com/design/ia64/devinfodevinfo..htmhtm

llOSV development tools publicly availableOSV development tools publicly available

uuMicrosoft, Novell, HP, IBM/SCO, othersMicrosoft, Novell, HP, IBM/SCO, others

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IA-64 Development TimelineIA-64 Development Timeline19991999 20002000

OS on SimulatorOS on Simulator OS on Hardware Beta OS’s OS on Hardware Beta OS’s Production Production OSOS

Initial SDKInitial SDK(Software Development Kit)(Software Development Kit)ToolsTools

MercedMerced First OEM Samples First OEM Samples SDV ShipmentsSDV Shipments

ISV:ISV:

OEM:OEM:

IHV:IHV:

•• Get Ready for product introductions in ‘00 Get Ready for product introductions in ‘00•• Attend “Merced System Overview”, DIG64, and EFI Presentations Attend “Merced System Overview”, DIG64, and EFI Presentations

•• Continue Working with your Intel Field Representative Continue Working with your Intel Field Representative

•• Get Your Code IA-64 Ready Today Get Your Code IA-64 Ready Today•• Attend IA-64 Track Software Presentations to Learn How Attend IA-64 Track Software Presentations to Learn How

•• Continue Getting Your Drivers 64-bit ready today Continue Getting Your Drivers 64-bit ready today•• Attend IA-64 Track Software Presentations to Learn How Attend IA-64 Track Software Presentations to Learn How

ProductionProduction

ProductionProductionSDKSDK

Beta SDKBeta SDK

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SummarySummary

ll IA-64 is a unique opportunity IA-64 is a unique opportunityuuOpportunity to be a leader on the most significantOpportunity to be a leader on the most significant

architecture advancement since the Intel 80386architecture advancement since the Intel 80386

ll IA-64 is Here IA-64 is HereuuMerced is realityMerced is realityuuLaunch begins now . . .Launch begins now . . .

ll Get Started Today Get Started TodayuuDevelopment tools and resources available nowDevelopment tools and resources available nowuuThe IA-64 Track will tell you howThe IA-64 Track will tell you how