34
High Speed AttoJoule/Bit Passive and Active Nanophotonic Devices for Computing and Optical Interconnects Ray T. Chen Microelectronics research Center The University of Texas, Austin Austin, TX 78758 Gernot Pomrenke Program Manager, AFOSR https://muri2.engr.utexas.edu/

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Page 1: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

High Speed AttoJoule/Bit Passive and Active

Nanophotonic Devices for Computing and

Optical Interconnects

Ray T. Chen

Microelectronics research Center

The University of Texas, Austin

Austin, TX 78758

Gernot Pomrenke

Program Manager, AFOSR

https://muri2.engr.utexas.edu/

Page 2: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Acknowledgement

Dr. Andreas Beling Dr. Joe Campbell

Dr. David Z. Pan

Dr. Alan X. WangDr. Dennis Prather

Dr. Dennis Deppe

Sponsor

Technical support

Our MURI team

Program manager:

Dr. Gernot Pomrenke

Page 3: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

In 1982…

Time magazine’s Man of the Year was…

3

The Computer

Commodore 64 PC released

8-bit computer with 1 MHz Clock Speed

Page 4: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Data Centers of 2017

Data Centers in 2018

peta (P) = 10 15, exa (E) = 1018 , pico (p) =10-12, femto (f) = 10-15

Page 5: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Schematic of the proposed AJ/B intra- and inter-chip

optical computing & interconnects on silicon platform

Thrust I — Attojoule/bit Transceivers (Campbell, Beling, Deppe)

Thrust II — Energy Efficient Optical Modulators and Routers(Wang, Prather,

Chen)

Thrust III — Optical Logic Gate and Optical Computing (Pan, Chen)

Thrust IV —Attojoule/bit Device Packaging and System Integration (Chen,

Prather, Wang)

Page 6: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

This has to be a high quality buried heterostructure for any

nanolaser to work, not just ours.

Lithographic VCSEL- Cavity scalable

to 100 nm diameter

MURI Co-PI: Dennis Deppe, UCF

Goal: Develop next generation nanolaser for high speed direct

modulation and SiP integration

Motivation: Directly modulated nano-VCSELs possess device physics to

solve laser volume and speed limitations needed to reach attojoule/bit

energy.

Technology Advance: All-epitaxial mode confinement combined with a

new buried heterostructure design enable device scaling to nanometer

dimensions.

PCE

Power

Voltage

22°C stage temperature

2 µm diameter

Ith = 0.39mA

hdiff = 53.1%

PCEmax = 33.5%

Rdiff = 109W

2 µm diam. VCSEL cavity

Page 7: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

0 1 2 3 4 5 6 7 8 9 10 11 120

1

2

3

4

5

6

7

dL/dI = 0.6 W/A

dL/dI = 0.66 W/A

RT

95 C

dV/dI = 58 WPow

er

[mW

]

Current [mA]

0

1

2

3

4

5

6

7

dV/dI = 99 W

Volta

ge [V

]

Ith ~ 0.6 mA

0 5 10 15 20 25 30

-24

-21

-18

-15

-12

-9

-6

-3

0

3

6

9

I/Ith=

6x

8x

10x

12x

14x

16x

Re

sp

on

se

[d

B]

Frequency [GHz]

95C Bandwidth

Ith

~ 0.6 mA

9 GHz

-14 -12 -10 -8 -6 -4 -2 0 2 4 6-15-14-13-12-11-10-9-8

-7

-6

-5

-4

-3

-2

12 Gb/s BERT at 95C

BTB (3m OM4)

100m OM4

BER = 1E-12

Lo

g(B

ER

)

Received Optical Power [dBm]

Ith ~ 0.6 mA (@ 95C)

I = 8 mA (~13x)

Vpp

= 1148 mV

PRBS 7

First speed measurements of scalable VCSEL: – 4 µm diam.: Collaboration with Feng - UIUC

Papers and presentations under MURI support:

1. J. Qiu, D. Deppe, and M. Feng, “Lithographic-Defined VCSELs with 12 Gb/s Error-

Free Data Transmission up to 95 C,” Manuscript in preparation.

2. Invited – D.G. Deppe, M. Li, X. Yang, and M. Bayat, “Advanced VCSEL Technology:

Self-Heating and Intrinsic Modulation Response,” IEEE J. Quant. Electron. 54, Art. No.

2400209 (June 2018).

3. Invited – D.G. Deppe, “Energy Efficient Nano-VCSELs and Maximum Direct

Modulation Speed for Optical Interconnects,” SPIE 2018 Photonics West, Jan. 28

2017 – Feb. 2, 2018, San Francisco, CA

4. Invited – D.G. Deppe, “High Efficiency Nanoscale Lasers,” IEEE 2017 Sum. Top., Jul.

10 – 12, 2017, San Juan, PR, USA

GRA’s and research scientists supported: M. Bayat, GRA; P. Michael, Res. Sci.; Chetan

Swamy, Res. Sci.

L-I-V @ RT, 95 CData speed – 95 C

Small signal response, 95 C

Impact: First speed measurements of new VCSEL technology

demonstrate 12 Gb/s @ 95 C. Starts path to high speed nanolasers.

Page 8: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

35 GHz @ 0 V

Zero-Bias High-Speed Photodiodes

(Co-PIs: Beling & Campbell, UVa)

• Used GaAsSb instead of InGaAs as

absorber to eliminate band discontinuity

and facilitate electron transport at low

fields

• Electron drift layer to reduce capacitance

• 35 GHz bandwidth at zero-bias is

demonstrated

• A novel waveguide-depletion layer PD for

high quantum efficiency was developed.

Predicted quantum efficiency of high-

speed PDs is 3X larger than in previous

designs.

substrate

cladding / N-contact

waveguide / depletion

layer

absorber

P-contact

B. Tossoun, A. Beling, U.S. Patent Application

Waveguide/

depletion layer

5-m long PD

Page 9: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

CIS Modulator Overview

Andrew J. Mercante, Shouyuan Shi, Peng Yao, Linli Xie, Robert M. Weikle, and Dennis W. Prather, "Thin film lithium niobate electro-optic

modulator with terahertz operating bandwidth," Opt. Express 26, 14810-14816 (2018)

𝛤 =1

𝑉applied

𝑆

12𝑛𝑒3𝑟33(𝑥, 𝑧)𝐸𝐶𝑃𝑊(𝑧, 𝑥) ൯𝐸𝑜𝑝𝑡(𝑧, 𝑥

2𝑑𝑠

𝑆

൯𝐸𝑜𝑝𝑡(𝑧, 𝑥2𝑑𝑠

𝛿 = 1 − Τ𝑛𝑜𝑝𝑡 𝑛𝐶𝑃𝑊

𝑚 𝑓𝐶𝑃𝑊 = 𝑒−𝛼𝐶𝑃𝑊 𝑓𝐶𝑃𝑊 𝐿

2sinh2 𝛼𝐶𝑃𝑊 Τ𝐿 2 + sin2 𝑘𝐶𝑃𝑊𝑛𝐶𝑃𝑊𝛿 Τ𝐿 2

𝛼𝐶𝑃𝑊 Τ𝐿 2 2 + 𝑘𝐶𝑃𝑊𝑛𝐶𝑃𝑊𝛿 Τ𝐿 2 2𝑉𝜋 𝑓𝑚 =

𝜆0)2𝛤𝐿 𝑚(𝑓𝑚

Icarrier 𝜋𝑉𝑎𝑝𝑝𝑙𝑖𝑒𝑑

2𝑉𝜋(𝑓)

2

Measurements are normalized to 0 dBm RF input powerCharacteristic impedance (𝑍CPW) ≈ 33 Ω

𝑉𝑎𝑝𝑝𝑙𝑖𝑒𝑑 = 2 1 𝑚𝑊 𝑍𝑚 ≈ 0.26 V

Page 10: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

Mode Coupler for Hybrid Photonic Device

Outline• A low reflectance optical mode

transition terrace structure for use

in Si3N4/LiNbO3 based hybrid

photonics is demonstrated to

achieve passive-active integration

• We performed a combination of

simulation and experimental

techniques on the hybrid device

with and without mode transition

terrace structure.

• A high-quality factor (Q) hybrid

Si3N4-LiNbO3 micro-ring

resonator is demonstrated with our

terrace transition which mitigates

undesired resonance caused abrupt

mode transition Schematic of the proposed structure.

Device Characterization by Implementing a Hybrid Ring

Without terrace structure :

With terrace structure :

Mode Transition Structure Simulation

A gradual mode transition from a Si3N4 waveguide to a hybrid

Si3N4/LiNbO3 waveguide is achieved by two step etch process

The transmission spectrum of hybrid ring with the terrace structure shows

only one clear FSR which indicate that the terrace structure improves the

transition and mitigates multiple cavities and reflection of the without terrace

structure

No

rmal

ized

tra

nsm

issi

on

Wavelength (nm)

ThroughInput

SiO2 Si3N4 LiNbO3

FSR 1 FSR 2 FSR 3Through

Wavelength (nm)

Norm

aliz

ed tr

ansm

issi

on

ThroughInput

FSR 2

SiO2 Si3N4 LiNbO3

FSR 2

FSR 1 FSR 3

FSR 2

Through Intrinsic Q: 6 × 104

Abu Naim R. Ahmed, Andrew Mercante, Shouyuan Shi, Peng Yao, and Dennis W.

Prather, "Vertical mode transition in hybrid lithium niobate and silicon nitride-based

photonic integrated circuit structures," Opt. Lett. 43, 4140-4143 (2018)

Measured transition loss of

0.81 dB/facet

Page 11: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

11

Silicon Photonic Crystal Nanocavity Modulator: Toward Atto-Joule/Bit Energy Efficiency

Erwen Li1, Qian Gao1, Ray T. Chen2, Alan X. Wang1

1School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR 97331, USA2 Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, 78758

Deposition and Characterization of Transparent

Conductive Oxide Thin Film

RF sputtered indium-tin oxide (ITO)

shows low surface roughness

below 0.5nm

Characterized the electrical and

optical properties of the sputtered

ITO thin film

Comparison of plasma-dispersion

effect with Si: ITO shows larger

refractive index change and much

stronger absorption at epsilon-near-

zero (ENZ)

Design and Simulation of Ultra-Compact

Photonic Crystal Nano-cavity Modulators

Active electro-optic region: ITO/SiO2/p-Si MOS capacitor

Metal free, low optical loss plasmonic structure

High Q/Vmode (Purcell factor) resonator

Total Device Footprint: 0.6 × 8 µm2

Active volume: 0.56 (W)× 0.28 (H)× 0.375 (L)= 0.06 µm3, 2% of λ3

Fabrication and Characterization of Energy-

Efficiency Nano-Cavity Modulators

1543.5 1544.0 1544.5 1545.0 1545.5 1546.0

-15

-10

-5

0

5

Ex

tin

cti

on

ra

tio

(d

B)

Wavelength (nm)

Vgate (V)

0

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-4

Broadband Plasmonic Electro-Absorption

Modulator

Hybrid silicon-plasmonic slot waveguide with ITO Ultra-short length of only 3μm Modulation strength is 1.5 dB/μm with 3.5V voltage Uniform (<1dB) E-O modulation from 1530~1600nm

wavelength

Page 12: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

12

Silicon Photonic Crystal Nanocavity Modulator: Toward Atto-Joule/Bit Energy Efficiency

Erwen Li1, Qian Gao1, Ray T. Chen2, Alan X. Wang1

1School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR 97331, USA2 Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, 78758

Major Achievements:

Designed and implemented nano-scale electro-optic (E-O)

modulators with the smallest active volume (Fig.1a):

0.56 (W)× 0.28 (H)× 0.375 (L)= 0.06 µm3, only 2% of λ3

Demonstrated ultra-high efficiency MOS capacitor (ITO/HfO2/p-

Si) based E-O device (Table.1): 250pm/V and 3fJ/bit

Applied quantum moment model to transparent conductive

oxide (TCO) devices for the first time and revealed in-depth

device physics that is different compared with traditional

semiconductor theory (Fig.1 b and c)

Designed and fabricated TCO based electro-absorption (EA)

modulator (Fig.2 top) and measured 2.5Gbps E-O modulation

speed from and obtained over 100nm usable optical bandwidth

at the same time (Fig. 2 bottom)

On-going Research Activities:

Theoretical analysis of the fundamental limit of energy

efficiency and bandwidth of nano-scale E-O modulators

Design and implementation of >10GHz TCO E-O modulators

with 100aJ/bit energy efficiency

Fig.1 ultra-compact nano-cavity modulator Fig.2 Broadband plasmonic

EA modulator

Table.1 Comparison of silicon-TCO nanocavity modulators with

different insulator layer

Page 13: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 13

Automated logic synthesis for EO logic-

based integrated optical computing

Library Algorithm

Grouped mature components into three categories based on their interfaces and functions.

Proposed And-Invertor Graphs (AIGs) based automated logic synthesis algorithm to design optical

computing circuits automatically.

(Collaborated with David Pan’s group)

Page 14: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 14

Examples

𝑜𝑢𝑡 = (𝑎 + 𝑏)(𝑐 ⊕ 𝑑 + 𝑒)𝑓𝐶𝑜𝑢𝑡 = 𝐶𝑖𝑛 · (𝑎 ⊕ 𝑏) + 𝑎 · 𝑏

Full adder For each bit:

Elements in

libraryCircuit size Redundancy Generality

BDD Only one Large Large Yes

AIG Many, scalable Small Small No*

*with more and more new elements in library, it could apply to most

of the cases with less circuit size and less redundancy.

Page 15: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

Expected advantages

The clock rate for the comparison is 2 GHz, with data quoted from references

1. Timurdogan, E., Sorace-Agaskar, C.M., Sun, J., Hosseini, E.S., Biberman, A. and Watts, M.R., 2014. An ultralow

power athermal silicon modulator. Nature communications, 5(2014).

2. Roy, S., Choudhury, M., Puri, R. and Pan, D.Z., 2016. Polynomial time algorithm for area and power efficient

adder synthesis in high-performance designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits

and Systems, 35 (5).

The clock rate for the

comparison is 2 GHz

Page 16: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

Page 16

MZIAbsorptionwaveguide

Micro-ring Micro-disk

Footprint ~2,000×500 μm2 ~40×10 μm2 ~10×10 μm2 ~5×5 μm2

Industry maturityAvailable in PDKs offered

by foundriesAvailable in PDKs offered

by foundriesAvailable in PDKs offered

by foundriesAvailable in PDKs offered

by foundries

Insertion loss ~2.2 dB ~4.4 dB ~2.8 dB ~0.9 dB

Extinction ratio ~4.1 dB ~4.2 dB ~6.6 dB ~ 7.8 dB

Expected energyconsumption

~750 fJ/bit ~20 fJ/bit ~50 fJ/bit ~1 fJ/bit

To date, the best choice

References1. E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power

athermal silicon modulator,” Nat. Commun., vol. 5, p. 4008, Jun. 2014.2. M. Pantouvaki, S. A. Srinivasan, Y. Ban, P. De Heyn, P. Verheyen, G. Lepage, H. Chen, J. De Coster, N. Golshani, S.

Balakrishnan, P. Absil, and J. Van Campenhout, “Active Components for 50 Gb/s NRZ-OOK Optical Interconnects in a Silicon Photonics Platform,” J. Light. Technol., vol. 35, no. 4, pp. 631–638, Feb. 2017.

Page 17: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Optical Computing & Interconnect

Integration Thrust

⧫ New adder architecture and PIC design

– Tape-out of 2-bit and 4-bit full adders at AIM and JEPPIX

– Simulation results are promising

– Waiting for chips to be sent back

• Energy-efficient general logic synthesis framework for PIC

– ASICON’17 (invited talk), ASPDAC’18

• New optical shifter and multiplier designs (ongoing)

• Energy-efficient optical interconnect synthesis framework

– Submitted to DAC’18

17

Page 18: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 18

Comparison of microring and microdisks

Microdisks outperform microrings in size, power

consumption and fabrication tolerance.

wavelength deviation vs fabrication variation

wavelength distribution of rings and disks on the same chip

wavelength shift vs temperature and power

[1] [2]

[1] from IMEC, [2] from Michael R. Watts’s group

Page 19: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 19

A two-bit ripple carry TO full adder

Page 20: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 20

Experiment

Page 21: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 21

Floating gate for post-trimming

[1]M. Grajower, N. Mazurski, J. Shappir, and U. Levy, “Non-Volatile Silicon Photonics Using Nanoscale Flash Memory Technology,” Laser Photon. Rev., vol. 1700190, p. 1700190, 2018.

The trapped electrons in the floating gate will stay for a long time (>10 years) even after the removal of power supply. It is useful for post-trimming, programming, and memory.

Page 22: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

New PIC Architecture and Design

• Two PIC chips have been taped out (manual designs)

22

Silicon platform: compact and low propagation/insertion loss

InP platform: monolithically integrated system with lasers, modulators, and photodetectors

4-bit full adder

(2-disk design)

2-bit full adder

(3-disk design)

4-bit full adder

(2-EAM design)

2-bit full adder

(3-EAM design)

4 cascaded disks DRC-clean

Area optimization

High- and low-frequency testing needs

Robustness

Ease of tuning

Page 23: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Photonic IC CAD Research

Functional/Logic

Design

Circuit Design

Specification

Physical Verification

and Signoff

Physical Design

Proposed a new logic synthesis

framework for PIC [Zhao+,

ASPDAC’18]

Very limited tools. We

developed new CAD

algorithm/tool for optical

interconnect synthesis (DAC’18

under review)

Page 24: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 24

The top view of the whole chip

2-bit full adder

4-bit full adder

4 mm

2 m

mTesting area

Page 25: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 25

Microdisk and MMI Crossing

Phase shifter Grating coupler

100um

100um

Photodetector

Wavelength and splitters

25u

m

Microdisk

MMI

90:10 splitters

40um

20um

15um100um

Page 26: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

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Page 27: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 27

How to scale? Equivalent Moore’s Law in optical computing?

Two potential solutions:

Wavelength division multiplex

Multi-operand gate

WDM-based EO comparator, encoder/decoders are designed

and will be included in the next run of AIM.

a

b

c

d

Page 28: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

8/27/2018Dr. Ray T. Chen MURI review Page 28

(1) This MURI program has supported 2 postdocs, 14 PhD students.

(2) In the last 20 months we have published 16 journal papers and 24 conference papers and there are 6 pending papers under evaluation.

(3) Many invited talks were given

Page 29: High Speed AttoJoule/Bit Passive and Active Nanophotonic ... · Automated logic synthesis for EO logic-based integrated optical computing Library Algorithm Grouped mature components

2017/1/20

Publications in the last twenty months

• Journals

• 1. K. Sun, D. Jung, C. Shang, A. Liu, J. Zang, Q. Li, J. Klamkin, J. E. Bowers, A. Beling, “Low Dark Current III-V on Silicon Photodiodes by Heteroepitaxy,” Optics Express 26, pp. 13605-13613, 2018.

• 2. Q. Yu, K. Sun, Q. Li, A. Beling, “Segmented waveguide photodetector with 90 % quantum efficiency,” Opt. Express 26, pp. 12499-12505, 2018.

• 3. B. Tossoun, R. Stephens, Jr., Y. Wang, S. Addamane, G. Balakrishnan, A. Holmes, Jr., and A. Beling, “High-Speed InP-based p-i-n Photodiodes with InGaAs/GaAsSb Type-II Quantum Wells,” IEEE Photonics Technology Letters, vol. 30, no. 4, pp. 399 - 402, 2018.

• 4. B. Tossoun, J. Zang, S. Addamane, G. Balakrishnan, A. Holmes, and A. Beling, “InP-based Waveguide-Integrated Photodiodes With InGaAs/GaAsSb Type-II Quantum Wells and 10-GHz Bandwidth at 2 m Wavelength,” IEEE/OSA J. Lightwave Technol. (accepted pending minor revisions).

• 5. Li, Erwen, Qian Gao, Ray T. Chen, and Alan X. Wang. "Ultracompact silicon-conductive oxide nanocavity modulator with 0.02 lambda-cubic active volume." Nano letters 18, no. 2 (2018): 1075-1081.

• 6. Gao, Qian, Erwen Li, and Alan X. Wang. "Ultra-compact and broadband electro-absorption modulator using an epsilon-near-zero conductive oxide." Photonics Research 6, no. 4 (2018): 277-281.

• 7. Li, Erwen, Qian Gao, Spencer Liverman, and Alan X. Wang, “One-Volt Silicon Photonic Crystal Nanocavity Modulator with Indium Oxide Gate”, Optics Letters, accepted

• 8. Gao, Qian, Erwen Li, and Alan X. Wang. “Comparative Analysis of Transparent Conductive Oxide Electro-Absorption Modulators”, Optical Materials Express, accepted

Page 29

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2017/1/20

• 9. Zhoufeng Ying, Zheng Wang, Zheng Zhao, Shounak Dhar, David Z. Pan, Richard Soref, and Ray T. Chen. "Silicon microdisk-based full adders for optical computing." Optics letters 43, no. 5 (2018): 983-986.

• 10. Zhoufeng Ying, Zheng Wang, Zheng Zhao, Shounak Dhar, David Z. Pan, Richard Soref, and Ray T. Chen. "Comparison of microrings and microdisks for high-speed optical modulation in silicon photonics." Applied Physics Letters 112, no. 11 (2018): 111108.

• 11. Zhoufeng Ying, Shounak Dhar, Zheng Zhao, Chenghao Feng, Rohan Mital, Chi-Jui Chung, David Z. Pan, Richard A. Soref, and Ray T. Chen. "Electro-Optic Ripple-Carry Adder in Integrated Silicon Photonics for Optical Computing." IEEE Journal of Selected Topics in Quantum Electronics (2018).

• 12. Zhoufeng Ying, Zheng Zhao, Chenghao Feng, Rohan Mital, Shounak Dhar, David Z. Pan, Richard Soref, and Ray T. Chen, "Automated logic synthesis for electro-optic logic-based integrated optical computing," under review

• 13. Andrew J. Mercante, Shouyuan Shi, Peng Yao, Linli Xie, Robert M. Weikle, and Dennis W. Prather, "Thin film lithium niobate electro-optic modulator with terahertz operating bandwidth," Opt. Express 26, 14810-14816 (2018)

• 14. Abu Naim R. Ahmed, Andrew Mercante, Shouyuan Shi, Peng Yao, and Dennis W. Prather, "Vertical mode transition in hybrid lithium niobate and silicon nitride-based photonic integrated circuit structures," Opt. Lett. 43, 4140-4143 (2018)

• 15. J. Qiu, D. Deppe, and M. Feng, “Lithographic-Defined VCSELs with 12 Gb/s Error-Free Data Transmission up to 95 C,” Manuscript in preparation.

• 16. Invited – D.G. Deppe, M. Li, X. Yang, and M. Bayat, “Advanced VCSEL Technology: Self-Heating and Intrinsic Modulation Response,” IEEE J. Quant. Electron. 54, Art. No. 2400209 (June 2018).

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• Conferences

• 1. Q. Yu, Z. Wang, K. Sun, F. Yu, J. Zang, J. C. Campbell, and A. Beling, “Zero-bias GaAsSb/InP

Photodiode with 40 GHz Bandwidth,” IEEE Photonics Conference 2018 (IPC 2018), Reston, VA,

Sept. 30- Oct. 4, 2018, p.1-2, accepted for publication.

• 2. B. Tossoun, S. Addamane, G. Balakrishnan, A. Holmes, Jr., and A. Beling, “High Speed InP-

based Type-II Multiple Quantum Well Integrated Waveguide Photodiode at 2.0-μm Wavelength,”

OSA Advanced Photonics Congress, Integrated Photonics Research, Silicon, and Nano-Photonics

(IPR 2018), Zurich, July 2-5, 2018, p.1-2, paper IW1B.3.

• 3. Q. Yu, Y. Wang, L. Xie, S. Nadri, K. Sun, J. Zang, Q. Li, R. M. Weikle, A. Beling, ”High-

performance InGaAs/InP photodiodes on silicon using low-temperature wafer-bonding,” in

Conference on Lasers and Electro-Optics (CLEO 2018), San Jose, CA, 13-18 May, 2018, p. 1-2, paper

SM2I.1.

• 4. J. Zang, X. Xie, Q. Yu, K. Sun, A. Beling, and J. C. Campbell, "Reduction of Amplitude-to-

Phase Conversion in Charge-Compensated Modified Uni-traveling Carrier Photodiodes," in

Conference on Lasers and Electro-Optics (CLEO 2018), OSA Technical Digest, paper SM2L.2.

• 5. A. Beling, “Low-Power High-Speed Photodiodes,” presented at SPIE Photonics West, Optical

Interconnects XVIII, San Francisco, CA, Jan. 27- Feb.1, 2018 (invited).

• 6. E. Li, Q. Gao, S. Liverman, A. X. Wang, “Energy-Efficient Silicon Photonic Crystal

Nanocavity Modulator Driven by Indium Oxide Gate,” Conference on Optical MEMS and

Nanophotonics 2018, July 29th – Aug 2nd, Lausanne, Switzerland

• 7. A. X. Wang, “Silicon Nanocavity Modulators: Toward Atto-joule/bit Energy Efficiency,”

Invited Presentation, the 10th International Conference on Information Optics and Photonics, July

8th-11th, Beijing, China

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• 8. Li, Erwen, Qian Gao, Ray T. Chen, and Alan X. Wang. "Silicon-conductive oxide nano-cavity modulator with extremely small active volume." In CLEO: Science and Innovations, pp. SM1I-3. Optical Society of America, 2018.

• 9. Li, Erwen, Qian Gao, and Alan X. Wang. "Tunable plasmonic subwavelength grating using electrically controlled conductive oxide." In CLEO: Science and Innovations, pp. JTh2A-56. Optical Society of America, 2018.

• 10. Gao, Qian, Erwen Li, and Alan X. Wang. "Electrically-Induced Absorption Silicon-Plasmonic Modulator with 70nm Bandwidth." In CLEO: Science and Innovations, pp. SM4B-2. Optical Society of America, 2018.

• 11. Gao, Qian, Erwen Li, and Alan X. Wang. "Ultra-compact plasmonic-oxide electro-optic modulator." In Smart Photonic and Optoelectronic Integrated Circuits XX, vol. 10536, p. 105360S. International Society for Optics and Photonics, 2018.

• 12. Li, Erwen, Qian Gao, and Alan X. Wang. "Electrically-tunable subwavelength grating using transparent conductive oxide." In Smart Photonic and Optoelectronic Integrated Circuits XX, vol. 10536, p. 1053626. International Society for Optics and Photonics, 2018.

• 13. Zhoufeng Ying, Zheng Wang, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen. "Microresonator-based electro-optic full adder for optical computing in integrated photonics (Conference Presentation)." Optical Interconnects XVIII 10538 (2018): 1053803.

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• 14. Zheng Wang, Zhoufeng Ying, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen. "Silicon-photonics-based carry-ripple adder towards future optical computing (Conference Presentation)." Silicon Photonics XIII 10537 (2018): 105370E.

• 15. Zhoufeng Ying, Zheng Wang, Zheng Zhao, Shounak Dhar, David Z. Pan, Richard Soref, and Ray T. Chen. "Microdisk-Based Full Adders for Optical Computing in Silicon Photonics." CLEO: Science and Innovations (2018): SF1A-3.

• 16. Zheng Wang, Zhoufeng Ying, Shounak Dhar, Zheng Zhao, David Pan, and Ray T. Chen. "Nanophotonic devices for power-efficient computing and optical interconnects." In Photonics Society Summer Topical Meeting Series (SUM), 2017 IEEE, pp. 7-8. IEEE, 2017.

• 17. Zheng Wang, Zhoufeng Ying, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen. "Optical switches based carry-ripple adder for future highspeed and low-power consumption optical computing." In Lasers and Electro-Optics (CLEO), 2017 Conference on, pp. 1-2. IEEE, 2017.

• 18. Zhoufeng Ying, Zheng Wang, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen. "On-chip microring resonator based electro-optic full adder for optical computing." In CLEO: QELS_Fundamental Science, pp. JW2A-147. Optical Society of America, 2017.

• 19. Invited – D.G. Deppe, “Energy Efficient Nano-VCSELs and Maximum Direct Modulation Speed for Optical Interconnects,” SPIE 2018 Photonics West, Jan. 28 2017 – Feb. 2, 2018, San Francisco, CA

• 20. Invited – D.G. Deppe, “High Efficiency Nanoscale Lasers,” IEEE 2017 Sum. Top., Jul. 10 – 12, 2017, San Juan, PR, USA

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21. Derong Liu, Zheng Zhao, Zheng Wang, Zhoufeng Ying, Ray T. Chen, and David Z. Pan. "OPERON: optical-electrical power-efficient route synthesis for on-chip signals." In Proceedings of the 55th ACM/IEEE Annual Design Automation Conference (DAC) (2018).

22. Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, and David Z. Pan. "Logic synthesis for energy-efficient photonic integrated circuits." In Proceedings of the 23rd ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC) (2018).

23. Zheng Zhao, Derong Liu, Zhoufeng Ying, Biying Xu, Lu Zhang, Bei Yu, Ray T. Chen, and David Z. Pan. ”Hardware-software Co-design of Slimmed Optical Neural Networks." In Proceedings of the 24th ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), under review

24. Zheng Zhao, Derong Liu, Zhoufeng Ying, Ray T. Chen, and David Z. Pan. " Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis." In Proceedings of the 24th ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), under review

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