Ground Referenced Stereo Headphone Amplifier V+ GENERAL ... · =10kΩ - 0.007 0.05 % Channel Separation1 CS1 Rg=600Ω , (*1) 65 ... The NJU72040 has built-in pop suppression circuitry

NJU72040

– 1 –

Ver. 1.3E

Ground Referenced Stereo Headphone Amplifier

GENERAL DESCRIPTION

The NJU72040 is an audio headphone amplifier .

Ground-referenced outputs eliminate output coupling

capacitor. The pop noise suppression circuit removes a pop

noise at the power-on and power-off.

It is suitable for audio headphone amplifer application

APPLICATIONS

Audio applications which have audio headphone interface

FEATURES

Operating Voltage +2.7 to +3.6V

Operating Current IDD=10.5mA typ.

at V+=3.3V, No load, No Signal

Output Coupling Capacitor-less

Pop Noise Suppression Circuit

Gain Select

C-MOS Technology

Package Outline SSOP14

BLOCK DIAGRAM

PACKAGE OUTLINE

NJU72040V

INL-

INL+

OUTL

V+

CP

CN

GND

REF

V-

MUTE

GAIN

INR-

INR+

OUTR

32Ω

Headphone

32Ω

Headphone

V+

inverted

phase

inverted

phase

V-Regulator

Bias

Gain Select

V+ V+

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegV+

NJU72040

– 2 –

PIN CONFIGURATION

No. Symbol Function No. Symbol Function

1 INL- Lch Inverted Input 8 REF Reference Voltage Input

2 INL+ Lch Noninverted Input 9 V- V- Power Supply

3 OUTL Lch Output 10 MUTE MUTE / Pop Noise Suppression

4 V+ V+ Power Supply 11 GND Ground

5 CP Flying Capacitor Positive Terminal 12 OUTR Rch Output

6 CN Flying Capacitor Negative Terminal 13 INR+ Rch Inverted Input

7 GAIN Gain Select 14 INR- Rch Noninverted Input

NJU72040

INL-

INL+ INR+

INR-

OUTL OUTR

V+ GND

MUTE CP

CN V-

REF GAIN

1

7 8

14

NJU72040

– 3 –

ABSOLUTE MAXIMUM RATING (Ta=25C)

PARAMETER SYMBOL RATING UNIT

Supply Voltage V+ +4 V

Power Dissipation PD SSOP14 : 550(Note1) mW

Maximum Input Voltage VIM V+

+0.3 V

Operating Temperature Range Topr -40 ~ +85 C

Storage Temperature Range Tstg -40 ~ +125 C

(Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting

RECOMMENDED OPERATING CONDITIONS (Ta=25C unless otherwise specified)

PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT

Operating Voltage V+ 2.7 3.3 3.6 V

ELECTRICAL CHARACTERISTICS (Ta=25C, V

+=3.3V, f=1kHz, Vin=0.1Vrms[differential input], Gv=6.4dB, MUTE=OFF, RL=32Ω unless otherwise specified)


Operating Current IDD No signal, No load - 10.5 15.5 mA

Input Resistance1 Rin1 INL-, INR- 49 61 73 kΩ

Input Resistance2 Rin2 INL+, INR+ 103 129 155 kΩ

Voltage Gain1 GV1 Gain Terminal=Low 5.4 6.4 7.4 dB

Voltage Gain2 GV2 Gain Terminal=High 11.4 12.4 13.4 dB

Voltage Gain3 GV3 Gain Terminal=Low, RL=10kΩ 6.6 7.1 7.6 dB

Voltage Gain4 GV4 Gain Terminal=High, RL=10kΩ 12.6 13.1 13.6 dB

Maximum Output Power1 POMAX1 THD=3%, RL=32Ω

Input=Lch or Rch - 80 - mW

Maximum Output Power2 POMAX2 THD=3%, RL =32Ω

Input=Lch and Rch - 55 - mW

Maximum Output Voltage Level VOMAX THD=1%, RL=10kΩ - 2.2 - Vrms

Mute Level VMUTE Rg=0Ω , Mute=ON - -90 -80 dB

Equivalent Input Noise Voltage VNI Rg=0Ω , BW:400Hz-22kHz - -100 -95 dBV

Total Harmonic Distortion1 THD1 BW:400Hz-22kHz, RL=32Ω - 0.08 0.3 %

Total Harmonic Distortion2 THD2 BW:400Hz-22kHz, RL=10kΩ - 0.007 0.05 %

Channel Separation1 CS1 Rg=600Ω , (*1) 65 75 - dB

Channel Separation2 CS2 Rg=600Ω , f=10kHz, (*1) 55 65 - dB

Output Offset Voltage VOS Rg=0Ω , Gv=12.4Db, No load - 1 5 mV

(*1)OUTL(measured terminal): 20log(OUTR/OUTL) , OUTR(measured terminal): 20log(OUTL/OUTR) CONTROL CHARACTERISTICS (Ta=25C, V

+=3.3V, Gv=6.4dB, MUTE=OFF, RL=32Ω unless otherwise specified)


Mute terminal High MuteH Mute=OFF 0.8 V+ - V

+ V

Mute terminal Low MuteL Mute=ON 0 - 0.2 V+ V

Gain terminal High GainH Gv=12.4dB 0.8 V+ - V

+ V

Gain terminal Low GainL Gv=6.4dB 0 - 0.2 V+ V

NJU72040

– 4 –

TEST CIRCUIT (IDD)

(*2): Monolithic Ceramic Capacitors

TEST CIRCUIT (GV1, GV2, GV3, GV4, POMAX1, VOMAX) (*2): Monolithic Ceramic Capacitors

(*2)

(*2)

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

REF

V-

A

V+

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTRGv1,2,POMAX1

RL=32Ω

Gv3,4,VOMAX

RL=10kΩ

V+

inverted phase

REF

V-

V

Gv1,2,POMAX1

RL=32Ω

Gv3,4,VOMAX

RL=10kΩ

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

(*2)

(*2)

NJU72040

– 5 –

TEST CIRCUIT (POMAX2) (*2): Monolithic Ceramic Capacitors

TEST CIRCUIT (VMUTE) (*2): Monolithic Ceramic Capacitors

(*2)

(*2)

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

RL=32Ω

V+

inverted phase

REF

V-

V

inverted phase

RL=32Ω

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

inverted phase

REF

V-

VRL=32Ω RL=32Ω

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

(*2)

(*2)

NJU72040

– 6 –

TEST CIRCUIT (VNI) VNI=(measurement)-Gv1 (*2): Monolithic Ceramic Capacitors TEST CIRCUIT (THD1, THD2) (*2): Monolithic Ceramic Capacitors (*3): Connect a low-pass filter circuit with the corner frequency of more than 20kHz in front of an analyzer for rejecting the switching noise generated from NJU72040. Otherwise, the characteristic result may change because of the switching noise.

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

RL=32Ω

V+

REF

V-

V VRL=32Ω

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

(*2)

(*2)

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

THD1

RL=32Ω

THD2

RL=10kΩV+

inverted phase

REF

V-

V

Filter

Ex)

AudioPrecision

aux-0025

THD1

RL=32Ω

THD2

RL=10kΩ

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

(*2)

(*2)

NJU72040

– 7 –

TEST CIRCUIT (CS1, CS2) OUTL (measured terminal) : CS1=CS2=20log(OUTR/OUTL) OUTR (measured terminal) : CS1=CS2=20log(OUTL/OUTR) (*2): Monolithic Ceramic Capacitors

TEST CIRCUIT (VOS) (*2): Monolithic Ceramic Capacitors

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

RL=32Ω

V+

REF

V-

VRL=32Ω

inverted phase

Rg=600Ω

Rg=600Ω

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

INL-

INL+

OUTL

V+

CP

CN

GND

MUTE

GAIN

INR-

INR+

OUTR

V+

REF

V-

V V

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C4=1uF

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

NJU72040

– 8 –

APPLICATION CIRCUIT (Single-end input) (Differential input) (*2): Monolithic Ceramic Capacitors (*3): V- terminal (8pin) shouldn’t be tied to V+ terminal (4pin)

INL-

INL+

OUTL

V+

CP

CN

GND

REF

V-

MUTE

GAIN

INR-

INR+

OUTR

32Ω

Headphone

32Ω

Headphone

V+

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C7=1uF

R2=100kΩ

V+

C4=1uF

V+

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

INL-

INL+

OUTL

V+

CP

CN

GND

REF

V-

MUTE

GAIN

INR-

INR+

OUTR

32Ω

Headphone

32Ω

Headphone

V+

C10=1uF

C8=1uFC2=1uF

C1=1uF

C6=10uF

C7=1uF

R2=100kΩ

V+

C4=1uF

inverted phase inverted phase

V+

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

NJU72040

– 9 –

APPLICATION NOTE The NJU72040 is an audio headphone amplifier that eliminates the need for external dc-blocking output capacitors. The NJU72040 has built-in pop suppression circuitry to eliminate disturbing pop noise during power-on, power-off and mute-control.

1. Operating Principle

The NJU72040 has the built-in differential input operational amplifiers, voltage inverter, pop noise suppression circuitry, gain selectable circuitry and thermal-overload protection circuitry (Fig.1). For single-ended input signals, connect inverted terminal (INL-, INR-) or non-inverted terminal (INL+, INR+) to ground through the capacitor. The voltage gain is selectable. In the differential circuitry, the setting gain is

+6.4dB or +12.4dB for the RL=32. In the single-end input circuitry, the setting gain is +0.4dB or +6.4dB for

the RL=32. The voltage inverter for NJU72040 eliminates the need for external dc-blocking output capacitors. The pop suppression circuitry for NJU72040 eliminates the pop noise during power-on, power-off and mute-control.

Fig.1 The NJU72040 functional block diagram

1.1 External parts

1.1.1 Input coupling capacitors Ci (C1, C2, C8, C10)

The input coupling capacitor (Ci) and the input resistance (Rin=61k typ.) for the inverted terminal

form a high-pass filter with the corner frequency determined in [fc=1/(2x 61k x Ci)]. It is necessary to adjust 1uF or more.

INL-

INL+

OUTL

V+

CP

CN

GND

REF

MUTE

GAIN

INR-

INR+

OUTR

32Ω

Headphone

32Ω

Headphone

V+

inverted phase inverted phase

C1

C2

C4

C6

C7

R2

C8

C10

V+

V+

V-V-

Negative

Voltage

Regulator

Bias

Gain Select

Pop Noise

Suppression

Pop Noise

Suppression

3MΩ

100kΩ

RegulatorV+

NJU72040

– 10 –

1.1.2 Flying capacitor (C4) Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide

low impedance for the wiring between CP terminal (5pin), CN terminal (6pin), and the flying capacitor (C4).

Fig.2 The NJU72040 block diagram (5pin, 6pin)

1.1.3 Hold capacitor (C6) Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide

low impedance for the wiring between the hold capacitor (C6), V- terminal (9pin) and the GND on the PCB.

Separate the GND pattern connecting to the hold capacitor (C6) from that connecting to the REF terminal (8pin), thus suppressing the influence of switching noise by removing the common impedance of the GND wiring.

Design no short-circuits of V- terminal (9pin) and V+ terminal (4pin) on the PCB pattern.

Fig.3 The NJU72040 block diagram (8pin, 9pin)

1.1.4 Mute terminal pop noise countermeasures (C7, R2)

Mute terminal needs time constant more than R2 x C7=0.1. It is necessary to adjust R2 to 100k or less. Please pay attention to meet the threshold voltage because the Mute terminal’s applied voltage is dropped in case of setting R2 to high.

Fig.4 The NJU72040 block diagram (10pin)

CP(5pin)

CN(6pin)

C4=1uF

C6V-(9pin)

REF(8pin)

3MΩ

MUTE(10pin)R2=100kΩ

C7=1uF

Vcnt

NJU72040

– 11 –

1.2 Control of V+ terminal and Mute terminal 1.2.2 Power-on procedure

1. Turn on the V+. 2. After 5msec from power on, change the control voltage of MUTE terminal (Vcnt) from "Low" to "High". * It is necessary to stabilize an IC for 5msec. By releasing the MUTE function, the output terminal output the signal.

1.2.3 Power-off procedure

1. Change the control voltage of MUTE terminal (Vcnt) from "High" to "Low". By the MUTE function, the output signals are stopped from output terminal. 2. Turn off the V+ after “2RC” sec from MUTE. * It is necessary to stabilize a MUTE condition for “2RC” sec. Ex.) R2=100kΩ, C7=1uF -> 2R2 x C7=200msec

Fig.5 Turn-on / Turn-off timing chart

5msec 2RC=200msec

t

t

t

V+

(4pin)

Vcnt

MUTE

(10pin)

MUTE ON MUTE OFF MUTE ON

NJU72040

– 12 –

40k

V+ V+ V+

V- V-

TERMINAL DESCRIPTION

Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE

1 2

13 14

INL- INL+ INR- INR+

AC Input

0V

3 12

OUTL OUTR

AC Output

0V

7 GAIN Gain Select

0V

10 MUTE MUTE/Pop Noise

Suppression

0V

V-

V+

FB

V-

10 5.5k 20k

REF

2k

V+ V+

V-

V+

20k

100k

1k

V+

V-

V+

20k

3M

NJU72040

– 13 –

TERMINAL DESCRIPTION

Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE

5 CP Flying Capacitor Positive Terminal

-

6 CN Flying Capacitor Positive Terminal

-

8 REF Reference Voltage

Input

-

V+

V-

V- V-

INL+

INR+

V+

V-

OUTL

OUTR5.5k 10

V-

69k

40k

NJU72040

– 14 –

TYPICAL CHARACTERISTICS

Supply Current vs Temperature

V+=3.3V, RL=NoLoad, MUTE=L

0

5

10

15

20

25

-50 -25 0 25 50 75 100 125

Temperature[oC]

Supply

Curr

ent[m

A]

GAIN=L,H

Supply Current vs Supply Voltage

RL=NoLoad, MUTE=L, GAIN=L

0

5

10

15

20

25

0 0.5 1 1.5 2 2.5 3 3.5 4

Supply Voltage[V]

Supply

Curr

ent[m

A]

Ta=85oC

Ta=-40oC

Ta=25oC


RL=NoLoad, MUTE=H, GAIN=L

0

5

10

15

20

25

0 0.5 1 1.5 2 2.5 3 3.5 4

Supply Voltage[V]

Supply

Curr

ent[m

A]

Ta=85oC

Ta=25oC

Ta=-40oC

Supply Current vs Temperature

V+=3.3V, RL=NoLoad, MUTE=H

0

5

10

15

20

25

-50 -25 0 25 50 75 100 125

Temperature[oC]

Supply

Curr

ent[m

A]

GAIN=L,H


RL=NoLoad, MUTE=L, GAIN=H

0

5

10

15

20

25

0 0.5 1 1.5 2 2.5 3 3.5 4

Supply Voltage[V]

Supply

Curr

ent[m

A]

Ta=85oC

Ta=-40oC

Ta=25oC


RL=NoLoad, MUTE=H, GAIN=H

0

5

10

15

20

25

0 0.5 1 1.5 2 2.5 3 3.5 4

Supply Voltage[V]

Supply

Curr

ent[m

A]

Ta=85oC

Ta=25oC

Ta=-40oC

NJU72040

– 15 –

Equivalent Input Noise vs Temperature

V+=3.3V, RL=32Ω, Rg=0Ω, MUTE=H, GAIN=L, INL+=0Vrms ,

INL-=0Vrms, Measure:OUTL, BW=400Hz - 22kHz

-120

-100

-80

-60

-40

-20

0

-50 -25 0 25 50 75 100 125

Temperature[oC]

Equiv

ale

nt In

put N

ois

e[d

BV

]

VoltageGain vs Frequency

V+=3.3V, RL=32Ω, MUTE=H, INL+=0.1Vrms

INL-=0.1Vrms(inverted), Measure=OUTL

0

5

10

15

20

10 100 1000 10000 100000

Frequency[Hz]

Volta

geG

ain

[dB

]

GAIN=H

Ta=-40,25,85oC

GAIN=L

Ta=-40,25,85oC

MuteLevel vs Frequency

V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, INL+=0.1Vrms

INL-=0.1Vrms(inverted), Measure=OUTL, Filter=Bandpass

-120

-100

-80

-60

-40

-20

0

10 100 1000 10000 100000

Freauency[Hz]

Mute

Level[d

B]

Ta=-40,25,85oC

VoltageGain vs Frequency

V+=3.3V, RL=10kΩ, MUTE=H, INL+=0.1Vrms

INL-=0.1Vrms(inverted), Measure=OUTL

0

5

10

15

20

10 100 1000 10000 100000

Frequency[Hz]

Volta

geG

ain

[dB

]

GAIN=H

Ta=-40,25,85oC

GAIN=L

Ta=-40,25,85oC

Equivalent Input Noise vs Temperature

V+=3.3V, RL=10kΩ, Rg=0Ω, MUTE=H, GAIN=L, INL+=0Vrms

INL-=0Vrms, Measure:OUTL, BW=400Hz - 22kHz

-120

-100

-80

-60

-40

-20

0

-50 -25 0 25 50 75 100 125

Temperature[oC]E

quiv

ale

nt In

put N

ois

e[d

BV

]

MuteLevel vs Frequency

V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, INL+=0.1Vrms

INL-=0.1Vrms(inverted), Measure=OUTL, Filter=Bandpass

-120

-100

-80

-60

-40

-20

0

10 100 1000 10000 100000

Freauency[Hz]

Mute

Level[d

B]

Ta=-40,25,85oC

NJU72040

– 16 –

PSRR vs Frequency

V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, Vripple=0.1Vrms

INL+=INR+=0Vrms, INL-=INR-=0Vrms, Measure=OUTL,OUTR

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

PS

RR

[dB

]

Ta=-40oC

Ta=85oC

Ta=25oC

ChannelSeparation vs Frequency

V+=3.3V, RL=32Ω, Rg=600Ω, MUTE=H, GAIN=L

INR+=0.1Vrms, INR-=0.1Vrms(inverted), Measure=OUTL

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

ChannelS

epara

tion[d

B]

Ta=-40oC

Ta=85oC

Ta=25oC


V+=3.3V, RL=32Ω, Rg=600Ω , MUTE=H, GAIN=L,

INL+=0.1Vrms, INL-=0.1Vrms(inverted), Measure=OUTR

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

ChannelS

epara

tion[d

B]

Ta=-40oC

Ta=85oC

Ta=25oC


V+=3.3V, RL=10kΩ, Rg=600Ω, MUTE=H, GAIN=L,

INL+=0.1Vrms, INL-=0.1Vrms(inverted), Measure=OUTR

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]C

hannelS

epara

tion[d

B]

Ta=-40oCTa=85oC

Ta=25oC


V+=3.3V, RL=10kΩ, Rg=600Ω, MUTE=H, GAIN=L

INR+=0.1Vrms, INR-=0.1Vrms(inverted), Measure=OUTL

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

ChannelS

epara

tion[d

B]

Ta=-40oC

Ta=85oC

Ta=25oC

PSRR vs Frequency

V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, Vripple=0.1Vrms

INL+=INR+=0Vrms, INL-=INR-=0Vrms, Measure=OUTL,OUTR

Filter=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

PS

RR

[dB

]

Ta=-40oC

Ta=85oC

Ta=25oC

NJU72040

– 17 –

CMRR vs Frequency

V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, INL+(INR+)=0.1Vrms

INL-(INR-)=0.1Vrms, Measure=OUTL(OUTR), BW=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]

CM

RR

[dB

]

OUTL

Ta=-40,25,85oC

OUTR

Ta=-40,25,85oC

Thermal Shut Down(SupplyCurrent)

V+=3.3V , RL=32Ω , MUTE=H , GAIN=L

0

2

4

6

8

10

12

14

120 130 140 150 160

Temperature[oC]

Supply

Curr

ent [ｍ

A]

120oC

->160oC160oC

->120oC

Power Dissipation vs Output Power

V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, Ta=25oC

f=1kHz, Measure=OUTL, BW=400Hz to 22kHz

0

50

100

150

200

250

300

0 20 40 60 80 100

Output Pow er [mW/ch]

Pow

er

Dis

sip

atio

n [m

W]

Input=Lch

Input=Lch,Rch

THD+N=3%

CMRR vs Frequency

V+=3.3V, RL=10kΩ , MUTE=H , GAIN=L,INL+(INR+)=0.1Vrms

INL-(INR-)=0.1Vrms, Measure=OUTL(OUTR), BW=Bandpass

0

20

40

60

80

100

10 100 1000 10000 100000

Freauency[Hz]C

MR

R[d

B]

OUTL

Ta=-40,25,85oC

OUTR

Ta=-40,25,85oC

Power Dissipation vs Output Power


f=1kHz, Measure=OUTL, BW=400Hz to 22kHz

0

50

100

150

200

250

300

0 20 40 60 80 100

Output Pow er [mW/ch]

Pow

er

Dis

sip

atio

n [m

W]

Input=Lch

Input=Lch,Rch

THD+N=3%

NJU72040

– 18 –

THD+N vs Output Power

V+=3.3V, RL=16Ω, MUTE=H , GAIN=L

Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz

Measure=OUTL, BW=400Hz to 22kHz

0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]

TH

D+N

[%]

Ta=25,85oC

Ta=-40oC





0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]

TH

D+N

[%]

f=10kHz

f=100Hz,1kHz


V+=3.3V, RL=32Ω, MUTE=H, GAIN=L



0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]T

HD

+N

[%]

Ta=-40,25,85oC





0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]

TH

D+N

[%]

f=10kHz

f=100Hz,1kHz


V+=3.3V, RL=16Ω, MUTE=H , GAIN=L

Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL,

BW=400Hz to 22kHz

0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]

TH

D+N

[%]

Input=Lch

Input=Lch , Rch


V+=3.3V, RL=32Ω, MUTE=H, GAIN=L

Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL

BW=400Hz to 22kHz

0.01

0.1

1

10

0.001 0.01 0.1 1 10 100 1000

Output Pow er[mW]

TH

D+N

[%]

Input=Lch

Input=Lch , Rch

NJU72040

– 19 –

[CAUTION] The specifications on this databook are only

given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

THD+N vs Output Voltage

V+=3.3V, RL=10kΩ, MUTE=H , GAIN=L



0.001

0.01

0.1

1

10

0.01 0.1 1 10

Output Voltage[Vrms]

TH

D+N

[%]

Ta=-40,25,85oC


V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, Ta=25oC



0.001

0.01

0.1

1

10

0.01 0.1 1 10


TH

D+N

[%]

f=100,1k,10kHz


V+=3.3V, MUTE=H, GAIN=L, Ta=25oC

Input=INL+,INL-(inverted), f=1kHz, Measure=OUTL ,

BW=400Hz to 22kHz

0.001

0.01

0.1

1

10

0.01 0.1 1 10Output Voltage[Vrms]

TH

D+N

[%]

RL=16

RL=32

RL=1k

RL=10k

RL=64


V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L

Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL

BW=400Hz to 22kHz

0.001

0.01

0.1

1

10

0.01 0.1 1 10


TH

D+N

[%]

Input=Lch , Rch

Input=Lch

Documents

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