FABRICATION PROCESSES Presentation on FABRICATION PROCESSES
Course no : EEE 453 Course by : Mohiuddin Munna Slide 2 Before
Starting the Fabrication It starts with making silicon Slide 3
Before Starting the Fabrication Ingots get cut into wafers, which
are 1-2mm thick, and upto 12 in diameter Entire wafers are
processed, and then cut into chips when needed Slide 4 Fabrication
Processes Six main process steps 1. Oxidation 2. Diffusion 3. Ion
implantation 4. Lithography 5. Thin film deposition 6. Epitaxy
Slide 5 Oxidation the first step in semiconductor device
fabrication involves the oxidation of the wafer surface in order to
grow a thin layer of silicon dioxide (SiO 2 ). This oxide is used
to provide insulating and passivation layers. The most common
method of oxidation is thermal, and can be classified as either
"dry" or "wet" oxidation. Wafers are loaded into quartz boats and
slid into a furnace heated to approximately 1200C. Slide 6
Oxidation In dry oxidation, thin oxide layers are grown in an
environment containing oxygen and hydrogen chloride near
atmospheric pressure Slide 7 Oxidation Thicker oxide layers require
higher pressures and the use of steam (wet oxidation). Wet
oxidation is performed by exposing the wafer to a mixture of oxygen
and hydrogen in the furnace chamber. Water vapor is formed when the
hydrogen and oxygen react Slide 8 Oxidation Process (Schematic)
Slide 9 Oxidation Process Standard oxidation temperature 800-1200 C
Heat is produced by resistance heating Coil like heating elements
are arranged in 3 controlled zone Outer zones operates at higher
power to compensate heat loss Simply Oxygen is fed for dry
oxidation Carrier gas like Ar on N 2 is used in wet oxidation along
with heated water or burning O 2 and H 2 at input of tube Required
time in furnace depends on temperature and desired thickness Whole
system is automated Slide 10 Oxidation Process Fig: Typical
Thickness Vs Oxidation time for 100 crystal compared for dry and
wet oxidation Slide 11 Diffusion process Process of doping Si wafer
is exposed to solid, liquid or gaseous source containing desired
impurity A reaction at wafer surface establishes a supply of dopant
atoms immediately adjacent to Si crystal At elevated temperature
atoms difuse in the region Si is not protected by oxide Surface
doping concentration is up to 10 21 / cm 3 Diffusion in SiO 2 is
relatively low SiO 2 protects Si for a limited time depending on
oxide thickness,temperature and background droping. Slide 12
Diffusion process Slide 13 Diffusion process (Schematic) Slide 14
Ion Implantation Its an alternative process of introducing dopants
Dopant ion is accelerated in high energy range from 5 keV to 1MeV
then shooted into semiconductor Ions displace Si atoms along their
path into crystal follow-up heating binds ions with crystel But
before that automatic scanning is performed automatically to
determine total number of ions / cm 3 Si wafer can be masked using
thin flims of SiO2,Si3N4 and photoresist. Slide 15 Ion Implantation
(schematic) Slide 16 Advantage of Ion Implantation Lower
temperature process Implantation is performed in room temperature
Follow-up heating is done in 600 C Gives precise control over
impurity Ideally suited for a number of modern device structures
requiring extremely shallow junctions damage from implantation can
be annealed by heating the wafer in a furnace to T > 900 C.
Slide 17 Doping by Ion Implantation Dose = ion beam ux (# cm -2 s
-1 ) x time for implant... units # cm -2 Slide 18 Doping by Ion
Implantation SiO 2 lm masks the implant by preventing ions from
reaching the underlying silicon (assuming its thick enough) after
implantation, the phosphorus ions are conned to a damaged region
near the silicon surface Slide 19 Doping by Ion Implantation
Annealing heals damage and also redistributes the ions (they
diffuse further into the silicon crystal) Slide 20 Doping by Ion
Implantation Fig: Computed phosphorus Implantation profile assuming
a constant dose of 10 14 /cm Slide 21 Lithography Process of
selectively removing SiO 2 and other masking material covering
wafer surface. Transfers circuit diagram on wafer Slide 22
Lithography Process At first Si wafer is coated with UV light
sensitive photoresist in a thin uniform coating. Wafer is pre baked
at 80-100 C Exposing wafer to UV light through a mask Mask here is
carefully prepared with glass or quartz photo pale containing a
copy of pattern to be transferred to SiO2 Exposed photoresist parts
undergo chemical changes depending on photo resist In negative
photo resist exposed parts form polymer like structures and
unexposed parts dissolves after developing Slide 23 Lithography
Fig: majos steps in lithography a)Apply resist b)Expose resist
through mask c)After developing d)After oxide etching and resist
removal Slide 24 Thin Film deposition Three different Techniques
Evaporation Sputtering Chemical Vapor deposition Slide 25 Thin Film
deposition(Evaporation) Slide 26 Thin Film deposition(Sputtering)
Slide 27 Chemical Vapor Deposition(CVD) 1.Atmospheric Pressure CVD
2.Low Pressure CVD 3.Plasma Enhanced CVD Slide 28 Epitaxy Epitaxy
is a special type of thin layer deposition. Whereas deposition
described in the previous yields either amorphous or
polycrystalline layer, it yield a crystalline layer
