-
Page introductive à lire attentivement par le candidat
CONCOURS EXTERNES IT 2017 EPREUVE TECHNIQUE D’ADMISSION
Durée : 2h00
Coefficient : 2
Concours externes 2017 n° 148 AI BAP C
Corps : Assistant ingénieur
BAP : C
Emploi-type : Assistant-e- ingénieur-e- électronicien-e-
Délégation organisatrice : Ile de France Ouest et Nord,
Meudon
REMARQUES IMPORTANTES
La calculatrice non programmable est autorisée.
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Connaissance de l’organisme
1 - Que signifient les sigles suivants ?
CNRS :
EPST : IN2P3: UMR :
2 - Quelles sont les missions du CNRS (5 lignes max.) ?
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3 - Quelles sont les missions du laboratoire pour lequel vous
postulez (5 lignes
max.)?
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Electronique
1 - Combien de couplages électromagnétiques existe-t-il ? Citez
en au moins deux,
décrivez-les et dites comment les éviter ou les réduire.
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2 - Quels sont les 2 modes par lesquels les signaux électriques
peuvent se
propager? Expliquez brièvement. Quel est le mode le plus
perturbateur ?
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3 - Comment peut-on se préserver des perturbations de mode
commun ?
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4 - Pour chacun des montages suivants M1 et M2, on suppose
l’amplificateur idéal:
- Donnez le nom des montages M1 et M2.
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- Exprimez Vs en fonction de Ve dans le montage M1.
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- Exprimez Vs en fonction de V1 et V2 dans le montage M2, toutes
les
résistances sont égales
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5 - On propose d’utiliser l’amplificateur THS4215 (datasheet en
annexe). Quelle est
sa bande passante et son temps de monté pour un signal de 1V en
sortie?
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6 - Quel autre modèle que le THS4215 documente la datasheet
?
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7 - Quelles sont les différences entre les modèles
d’amplificateurs ? Justifier.
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8 - Soit le schéma suivant (datasheet de l’ampli INA114 en
annexe).
- Quelle est la valeur de RG pour obtenir un gain de 10 ? Donner
la valeur
normalisée à 1%.
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- Quelle est la fréquence de coupure pour ce gain ?
………………………………………………………………………………………………......
- Quel est le taux de rejection en mode commun à ce gain pour
une fréquence
de 1KHz?
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- Les entrées de l’amplificateur sont-elles protégées?
Justifiez.
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CAO / PCB / Câblage
Soit le schéma ci-dessous
Figure 2
1 - Quel sont les règles à respecter lors du routage de ce
circuit ?
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2 - Définir la fonction des résistances R18, R19, R37 et R38.
Comment doivent-elles
être placées sur le circuit imprimé?
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3 - Définir la fonction des résistances R40, R41, R43 et R47.
Comment doivent-elles
être placées sur le circuit imprimé?
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4 - Comment adapter l’impédance d’une piste lors du routage du
circuit imprimé ?
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5 - Sur un schéma vous avez de l'électronique analogique
bas-niveau, et des
signaux numériques aux alentours du GHz. Comment faites-vous
cohabiter les 2
pour limiter les perturbations sur un PCB: répartition,
alimentation etc. ?
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6 - Quelle sont les phases de la création d’un composant dans
une bibliothèque de
CAO ?
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7 - Pouvez-vous préciser le principe d’une bibliothèque de CAO
?
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8 - Qu’est-ce qu’un via borgne ?
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9 - Qu’est-ce que la «classe de fabrication» d’un circuit
imprimé et quel sont les
éléments qui contribuent à la définition de la classe ?
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10 - Qu’est-ce qu’un frein thermique ?
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11 - Sur un circuit imprimé on place 2 mires. Qu’est-ce qu’une
mire et quelle est son
utilité?
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12 – Donner le processus de fabrication d’un circuit imprimé 4
couches chez le sous-
traitant à partir de la CAO.
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13 - Que signifient les inscriptions indiquées sur ces
composants? Précisez.
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14 - Identifier le type de connecteur ?
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14 - Qu’est-ce que le « RoHS » ?
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15 – Qu’est-ce qu’un fil de bonding ?
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®
INA1141
FEATURES● LOW OFFSET VOLTAGE: 50 µV max● LOW DRIFT: 0.25µV/°C
max● LOW INPUT BIAS CURRENT: 2nA max
● HIGH COMMON-MODE REJECTION:115dB min
● INPUT OVER-VOLTAGE PROTECTION:±40V
● WIDE SUPPLY RANGE: ±2.25 to ±18V● LOW QUIESCENT CURRENT: 3mA
max
● 8-PIN PLASTIC AND SOL-16
INA114
DESCRIPTIONThe INA114 is a low cost, general purpose
instrumen-tation amplifier offering excellent accuracy. Its
versa-tile 3-op amp design and small size make it ideal for awide
range of applications.
A single external resistor sets any gain from 1 to
10,000.Internal input protection can withstand up to ±40Vwithout
damage.
The INA114 is laser trimmed for very low offset voltage(50µV),
drift (0.25µV/°C) and high common-moderejection (115dB at G =
1000). It operates with powersupplies as low as ±2.25V, allowing
use in batteryoperated and single 5V supply systems. Quiescent
cur-rent is 3mA maximum.
The INA114 is available in 8-pin plastic and SOL-16surface-mount
packages. Both are specified for the–40°C to +85°C temperature
range.
APPLICATIONS● BRIDGE AMPLIFIER
● THERMOCOUPLE AMPLIFIER
● RTD SENSOR AMPLIFIER
● MEDICAL INSTRUMENTATION
● DATA ACQUISITION
A1
A2
A3
(12)
(11)
6
(10)25kΩ25kΩ
25kΩ25kΩ
(13)7
(7)4
(5)
3
(15)
8
(2)
1
(4)
2VIN
VIN
RG
V+
V–
INA114
DIP (SOIC)
Ref
DIP ConnectedInternally
VO
G = 1 + 50kΩRG
–
+5
Over-VoltageProtection
25kΩ
25kΩ
Over-VoltageProtection
Feedback
PrecisionINSTRUMENTATION AMPLIFIER
®
International Airport Industrial Park • Mailing Address: PO Box
11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Bl vd.,
Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111Internet:
http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada
Only) • Cable: BBRCORP • Telex: 066-6491 • FA X: (520) 889-1510 •
Immediate Product Info: (800) 548-6132
INA114
INA114
©1992 Burr-Brown Corporation PDS-1142D Printed in U.S.A. March,
1998
SBOS014
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®
INA114 2
SPECIFICATIONSELECTRICALAt TA = +25°C, VS = ±15V, RL = 2kΩ,
unless otherwise noted.
✻ Specification same as INA114BP/BU.
NOTE: (1) Temperature coefficient of the “50kΩ” term in the gain
equation.
INA114BP, BU INA114AP, AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
The information provided herein is believed to be reliable;
however, BURR-BROWN assumes no responsibility for inaccuracies or
omissions. BURR-BROWN assumesno responsibility for the use of this
information, and all use of such information shall be entirely at
the user’s own risk. Prices and specifications are subject to
changewithout notice. No patent rights or licenses to any of the
circuits described herein are implied or granted to any third
party. BURR-BROWN does not authorize or warrantany BURR-BROWN
product for use in life support devices and/or systems.
INPUTOffset Voltage, RTI
Initial TA = +25°C ±10 + 20/G ±50 + 100/G ±25 + 30/G ±125 +
500/G µVvs Temperature TA = TMIN to TMAX ±0.1 + 0.5/G ±0.25 + 5/G
±0.25 + 5/G ±1 + 10/G µV/°Cvs Power Supply VS = ±2.25V to ±18V 0.5
+ 2/G 3 + 10/G ✻ ✻ µV/V
Long-Term Stability ±0.2 + 0.5/G ✻ µV/moImpedance, Differential
1010 || 6 ✻ Ω || pF
Common-Mode 1010 || 6 ✻ Ω || pFInput Common-Mode Range ±11 ±13.5
✻ ✻ VSafe Input Voltage ±40 ✻ VCommon-Mode Rejection VCM = ±10V,
∆RS = 1kΩ
G = 1 80 96 75 90 dBG = 10 96 115 90 106 dB
G = 100 110 120 106 110 dBG = 1000 115 120 106 110 dB
BIAS CURRENT ±0.5 ±2 ✻ ±5 nAvs Temperature ±8 ✻ pA/°C
OFFSET CURRENT ±0.5 ±2 ✻ ±5 nAvs Temperature ±8 ✻ pA/°C
NOISE VOLTAGE, RTI G = 1000, RS = 0Ωf = 10Hz 15 ✻ nV/√Hzf =
100Hz 11 ✻ nV/√Hzf = 1kHz 11 ✻ nV/√HzfB = 0.1Hz to 10Hz 0.4 ✻
µVp-p
Noise Currentf=10Hz 0.4 ✻ pA/√Hzf=1kHz 0.2 ✻ pA/√HzfB = 0.1Hz to
10Hz 18 ✻ pAp-p
GAINGain Equation 1 + (50kΩ/RG) ✻ V/VRange of Gain 1 10000 ✻ ✻
V/VGain Error G = 1 ±0.01 ±0.05 ✻ ✻ %
G = 10 ±0.02 ±0.4 ✻ ±0.5 %G = 100 ±0.05 ±0.5 ✻ ±0.7 %G = 1000
±0.5 ±1 ✻ ±2 %
Gain vs Temperature G = 1 ±2 ±10 ✻ ±10 ppm/°C50kΩ Resistance(1)
±25 ±100 ✻ ✻ ppm/°C
Nonlinearity G = 1 ±0.0001 ±0.001 ✻ ±0.002 % of FSRG = 10
±0.0005 ±0.002 ✻ ±0.004 % of FSR
G = 100 ±0.0005 ±0.002 ✻ ±0.004 % of FSRG = 1000 ±0.002 ±0.01 ✻
±0.02 % of FSR
OUTPUTVoltage IO = 5mA, TMIN to TMAX ±13.5 ±13.7 ✻ ✻ V
VS = ±11.4V, RL = 2kΩ ±10 ±10.5 ✻ ✻ VVS = ±2.25V, RL = 2kΩ ±1
±1.5 ✻ ✻ V
Load Capacitance Stability 1000 ✻ pFShort Circuit Current
+20/–15 ✻ mA
FREQUENCY RESPONSEBandwidth, –3dB G = 1 1 ✻ MHz
G = 10 100 ✻ kHzG = 100 10 ✻ kHzG = 1000 1 ✻ kHz
Slew Rate VO = ±10V, G = 10 0.3 0.6 ✻ ✻ V/µsSettling Time, 0.01%
G = 1 18 ✻ µs
G = 10 20 ✻ µsG = 100 120 ✻ µsG = 1000 1100 ✻ µs
Overload Recovery 50% Overdrive 20 ✻ µsPOWER SUPPLYVoltage Range
±2.25 ±15 ±18 ✻ ✻ ✻ VCurrent VIN = 0V ±2.2 ±3 ✻ ✻ mATEMPERATURE
RANGESpecification –40 85 ✻ ✻ °COperating –40 125 ✻ ✻ °CθJA 80 ✻
°C/W
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®
INA1143
RG
V–IN
V+IN
V–
RG
V+
VO
Ref
1
2
3
4
8
7
6
5
P Package 8-Pin DIPTop View
PIN CONFIGURATIONS ELECTROSTATICDISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD.
Burr-Brownrecommends that all integrated circuits be handled with
ap-propriate precautions. Failure to observe proper handling
andinstallation procedures can cause damage.
ESD damage can range from subtle performance degradationto
complete device failure. Precision integrated circuits maybe more
susceptible to damage because very small parametricchanges could
cause the device not to meet its publishedspecifications.
NC
RG
NC
V–IN
V+IN
NC
V–
NC
NC
RG
NC
V+
Feedback
VO
Ref
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
U Package SOL-16 Surface-MountTop View
PACKAGEDRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER (1) RANGE
INA114AP 8-Pin Plastic DIP 006 –40°C to +85°CINA114BP 8-Pin
Plastic DIP 006 –40°C to +85°CINA114AU SOL-16 Surface-Mount 211
–40°C to +85°CINA114BU SOL-16 Surface-Mount 211 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see
end of datasheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
Supply Voltage
..................................................................................
±18VInput Voltage Range
..........................................................................
±40VOutput Short-Circuit (to ground)
.............................................. ContinuousOperating
Temperature ................................................. –40°C
to +125°CStorage Temperature
..................................................... –40°C to
+125°CJunction Temperature
....................................................................
+150°CLead Temperature (soldering, 10s)
............................................... +300°C
NOTE: (1) Stresses above these ratings may cause permanent
damage.
ABSOLUTE MAXIMUM RATINGS (1)
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®
INA114 4
INPUT-REFERRED NOISE VOLTAGEvs FREQUENCY
Frequency (Hz)
Inpu
t-R
efer
red
Noi
se V
olta
ge (
nV/√
Hz)
1 10 1k100
1k
100
10
110k
G = 1
G = 10
G = 100, 1000
G = 1000BW Limit
NEGATIVE POWER SUPPLY REJECTIONvs FREQUENCY
Frequency (Hz)
Pow
er S
uppl
y R
ejec
tion
(dB
)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1G = 10
G = 100G = 1000
POSITIVE POWER SUPPLY REJECTIONvs FREQUENCY
Frequency (Hz)
Pow
er S
uppl
y R
ejec
tion
(dB
)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1
G = 10
G = 100
G = 1000
INPUT COMMON-MODE VOLTAGE RANGEvs OUTPUT VOLTAGE
Output Voltage (V)
Com
mon
-Mod
e V
olta
ge (
V)
–15 –10 0 5 15–5
15
10
5
0
–5
–10
–1510
Limited by
A1
+ Output S
wing
A3 – OutputSwing Limit
A3 + OutputSwing Limit
Limited by A2
– Output SwingLim
ited by
A1
– Outpu
t Swing
Limited by A2
+ Output Swing
VD/2–
+–
+
VCM
VO
(Any Gain)
VD/2
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Com
mon
-Mod
e R
ejec
tion
(dB
)
10 100 10k 100k 1M1k
140
120
100
80
60
40
20
0
G = 1k
G = 100
G = 10
G = 1
G = 100, 1k
G = 10
GAIN vs FREQUENCY
Frequency (Hz)
Gai
n (V
/V)
10 100 10k 100k 1M1k
1k
100
10
1
TYPICAL PERFORMANCE CURVESAt TA = +25°C, VS = ±15V, unless
otherwise noted.
-
®
INA1145
MAXIMUM OUTPUT SWING vs FREQUENCY
Pea
k-to
-Pea
k A
mpl
itude
(V
)
10
32
28
24
20
16
12
8
4
0100 10k 1M
Frequency (Hz)
100k1k
G = 100
G = 1, 10
G = 1000
INPUT BIAS CURRENTvs COMMON-MODE INPUT VOLTAGE
Inpu
t Bia
s C
urre
nt (
mA
)
–45
3
2
1
0
–1
–2
–3–30 –15 0 15 30 45
|Ib1| + |Ib2|
Common-Mode Voltage (V)
NormalOperation
Over-VoltageProtection
Over-VoltageProtection
One Input
Both Inputs
Both Inputs
One Input
INPUT BIAS CURRENTvs DIFFERENTIAL INPUT VOLTAGE
Differential Overload Voltage (V)
Inpu
t Bia
s C
urre
nt (
mA
)
–45
3
2
1
0
–1
–2
–3–30 –15 0 15 30 45
G = 1
G = 10
G = 1000G = 100
INPUT BIAS AND INPUT OFFSET CURRENTvs TEMPERATURE
Temperature (°C)
Inpu
t Bia
s an
d In
put O
ffset
Cur
rent
(nA
)
–40
2
1
0
–1
–2–15 10 35 60 85
±IB
IOS
OFFSET VOLTAGE WARM-UP vs TIME
Time from Power Supply Turn-on (s)
Offs
et V
olta
ge C
hang
e (µ
V)
0
6
4
2
0
–2
–4
–615 30 45 60 75 90 105 120
G ≥ 100
SETTLING TIME vs GAIN
Gain (V/V)
Set
tling
Tim
e (µ
s)
1 100 100010
1200
1000
800
600
400
200
0
0.01%
0.1%
TYPICAL PERFORMANCE CURVES (CONT)At TA = +25°C, VS = ±15V,
unless otherwise noted.
-
®
INA114 6
NEGATIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ)
Out
put V
olta
ge (
V)
–75
–16
–14
–12
–10
–8
–6
–4
–2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
VS = ±15V
VS = ±11.4V
VS = ±2.25V
POSITIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ)
Out
put V
olta
ge (
V)
–75
16
14
12
10
8
6
4
2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
VS = ±15V
VS = ±11.4V
VS = ±2.25V
QUIESCENT CURRENT AND POWER DISSIPATIONvs POWER SUPPLY
VOLTAGE
Qui
esce
nt C
urre
nt (
mA
)
0
2.6
2.5
2.4
2.3
2.2
2.1
2.0
Power Supply Voltage (V)
±3 ±6 ±9 ±12 ±15 ±18
120
100
80
60
40
20
0
Pow
er D
issi
patio
n (m
W)
Power Dissipation
Quiescent Current
QUIESCENT CURRENT vs TEMPERATURE
Qui
esce
nt C
urre
nt (
mA
)
–75
2.8
2.6
2.4
2.2
2.0
1.8125
Temperature (°C)
–50 –25 0 25 50 75 100
OUTPUT CURRENT LIMIT vs TEMPERATURE
Sho
rt C
ircui
t Cur
rent
(m
A)
–40
30
25
20
15
1085
Temperature (°C)
–15 10 35 60
+|ICL|
–|ICL|
SLEW RATE vs TEMPERATURE
Sle
w R
ate
(V/µ
s)
–75
1.0
0.8
0.6
0.4
0.2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
TYPICAL PERFORMANCE CURVES (CONT)At TA = +25°C, VS = ±15V,
unless otherwise noted.
-
®
INA1147
TYPICAL PERFORMANCE CURVES (CONT)At TA = +25°C, VS = ±15V,
unless otherwise noted.
LARGE SIGNAL RESPONSE, G = 1 SMALL SIGNAL RESPONSE, G = 1
LARGE SIGNAL RESPONSE, G = 1000 SMALL SIGNAL RESPONSE, G =
1000
+10V
0
–10V
+10V
0
–10V
+200mV
0
–200mV
+100mV
0
–200mV
INPUT-REFERRED NOISE, 0.1 to 10Hz
0.1µV/div
1 s/div
-
®
INA114 8
APPLICATION INFORMATIONFigure 1 shows the basic connections
required for operationof the INA114. Applications with noisy or
high impedancepower supplies may require decoupling capacitors
close tothe device pins as shown.
The output is referred to the output reference (Ref)
terminalwhich is normally grounded. This must be a
low-impedanceconnection to assure good common-mode rejection. A
resis-tance of 5Ω in series with the Ref pin will cause a
typicaldevice to degrade to approximately 80dB CMR (G = 1).
SETTING THE GAIN
Gain of the INA114 is set by connecting a single
externalresistor, RG:
Commonly used gains and resistor values are shown inFigure
1.
The 50kΩ term in equation (1) comes from the sum of thetwo
internal feedback resistors. These are on-chip metal filmresistors
which are laser trimmed to accurate absolute val-
FIGURE 1. Basic Connections.
G = 1 + 50 kΩR
G
(1)
DESIRED RG NEAREST 1% RGGAIN (Ω) (Ω)
1 No Connection No Connection2 50.00k 49.9k5 12.50k 12.4k10
5.556k 5.62k20 2.632k 2.61k50 1.02k 1.02k100 505.1 511200 251.3
249500 100.2 1001000 50.05 49.92000 25.01 24.95000 10.00 1010000
5.001 4.99
ues. The accuracy and temperature coefficient of theseresistors
are included in the gain accuracy and drift specifi-cations of the
INA114.
The stability and temperature drift of the external gainsetting
resistor, RG, also affects gain. RG’s contribution togain accuracy
and drift can be directly inferred from the gainequation (1). Low
resistor values required for high gain canmake wiring resistance
important. Sockets add to the wiringresistance which will
contribute additional gain error (possi-bly an unstable gain error)
in gains of approximately 100 orgreater.
NOISE PERFORMANCE
The INA114 provides very low noise in most applications.For
differential source impedances less than 1kΩ, the INA103may provide
lower noise. For source impedances greaterthan 50kΩ, the INA111
FET-input instrumentation ampli-fier may provide lower noise.
Low frequency noise of the INA114 is approximately0.4µVp-p
measured from 0.1 to 10Hz. This is approximatelyone-tenth the noise
of “low noise” chopper-stabilized ampli-fiers.
A1
A2
A36
25kΩ25kΩ
25kΩ25kΩ
7
4
3
8
1
2VIN
VIN
RG
V+
V–
INA114
G = 1 + 50kΩRG
–
+5
Over-VoltageProtection
25kΩ
25kΩ
Over-VoltageProtection
Load
VO = G • (VIN – VIN)+ –
0.1µF
0.1µF
Pin numbers arefor DIP packages.
+
–
VO
INA114RG
Also drawn in simplified form:
VO
Ref
VIN–
VIN+
-
®
INA1149
OFFSET TRIMMING
The INA114 is laser trimmed for very low offset voltage
anddrift. Most applications require no external offset adjust-ment.
Figure 2 shows an optional circuit for trimming theoutput offset
voltage. The voltage applied to Ref terminal issummed at the
output. Low impedance must be maintainedat this node to assure good
common-mode rejection. This isachieved by buffering trim voltage
with an op amp asshown.
FIGURE 2. Optional Trimming of Output Offset Voltage.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA114 is extremely
high—approximately 1010Ω. However, a path must be provided forthe
input bias current of both inputs. This input bias currentis
typically less than ±1nA (it can be either polarity due
tocancellation circuitry). High input impedance means thatthis
input bias current changes very little with varying
inputvoltage.
Input circuitry must provide a path for this input bias
currentif the INA114 is to operate properly. Figure 3 shows
variousprovisions for an input bias current path. Without a
biascurrent return path, the inputs will float to a potential
whichexceeds the common-mode range of the INA114 and theinput
amplifiers will saturate. If the differential source resis-tance is
low, bias current return path can be connected to oneinput (see
thermocouple example in Figure 3). With highersource impedance,
using two resistors provides a balancedinput with possible
advantages of lower input offset voltagedue to bias current and
better common-mode rejection.
INPUT COMMON-MODE RANGE
The linear common-mode range of the input op amps of theINA114
is approximately ±13.75V (or 1.25V from thepower supplies). As the
output voltage increases, however,the linear input range will be
limited by the output voltageswing of the input amplifiers, A1 and
A2. The common-mode range is related to the output voltage of the
completeamplifier—see performance curve “Input Common-ModeRange vs
Output Voltage.”
A combination of common-mode and differential inputsignals can
cause the output of A1 or A2 to saturate. Figure4 shows the output
voltage swing of A1 and A2 expressed interms of a common-mode and
differential input voltages.Output swing capability of these
internal amplifiers is thesame as the output amplifier, A3. For
applications whereinput common-mode range must be maximized, limit
theoutput voltage swing by connecting the INA114 in a lowergain
(see performance curve “Input Common-Mode VoltageRange vs Output
Voltage”). If necessary, add gain after theINA114 to increase the
voltage swing.
Input-overload often produces an output voltage that
appearsnormal. For example, an input voltage of +20V on one
inputand +40V on the other input will obviously exceed the
linearcommon-mode range of both input amplifiers. Since bothinput
amplifiers are saturated to nearly the same outputvoltage limit,
the difference voltage measured by the outputamplifier will be near
zero. The output of the INA114 willbe near 0V even though both
inputs are overloaded.
INPUT PROTECTION
The inputs of the INA114 are individually protected forvoltages
up to ±40V. For example, a condition of –40V onone input and +40V
on the other input will not causedamage. Internal circuitry on each
input provides low seriesimpedance under normal signal conditions.
To provideequivalent protection, series input resistors would
contributeexcessive noise. If the input is overloaded, the
protectioncircuitry limits the input current to a safe value
(approxi-mately 1.5mA). The typical performance curve “Input
BiasCurrent vs Common-Mode Input Voltage” shows this input
FIGURE 3. Providing an Input Common-Mode Current Path.
INA114
VIN
VIN
RG
–
+
10kΩ
VO
OPA177
Ref
±10mVAdjustment Range
100Ω
100Ω
100µA1/2 REF200
100µA1/2 REF200
V+
V–
INA114
47kΩ47kΩ
INA114
10kΩ
Microphone,Hydrophone
etc.
Thermocouple
INA114
Center-tap providesbias current return.
-
®
INA114 10
INA114VIN
–
VIN+
OPA602
511Ω22.1kΩ22.1kΩ
Ref
VO
For G = 100RG = 511Ω // 2(22.1kΩ)effective RG = 505Ω
100ΩShield is driven at thecommon-mode potential.
current limit behavior. The inputs are protected even if nopower
supply voltage is present.
OUTPUT VOLTAGE SENSE (SOL-16 package only)
The surface-mount version of the INA114 has a separateoutput
sense feedback connection (pin 12). Pin 12 must beconnected to the
output terminal (pin 11) for proper opera-tion. (This connection is
made internally on the DIP versionof the INA114.)
The output sense connection can be used to sense the
outputvoltage directly at the load for best accuracy. Figure 5
showshow to drive a load through series interconnection
resis-tance. Remotely located feedback paths may cause
instabil-ity. This can be generally be eliminated with a
highfrequency feedback path through C1. Heavy loads or longlines
can be driven by connecting a buffer inside the feed-back path
(Figure 6).
FIGURE 4. Voltage Swing of A1 and A2.
FIGURE 5. Remote Load and Ground Sensing. FIGURE 6. Buffered
Output for Heavy Loads.
FIGURE 7. Shield Driver Circuit.
A1
A2
A3
25kΩ25kΩ
25kΩ25kΩ
RG
V+
V–
INA114
VO = G • VD
G = 1 + 50kΩRG25kΩ
25kΩ
VCM –G • VD
2
VD 2
VD 2
VCM
VCM + G • VD
2
Over-VoltageProtection
Over-VoltageProtection
INA114RG
VIN–
VIN+ Load
Equal resistance here preservesgood common-mode rejection.
C11000pF
OutputSense
Ref
Surface-mount packageversion only.
INA114RG
VIN–
VIN+
IL: ±100mA
OutputSense
Ref
Surface-mount packageversion only.
OPA633
RL180Ω
