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USN Time:3 hrs. :l '::i'.,,'""' 1 a. Explain: eachl.".,, r0EC74 (08 Marks) Seventh Semester B.E. Degree Examination, Dec.2013 lJan.201,4 Embedded System Design I Note: Answer FrvEfull questions, selecting Max' Marks:100 at least TWO questionsfrom each part. , i PART-A , ''" i) Embedded system, ii) Hard RTS, iii) Watch Dog Timer, with an example for (06 Marks) b. c. qi o o a o () ! E9 6e -o oo ll trop .=N 6+ b9p og: -co o> Es BS ci c) b0c CB6 -o a6 'od 3o 613 o.A o'' oj o= <o otE !ol >,q oot iou o= o. ;i tr> =o 5L U< -i c'i () o Z o a Wit[ a:ibbck diagram, explain briefly the various components in 1 miCroprocessor based embedded*.ystem. ... 'l .ii (06 Marks) Differentiatb',$etween the two design approaches for an embedded system development. Explain the vang, gllstages with a flow diagram. (08 Marks) 2 a. Compare: . ',, i) Big Endian and Littie Endian formats. ii) RISC and CISC registers. iii) Truncation and rounding ertors. (06 Marks) b. Explain direct and register indirept'addrepsihg"inodes with diagrams. Also write the timing diagram for a serial write operation with an 8 bit register. (06 ivlarks) c. Write the block diagram of RTN model for a microprocessor data path and memory interface. Also explain fetch, exep,utg aiid next control operations with RTL instructions. 3 a. Explain the internal diagram,;of SRAM and writb the timing diagram for read operation. i..i i (06 Marks) b. Explain associative mappi1rg cache implementation. (06 Marks) c. Write the inside and outSide diagrams for DRAM along with read and write operations. Also explain refresh operation. (08 Marks) .1,,,,,,.,. "' ." ,,iir'r.,. 4 a. Write the flbw'diagrams for waterfall and V life cycle models artd briefly explain Waterfall steps. , ' .., .:'. .t|.t,,,,, (06 Marks) 5 a. Diterentiare betrveen' - ,K"9tr0: ll, i[::H#looi,l,'.',I;, i,{fl",.1l*\$l ilt rightweight and heavy weight threads ((il LTBRF*' l: I (06 Marks) b. Describe: \.\_-.-,{.7 i) Reentrant code, \g*Z ii) Foreground/background system, iii) Multithreading system. (06 Marks) b. Explain ,the characteruing and identifuing the requirements of a system with respect to a digital counter. (06 Marks) c. Write the hardware architecture and data and control flow diagram of a counter system and ,; -;,,explain briefly the flow diagram. (08 Marks) Describe the task state transition with a diagram and TCB structures. Explain the function of the scheduler and also dispatcher. (08 Marks) I of2 www.pediawikiblog.com For More Question Papers Visit - www.pediawikiblog.com For More Question Papers Visit - www.pediawikiblog.com

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Page 1: Embedded System Design Jan 2014

USN

Time:3 hrs.

:l

'::i'.,,'""'

1 a. Explain:eachl.".,,

r0EC74

(08 Marks)

Seventh Semester B.E. Degree Examination, Dec.2013 lJan.201,4

Embedded System DesignI

Note: Answer FrvEfull questions, selecting Max' Marks:100

at least TWO questionsfrom each part. , i

PART-A , ''"

i) Embedded system, ii) Hard RTS, iii) Watch Dog Timer, with an example for(06 Marks)

b.

c.

qioo

a

o()!

E9

6e-ooo ll

trop.=N6+b9pog:-coo>Es

BSci c)

b0cCB6-oa6

'od3o613

o.Ao''oj

o=<ootE!ol

>,qootiouo=o. ;itr>=o5LU<-i c'i()oZ

oa

Wit[ a:ibbck diagram, explain briefly the various components in 1 miCroprocessor based

embedded*.ystem. ... 'l .ii

(06 Marks)Differentiatb',$etween the two design approaches for an embedded system development.Explain the vang, gllstages with a flow diagram. (08 Marks)

2 a. Compare: . ',,

i) Big Endian and Littie Endian formats.ii) RISC and CISC registers.iii) Truncation and rounding ertors. (06 Marks)

b. Explain direct and register indirept'addrepsihg"inodes with diagrams. Also write the timingdiagram for a serial write operation with an 8 bit register. (06 ivlarks)

c. Write the block diagram of RTN model for a microprocessor data path and memoryinterface. Also explain fetch, exep,utg aiid next control operations with RTL instructions.

3 a. Explain the internal diagram,;of SRAM and writb the timing diagram for read operation.i..i i (06 Marks)

b. Explain associative mappi1rg cache implementation. (06 Marks)c. Write the inside and outSide diagrams for DRAM along with read and write operations. Also

explain refresh operation. (08 Marks)

.1,,,,,,.,. "' ."

,,iir'r.,.4 a. Write the flbw'diagrams for waterfall and V life cycle models artd briefly explain Waterfallsteps. , ' .., .:'. .t|.t,,,,, (06 Marks)

5 a. Diterentiare betrveen'

-

,K"9tr0:ll, i[::H#looi,l,'.',I;, i,{fl",.1l*\$lilt rightweight and heavy weight threads ((il LTBRF*' l: I (06 Marks)

b. Describe: \.\_-.-,{.7i) Reentrant code, \g*Zii) Foreground/background system,iii) Multithreading system. (06 Marks)

b. Explain ,the characteruing and identifuing the requirements of a system with respect to adigital counter. (06 Marks)

c. Write the hardware architecture and data and control flow diagram of a counter system and

,; -;,,explain briefly the flow diagram. (08 Marks)

Describe the task state transition with a diagram and TCB structures. Explain the function ofthe scheduler and also dispatcher. (08 Marks)

I of2

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Page 2: Embedded System Design Jan 2014

6a,b.

c.

ta.

loE C74

Explain any 6 functions of an operating system in brief. (06 Marks)Describe virtual model and highL level irodel for oS architectures. (06 Marks)write the algorithm for a simple oS Kernel, using c rurgrug" notation for 3 asynchronoustasks using TCBs only. The 3 tasks use a common daia buffer for read, increment anddisplay operations. rvr rvqs' "^-'i;il;.;

write the Amdahl's law limitation for performance improvement/optimization. consider asystem with the following characteristics.i) The task to be improved takes 200 time units and the gral is to reduce the execution timeto 160 time units. The algorithm under considerati"r;;;;d; il;;"r" "Determine

theylpown-narameter vahJ in the equation and write th.l;f.;;;;,*

*"""' 'ii) Ifth{goal is to reduce the execution time to r00 tir"" r;;;;;d; uulr". in case(i), thendeterini4e-the value unknown parameter value in the equatioiffi#ffi# inference.

write a 'c' funciion to determine the sum of the elements.in an ar-ray and, analyzJif ,Hi?line for its time complexityExplain the Big-o nttuti* used for comparing the algorithms, cornmon bounds ,j:: TX'f?

write and analyze a rinear search algorithm for its time complexity. (06 Marks)The operationto beperformed is (i;:c,o u+ b, (iD c: a *.lf u= = belse c: d_e. Write thec language construct and. assembly lungurg. statements for the above 2 cases separately andcalculate the total time required-' if PUSH/pop takes g00 nsec, arithmeticoperation/load/store/cmp takes 400 nsec and the .onJitionut/unconditional branch takes700 nsec.

c.

8a.b.

c' Describe memory roading with equation, figure and an exampre.(06 Marks)(08 Marks)

*{<X.**

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