EEC 132C Class E Power Amplifier - Echopapers · EEC 132C Class E Power Amplifier Cheng Chen Brian Flynton SwapnilJain Jae Ho Jeon Claudia Wong. Background Information. Where are

EEC 132C

Class E Power Amplifier

Cheng Chen

Brian Flynton

Swapnil Jain

Jae Ho Jeon

Swapnil Jain

Jae Ho Jeon

Claudia Wong

Background Information

Where are Power Amplifiers Used?

• PAs used in:

– Radar

– Wireless Communications

– Jamming – Jamming

– RF heating

– Plasmas

– Laser drivers

– Magnetic-resonance imaging (MRI)

– Miniature DC/DC converters

Types of Power Amplifiers

• Class A

• Class AB

• Class B

• Class CClass C

• Class D

• Class E

• Class F

• Exotic Classes:

• Class S, H, G

Nonlinear vs. Linear PAs

•A PA can be thought of as a small-signal amplifier driven into

saturation.

But there is much more to it!

There are two commonly used configurations of power amplifiers. They are

single-ended and complementary (also known as push-pull) illustrated as

Class E is typically implemented as a Single-ended amplifier!

How are Non-Linear PA used?

– The strongly nonlinear behavior of switching-mode amplifiers limits their applications to communication systems with constant-amplitude modulation schemes such as CW, FM, FSK, and GMSK (used in GSM).

– Classic FSK and PSK use abrupt frequency or phase – Classic FSK and PSK use abrupt frequency or phase transitions. The resultant RF signals have constant amplitude and can therefore be amplified by nonlinear PAs with good efficiency.

Why the need for High Efficiency Power

Amplifiers?

� Necessary for battery operated portable

communication systems.

� Lower heat sinking requirements.Lower heat sinking requirements.

High Efficiency PAs

• Class D,E and F are known as the high efficiency classes of power amplifiers.

• In class D,E,F power amplifiers, the transistor is driven with a big input so that it acts like a switch. That's is why these amplifiers are also called switch-That's is why these amplifiers are also called switch-mode amplifiers.

• Class D amplifiers employ two transistors in a push-pull configuration.

• Class E and F use a single transistor to act like a switch i.e. single-ended.

Class E Power Amplifier

What’s so classy about class E?

Why Class E?

• Class E is a form of 'switching' amplifier which

was patented by Nathan Sokal in 1976.

• Class E have the highest efficiency of all

classes of amplifiers.classes of amplifiers.100%

maximum

theoretical

efficiency!

Typical Class E Circuit Components

• Circuit Components:Bypass CapsDC BlocksRF ChokesDrain shunt capacitanceDrain shunt capacitanceSeries resonant LC circuitLC tank circuits for low order harmonic suppressionsInput and Output matching network

A typical Setup of an Class E Amplifier

A Typical Class E Amplifier

Key Characteristics of Class E

• Transistor operates only in the cutoff and

triode/linear region.

– Driven with a big input

– So that it acts like a switch.– So that it acts like a switch.

• The passive load network is designed to

minimize collector voltage and current

waveforms overlapping, which minimize the

output power dissipation.

• Peak voltage and current do not exist

simultaneously.

Conditions for High Efficiency Operation

• Five conditions must be realized for a high efficiency operation:

1. The peak drain voltage and current do not exist simultaneously

2. At the end of the rise section of the drain current waveform, it must decrease to zero before the rise section of the voltage waveform can start.start.

3. The slope of the current waveform when it is zero must be zero to avoid power dissipation due to the existence of both current and voltage.

4. The drain voltage waveform must return to zero before the rise of the current waveform can start.

5. Slope of the voltage waveform must be zero at that moment to avoid power dissipation due to the simultaneous imposition of current and voltage.

Continued…

• Condition 1 reduces the majority of power

loss.

• Conditions 2 and 3 are known as Zero Current

Switching (ZCS) and Zero Slope Current Switching (ZCS) and Zero Slope Current

Switching (ZsCS), respectively.

• Conditions 4 and 5 are called Zero Voltage

Switching (ZVS) and Zero Slope Voltage

Switching (ZsVS).

Current and Voltage Waveform of a

Practical Class E PA

Design Procedure/SpecificationsDesign Procedure/Specifications

Design Equations

Design Equations

Specifications: Things to Consider

• Circuit layout

• Gain

• Power Added Efficiency (PAE)

• Max Output Power• Max Output Power

• Second and Third Harmonic Attenuation

• Overall and Drain Efficiency

Power Added Efficiency (PAE)

• Unlike efficiency, PAE taken the RF input

power source as well.

Overall and Drain Efficiency

“Drain efficiency is only quoted by cheaters and other marketing types”

– microwaves101.com

Lumped Element Layout

DC Biases Harmonic Suppression

Input Matching Network Series Resonant Circuit

Xie

Drain Shunt CapacitanceOutput Matching Network

Drain Shunt Capacitance!?

• Delays the starting

point of the voltage rise

section while the

current is at the end of

its fall section during

On

its fall section during

the ON to OFF

transition

Xie

Off

Drain Shunt Capacitance!?

• The required external linear capacitance

decreases as the operation frequency

increases.

– At a high enough frequency, the transistor will – At a high enough frequency, the transistor will

provide enough capacitance.

Input Power, Output Power, PAE

• Input Power: 20 dBm

• Transducer Power Gain: 8-10 dB

• Output Power: 28-30 dBm

• PAE: ~60%

DC Bias choice?

Transistor Selection

• Why MOS? Because the gate current is always zero, the gate voltage does not dissipate any power. Therefore MOSFETs are more power efficient. Because the DC gate current is always zero of any MOSFET, the gate bias circuit of a FET is easier to design than a BJT’s.

• Power output: limited by the transistor’s drain breakdown • Power output: limited by the transistor’s drain breakdown voltage and maximum current rating.

• Other considerations: operating frequency, bias, availability

• NEC6510179A, L and S-Band Medium Power GaAs HJ-FET.

TransistorModel Range:Frequency: 0.5 to 4 GHzBias: Vds=2.2V to 5V Id = 150mA to 300mA

NE6510179A

Port

Pg

Num=2

Port

Pd

Num=1

TOM_Model

FET1

Rg=1

Vbr=0

Alpha=2

Vto=-0.946

L

Ldx

L=0.001 nH

C

Cdspkg

C=0.1 pFL

Lgx

L=0.001 nH

C

Cgspkg

C=0.1 pF

GaAsFET

NE6510179A

Trise=

Area=1

Model=FET1

L

Lg

L=1.02 nH

L

Ld

L=0.35 nH

Gdcap=5

Gscap=5

Taumdl=no

Imax=1000

Vgr=no

Cbs=100 pF

Rdb=400

Cds=0.5 pF

Rs=0.05

Rd=0.2

Rg=1

Eg=1.43

Is=1e-16

Delta2=0.2

Delta1=0.3

Vbi=0.6

Cgd=3.7 pF

Cgs=20 pF

Tau=20 psec

Q=1.7

Tnom=27

TqgammaAc=0.025

Tqgamma=0.01

Beta=2.12

Alpha=2

Port

Ps

Num=3

L

Lsx

L=0.001 nH

C=0.1 pF

Transistor Bias

1.4

1.6

1.8

2.0

Vgs_sweep=-0.200

Vgs_sweep=-0.100

Vgs_sweep=0.000

Ids vs Vds

m1indep(m1)=plot_vs((IDS.i), Vds_sweep)=-9.932E-15Vgs_sweep=-1.000000

3.400

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.50.0 8.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

-0.2

Vgs_sweep=-2.000Vgs_sweep=-1.900Vgs_sweep=-1.800Vgs_sweep=-1.700Vgs_sweep=-1.600Vgs_sweep=-1.500Vgs_sweep=-1.400Vgs_sweep=-1.300Vgs_sweep=-1.200Vgs_sweep=-1.100Vgs_sweep=-1.000Vgs_sweep=-0.900

Vgs_sweep=-0.800

Vgs_sweep=-0.700

Vgs_sweep=-0.600

Vgs_sweep=-0.500

Vgs_sweep=-0.400

Vgs_sweep=-0.300

Vds_sweep

(ID

S.i)

m1

Transistor Bias

1.4

1.6

1.8

2.0

Ids vs Vgs

m2indep(m2)=plot_vs(IDS.i, Vgs_sweep)=3.523E-4Vds_sweep=6.000000

-1.000

-1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2-2.0 0.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

-0.2

Vgs_sweep

IDS

.i

m2

Center Frequency

• Two Designs

– 900 MHz (lumped element only)

– 1.9 GHz (lumped and distributed element)

• 1.9 GHz => PCS, 900 MHz => GSM.

900 MHz/1.9 GHz Circuit

• Series Resonant Circuit

• Shunt capacitor was tuned to obtain target

PAEPAE

• Input matching networks redone to match

transistor

• Output matching > Load pull to maximize PAE

• Inductors were made big enough to be open

circuits

900 MHz Lumped Element Circuit

Vhigh = 3Vlow = -1.3Pin = 17.5 dBmFreq = 900 MHz

Vd

Vdd

L

L1

R=

L=2.7 nH {t}

CC3

C=0.1 uF

R

R1R=20 Ohm

LL3

R=L=50 uH

LL4

R=L=50 uH

CC4

C=0.1 uF

I_Probe

Igg

I_Probe

Idd

Port

VhighNum=3

Port

VlowNum=2

Vd

Vin

Vout

LL6

R=L=1.6 nH {t}

CC7

C=33.5 pF {t}

C

C5C=3.6 pF {t}

SLCSLC1

C=30.4 pF {t}L=1.1 nH {t}

CC1

C=18.5 pF {t}SLC

SLC3

C=3.5 pF

L=1.0 nH

SLC

SLC2

C=7.8 pF

L=1.0 nH

I_Probe

IoutI_Probe

Id

NEC_mdl_NE6510179A

M1

I_Probe

IinPortPin

Num=1

PortPout

Num=4

1.9 GHz Lumped Element Circuit

Vhigh = 3.4 VVlow = -1.3 VRFin = 20 dBmFreq = 1.9 GHz

L

L1

R=

L=1.6 nH

Port

P3

Num=3

Port

P2

Num=2

L

L3

R=

L=50 uH

L

L4

R=

L=50 uH

C

C4

C=0.1 uF

C

C3

C=0.1 uF

C

C8

C=0.8 pF

L

L7

R=

L=1 nH

R

R1

R=20 Ohm

VdL

L5

R=

L=1.5 nH {t}

C

C6

C=6.3 pF {t}C

C5

C=6.6 pF {t}

C

C7

C=4.2 pF {t}

L

L6

R=

L=1.4 nH {t}

Port

P4

Num=4

Port

P1

Num=1

I_Probe

Id

C

C9

C=1.7 pF

L

L8

R=

L=1 nHNEC_mdl_NE6510179A

M1

C

C1

C=4.4 pF

1.9 GHz Distributed Element Circuit

C_Pad1C24C=1.0 pF

PortP4Num=4

MLIN

MSUBMSub1

Er=2.5H=60 mil

MSub

PortP3Num=3

Vhigh = 3.4 VVlow = -1.3 VRFin = 20 dBmFreq = 1.9 GHz

C_Pad1

C23

L1=288.0 milS=137.0 mil

W=120.0 milC=6.0 pF

L1=50.0 mil

S=18.0 milW=35.0 mil

C=1.0 pF MLIN

TL7

L=550.0 milW=35.0 mil

Subst="MSub1"

MLIN

TL10

L=15.0 mmW=4.27303 mm

Subst="MSub1"

MLINTL9

L=2.5 mmW=25.0 um

Subst="MSub1"

MLINTL8

L=2.5 mmW=25.0 um

Subst="MSub1"

MCLINCLin1

L=2.9952 cm {t} {o}S=0.0271935 cm {t} {o}

W=4.27303 mmSubst="MSub1"

MCLINCLin5

L=2.49442 cm {t}S=0.0178 cm {t}


MLIN

TL1

L=7.15 mm {t}W=4.27303 mm

Subst="MSub1"

MLINTL2

L=20.4375 mm {t}


Rough=0 milTanD=0.0006T=1.4 mil

Hu=3.9e+34 milCond=5.96e+7

Mur=1Er=2.5

MLIN

TL5

L=1.5 cm

W=4.27303 mmSubst="MSub1"Num=1

MLIN

TL4

L=0.2 cm {t} {o}


MLINTL3

L=2.21665 cm {t} {o}W=4.27303 mmSubst="MSub1"

Layout

Simulation Results

1.9 GHz Circuits

Simulation Results for 1.9 GHz Lumped

Element Design

4

5

6

500

600

700

800

ts(X

14

.ID.i), m

Ats(X

14

.VD

), V

Vd and Id vs. Time

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.00.0 1.1

1

2

3

0

100

200

300

400

0

time, nsec

ts(X

14

.ID.i), m

Ats(X

14

.VD

), V

Simulation Results for 1.9 GHz Lumped

Element Design

Available Source Power (dBm) 20

Fundamental Output Power (dBm) 26.961

Transducer Power Gain (dB) 6.961Transducer Power Gain (dB) 6.961

PAE (%) 67.122

Output Power (Watts) 0.591

Thermal Dissipation (Watts) 0.191

1.9 GHz Microstrip Design Results

4

6

400

600

ts(ID

.i), mAts

(VD

), V

Vd and Id vs. Time

0.2 0.4 0.6 0.8 1.00.0 1.2

2

0

200

0

time, nsec

ts(ID

.i), mAts

(VD

), V


-40

-20

0

20

40

dB

m(V

load[::,

1])

m5

dB

m(V

load[::,

2])

dB

m(V

load[::,

3])

Pout vs. Pavs (f0, 2f0, 3f0)

m3RFpower=dBm(Vload[::,2])=-69.756

20.000

m5RFpower=dBm(Vload[::,1])=27.183

20.000

12 14 16 18 20 22 24 26 2810 30

-80

-60

-40

-100

RFpower

dB

m(V

load[::,

1])

dB

m(V

load[::,

2])

m3

dB

m(V

load[::,

3])

m4dBm(Vload[::,2])=-69.756


20.000


25

30

50

75

100

Po

ut

m1

PA

Em6

PAE (%) and Pout (dBm) vs. Input Power (dBm)

m6indep(m6)=plot_vs(PAE, RFpower)=63.199

20.000

m1

17 19 21 23 25 27 2915 30

25

20

25

50

0

RFpower

Po

ut P

AE m1

RFpower=Pout=27.183

20.000


75

100

75

100

Dra

in_E

ffic

iency m8 O

vera

ll_E

fficie

ncy

m7

Drain and Overall Efficiency

m7RFpower=Overall_Efficiency=67.985

20.000

m8RFpower=20.000

17 19 21 23 25 27 2915 30

50

25

50

25

RFpower

Dra

in_E

ffic

iency

Overa

ll_E

fficie

ncy

RFpower=Drain_Efficiency=78.149

20.000


4

6

8

Ga

in

m2Gain

m2RFpower=Gain=7.183

20.000

12 14 16 18 20 22 24 26 2810 30

-2

0

2

-4

RFpower

Ga

in Gain=7.183


30

Po

ut

(dB

m)

Pin = 18.1 dBm

Pout = 24.9 dBm

Pout (Extrapolation) = 25.9 dBm

1 dB Gain Compression Point

20

25

14 16 18 20

Po

ut

(dB

m)

Pin (dBm)

Pout

Extrapolation


50 m1

Output Spectrum

m1freq=Spectrum=27.183

1.900GHzm2freq=Spectrum=-69.756

3.800GHzm3freq=Spectrum=-67.363

5.700GHz

1 2 3 4 5 6 7 8 90 10

-100

-50

0

-150

freq, GHz

Sp

ectr

um

m2 m3


0.5

1.0

ts(I

D.i)

Vgs_sweep=-0.600

Vgs_sweep=-0.500

Vgs_sweep=-0.400

Am

plif

ier_

DC

_IV

..ID

S.i Load Line Superimposed on DC Bias Curves

0 1 2 3 4 5 6-1 70.0

ts(VD)

ts(I

D.i)

Vgs_sweep=-2.000Vgs_sweep=-1.900Vgs_sweep=-1.800Vgs_sweep=-1.700Vgs_sweep=-1.600Vgs_sweep=-1.500Vgs_sweep=-1.400Vgs_sweep=-1.300Vgs_sweep=-1.200Vgs_sweep=-1.100Vgs_sweep=-1.000Vgs_sweep=-0.900Vgs_sweep=-0.800Vgs_sweep=-0.700

Vgs_sweep=-0.600

Amplifier_DC_IV..Vds_sweep

Am

plif

ier_

DC

_IV

..ID

S.i




Transducer Power Gain 7.183

PAE (%) 63.128

Output Power (Watts) 0.67Output Power (Watts) 0.67


Second Harmonic Attenuation (dBc) -96.939

Third Harmonic Attenuation (dBc) -94.546

Simulation Results

900 MHz

900 MHz Simulation Results

6

8

10

0.6

0.8

1.0

ts(ID

.i), Ats

(VD

), V

Vd and Id vs. Time

0.2 0.4 0.6 0.8 1.00.0 1.2

2

4

0

0.2

0.4

0.0

time, nsec

ts(ID

.i), Ats

(VD

), V

900 MHz Design Simulation Results

-20

0

20

40

dB

m(V

loa

d[:

:,1])

m5

dB

m(V

loa

d[:

:,2])

m3

dB

m(V

loa

d[:

:,3])

Pout vs. Pavs (f0, 2f0, 3f0)

m5RFpower=dBm(Vload[::,1])=29.484

20.000

m3RFpower=20.000

12 14 16 18 2010 22

-60

-40

-20

-80

RFpower

dB

m(V

loa

d[:

:,1])

dB

m(V

loa

d[:

:,2])

m3

dB

m(V

loa

d[:

:,3])

m4

RFpower=dBm(Vload[::,2])=-38.272

20.000


20.000


29.5

30.0

75

80

m1

m6PAE (%) and Pout (dBm) vs. Input Power (dBm)

m6indep(m6)=plot_vs(PAE, RFpower)=79.117

20.000

17 19 21 23 2515 26

28.5

29.0

29.5

28.0

65

70

75

60

RFpower

Po

ut P

AE m1

RFpower=Pout=29.484

20.000

plot_vs(PAE, RFpower)=79.117


85

90

95

100

85

90

95

100

Dra

in_E

ffic

iency m8

Overa

ll_E

fficie

ncy

m7

Drain and Overall Efficiency

m8RFpower=20.000

m7RFpower=Overall_Efficiency=81.022

20.000

17 19 21 23 2515 26

75

80

70

75

80

70

RFpower

Dra

in_E

ffic

iency

Overa

ll_E

fficie

ncy

m7 RFpower=Drain_Efficiency=89.157

20.000


10

12

14

Ga

in

m2

Gain

m2RFpower=Gain=9.484

20.000

17 19 21 23 2515 26

6

8

4

RFpower

Ga

in




Transducer Power Gain 8.495Transducer Power Gain 8.495

PAE (%) 78.148

Output Power (Watts) 0.777


Comparison Between Designs

Design

Available

Source Power

(dBm)

Fundamental

Output

Power (dBm)

Transducer

Power

Gain (dB) PAE (%)

Output

Power

(W)

Thermal

Dissipation

(W)

900 MHz 900 MHz

Lumped

Element 20 28.495 8.495 78.148 0.78 0.156

1.9 GHz

Lumped

Element 20 26.961 6.961 67.122 0.59 0.191

1.9 GHz

Microstrip 20 27.183 7.183 63.128 0.67 0.242

Comparison to Commercial Parts

Part Typical

Output

Power

(dBm)

Typical

PAE (%)

Typical

Gain (dB)

Supply

Voltage

(V)

Package Size

(mm)

SKY77340 34.5 55 33 2.9-4.8 16-pin MCM

GSM900 (880-915MHz) *Listed as Total Efficiency on Data Sheet

SKY77340 34.5 55 33 2.9-4.8 16-pin MCM

6x8x1.2

TQM 7M4014 35 56 33 2.9-4.5 10x701.4

RF3166 34.2 *56 34.2 3-4.5 6x6

900 MHz Design 28.495 78.148 8.495 3.4

Comparison to Commercial Parts

Part Typical

Output

Power

(dBm)

Typical

PAE (%)

Typical

Gain (dB)

Supply

Voltage

(V)

Package

Size (mm)

SKY77340 32.5 53 34.5 2.9-4.8 16-pin

MCM

PCS1900 (1850-1910MHz)

PCS1900 (1850-1910MHz) *Listed as Total Efficiency on Data Sheet

MCM

6x8x1.2

TQM 7M4014 32.5 50 30.5 2.9-4.5 10x701.4

RF3166 32 *52 32 3-4.5 6x6

1.9 GHz

Lumped Design

26.961 67.122 6.961 3.4

1.9 GHz

Microstrip

Design

27.183 63.128 7.183 3.4

Realizability, Fabrication, and

TestingTesting

Realizability

• Commercially available lumped components

– Standard values and sizes

• Microstrip

Goal

OptimGoal2

Weight=1

Max=-168.669

Min=-168.669

SimInstanceName="SP1"

Expr="phase(S22)"

GOAL

Goal

OptimGoal1

Weight=1

Max=0.819

Min=0.819

SimInstanceName="SP1"

Expr="mag(S22)"

GOAL

OPTIM

S_Param

SP1

Step=0.1 GHz

Stop=2.5 GHz

Start=1.5 GHz

S-PARAMETERS

Microstrip Input and Output

Matching Networks

RangeMax[1]=1.9 GHz

RangeMin[1]=1.9 GHz

RangeVar[1]="freq"

Weight=1

RangeMax[1]=1.9 GHz

RangeMin[1]=1.9 GHz

RangeVar[1]="freq"

Weight=1

Optim

Optim1

SaveCurrentEF=no

UseAllGoals=yes

UseAllOptVars=yes

SaveAllIterations=no

SaveNominal=no

UpdateDataset=yes

SaveOptimVars=no

SaveGoals=yes

SaveSolns=yes

SetBestValues=yes

NormalizeGoals=no

FinalAnalysis="None"

StatusLevel=4

DesiredError=0.0

MaxIters=100

OptimType=Gradient

OPTIM

MSUB

MSub1

Rough=0 mil

TanD=0.0006

T=1.4 mil

Hu=3.9e+34 mil

Cond=5.96e+7

Mur=1

Er=2.5

H=60 mil

MSub

MLIN

TL3

L=0.355839 cm {o}

W=4.27303 mm

Subst="MSub1"

MLIN

TL4

L=2.14665 cm {o}

W=4.27303 mm

Subst="MSub1"

TLIN

TL6

F=1.9 GHz

E=109.304 {o}

Z=50.0 Ohm

TLIN

TL5

F=1.9 GHz

E=156.828 {o}

Z=50.0 Ohm

Term

Term1

Z=50 Ohm

Num=1

Term

Term2

Z=50 Ohm

Num=2


Matching NetworksInput Matching Network S22

m1

freq (1.500GHz to 2.500GHz)

S(2

,2)

m1

m1freq=S(2,2)=0.819 / -168.669optIter=0impedance = Z0 * (0.100 - j0.098)

1.900GHz


Matching Networks

Output Matching Network S11

m1freq=S(1,1)=0.669 / -178.955impedance = Z0 * (0.199 - j0.009)

1.900GHz

freq (1.500GHz to 2.500GHz)

S(1

,1) m1

Coupled Line Band Pass Filter

• Replaced the series resonator

-5

0

m1Second Section S21 Response

m1freq=1.900GHz

1.2 1.4 1.6 1.8 2.0 2.2 2.41.0 2.6

-20

-15

-10

-5

-25

freq, GHz

dB

(S(2

,1))

freq=dB(S(2,1))=-0.215

1.900GHz

Large Signal Input Matching

Large Signal Input Matching

Pavs_in

10.00011.00012.00013.00014.00015.00016.000

Pavn_in

7.162 / 0.856 8.820 / 4.460

10.945 / 8.253 12.473 / 6.956 13.897 / 6.353 14.965 / 4.518 16.049 / 3.226 16.000

17.00018.00019.00020.00021.00022.00023.00024.00025.00026.00027.00028.00029.000

16.049 / 3.226 17.027 / 1.893 17.999 / 0.616

18.930 / -0.054 19.865 / 0.882 20.754 / 0.826 21.565 / 1.383 22.595 / 1.736 23.463 / 2.018 24.407 / 1.325 25.625 / 0.178

26.594 / -0.944 27.716 / -2.035 28.872 / -3.029

MSUB

MSub1

Er=2.5

H=60 mil

MSub

S_Param

S-PARAMETERS

Term

Term1

Z=50 Ohm

Num=1

Term

Term2

Z=50 Ohm

Num=2

MGAPGap1

S=13.5 mil

W=120 mil

Subst="MSub1"

Microstrip Gap Capacitance

Rough=0 mm

TanD=.0006T=1.4 mil

Hu=1.0e+33 mm

Cond=5.96e7

Mur=1

Er=2.5SP1

Step=.010 GHz

Stop=4.0 GHz

Start=500 MHzTerm

Term4

Z=50 Ohm

Num=4

Term

Term3

Z=50 Ohm

Num=3

C

C1

C=0.064 pF {t}

Microstrip Gap Capacitance

-0.02

0.00

m2m1

m2freq=dB(S(1,1))=-0.025

1.900GHzm1freq=dB(S(3,3))=-0.025

1.900GHz

-20

-15

m5m6

m5freq=dB(S(2,1))=-22.325

1.900GHzm6freq=dB(S(4,3))=-22.363

1.900GHz

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-0.10

-0.08

-0.06

-0.04

-0.12

freq, GHz

dB

(S(1

,1))

dB

(S(3

,3))

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-30

-25

-20

-35

freq, GHz

dB

(S(2

,1))

m5

dB

(S(4

,3))

m6

We used MGAP component in ADS to model the gap capacitance

Gap Capacitance: ~.064pF

Soldered Lumped Capacitance: 6pF

Inductor Characterization

S21 ~-22 dB at 1.9 GHz

L ~ 120 nH

Measurement Results

S-Parameters S11

-0.5

0.0

dB

(S(1

,1))

m2

dB

(S(3

,3))

m2freq=dB(S(1,1))=-0.584

1.900GHzm3freq=dB(S(3,3))=-1.387

1.900GHz

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-2.0

-1.5

-1.0

-2.5

freq, GHz

dB

(S(1

,1))

dB

(S(3

,3))

m3

S-Parameters S21

5

10

dB

(S(2

,1)) m1

dB

(S(4

,3)) m4

m1freq=dB(S(2,1))=-1.160

1.900GHzm4freq=dB(S(4,3))=-1.129

1.900GHz

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-10

-5

0

-15

freq, GHz

dB

(S(2

,1)) m1

dB

(S(4

,3)) m4

S-Parameters S12

-100

0

dB

(S(1

,2))

m5

dB

(S(3

,4))

m6

m5freq=dB(S(1,2))=-31.057

1.900GHz

m6freq=dB(S(3,4))=-14.331

1.900GHz

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-300

-200

-400

freq, GHz

dB

(S(1

,2))

dB

(S(3

,4))

S-Parameters S22

-1.5

-1.0

dB

(S(2

,2)) m7

dB

(S(4

,4))

m7freq=dB(S(2,2))=-1.960

1.900GHzm8freq=dB(S(4,4))=-2.505

1.900GHz

1.0 1.5 2.0 2.5 3.0 3.50.5 4.0

-2.5

-2.0

-3.0

freq, GHz

dB

(S(2

,2)) m7

dB

(S(4

,4))

m8

Special Thanks

• Kelvin and his expensive

outer space wires

• In-n-Out Burger• In-n-Out Burger

• Prof. Luhmann

• Nathan Sokal

References

• Xie, Tiaotiao. Design and Development of the Class E RF Power Amplifier

Prototype by Using a Power MOSFET.

• Cripps, Steve C. RF Power Amplifiers for Wireless Communications.

• Al-Shahrani, Saad Mohammed. Design of Class-E Radio Frequency Power

Amplifier.

• Raab, Frederick H. et al. RF and Microwave Power Amplifier and • Raab, Frederick H. et al. RF and Microwave Power Amplifier and

Transmitter Technologies.

• Jeon, Sanggeun. Design and Stability Analysis Techniques for Switching-

Mode Nonlinear Circuits: Power Amplifiers and Oscillators

Who Did What

• Cheng

– ADS Simulations: DC Bias, IV Curve, 1dB Compression, Harmonic Balance, Power

Calibration, Fabrication

• Brian

– Circuit Layout, Microstrip Circuit Optimization, Etching (w/o heat!), Microstrip bandpass

filters

• Jae• Jae

– Circuit design, Microstrip Implementation, Transistor selection, transistor

characterization

• Swap

– Class E article research, Class E theory, Optimization, inductor characterization, Time

Domain Analysis

• Claudia

– ADS Simulations: Load Pull, PAE circles, Time domain simulation, Powerpoint,

Measurement calibration

• Kelvin

– Soldering, transistor burn out, fixing capacitor connections

Documents

EEC 132C Class E Power Amplifier - Echopapers · EEC 132C Class E Power Amplifier Cheng Chen Brian Flynton SwapnilJain Jae Ho Jeon Claudia Wong. Background Information. Where are