Project 1 Report

George V. Rosenbaum

EE 4113

May 6, 2014

The University of Texas at San Antonio

1 - Abstract

The project was to build a simple audio amplifying system that performs the same basic

tasks of a commercial amplifier. The circuit had ±14 rails and a 2V input signal. This signal was

first passed into a bandpass filter that removes frequencies above and below the range of human

hearing. This was done to prevent any inaudible frequencies from drawing unnecessary current

to amplify a more complicated signal. This filter was actively operated, using op-amps in

addition to passive components. Once the unwanted frequencies were attenuated, it was sent to a

class AB push-pull MOSFET amplifier. This pushes a high amount of power through a small

power resistor, which acts as the replacement load for a speaker. A non-inverting feedback

system removed any existing crossover distortion and multiplied the 2 Vpp signal into 20 Vpp

before it entered the AB amp. A 10 kΩ potentiometer is used to passively divide the 2 Vpp signal

before it enters the amp, giving the user a form of volume control.

The device was first simulated in PSpice, particularly to design and simulate the pre-amp

filter configuration of choice. Once this design matches specification, the entire circuit was built

on a breadboard, and tested in two stages. When physical testing was completed, the PSpice

simulation was imported into a printed circuit board (PCB) editor, and a copper PCB was

fabricated. The components were then soldered into the board, and the circuit was re-tuned and

tested again.

2 - Introduction and Problem Description

2.1 - Introduction

In EE 4113, the students will learn circuit fabrication skills and be exposed to the

laboratory equipment and techniques used by real engineers. The specific version of the circuit

was designed and built by Abdullah Aldhalaan and George Rosenbaum.

2.2 - Problem Description

2.2.1 - Specifications of Project 1A

Part A of the project was to make the active filtering, bandpass filtering pre-amp stage.

For this project, single and dual 411-style op-amp 8 pin chips were available for use. The circuit

was protected by 100 uF electrolytic capacitors at the ±14 power source to filter out induction

voltage spikes when turned on and off. At least two 0.1 uF bypass capacitors filtered out noise in

each filtering stage. The passband range should be between 200 Hz and 18 kHz, with only 2 dB

of ripple for frequencies within the passband. The stopband attenuate frequencies below 40 Hz

and above 90 kHz, and should drop the amplitude of the signal below 22 dB of the maximum

gain in the passband.

This part required the design of an active bandpass filter that passes and stops the listed

frequencies. This can be done entirely by hand calculation. However, using circuit simulation

and filter software will make the process much easier. Once constructed, the circuit will be tested

by running a 2Vpp sine wave signal and recording the voltage changes from 1 Hz to above 90

kHz.

2.2.2 - Specifications of Project 1B

Part B of the project was to build and correctly tune a Class AB MOSFET based

amplifier. The amplifier must take a 2Vpp signal and amplify it to 20Vpp with no distortion to be

played on a speaker. The transistors used will be an IRF510 n-channel MOSFET and an IRF9510

p-channel MOSFET. Like part A, the circuit was protected by the same 100 uF electrolytic

capacitors. In addition, 0.1 and 0.01 uF bypass capacitors were used on the source terminals of

both transistors. A 10 kΩ potentiometer was used as a volume knob and a 411-style single op-

amp chip was used as a feedback loop, and was protected by 0.1 uF bypass capacitors. This

served as a negative feedback loop to reduce crossover distortion and boost the voltage to 20Vpp.

The speaker was replaced with a 20 Ω power transistor, which served as a dummy load.

This stage must be individually tested before it can be added to the filtered signal created

by the pre-amp. A 1600 kHz, 2Vp-p test signal was generated in place of our pre-amp output for

this stage of the project. The VGS voltages for both transistors were biased by two 100 kΩ

potentiometers, which must be manually tuned to control the stage the transistors operate in.

While tuning, the current drawn by the power transistors was carefully monitored to prevent

damaging them. They should operate between 120 mA and 200 mA, and anything above this is

cause for concern. Record the total harmonic distortion (THD) using the oscilloscope to ensure

that the output wave is not being distorted, ensuring this does go above 1%.

When the AB amplifier was properly tuned and connected to the volume knob and

feedback loop, it was combined with the pre-amp from part A. The entire circuit was tested as a

whole to demonstrate all the parts working together.

2.2.3 - Specifications of Project 1C

Once the full circuit was constructed on a protoboard, the PSpice design was imported

into a PCB editor. First, the PSpice model must be prepared for proper importing through

Cadence’s PCB software so it could be properly imported. This involves constructing virtual

voltage rails within the PSpice model, removing extraneous pins on parts, and creating PCB

footprints for each component. The voltage sources must be replaced with empty ports and the

input replaced with a BNC port.

With the fully prepared PSpice model the components were netlisted into the PCB editor.

The board size cannot be larger than 4.5” by 3.25”, with 20 mil signal traces and 50 mil power

traces. All traces must be routed on the bottom layer, with the top layer as an extra ground plane

to prevent isolating a section of ground on the bottom. The parts must be placed one by one

using the PCB editor, and must successfully connect all the traces together without overlapping.

When this is done, the artwork and drill files were made so that the designed copper trace

can be printed out. The board was inspected for any mistakes or loose copper shavings shorting

anything out. Then all the parts were removed from the protoboard and placed in the copper

board, using the testing methodology discussed in parts A and B. The parts were not soldered in

all at once, and each stage was tested by itself before it was added the rest of the circuit.

3 - Initial Design and PSpice Simulation

3.1 - Initial Design

Design is primarily necessary when the pre-amp stage of the circuit was created. There

were some minor design decisions for how the AB amplifier potentiometers were biased and

how much gain was set on the feedback loop. However, these were fairly simple choices that

didn’t require a lot of personal preference or creativity.

A simple two stage cascaded architecture was used for debugging simplicity. This was

done by passing an input signal through a highpass filter, whose output was then fed into a

lowpass filter. This way, each filter could be redesigned and retested independently. For further

simplicity, Bessel filters were used so the ripple calculation would only involve the drop in gain

at the pass and stop corner frequencies. The circuit design is shown in Figure 3.1 to demonstrate

what the design should look like.

F

igure 3.1 - Circuit Configuration for Part 1A

The circuit can be designed with either a good circuit textbook, or using analog filter

software: http://www.analog.com/designtools/en/filterwizard/#/type. Make sure that the

components to build the circuit are readily available.

3.2 - PSpice Simulation

Once the pre-amp was designed, it was taken and simulated on PSpice to ensure correct

pass and stop corners. The simulation and values for the circuit in the previous section are shown

in Figure 3.2 to show what our projected dB values will be at 200Hz and 18 kHz.

Figure 3.2 - PSpice AC Sweep between 1Hz and 1 MHz with Data Table

The maximum gain in this graph is -77.801dB. For proper attenuation, the 200 Hz and 18

kHz pass corner frequencies must be under 3dB of our maximum. But the cursors on the graph

show that the 200 Hz point is 3.484 dB from the maximum gain, and that the 18 kHz point is

4.383 dB away. In practice, a little overdesign is necessary for proper attenuation. When the final

circuit was built, the amount of signal attenuation at the pass frequency corners proved to be

within spec, despite what the initial simulation showed.

4 - Protoboard Circuit

4.1 - Part A: Pre-Amplifier

Building the pre-amp was relatively easy. Some care needed to be taken to ensure the

right op-amp chips are being used, but there is little to say about how it was fabricated.

Testing the pre-amp was somewhat tedious, but straightforward. The signal generator

was connected to the input of the bandpass, and the oscilloscope was connected to the output. A

range of different 2Vpp signals were generated between 40 Hz and 90 kHz, and the output peak-

to-peak amplitudes at all four corner frequencies were recorded to ensure the filter was passing

and stopping at the correct frequencies. The finished protoboarding is in Figure 4.1, to show the

entire one chip design.

Figure 4.1 - Part 1A in Protoboard

4.2 - Part B: Class AB Amplifier with Feedback

The wiring for the Class AB amplifier was a little more complicated because the 100 kΩ

biasing potentiometers had to be carefully arranged so each pin was on its own row of the

protoboard. They were supposed to be placed in the center of the board like an IC chip, but were

instead rotated slightly and stuck on individual sides of the board for symmetry. This caused the

potentiometers to fit poorly, and they would often pop out of the board. Doing this is not

recommended unless remembering which potentiometer controls which MOSFET is something

the user is likely to forget.

A few precautions had to be taken to prevent accidental damage to the MOSFET

transistors before adjusting the potentiometers. Voltage was applied to the potentiometers before

the transistors were even allowed in the board. The potentiometers were then adjusted until both

were at zero voltage. This was a necessary step to ensure the MOSFETS would not accidently

break from current overdraw. To monitor how much current the MOSFETs were drawing during

testing, the power supply was toggled to display drawn current. The current limits were carefully

taken off of the power supply, and a 1.6 kHz, 2Vpp signal was generated into the input.

Once these precautions were taken, the MOSFETs were finally added to the board. Heat

sinks were added to each transistor to drain heat away from the devices. The potentiometers were

then slowly adjusted to allow more VGS voltage into each MOSFET transistor. When the

MOSFETs drew around 150 mA at their rails, all visible traces of crossover distortion had been

eliminated.

The feedback loop was then added on to increase Vpp to 20V while eliminating any

remaining crossover distortion. Designing it was relatively simple. Two resistors were chosen so

bias the gain in the loop. The 10 kΩ was also added to the input, and the AB amplifier was tested

again to ensure the new maximum voltage of 20Vpp and voltage control below -5dB and 20dB.

Figure 4.1 shows the PSpice simulation of the circuit and Figure 4.2 shows what the circuit

looked like in the protoboard. Note how the MOSFETs and power resistor are spaced out in [4.2]

to prevent heat from getting trapped.

Figure 4.1 - Circuit Configuration for Part 1B

Figure 4.2 - Part 1B in Protoboard

5 - Printed Circuit Board Design

5.1 - PCB Editor

Before the finished circuit could b imported into the PCB editor, it was first be prepared

for the net listing process. All of the parts were given appropriate PCB footprints so the editing

software knew how much room to give each part. This was especially important for the

MOSFETs and the power load. Junctions must be added at the ±14 power rails, the GND rail,

and above the power load. A BNC socket must be added in place of the input voltage so it can be

attached to the function generator with a coaxial cable. When finished, the PSpice model will

look like Figure 5.1. See how in [5.1] the input was replaced with “BNC_5PIN,” and the ±14

voltage sources were removed for three “J” components, representing solder junctions.

Figure 5.1 - Complete PSpice Circuit with PCB Additions

With all the extra features added to the PSpice model, the circuit was imported into the

PCB editing program. The size of the board was limited to 4.5” by 3.25” and the parts were

added on. Care was taken when adding the parts so the routing algorithm knew how to draw the

traces. The initial PCB blueprint was shown in Figure 5.2 to demonstrate good part placement.

Figure 5.2 - Top PCB Diagram

The traces were added once all the parts were in place, using a routing tool that

automatically created connections between the components. This process took several tries,

constantly moving around parts to successfully route everything. Parts were arranged so traces

could flow underneath components. This was especially true for the op-amp chips, which have

many traces flowing to them, and easily cluttered the board when arranged badly. One good

technique involves rotating the op-amp chips so traces can flow underneath them to their

destination.

The final PCB trace is shown finished in Figure 5.3. An artwork file and drill file were

created so the board could be cut from copper PC board.

Figure 5.3 - Finished PCB Diagram with Traces

5.2 - Soldering

When the copper trace was made, the components were soldered to the board. Care was

taken to ensure no accidental shorts between traces to GND were made. All parts were tested

individually instead of soldering everything first, to make debugging easier. This involved

checking that the bandpass filter attenuated at the correct frequencies with no distortion and that

the potentiometers biased the MOSFETs to only draw 150 mA when a 16 kHz input signal is

applied. The finished product is shown in Figures 5.4 and 5.5.

Figure 5.4 - Top of Finished Board

Figure 5.5 - Bottom of Finished Board

5.3 - Final Testing

Once the circuit was successfully constructed on the PCB, final frequency tests were

conducted to show the circuit operation correctly at all frequencies. This involved recording the

peak-to-peak voltage at 1.6 kHz, and comparing it to the frequencies at 200 Hz and 18 kHz to

show the amount of attenuation. The frequency drop should not go below 79% of the input Vpp.

The three frequencies, and their AC voltage, are recorded in Figures 5.6, 5.7, and 5.8to check if

the ripple still passes specification.

Figure 5.6 - 19.4Vpp Signal at 200 Hz

Figure 5.7 - 22.6Vpp Signal at 1.6 kHz

Figure 5.8 - 19.8Vpp Signal at 18 kHz

Both corner peak-to-peak voltages were above 79% of 22.6V. This meant that after

soldering the entire board together, the bandpass filter still worked correctly.

6 - Conclusion

Not only was our team smaller than most, we were rather ‘unlucky’ to put it nicely. We

had to redesign our bandpass filter multiple times because it wouldn’t pass and stop at the right

frequencies. Trying to get the PCB traces to route correctly in the editor also proved very

difficult, as the algorithm wouldn’t create valid traces. When we finally got the board printed and

began soldering, the bandpass filter section would behave erratically for a very long time

because of a small floating ground within the traces. From this, we learned how to survive the

worst case scenario for testing and prototyping a circuit design.

The first lesson we learned is that starting over from scratch is a perfectly valid form of

debugging. If visually inspecting the wiring of a protoboard proves fruitless, try removing all the

parts and starting the process over. If the PCB editor will not make valid traces after several

attempts, take their footprints off and place them back on in a slightly different arrangement,

rotating the more connection heavy parts around. If the circuit is cheap enough and you’re given

the option by your overseer, you can even de-solder as many components as you can save, throw

away the faulty board, and print out another board to start over.

The second lesson is that soldering to a copper PCB requires more care than using a

protoboard. Not only is a steady hand and soldering practice required, but errors can occur even

if everything is soldered correctly. Inspect the board carefully, and use the probes to detect

abnormal signals between ground areas or solder joints. This may be the result of an isolated

ground plane or a copper shaving shorting the board. If possible, test every few connections you

make, or subdivide the testing methodology you used when constructing on the protoboard. For

example, instead of testing the bandpass filter all soldered together, try only soldering and testing

the highpass portion by itself before adding the lowpass filter.

Finally, learn to divide work well without worrying about dividing it evenly. In our case,

one team member ran through the testing procedure and did simulation, while the other team

member did the soldering or protoboard wiring. This is more difficult in large teams, where one

or two members may not get to do anything except watch everyone else work.

In spite of our difficulties, our team gained a lot of useful skills that will help us test and

debug our own future projects later in life.

7 - References

Figure 3.1 - Circuit Configuration for Part 1A Figure

Figure 3.2 - PSpice AC Sweep between 1Hz and 1 MHz with Data Table

Figure 4.1 - Part 1A in Protoboard

Figure 4.1 - Circuit Configuration for Part 1B

Figure 4.2 - Part 1B in Protoboard

Figure 5.1 - Complete PSpice Circuit with PCB Additions

Figure 5.2 - Top PCB Diagram

Figure 5.3 - Finished PCB Diagram with Traces

Figure 5.4 - Top of Finished Board

Figure 5.5 - Bottom of Finished Board

Figure 5.6 - 19.4Vpp Signal at 200 Hz

Figure 5.7 - 22.6Vpp Signal at 1.6 kHz

Figure 5.8 - 19.8Vpp Signal at 18 kHz