DOUBLE FREQUENCY BUCKCONVERTER

Submitted in partial fulfillment of the requirementsfor the award of the degree of

Master of Technologyin

Applied Electronics & Instrumentationof

COLLEGE OF ENGINEERING,TRIVANDRUM

by

DIVYA R

Department of Electronics & Communication EngineeringCollege Of Engineering

Trivandrum 695 016

COLLEGE OF ENGINEERINGTRIVANDRUM

CERTIFICATE

Certified that this report titled DOUBLE FREQUENCY BUCKCON-VERTER is a bonafide record of the seminar done by DIVYA R, First SemesterM. Tech. Applied Electronics & Instrumentation , under our guidance and supervision,in partial fulfillment of the requirements for the award of the degree, M. Tech. AppliedElectronics & Instrumentation .

Guide Coordinator

Mrs.Shiny.G Dr.M.R.BaijuLecturer ProfessorDept. of Electronics & Communication Dept. of Electronics & Communication

Mr.S.ShabuProfessor & HODDept. of Electronics & Communication

ACKNOWLEDGEMENT

It is with great pleasure and pride that I present my work before you. At this momentof triumph, it would be unfair to neglect those who helped us in the successful comple-tion of our venture.

First I thank the Professor and Head of the Department of Electronics and Communi-cation Engineering, Mr.S.Shabu for providing us all the required facilities.

I am grateful to our seminar coordinator Dr.M.R.Baiju, Professor, Department ofElectronics and Communication Engineering for his valuable suggestions and guidance.

I express my sincere gratitude to my guide, Mrs.Shiny.G, Lecturer, Department ofElectronics and Communication Engineering who gave me consistent guidance and sup-port.

I also take this opportunity to thank all the Electronics department staff members,my parents and friends for their overwhelming and whole hearted encouragement andsupport.

Abstract

Buck converters are DC to DC step down converter. In power electronics mostconcerned tradeoff is improving efficiency and dynamics of converters. If increasingthe switching frequency, dynamics of power converters improved but its efficiency maybe decreases. For avoiding this problem we use double frequency buck converters. Itcontains two buck converter cell. One works at high frequency and another at lowfrequency. Thus one buck cell improves the efficiency and second one improves thedynamics of converters. Thus the converters operate at high frequency with out us-ing extra control circuits. It also improves the steady state and transient responsesthat are with low switching loss. The dynamics of output voltage dependent only onhigh frequency buck cell parameters and it is independent of low frequency buck cellparameters.

Contents

INTRODUCTION 2

1 INTRODUCTION 1

2 BUCK CONVERTER 32.1 Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3 DOUBLE FREQUENCY BUCK CONVERTER 6

4 PERFORMANCE EVALUATION 114.1 Steady-State Performance . . . . . . . . . . . . . . . . . . . . . . . . . 124.2 Transient Performance Analysis . . . . . . . . . . . . . . . . . . . . . . 124.3 Efficiency Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 CONCLUSION 15

6 Questions............. 17

1

List of Figures

2.1 Buck converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.2 scale=0.9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.3 The average model of buck converter with CCS . . . . . . . . . . . . . . 4

3.1 Double Frequency Buck Converter . . . . . . . . . . . . . . . . . . . . . 63.2 The status of switches S and Sa . . . . . . . . . . . . . . . . . . . . . . 73.3 (a) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.4 (b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.5 (c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.6 (d) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.7 Voltage and Current Waveform . . . . . . . . . . . . . . . . . . . . . . 10

4.1 CPM control diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.2 Output voltage waveform comparison in the steady state . . . . . . . . . 124.3 Output voltage transient response comparison. (a) Load step-up. (b)

Load step-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.4 Efficiency comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

report

2

Chapter 1

INTRODUCTION

The demand of high-performance power converter is increased dramatically withthe broadening of power converter’s application fields . In order to improve the tran-sient and steady state performance of power converters and to enhance power density,high switching frequency is an effective method. However, switching frequency risecauses higher switching losses and greater electromagnetic interference . This, in turn,limits the increase of switching frequency and hinders the improvement of system per-formance. Active and passive soft-switching techniques have been introduced to reduceswitching losses . While these can create more favorable switching trajectories for activepower devices, they will generally increase the complexity of control and sometimes areaffected by the variable input and output condition.In the trends of using power modules, space is limited for placing the added elements.The complexity of power stage and control circuit also reduces the reliability of soft-switched converters. Multi converter paralleling method, which employs low-powerconverters in parallel to enhance the power rating, has been proposed to enhance thepower processing capability . However, parallel operation has interaction problem thatcauses circulating current[1] . To avoid the circulating current, approaches such as iso-lation, high impedance, and one-converter approach are utilized. These efforts increasethe control complexity. The interleaving operation employs N converters to operate inparallel with interleaved clocks, so the total dynamics can reach higher performancedue to the fact that the equivalent frequency is N times the single converter frequency.Nevertheless, the circulating current phenomenon also exists.A single-phase boost-type zero-voltage-transition (ZVT) pulse width-modulated con-verter proposed in adopts an additional shunt resonant network to form an additionalBoost cell to realize soft switching of the main switches. However, the auxiliary switchesoperate in hard switch and high frequency. A similar topology of single-phase rectifieris given in, where total harmonic distortion of the input line current is reduced andthe efficiency improved. Its operation is different from the ZVT circuit. The boost-type topology, however, is not very effective to enhance the output voltage performancein that the capacitor ripple voltage is determined by the low frequency. Hence, thistopology is not suitable for improvement of dc output transient and steady state perfor-mances. Moreover, the main Boost circuit and the added cell are coupled, and the addedBoost cell has an effect on the inductor current input . Splitting the filter inductor ofbuck converter into two parts with added auxiliary active switch and diode has been

1

proposed to improve the output voltage response at load current step-down transientsituation, but not at load current step-up transient situation . Additional transformerand switches are needed to realize the improvement at step-up transient. To make thecircuits in and function as designed, it is required to detect the load transient event,then to trigger or shut down the auxiliary switch. This increases the complexity of thecontrol circuit. Moreover, oscillations at the output voltage occur due to the frequent onand off operations at each transient event. On the other hand, high-frequency switch-ing converter or linear power supply in parallel with low-frequency converter proposedin and enhances the output voltage response. Paralleling high-frequency converter ap-proach also requires the load transient information, while linear power supply methodsuffers from low efficiency. Moreover, the parallel structure brings about the circulat-ing current problem. Additional current sharing control is needed to overcome thisproblem.

2

Chapter 2

BUCK CONVERTER

A buck converter is a step-down DC to DC converter. This type of converter is aswitched-mode power supply that uses two switches ,a transistor and a diode and aninductor and a capacitor.The simplest way to reduce a DC voltage is to use a voltage divider circuit, but voltagedividers waste energy, since they operate by bleeding off excess power as heat; also,output voltage isn’t regulated (varies with input voltage). A buck converter, on theother hand, can be remarkably efficient (easily up to 95% for integrated circuits) andself-regulating, making them useful for tasks such as converting the 12-24V typicalbattery voltage in a laptop down to the few volts needed by the processor.The topology of a conventional buck converter is shown in Fig.2.1. In the steady state,the input (Uin) and the output (Uo) of the converter are governed by

Figure 2.1: Buck converter

2.1 Theory of Operation

The operation of the buck converter is fairly simple, with an inductor and twoswitches (usually a transistor and a diode) that control the inductor. It alternatesbetween connecting the inductor to source voltage to store energy in the inductor anddischarging the inductor into the load.

When the switch pictured above is closed (On-state, top of figure 2.2), the voltageacross the inductor is

UL = Uin − Uo (2.1)

The current through the inductor rises linearly. As the diode is reverse-biased bythe voltage source Uin, no current flows through it; When the switch is opened

3

Figure 2.2: The two circuit configurations of a buck converter: On state, when the switch is closed,and Off-state, when the switch is open.

(off state, bottom of figure 2.2), the diode is forward biased. The voltage across theinductor is UL = −Uo(neglecting diode drop). The current IL decreases.From these two relation we get

Uo = D · Uin (2.2)

Where D is the duty ratio. If the buck converter works in the continuous conductionmode, then the inductor current iL can be regarded as a current source. In eachswitching cycle, both the current flowing through the switch and the voltage across thediode are averaged. The average model of buck converter is shown in Fig. 2.3

Figure 2.3: The average model of buck converter with CCS

Excluding the added controlled current source (CCS) ILa, and its governing equationsare

IS = D · IL (2.3)

UD = D · Uin (2.4)

ID = (1 − D) · IL. (2.5)

To enhance the steady-state response and the transient response of the buck con-verter, the switching frequency should be increased; but higher switching frequencysteps up the switching loss dramatically. An CCS, which is in parallel with the loadterminal, is added to tackle this loss problem. Fig. 2.3 shows such modification. Theload current through the active switch is diverted by the CCS. The currents throughthe activeswitch and the diode can be expressed as

IS = D · (IL − ILa) (2.6)

4

ID = (1 − D) · (IL − ILa) (2.7)

5

Chapter 3

DOUBLE FREQUENCY BUCKCONVERTER

A novel converter topology to achieve high dynamic response and high efficiency ofbuck-type converters. This topology consists of a high-frequency buck cell and a low-frequency buck cell; and we call it the double frequency buck converter (DF buck).The current flowing through the high-frequency cell is diverted by the low frequencyone, which also processes the majority of the converter power. This current decreasesrapidly so that the high frequency cell can work at very high frequency to improvethe dynamic response. Furthermore, the efficiency is enhanced due to the low-currentprocessing requirement of the high frequency cell in the DF buck converter. Unlikethe parallel structure, the proposed converter does not incur the circulating currentproblemIt can be seen from (2.6) and (2.7) that when the load current and the CCS are thesame, both the currents through the active switch and the diode are nearly zero. Here,we propose to use a buck cell working at lower frequency to realize the CCS. The pro-posed converter is called the DF buck converter, because these buck cells work at twodifferent frequencies. Schematic of this DF buck converter is shown in Fig. 3.1.

Figure 3.1: Double Frequency Buck Converter

The cell containing L, S, and SD works at higher frequency, and is called the high-frequency buck cell. Another cell containing La, Sa, and Da works at lower frequency,and is called the low-frequency buck cell. The high frequency buck cell is used to en-hance the output performance, and the low-frequency buck cell to improve the converterefficiency. An active switch, instead of a diode as in the conventional unidirectional buck

6

converter, is employed to realize SD in the high-frequency buck cell. This active switchtransfers the energy stored in the low-frequency cell to the source during the transientstage of load step-down. It works complementarily with high-frequency cell switch S,and improves the transient response.The switch S is controlled to operate at the high frequency fh, and the correspondingswitching period is Tsh. On the other hand, the switch Sa is controlled to work at alow frequency fl, and the corresponding switching period is Tsl. Assume that the highfrequency is an integer multiples of the low frequency, i.e.,

fh = M · fl. (3.1)

At each low-frequency cycle, four switching states exist. Table I lists the switch-ing states according to the status of switches S and Sa. The state a denotes that

Figure 3.2: The status of switches S and Sa

both switches S and Sa are on. The equivalent circuit is shown in Fig. 3.3:(a). In a sim-ilar manner, the equivalent circuits of states b, c, and d are shown in Fig. 3.4:(b)-Fig.3.6(d), respectively.

Figure 3.3: (a)

The governing equations of state a are expressed as

uL = Uin − Uo (3.2)

diLdt

=uL

La

=(Uin − Uo)

La

(3.3)

uLa = 0 (3.4)

diLa

dt=

uLa

La

= 0. (3.5)

7

In this state, the voltage uL across the inductor L is positive, and the voltageuLa acrossLa is zero. Hence, the current iL flowing through L rises, and the current iLa

flowing through La does not change.

Figure 3.4: (b)

The governing equations of state b can be expressed by

uL = −Uo (3.6)

diLdt

=uL

L=

−Uo

L(3.7)

uLa = Uin (3.8)

diLa

dt=

uLa

La

=Uin

La

. (3.9)

At this state, the voltage uL across L is negative, so the current iL decreases.The voltage uLa across La is positive, and the current iLa flowing through La rises.

Figure 3.5: (c)

In state c, the equivalent circuit equations are derived as

uL = Uin − Uo (3.10)

diLdt

=uL

L=

(Uin − Uo)

L(3.11)

uLa = −Uin (3.12)

diLa

dt=

uLa

La

= −Uin

La

. (3.13)

The voltage uL across L is positive, so the current iL rises. Since the voltage uLa

across Lais negative, the current iLa through La decreases.

8

Figure 3.6: (d)

Finally, the equations of state d are

uL = −Uo (3.14)

diLdt

=uL

L=

−Uo

L(3.15)

uLa = 0 (3.16)

diLa

dt=

uLa

La

= 0. (3.17)

The voltage uL across L is negative, so the current iL flowing through L decreases.The voltage uLa across La is zero, and the current iLa flowing through La remains thesame.

From equivalent circuits, we find that the low-frequency buck cell does notaffect the output inductor voltage, which has the same waveform and value as thatof the conventional buck converter. That is, the voltage across the output inductor isUin − Uo when the switch is on, and is −Uo when the switch is off. The voltage andcurrent waveforms of DF buck in one low frequency cycle Tsl are shown in Fig. 3.7,where M = 4. In the conduction mode of low-frequency switch, the voltage across thelow-frequency inductor La alternates between zero and Uin. Thus, the equivalent slopeof the current iLa is positive. At the switch-off interval, uLa varies from zero to −Uin,the equivalent slope of iLa becomes negative. As a result, if we employ proper controlmethod, the low-frequency inductor can be controlled to follow the output inductorcurrent.

9

Figure 3.7: Voltage and Current Waveform

10

Chapter 4

PERFORMANCE EVALUATION

The current programmed mode (CPM) control circuit used to control the proposedDF buck converter is shown in Fig. 4.1. In the control diagram, the output voltage isfed back and compared with Uref . The quantity Rf · ic is used as the current referencefor the buck cells. The currents flowing through inductors L and La are expected to beequal to this reference value in the steady state. The low-frequency buck cell diverts thecurrent flowing through high-frequency switches S and SD. This control circuit, likestandard current mode control, does not need additional load transient information,which is not the case in other methods . Since no specific control circuit is required,complexity of the control circuitry of the DF buck converter is similar to that of theconventional buck converter. The implementation is simple and can be done by com-mercial CPM chips

Performance of the DF buck converter is evaluated by looking at the steady-state

Figure 4.1: CPM control diagram

and transient responses of three circuits: a DF buck, a single high-frequency buck con-verter whose switching frequency is the same as the higher frequency of DF buck, anda single low-frequency buck converter whose switching frequency is equal to the lowerfrequency of DF buck.

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4.1 Steady-State Performance

The output voltage waveforms of various buck converters are shown in Fig. 4.2.It can be seen that the steady state performance of DF buck and that of single high-frequency buck converter are almost the same.

Figure 4.2: Output voltage waveform comparison in the steady state

4.2 Transient Performance Analysis

This section investigates the transient response of the DF buck converter. If theload resistance is reduced from 2R to R, the load current will increase from 0.5 IR to IR.Since the currents through inductor L and La cannot change abruptly, at this transientinstant, the output voltage decreases due to the increased load current that is partiallysupplied by the output capacitor. The feedback control loop regulates the duty ratioof each buck cell to control the current of inductor L, iL, and the current of La,iLa. Itincreases the duty ratio of the highfrequency switch so that iL rises. Then, iLa risestoo.Note that the low-frequency inductance is selected to be larger than the high-frequencyone to reduce the current ripple of iLa. If the inductor has larger inductance, thecurrent flowing through it will have lower dynamic response speed with the same voltageexcitation. As shown in Fig. 3.7, when low-frequency switch is on, the average voltageapplied to low-frequency inductor is 1 - d times the input voltage Uin. This is the sameas the voltage across the high-frequency inductor, Uin−Uo, when high-frequency switchis on. On the other hand, when the low-frequency switch is off, the average voltageacross lowfrequency inductor is -d times Uin. This average voltage is also the same asthat across the high-frequency inductor when high-frequency switch is off. Hence, iLa

rises slower than iL. Moreover, the current through the high-frequency switch increasesmomentarily, but soon back to the steady state level due to the current feedback loop.If the load resistance is increased from R to 2R, then the load current will decreasefrom IR to 0.5 IR, so is the low-frequency inductor current iLa. At this moment, iLa

12

can freewheel through SD when the switch S is off. When S is on, the energy storedin iL can be fed back to the source via the switch S. As a result, the impact to outputresponse by the low-frequency inductor is largely alleviated. Fig.4.3 shows the outputvoltage waveforms of three different buck converters when the load changes.

Figure 4.3: Output voltage transient response comparison. (a) Load step-up. (b) Load step-down.

Where Fig. 4.3(a) is for the load change from 2 to 4Ω, and Fig. 4.3(b) is for the loadchange from 4 to 2Ω. It is observed that the DF buck and the single high-frequencybuck converters exhibit almost the same transient responses during load changing, andmuch better than the single low-frequency buck converter does.

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4.3 Efficiency Analysis

In order to analyze the efficiency improvement of the proposed DF buck converter,the efficiency expression is analyzed in the section. The analysis is also applied to thesingle highf requency buck and low-frequency buck converters. Various loss estimationmethods have been proposed in the literature based on different assumptions . A simpleloss model is adopted here in that we just want to show the efficiency relationshipbetween the DF buck and single high-frequency buck, not to develop a new loss model.In the analysis, we have the following assumptions.

1. ) The conduction losses of active switch and diode are estimated, respectively,according to their conduction voltages Uon and UF .

2. ) The switching transient processes are assumed to satisfy the linear current andvoltage waveforms. Moreover, the turn-on time ton is the same for all switches anddiodes, so is the turn-off time toff .

3. ) Since the switching loss usually dominates the total loss, losses of the outputcapacitor and output inductor are not calculated here.

Efficiency comparison among three converters is shown in Fig. 4.4. The efficiencywas calculated from the input power and the output power. Output power was variedfrom 10 to 50W.We observe that the efficiency of DF buck is very close to that ofthe low-frequency buck converter, and both produce efficiency higher than the high-frequency one. This means that DF buck can reach the dynamics of a high-frequencybuck converter, and the efficiency is also improved at the same time. Thus, the proposedDF buck converter can be applied in high-performance high-efficiency application fieldof power converters.

Figure 4.4: Efficiency comparison.

14

Chapter 5

CONCLUSION

This paper has presented a novel topology of DF buck converter. Analytical resultshas demonstrated that the DF buck not only exhibits the same steady state and tran-sient performance but also improves the efficiency of conventional buck converters. Theproposed converter does not need the load transient change information for accuratecurrent control and does not have the current circulating problem. Future work willinvestigate whether the proposed buck converter is applicable for high current or highdynamics specifications.

15

REFERENCES

[1] N. Mohan, T. M. Undeland, and W. P. Robbins,Power Electronics: Converters,Applications, and Design 3rd ed. New York: Wiley, 2003.

[2] C.T.Pan and Y.H.Liao Modeling and coordinate control of circulating currents inparrellel three phase boost rectifiers,IEEE Trans .Ind.Electronics., vol. 54, no. 2,pp. 825-838, Apr. 2007.

[3] G. C. Hua, C.-S. Leu, Y. Jiang, and F. C. Lee, Novel zero-voltagetransition PWMconverters IEEE Trans. Power Electron., vol. 9, no. 2,pp. 213219, Mar. 1994.

[4] Z. Ye, D. Boroyevich, J. Y. Choi, and F. C. Lee,Control of circulating current intwo parallel three-phase boost rectifiers,IEEE Trans. Power Electron., vol. 17, no.5, pp. 609-615, Sep. 2002.

[5] U. Borup, F. Blaabjerg, and P. Enjeti, ,Sharing of nonlinear load in parallel-connected three-phase converters, IEEE Trans. Ind. Appl., vol. 37, no. 6, pp. 1817-1823, Nov./Dec. 2001

16

Chapter 6

Questions.............

1. ) What are the disadvantages of DF Buck converter?Ans: Compair to other converter the performance of DF buck converter is better.ie; it has better steady state and transient perfomance and its efficiency is also.Thesize of DF buck converter is same as the ordinary buck converter.

2. ) How meny switches are used in single low frequency buck converter?Ans: Two switches,one is controlled swich ie;transister and one uncontrolled switchie; diode.

17