DEVELOPMENT OF SIMULATION MODEL OF THE ...shodhganga.inflibnet.ac.in/bitstream/10603/9782/7/...Chapter 4 Development of Simulation Model of the proposed SHAF for 100 Harmonic Mitigation

Chapter 4 Development of Simulation Model of the proposed SHAF for 100

Harmonic Mitigation in LV Power Distribution System

Ph.D Thesis submitted to Jawaharlal Nehru Technological University Anantapur, Anantapur.

CHAPTER 4

DEVELOPMENT OF SIMULATION MODEL OF THE

PROPOSED SHAF FOR HARMONIC MITIGATION IN

LV POWER DISTRIBUTION SYSTEM

4.1 INTRODUCTION

This chapter is dedicated to the development of MATLAB/Simulink

simulation model of the proposed three-phase shunt hybrid active power filter

(SHAPF) for harmonic mitigation in low voltage power distribution system. To begin

with, a low voltage test system model is developed using MATLAB/Simulink

environment, followed by the development of low voltage test system with proposed

shunt hybrid active filter compensation for harmonic mitigation. The development

details of all the blocks of the overall model are discussed part by part, starting with

voltage source inverter, VSI control strategy and tuned passive filter (TPF). In

addition, the development of basic shunt APF simulation model is elaborated. It is to

become the benchmark comparison for the proposed shunt hybrid APF topology.

4.2. MATLAB/SIMULINK SIMULATION MODEL OF LV TEST

SYSTEM WITHOUT ANY COMPENSATION

A low voltage test system with a three phase AC source connected to a three

phase nonlinear load through a distribution line is developed using

MATLAB/Simulink which is shown in Fig. 4.1. The development details of the

blocks of the LV test system are discussed in the following sections.




Fig. 4.1 Simulation model of LV test system.

4.2.1 Three Phase Distribution Source Model

The power distribution source developed in the simulation model is a 3-phase,

2000 V (rms), 50 Hz sinusoidal AC voltage source. It is developed using three single

phase „AC source‟ blocks from “SimPowerSystems/Electrical Source” library and

connected in star configuration as shown in Fig. 4.2. An inductance (Ls) is connected

in series with each phase to limit the inrush current and to represent combined

inductance of source and distribution line per phase. The Ls is constructed using

“Series RLC Branch” block set.




Fig. 4.2 Simulink model of “Three phase distribution source”

The selected value of Ls is 15 mH/phase. The current and voltage signals are

sensed using “Current Measurement” and “Voltage Measurement” block sets

respectively from “SimPowerSystems/ Measurements” library. Three phase AC

source is connected to a three phase diode bridge rectifier load through a distribution

line.

4.2.2 Three Phase Nonlinear Load model

Fig. 4.3 Simulink model of three phase nonlinear load block.




The simulink model details of the “Three phase nonlinear load” block are

shown in Fig. 4.3. It consists of a three-phase full-bridge diode rectifier constructed

using „Diode‟ blocks from Simulink library. A R-L load (R=20 ohm and L=0.1 mH)

is connected on DC side of the rectifier using „series RLC element‟ from

Simulink/elements library. This nonlinear load can produce harmonic current as most

of the power electronic equipment. Hence it is considered as nonlinear load in this

thesis.

4.3 MATLAB/SIMULINK MODEL OF LV TEST SYSTEM WITH

PROPOSED SHAF COMPENSATION

The complete MATLAB/Simulink simulation model of the LV test system

with the proposed shunt hybrid active filter compensation is depicted in Fig. 4.4. The

model consists of a low voltage test system connected to the „voltage source inverter

(VSI) block‟, „overall control system for VSI‟ block and „tuned passive filters‟ block

connected in parallel with the load. The development of simulation models of all the

blocks are explained in detail in the following sections.




Fig. 4.4 Simulation model of LV test system with proposed SHAF.




4.3.1 Development of VSI model with Interfacing Elements and DC

Bus Capacitor

The details of “Voltage Source Inverter ” block is illustrated in Fig. 4.5. The

VSI block consists of an “Universal Bridge” block set in which the MOSFETs with

anti-parallel diodes are configured in full bridge, interfacing inductor (Lf) and

capacitor (Cf) and a DC-bus capacitor (Cdc) are connected as shown in Fig. 4.5. The

design expression described in Chapter 3, Eqn.(3.8) is used to calculate the value of

Lf.

Fig. 4.5 Simulink model of “VSI” block.

The DC-bus reference voltage (Vdc) taken in the simulation is set to 4700V,

which is approximately one and a half times higher than the amplitude of source

voltage. The maximum switching frequency of the switching ripple (fsw,max) and peak-

to-peak switching ripple(∆Isw,p−p) of the compensation current are selected to be 2kHz

and 400A respectively.

Lf,min =Vdc

2. ΔIsw ,p−p . fsw ,max




=4700

2 ∗ 400 ∗ 2000= 2.93𝑚𝐻

Therefore, L f is chosen as 3 mH.

The DC-bus capacitor value is calculated using Eqn.(3.10), Chapter 3. The DC

bus capacitor design parameters are given by

Vs = 2000 V(rms), ΔIL= 280 A, T= 20 ms, Vdc,ref = 4700V

where Vs is the r.m.s value of the source voltage, ΔIL is the peak r.m.s value of the

reactive and harmonic load currents and T is the period of source voltage and ΔVDC is

the maximum or minimum DC-bus voltage.

Cdc ≥Vs .ΔIL . T

Vdcmax 2 − (Vdc ,ref )2

≥ 2 ∗ 2000 ∗ 260 ∗ 0.02

4794 2 − (4760)2

≥ 4527.6 µF

Therefore, the selected value for Cdc is 4600µ F.

4.3.2 Simulink Model of Overall Control System of SAF

Fig. 4.6 Details of “Overall Control System of SAF” block.




The “Overall Control System of SAF” block of the proposed scheme is

presented in Fig. 4.6. The task of the control system is to produce appropriate gating

signals for the switching transistors (MOSFETs) of SAF. It consists of three blocks

namely d-q-0 theory based “Compensation Current Reference Estimator”, “Hysteresis

Current Controller” based gating signal generator and fuzzy logic based “DC-bus

voltage controller”.

Simulink Model of Compensation Current Reference

Estimator Using d-q-0 Theory

In this thesis synchronous reference frame theory is employed to obtain

compensation current reference signal, since it deals mainly with DC quantities and

computation is instantaneous. The component diagram of synchronous reference

frame theory model is depicted in Fig. 4.7.

Fig. 4.7 Simulink model of d-q-0 theory based reference current estimator.

This control strategy uses „discrete PLL‟ block for generating sinusoidal

reference currents, „a-b-c to d-q-0 transformation‟ block for Park‟s transformation,




and d-q-0 to a-b-c transformation block for Inverse Park‟s transformation. Two

„second order digital low pass filter‟ blocks are used for extracting fundamental

component from load currents. From simulink block set “Discrete Phase-Lock Loop”

block is selected from “SimPowerSystems\Discrete Control Blocks” library and its

parameters are set as: Frequency = 50 Hz, Phase angle=0, Sampling frequency=

20 kHz. The “a-b-c to d-q transformation block” converts three phase a-b-c-reference

frame currents in to stationary d-q reference frame currents and applied to a “Discrete

2nd-Order LPF” block from “SimPowerSystems/Discrete Control Blocks” library for

noise filtering.

For the simulation model of Butterworth LPF, the design parameters are

selected as ζ = 0.707, fLPF= 75 Hz, fs= 40 kHz, where ζ is the damping ratio, fLPF is the

cut-off frequency and fs is the sampling frequency of the digital Butterworth LPF. The

low frequency fundamental components obtained from LPF are subtracted from non-

filtered signal and added to current signal obtained from DC bus voltage controller to

obtain compensation reference currents in d-q reference frame. By applying these

currents to “d-q-0 to a-b-c transformation block” the compensation reference currents

in a-b-c reference frame are obtained.

Simulink Model of Hysteresis Current Controlled Switching

Signal Generator

In this thesis Hysteresis band Current Controller model is used for generating

switching signals for the transistors of VSI, and is illustrated in Fig. 4.8.This current

control technique imposes a bang-bang type instantaneous control that forces the

compensation current to follow its estimated reference. The actual compensation

current is subtracted from its estimated reference. The resulting error is sent through a




hysteresis controller to determine the appropriate gating signals. In the simulation

model, the hysteresis band ( H ) is chosen as 0.1 A with 0.05 as upper limit and -0.05

as lower limit. The hysteresis controller is constructed using “Relay” block set from

“Simulink\Discontinuities” library as shown in Fig. 4.8.

Fig. 4.8 Simulink model of Hysteresis current controller for phase-a.

Simulink Model of Fuzzy Logic based DC-Bus Voltage

Controller

For maintaining DC bus voltage constant at a reference value, Fuzzy Logic

Controller (FLC) is employed in this simulation work. The details of the “Fuzzy logic

controller” block is shown in Fig. 4.9.

Fig. 4.9 Simulink model of Fuzzy logic controller.




The DC-bus voltage is first sensed and compared with DC reference voltage

and error signal is generated. The error signal and its derivative are applied to fuzzy

logic controller. Error signal is applied to “Memory” block and its output is subtracted

from the error signal to obtain derivative of error signal as shown in the Fig. 4.9.

The two inputs and the output use seven triangular membership functions

namely Negative Big (NB), Negative Medium(NM), Negative Small(NS), Zero(ZE),

Positive Small (PS), Positive Medium(PM), Positive Big(PB). The type and number

of membership functions (MFs) decides the computational efficiency of a FLC. The

shape of fuzzy set affects how well a fuzzy system of If–then rules approximate a

function. Triangles have been the most popular for approximating non-linear function

because the parametric functional description of triangular membership function is

most economic one. Also these are preferred because of their striking simplicity, solid

theoretical basis and ease of computation, since they are symmetrical and have zero

value at some point away from their center. Hence the triangular MFs are chosen in

this work.In this controller seven membership functions are considered which will

give precisely accurate results. Reducing the number of MFs will produce improper

results at some band, while increasing the number of MFs will produce a delay due to

more computational steps required. The linguistic variables are defined by M = (a, b,

c), where a, b, c are starting, middle point with unity membership grade, and end

points, respectively.

The membership values of input and output variables are shown in the

Fig. 4.10. Each input has seven linguistic variables, therefore there are 49 input label

pairs. A rule table relating each one of 49 input label pairs to respective output label

is given in Table 4.1. The type of fuzzy inference engine used is mamdani and the




centroid method is used for defuzzification.

Table.4.1 Fuzzy rule representation

4.10 (a)

e

de NB NM NS ZE PS PM PB

NB NB NB NB NB NM NS ZE

NM NB NM NM NM NS ZE PS

NS NB NM NS NS ZE PS PM

ZE NB NM NS ZE PS PM PB

PS NM NS ZE PS PS PM PB

PM NS ZE PS PM PM PM PB

PB ZE PS PM PB PB PB PB




4.10(b)

4.10(c)

Fig. 4.10 The degree of membership functions for (a) The error (b) The derivative of

error and (c) The output.

4.3.3 Simulink Model of Tuned Passive Filter

The details of Simulink model of “Tuned Passive Filter”(TPF) is depicted in

Fig. 4.11. The TPF consists two parallel connected single tuned passive filter

branches tuned to absorb 5th

and 7th

harmonic currents of the load current. The 5th

order filter consists a series R-L-C branch with a capacitor (C5), inductance (L5) and

resistance (R5) and 7th

order filter consists R7, L7 and C7 in series as shown in

Fig.4.11. The TPF is connected in parallel with the load.




Fig. 4.11 Simulink model of tuned passive filter block.

The design procedure of the TPF is described in Chapter 3, Eqn.(3.18). For 5th

harmonic filter the resonance frequency is 250Hz and for 7th

harmonic it is 350Hz.

Quality factor of the filter is selected as 75[4] and the filter capacitance value is fixed

at 30µF. The calculated values of the TPF parameters are R5=0.2829Ω, L5=

13.504 mH, C5 =30µF, R7= 0.2021Ω, L7= 6.892 mH, C7 =30µF.

4.4 MATLAB/SIMULINK MODEL OF LV TEST SYSTEM WITH

BASIC SAF COMPENSATION

A basic shunt APF simulation model constructed under MATLAB/Simulink

environment is illustrated in Fig. 4.12. It is used as a benchmark to investigate the

improvement in harmonic mitigation by the proposed Shunt hybrid APF. The SAF

consists of distribution source, nonlinear load, VSI with DC side capacitor and overall

control system. The simulation model of the basic SAF is similar to the model of the

proposed SHAF topology presented in Fig. 4.4, except for the removal of “TPF”




block. Therefore, the descriptions given in Section 4.3 are also applicable for the basic

shunt APF except the simulation model of TPF. The basic SAF is configured to

generate compensation current equal to the reactive and harmonic load current.

Fig. 4.12 Complete simulation model of the basic SAPF.




4.5 CONCLUSION

The complete MATLAB/Simulink simulation model of the proposed shunt

hybrid active filter is presented. The model is discussed part by part, starting with the

development of distribution source, nonlinear load, VSI, tuned passive filter (TPF)

until the development of the overall control system. Furthermore, a basic shunt APF

simulation model is developed as a benchmark. The simulation results of test system

with SAF and with SHAF compensations are analyzed and compared in Chapter 6,

section 6.2.

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DEVELOPMENT OF SIMULATION MODEL OF THE ...shodhganga.inflibnet.ac.in/bitstream/10603/9782/7/...Chapter 4 Development of Simulation Model of the proposed SHAF for 100 Harmonic Mitigation