DESIGN OF BROADBAND VECTOR-SUM PHASE

SHIFTERS AND A PHASED ARRAY DEMONSTRATOR

WINSON LIM

Bachelor of Engineering (Hons), NUS

A THESIS SUBMITTED

FOR THE DEGREE OF MASTER OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

NATIONAL UNIVERSITY OF SINGAPORE

2013

ii

DECLARATION

I hereby declare that the thesis is my original work and it has been written by me in its

entirety. I have duly acknowledged all the sources of information which have been used in

the thesis. This thesis has also not been submitted for any degree in any university

previously.

_________________

Winson Lim

7th

September 2013

iii

Acknowledgements

I thank Dr. Koen Mouthaan and Dr. Tang Xinyi for their guidance in my research and the

MMIC lab for providing the facilities to carry out my research. I also thank my family for

their kind understanding to allow me to pursue my research studies.

iv

Table of Contents

Summary ........................................................................................................................................ vi

List of Tables................................................................................................................................. vii

List of Figures .............................................................................................................................. viii

Chapter 1 - Introduction .................................................................................................................. 1

1.1 Motivation ........................................................................................................................ 1

1.2 Thesis objectives .............................................................................................................. 5

1.3 Thesis organization .......................................................................................................... 5

1.4 List of publications ........................................................................................................... 6

Chapter 2 - Phase Shifters ............................................................................................................... 7

2.1 Introduction ...................................................................................................................... 7

2.2 Reflection type phase shifters .......................................................................................... 8

2.3 Switched network phase shifters ...................................................................................... 9

2.4 Loaded-line phase shifters.............................................................................................. 11

2.5 Vector sum phase shifter ................................................................................................ 13

2.5 Discussions ..................................................................................................................... 14

Chapter 3 - Vector sum phase shifter ............................................................................................ 16

3.1 Introduction .................................................................................................................... 16

3.2 Literature review of vector sum phase shifter ................................................................ 17

3.3 Fundamental design of an I/Q network vector sum phase shifter .................................. 20

3.4 Proposed design and implementation of wideband VSPS at VHF band ....................... 21

3.1.1 Experimental setup ................................................................................................... 26

3.1.2 Experimental results ................................................................................................. 28

3.5 Conclusions and recommendations ................................................................................ 30

Chapter 4 - Vector sum phase shifter (L–Band design) ................................................................ 32

4.1 Introduction .................................................................................................................... 32

4.2 Proposed design and considerations at L-band .............................................................. 33

4.3 Modification of topology using simulation results ........................................................ 34

4.3.1 Experimental setup ................................................................................................... 37

v

4.3.2 Experimental results ................................................................................................. 41

4.4 Conclusions and recommendations ................................................................................ 44

Chapter 5 - Phased array antenna system demonstrator................................................................ 46

5.1 Introduction .................................................................................................................... 46

5.2 Design and implementation of wideband phased array demonstrator ........................... 47

5.3 Experimental setup of the phased array demonstrator ................................................... 48

5.4 Experimental results of the phased array demonstrator ................................................. 52

5.5 Conclusions and recommendations ................................................................................ 54

Chapter 6 - Conclusions and Future Works .................................................................................. 56

6.1 Conclusions .................................................................................................................... 56

6.2 Recommendations .......................................................................................................... 59

References ..................................................................................................................................... 60

Appendix A: (VHF band) Datasheet information for COTS components used ........................... 63

Appendix B: (L band) Datasheet information for COTS components used ................................. 65

Appendix C: Datasheet information for patch antenna ................................................................. 67

Appendix D: Further readings ....................................................................................................... 69

vi

Summary

Phased array antenna systems provide significant advantages and are used in

modern radar and wireless communication systems. Phase shifters are one of the key

components in electronically steered phased array antennas. There are a few phase shifter

topologies but the vector-sum phase shifter (VSPS) topology can generally provide a 360º

higher resolution performance.

Vector-sum phase shifters (VSPS) are usually narrowband and the phase and

amplitude error increase as the bandwidth widens. Designs have been explored to increase

the bandwidth of VSPS with low Root-Mean-Square (RMS) phase and amplitude error

using commercial-off-the-shelf components on printed circuit board (PCB). In addition,

other S-parameters like return losses, gain variation over frequency were also analyzed and

improved.

In this thesis, a wideband VHF VSPS has been designed for a bandwidth ratio of up

to 20:1 with desirable RMS phase error for a 3-bit phase shifter. The realized example

demonstrates a measured input return loss larger than 15 dB, amplitude imbalance less

than 1 dB and RMS phase error less than 1.5º from 10 to 100 MHz. For the wider

frequency range of 10 to 200 MHz, the measured input return loss is larger than 10 dB,

amplitude imbalance less than 2.5 dB and RMS phase error less than 5º.

Broadband L-band VSPS is then also designed to cover the entire L-band and also

improve on the S-parameters. Measured input and output return losses are larger than 18

dB and 25 dB respectively from 1 to 2 GHz. The gain variation is about 2 dB, amplitude

imbalance less than 1.5 dB and the RMS phase error less than 2.5º.

Lastly, a 4-element phased array demonstrator using the L-band VSPS has been

built and has successfully demonstrated beam steering capability at 1.8 GHz.

vii

List of Tables

Table I Performance comparison of phase shifters using discrete components on PCB .............. 31

Table II Performance comparison of phase shifters using discrete components on PCB ............. 45

viii

List of Figures

Figure 1-1: Basic scanning array architectures. (a) Linear passive array with phase shifters

for every element. (b) An active array with TRMs at every element (taken from [1]). .2

Figure 1-2: Active array systems architecture. ......................................................................3

Figure 2-1: Block diagram of a typical RTPS. .......................................................................8

Figure 2-2: Block diagram of a SNPS using difference in electrical lengths. .......................9

Figure 2-3: Block diagram of a SNPS using two networks. ................................................10

Figure 2-4: Third order high-pass/low-pass phase shifter. ...................................................10

Figure 2-5: Loaded line phase shifter [31]. ..........................................................................11

Figure 2-6: Bandwidth versus the phase shifts for different phase errors and return losses

of the lumped element loaded Class III phase shifters [31]. ........................................12

Figure 2-7: Block diagram of a typical VSPS. .....................................................................13

Figure 3-1: Block diagram of VSPS with base vectors generation network........................17

Figure 3-2: Vector sum phase shifter using polyphase filter network (taken from [48]). ...18

Figure 3-3: VSPS realizing 0º and 90º base vectors using APN (taken from [16]). ............19

Figure 3-4: Block diagram of a basic I/Q network vector sum phase shifter. .....................20

Figure 3-5: Proposed design of wideband VSPS. ................................................................21

Figure 3-6: Phase of simulated setup in ADS using ideal blocks. .......................................22

Figure 3-7: AD835 Analog multiplier connected as wideband VGA [Appendix A]. .........23

Figure 3-8: Amplitudes and polarities of 3 bit phase states. ................................................24

Figure 3-9: Simulated 3 bit phase shifts. ..............................................................................25

Figure 3-10: Simulated RMS phase error. ...........................................................................25

Figure 3-11: Photo of the fabricated phase shifter (8.4cm x 7.8cm)....................................26

Figure 3-12: Photo of the VSPS casing of 4 cm height. ......................................................27

Figure 3-13: Casing resonances using Sonnet: | |. ..........................................................27

Figure 3-14: Measured input return loss. .............................................................................28

Figure 3-15: Measured phase shifts of 3 bit VSPS. .............................................................29

Figure 3-16: Measured insertion loss of fabricated phase shifter for 8 phase states............29

Figure 3-17: Simulated and measured RMS phase error. ....................................................30

ix

Figure 4-1: Proposed design of VSPS using analog multiplier circuits. ..............................32

Figure 4-2: Analog multiplier circuit (Topology 1). ............................................................33

Figure 4-3: Simulated S-parameters of VSPS (Topology 1). ..............................................34

Figure 4-4: Simulated RMS phase error of topologies 1 and 2............................................35

Figure 4-5: Modified voltage multiplier circuit (Topology 2). ............................................35

Figure 4-6: VSPS using analog multiplier circuit topology 2 and attenuator. .....................36

Figure 4-7: Simulated S-parameters (Topology 2). .............................................................36

Figure 4-8: Photo of the modular VSPS using ADL5391 evaluation boards. .....................37

Figure 4-9: Circuit of the fabricated VSPS. .........................................................................38

Figure 4-10: Fabricated PCB substrate for the VSPS (front side). ......................................39

Figure 4-11: Fabricated PCB substrate for the VSPS (back side). ......................................39

Figure 4-12: Photo of the fabricated phase shifter (6.4 cm x 4.3 cm)..................................40

Figure 4-13: Metallic casing of height 4 cm and lowest box resonance at 4250 MHz. .......41

Figure 4-14: Measured |S11| and |S22|. ..................................................................................42

Figure 4-15: Measured insertion loss of fabricated VSPS for all 8 phase states. ................42

Figure 4-16: Measured phase shifts of 3 bit VSPS. .............................................................43

Figure 4-17: Simulated and measured RMS phase error. ....................................................43

Figure 5-1: Beam steering of main-lobe towards the target of interest................................46

Figure 5-2: Block diagram of phased array demonstrator and the 360º VSPS. ...................48

Figure 5-3: Photo of the phased array demonstrator. ...........................................................49

Figure 5-4: Photo of the DAC AD5390 control of 8 analog voltages for beam steering. ...50

Figure 5-5: Radiation pattern and specifications of ZDAD17002500-8 [Appendix C].......50

Figure 5-6: Interior structure of the patch antenna...............................................................51

Figure 5-7: Photo of the array of patch antennas. ................................................................51

Figure 5-8: Experimental Setup for measurements. .............................................................52

Figure 5-9: Radiation beam pattern at progressive 0° phase shifts. .....................................53

Figure 5-10: Radiation beam pattern at progressive 45° phase shifts. .................................53

Figure 5-11: Radiation beam pattern at progressive 90° phase shifts. .................................54

1

Chapter 1 - Introduction

1.1 Motivation

Beam scanning capabilities of phased array antennas provide significant system

advantages and thus are used by the military and industry in various modern radars and

wireless communication systems for space, airborne, surface and ground-based

applications. There are generally two types of phased arrays: passive and active phased

arrays. In passive phased arrays, antenna elements have a central transmitter/receiver (T/R)

and a power distribution network. There is generally no element amplitude control [1]. In

active phased arrays, each of the antenna elements or sub-arrays has its own T/R module

(TRM) and is able to provide complete flexibility in amplitude and phase control for both

transmit and receive. Another advantage of the active array is that the system sensitivity is

increased because the system noise figure is set and the RF power is generated at the

aperture. A second advantage of an active array is that the feed networks need not be

optimized for lowest loss; thereby allowing design flexibility and the ability to minimize

size (volume) and weight. Of course, these performance improvements come with

increased array complexity and cost. Thus comparing with passive arrays, active arrays can

provide added system capability and reliability but are generally more complex and

expensive.

As the technology of integrated circuits matures, it is now possible to integrate the

whole RF TRM into a single monolithic microwave integrated circuit (MMIC) which

reduces the cost of the active phased arrays [2], [3]. With the advent of technologies such

as CMOS and BiCMOS, reliable low-cost commercial-off-the-shelf (COTS) components,

automated assembly of microwave components, and low-cost high-speed high-throughput

2

digital-processors, active arrays systems are becoming the preferred option for many radar

systems and communication systems requiring rapid scanning [4], [5] shown in figure 1-2.

Figure 1-1: Basic scanning array architectures. (a) Linear passive array with phase shifters for every element.

(b) An active array with TRMs at every element (taken from [1]).

3

Figure 1-2: Active array systems architecture.

A phased array is an array of antenna elements spaced apart in one, two or three

dimensions to form the antenna beams in which the relative phases of the respective

signals feeding the antennas are varied in such a way that the effective radiation pattern of

the array is reinforced in a desired direction and suppressed in undesired directions [6].

Unlike conventional mechanically rotated antennas, the direction and the shape of the

antenna beam can be controlled electronically. By constructive or destructive combining of

the energy of each antenna element with different weight vectors, the antenna beams are

steered and shaped. The speed of beam steering and beam shaping is determined by the

switching speed of the circuits [7].

Another benefit of phased array antennas is the capability to simultaneously process

multiple functions at different frequencies [8]. To increase the functionality and capability of

the phased array antennas further, broadband performance is highly desirable. In active phased

array front-ends, possible fundamental control elements include attenuators and phase shifters.

Attenuators can achieve very broad bandwidths because they are resistive networks which are

frequency independent. However, insertion loss can be much higher if attenuators are used. As

for broadband phase shifters, they are more difficult to design. In addition, phase-shifter

4

critical design parameters include RF insertion loss, phase error, amplitude variation with

phase shift, switching times, power-handling capability, and the power required to shift the

phase. Also important are the size and weight of the phase shifter and its control circuits.

There is no one type of phase shifter that has desirable properties for all of these

parameters [9] and design research can be explored to improve on this.

As mentioned earlier, a key essential component of an active phased array antenna

is the phase shifter. To scan to an angle off boresight, a differential phase shift between

elements is required. It is convenient to quantize the 360 differential phase shift into

discrete increments. For example, a 5-bit phase shifter has phase increments of 11.25º. The

32 different phase increments can be realized by cascading five phase shifters with the

differential phase increments of 11.25º, 22.5º, 45º, 90º, and 180º and then switching each

differential phase shift bit in and out as appropriate to realize the desired beam steering

angle. Such digital phase shifters are most appropriate for active phased arrays because

they are controlled easily by a special-purpose digital computer (the beam-steering

controller). However, advanced precise phased array systems with a limited number of

elements and very low side lobes require phase shifters of high resolutions [10]. The high

phase resolution is very difficult to achieve with phase shifters, such as reflection type

phase shifters (RTPS) [11], [12], switched network phase shifters (SNPS) [13], [14], due to

accumulation of phase errors. The vector-sum phase shifter, which applies a variable and

adjustable phase shift to an arbitrary RF signal over a finite bandwidth, is able to provide a

phase shift of full 360° with high resolution at microwave frequencies since they have

excellent amplitude and phase balance over a wide bandwidth [15], [16]. Thus, research

can be done to improve the vector sum phase shifter to meet other desirable properties over

a wide bandwidth i.e. insertion loss and amplitude variation over a wide bandwidth.

5

1.2 Thesis objectives

The intention of this work is to explore the vector sum phase shifter topology to

design a low cost broadband phased array antenna system through the use of affordable

commercial-off-the-shelf (COTS) components. Improvement of phase-shifter critical

design parameters of the phase shifter such as RMS phase error, RF insertion loss,

amplitude variation and insertion losses are explored in this work. The thesis is divided

into two parts. The first part consists of the study and analysis of broadband phase shifters

like the vector-sum phase shifter which allows high phase resolution with low RMS phase

errors. Such broadband vector-sum phase shifters are then designed and improved using

Agilent’s Advanced Design System (ADS) in two frequency bands namely the VHF band

and the L-band. The two designs are implemented using COTS components on printed

circuit boards. The second part demonstrates a 4-element phased array demonstrator using

the L-band vector-sum phase shifter. Beam steering capability is shown with easy control

through the use of a DAC which interfaces with a special-purpose digital computer (the

beam-steering controller).

1.3 Thesis organization

Following the introduction, chapter 2 discusses some of the basic topologies and

operation of phase shifters and their key differences. Chapter 3 introduces a literature

review of the vector sum phase shifter. The fundamental design of an I/Q network vector

sum phase shifter is also discussed. With the advent of high frequency analog multipliers,

the design of VSPS using analog multipliers for proper polarity and amplitude control is

introduced and the design has been implemented using COTS components on printed

circuit board (PCB) at both VHF band and L-band. The performance of the vector sum

phase shifters are tabulated in a table. A literature survey of phase-shifter critical design

parameters from the published papers is provided in the table to compare with the two

implemented designs. Chapter 4 introduces the elemental L–band vector sum phase shifter

6

and the 4-element phased array demonstrator setup. The beam steering controller of the

phased array demonstrator will be introduced which allows more precise and faster control

of the demonstrator. Anechoic chamber measurements of the beam steering capability of

the demonstrator are shown. Lastly, Chapter 5 summarizes the research and provides

recommendations for future work.

1.4 List of publications

Conference papers

W. Lim, X. Tang, K. Mouthaan, "L-band 360º vector-sum phase shifter using

COTS components," Microwave Conference Proceedings (APMC), 2012 Asia-

Pacific, pp. 100-102, 4-7 Dec. 2012.

W. Lim, X. Tang, K. Mouthaan, "A 10-200 MHz 360º vector-sum phase shifter

using COTS components for wideband phased array systems," International

Wireless Conference (IWC), 2013 Beijing, 13-18 Apr. 2013.

W. Lim, X. Tang, K. Mouthaan, "L-band 360º vector-sum phase shifter using

COTS components for 4-element phased array demonstrator," 3rd

Sondra

Workshop, 2013 Hyères (France), 10-14 Jun. 2013.

7

Chapter 2 - Phase Shifters

2.1 Introduction

Phased array antenna systems provide beam steering capabilities. The three basic

electronic beam steering techniques are phase, frequency, and electronic feed switching. In

applications where wideband waveforms are required, phase steering is a preferred option.

Phase shifters are generally easier and less costly to implement than programmable true

time-delay elements.

An ideal phase shifter is a two-port device whose insertion phase can be changed

while its insertion loss remains the same. Assume the reference state has an insertion phase

of , and the phase shifting state has an insertion phase of , the phase shift is the phase

difference between the two states.

(2-1)

Generally for phase shifters with multiple phase states, the phase shift refers to the

phase change with respect to a reference phase state. In the following, four commonly used

types of phase shifter topologies are reviewed: reflection type phase shifters, switched

network phase shifters, loaded-line phase shifters, and vector-sum phase shifters.

8

2.2 Reflection type phase shifters

The reflection type phase shifter (RTPS) can be either digital or analog and some

ways of implementing the reflection network include using a four-port quadrature coupler

with two variable terminations. A simple reflection type phase shifter is shown in figure 2-

1. An equal-split quadrature coupler divides the input signal into two signals 90º out of

phase. These signals reflect from a pair of switched loads and combine in phase at the

phase shift output as long as the loads are identical in reflection coefficient. Only one

control signal is required for such a phase shifter since the loads can be biased

simultaneously.

Figure 2-1: Block diagram of a typical RTPS.

The bandwidth of the reflection type phase shifter is determined by both the

coupler and the terminations. An example is demonstrated in [17] where broadband

terminations are used, but the slot fin-line coupler limits the bandwidth to 15% only. The

reported bandwidth using a branch line coupler is from 20% to 25% [18], [19]. Lange

couplers can provide a large bandwidth but the bandwidth of the phase shifter is then

limited by the terminations [12].

9

Broadband analog reflective phase shifters face the problem of achieving a large

phase shift range of 360º. Research has been done to increase the phase shift range for a

single section reflective phase shifter but the overall phase bandwidth will be reduced [20]

- [22].

2.3 Switched network phase shifters

A general switched network phase shifter (SNPS) is shown in figure 2-2. The

difference in the electrical lengths of the reference arm and the delay arm can easily be

computed for the phase shift. SPDT switches can be realized in a wide variety of ways

using FETs, diodes, or micro-electro-mechanical system switches. The insertion loss of a

switched network phase shifter is dominated by the switch losses.

Figure 2-2: Block diagram of a SNPS using difference in electrical lengths.

There are many developments in this type of phase shifter because of the numerous

ways to create a difference in phase between the two arms using different network

combinations. Instead of using general electrical lengths, different passbands of different

networks are used to obtain phase difference between the two arms as shown in figure 2-3.

One of the popular topologies for such networks phase shifters is the high-pass/low-pass

phase shifter.

10

Figure 2-3: Block diagram of a SNPS using two networks.

In [23], a bandwidth of nearly an octave is achieved and if more stages of high-

pass/low-pass networks are used, larger bandwidth can be realized. However, the circuit

area will increase and delicate tuning of the components in both arms is required. This is

due to the increased number of components like inductors and capacitors which have

variances in their performances.

Figure 2-4: Third order high-pass/low-pass phase shifter.

This topology also allows for large phase shift requirements. Examples using the

HP/LP circuits to provide the required phase difference include the TX-RX switches with

leakage cancelation [24] and the broadband multi-port direct receiver [25].

11

2.4 Loaded-line phase shifters

The concept of the loaded-line phase shifters is to use the loads to change the

electrical length of a fixed transmission line. And therefore, it is a transmission type phase

shifter. The topology is shown in Fig. 2-5.

Figure 2-5: Loaded line phase shifter [31].

The loads inserted at the two ends of the transmission line can be controlled

digitally to change the electrical length of the center line with impedance of and

original electrical length of θ. In an analog phase shifter, the loads are controlled

continuously. However, the perfect matching condition may not be always met. Here we

are discussing a binary phase shifter with two possible load states: and . When the

loss of the loads is neglected, the insertion phase (i=1, 2) can be obtained from [26]:

, i = 1, 2 (2-2)

Therefore, when changes to , the phase shift can be obtained from (2-1). Based

on this prototype, the analysis for different loads and switching components are provided in

detail in [27]-[31]. Three different classes with nonzero and unequal loads (Class I), load-

unload loads (Class II) and complex-conjugate loads (Class III) are concluded in [31]. It is

12

found that the loaded line phase shifter has the largest bandwidth and perfect matching at the

center frequency for Class III when the original electrical length of θ is around 90º. The design

parameters can be obtained from

(

) (2-3)

(

) i = 1,2 (2-4)

This topology cannot be used for 180º phase shifters due to the extreme values

from (2-4). When the design parameters are obtained, the return loss and phase error can

be written as a function of the normalized frequency. Therefore, the return loss bandwidth

( ) and phase error bandwidth ( ) are related to the phase shift values. The

relations for Class III loaded-line phase shifters with discrete loads are plotted in figure 2-6

for phase shift ranges from 5º to 120º.

Figure 2-6: Bandwidth versus the phase shifts for different phase errors and return losses of the lumped

element loaded Class III phase shifters [31].

From figure 2-6, the overall bandwidth of the loaded-line phase shifter is mainly

limited by the return loss when the required phase shift increases. For example, when the

13

phase shift is 90º, the 4º (±2º) phase error bandwidth is 35% while the 15 dB

is 14%, and the overall bandwidth is limited to 14% when the required return loss is 15 dB.

The larger the phase shifts the smaller the bandwidth is. At 120º phase shift, the bandwidth

is at around 10 – 20%. This property does not allow the loaded-line phase shifter to

achieve 360º phase control with broad bandwidth.

2.5 Vector sum phase shifter

Figure 2-7: Block diagram of a typical VSPS.

The vector based phase shifter first generates base vectors, and then combines the

vectors with different amplitude weights to achieve different phase shifts. The concept is

shown in figure 2-7. There are various methods to realize the base vectors 0º and refº such

as using the quadrature coupler which results in 0º and 90º base vectors. Due to such

flexibility, the vector sum phase shifter has potential for a small circuit size. However,

these methods to realize the base vectors usually limit the bandwidth of the vector sum

phase shifter.

Some other considerations include the power consumption, power handling

capability, reciprocity and the linearity of the phase shifter because vector sum phase

shifters require variable gain amplifiers (VGAs) and digital-to-analog converters (DACs)

14

to control the weighting of the vectors which consume extra power as compared to

conventional phase shifter designs.

2.5 Discussions

Phase shifters are the most essential elements in electronic beam-steering systems

such as phased-array antennas. In the past, various phase shifter topologies were developed

with different emphasis: to minimize the circuit area, to maximize the operation bandwidth, to

minimize the insertion loss and its variation, etc. This chapter reviews four most important

phase shifters including the reflection type phase shifter, the switched network phase shifter,

the loaded-line phase shifter and the vector sum phase shifters.

The loaded-line phase shifter has the narrowest bandwidth while the other three types

can have comparable bandwidth. However, the loaded-line topology has promising

performance for millimeter wave implementations because of its simple structure.

There is high design flexibility in the switched network phase shifters as various types

of high-pass and low-pass networks can be used in the design. For low frequency designs, the

lumped elements can be used and for high frequency designs, the distributed networks can be

used. However to increase the bandwidth, higher order networks are required. This increases

the number of discrete components which increases the circuit size and intrinsic parameter

error which requires delicate tuning.

The reflection type phase shifter can achieve a large bandwidth if both the coupler and

the terminations have wide bandwidths. However, it is not a good option for low frequency

designs or extremely high frequency designs. For low frequency designs, the broadband

coupler consumes a large area. For high frequency design up to 80 GHz, the Lange coupler is

difficult to implement due to the extremely narrow lines required and the associated high loss.

Branch line couplers can be used for high frequency designs. However, the broadband

characteristics of the reflection type phase shifter are eliminated.

15

The vector sum phase shifter can be used for low frequency and high frequency

designs and may lead to very compact circuits. It can also provide continuous phase shifts over

wide operation bandwidths. However, the power consumption and the linearity should also be

considered as VGAs and DACs are required for the weighting of the base vectors.

16

Chapter 3 - Vector sum phase shifter

3.1 Introduction

Compared to passive designs, active phase shifters [32]–[39] in which phase shifts

are obtained by the role of transistors rather than passive networks, can achieve a high

integration level with decent gain and accuracy along with a fine digital phase control

under a constrained power budget. Although sometimes referred to differently as an

endless PS [32], a programmable PS [33], a Cartesian PS [35], or a phase rotator [36], the

underlying principle for all cases is similar and are thus categorized as vector-sum phase

shifters. The underlying principle is to weigh the phases of two input signals through

adding the base vector inputs for synthesizing the required phase. The different amplitude

weightings between the base vector inputs result in different phases. Thus, the basic

function blocks of a typical active phase shifter are composed of a base vectors generation

network, a power combiner, and control circuits which set the different amplitude

weightings of the base vectors in the power combiner for the necessary phase bits.

After the introduction, chapter 3 provides a literature review of the vector sum

phase shifter and the implementation of a wideband vector sum phase shifter at the VHF

frequency band using analog multipliers. A literature survey table is also provided on the

phase shifter performances from the past published papers as compared to the implemented

vector sum phase shifter.

17

3.2 Literature review of vector sum phase shifter

Figure 3-1: Block diagram of VSPS with base vectors generation network.

As seen from the block diagram in figure 3-1, the basic function blocks of a typical

active vector sum phase shifter are composed of a base vectors generation network, a

power combiner, and control circuits such as VGAs and DACs, which set the different

amplitude weightings of the base vectors in the power combiner for the necessary phase

shifts.

The commonly used phase difference between the base vectors can be around 90º

where four vectors are needed [32]-[43], or around 120º where three vectors are needed

[44], [45]. The 90º phase difference is mainly realized using combiners [32], directional

couplers, RC-CR network [46], poly-phase filter networks [47], [48], and all-pass

networks [16], [42] and [49] while the 120º phase difference is mainly realized using HP/LP

filters and all-pass networks. The main advantage of investigating the use of more complex

base vector generation networks like the poly-phase filter networks and the all-pass networks is

to maximize the potential for more wideband and accurate base vectors phase and amplitude

splitting.

For base vectors generated by poly-phase filter networks, multiple RC stages are

necessary to improve both the amplitude and phase variation over frequency. This results in

larger size, wiring complexity and increase of insertion loss as the number of stages increases

18

as can be seen in figure 3-2. As for the base vectors generated using all-pass networks as seen

in figure 3-3, they are also complex in wiring and larger in size because multiple components

like inductors are required in the network. To enhance the bandwidth of the 90º phase

difference with low RMS phase and amplitude error, different networks such as modified poly-

phase filters and all-pass networks have been implemented. Although such networks have

improved the bandwidth of the phase and amplitude error of the generated I-Q base vectors,

the bandwidths of the vector sum phase shifters are still commonly limited by the bandwidth of

the return losses. The phase shift responses are quite smooth over a multi-octave band while

the return losses are around an octave or less [16], [42], and [43]. As for the quadrature hybrid

coupler, although it has a narrower phase shift response bandwidth of around an octave or less,

its design is less complex and implicitly allows for similar bandwidth of input return loss of the

vector sum phase shifter.

Figure 3-2: Vector sum phase shifter using polyphase filter network (taken from [48]).

19

Figure 3-3: VSPS realizing 0º and 90º base vectors using APN (taken from [16]).

20

3.3 Fundamental design of an I/Q network vector sum phase shifter

Figure 3-4: Block diagram of a basic I/Q network vector sum phase shifter.

Based on the literature review discussed earlier, vector-sum phase shifters have

been widely designed with the use of various I/Q networks. As shown in figure 3-4, this

phase shifter generally includes an input I/Q network which splits the incident signal into

two paths with a 90º phase difference i.e. the I- and Q- vectors. Each path then uses an

amplitude control element, such as a VGA provides proper polarities and amplitude

weightings. The two signals are then combined by an in-phase power combiner. The VSPS

allows control of the phase of its output signal through DC control voltages. The vector-

sum phase shifter allows a continuous phase shift and thus continuous beam steering

control. This topology will be used for the design and implementation of the works in this

report. The use of a less complex I/Q network, such as the quadrature hybrid coupler, will

be explored because of its advantage of minimizing the number of discrete components

while maintaining similar input return loss bandwidth for the vector-sum phase shifter.

21

3.4 Proposed design and implementation of wideband VSPS at VHF band

Figure 3-5: Proposed design of wideband VSPS.

The proposed design of the vector sum phase shifter is shown in figure 3-5. The

input signal can be expressed as:

(t) = sin(ωt) (3-1)

where ω is the angular frequency of the input signal. The output of the phase shifter is

then the sum of these two signals as shown in the expression below

Vout(t) = I • + Q •

= sin(ωt) • sin(θ) + cos(ωt) • sin(θ) (3-2)

= sin(ωt + θ)

where θ is the desired phase shift [50].

Using Agilent’s Advanced Design System (ADS) and ideal representations of the

components of figure 3-5, Vout in (3-2) has been analyzed. From figure 3-6, we can see that

the phase of changes in accordance with the electrical command θ. This design helps to

22

minimize the number of discrete components and the size of the phase shifter while still

maintaining a full continuous 360º phase control.

Figure 3-6: Phase of simulated setup in ADS using ideal blocks.

Broadband VSPS are commonly implemented in monolithic microwave integrated

circuit (MMIC) technologies. However, such designs can be challenging at lower

frequencies. With the advent of higher frequency analog multipliers and better quality

COTS components, low cost wideband VSPS using COTS components on printed circuit

boards become feasible.

Figure 3-5 shows the proposed design of the wideband VSPS which uses a

quadrature hybrid as the I/Q network and analog multipliers as wideband voltage gain

amplifiers. Subsequently, the following COTS discrete components have been selected to

build a VSPS for the frequency range of 10 MHz to 200 MHz:

1. Mini-circuits JSPQW-100A+ quadrature hybrid (30 – 100 MHz)

2. Analog Devices AD835 multiplier (DC - 250 MHz)

3. Mini-circuits JPS-2-1+ power combiner (1 – 500 MHz)

23

The components are mounted on a Taconic CER-10 PCB ( = 10, h = 30 mils).

Although the VSPS allows for continuous 360º phase control, the phase shifts of 3 bits

have been considered in the simulation.

Figure 3-7: AD835 Analog multiplier connected as wideband VGA [Appendix A].

The Analog Devices AD835 analog multiplier has been connected as a wideband

VGA as shown in figure 3-7 where port X is the input RF signal and port Y is the input

voltage control. The setup results in the expression W = X∙Y where W is the output RF

signal. The input voltage control is in the range of -1 V to 1 V where the common-mode

voltage is at 0 V. This allows control of both the amplitude and polarity of the signal path.

By varying the input control voltage and and using measured data models of the

components indicated in figure 2-10, eight different phase shifts have been simulated as

shown in Figure 2-5: 0º, 45º, 90º, 135º, 180º, 225º, 270º, 315º and 360º.

24

Figure 3-8: Amplitudes and polarities of 3 bit phase states.

The simulated 3 bit phase shifts are shown in figure 3-8 and it can be seen that they

are well spaced out over the frequency range. Calculating the RMS phase error is based on

the relationship below

√

∑ | |

(deg)

( [ ])

(3-3)

where is the output phase for a given value of and whose [ ] is

equal to the steps of a 3-bit phase shifter (45º, 90º,…, 315º) and is the output

phase in which [16]. The simulated 3 bit RMS phase error is less than

1.5º from 10 to 100 MHz and less than 5.5º from 10 to 200 MHz as seen in Figure 3-10.

This performance is very desirable for 3 bit phase shifts. The maximum RMS phase error

for adequate phase shifter functionality should be half the lowest phase shift state i.e. 22.5º

for 3 bit phase shifts with phase state intervals of 45º.

25

Figure 3-9: Simulated 3 bit phase shifts.

Figure 3-10: Simulated RMS phase error.

26

3.1.1 Experimental setup

The fabricated wideband VSPS is shown in figure 3-11. As this design is

implemented at VHF band, it is important to provide adequate RF chokes to the DC

voltage supplies. Thus, tantulum and ceramic capacitors are used at all DC supply

connections as shown in the photo below. A metallic casing encloses the VSPS board as

shown in figure 3-12. The printed circuit board is screwed onto the casing using 4 screws

to allow good contact between the board grounding and the casing. Binding posts are

attached to both sides of the metallic casing to allow external DC voltage supplies to the

board for proper amplitude and polarity control. This setup can then be used for the

subsequent PAA system testing in an anechoic chamber. Box resonance simulation has

also been performed in Sonnet EM for the lowest order box resonance to ensure the design

will not be affected by the box resonance. The lowest box resonance is at 2472 MHz,

which does not interfere with the VSPS performance at 10 – 200 MHz.

Figure 3-11: Photo of the fabricated phase shifter (8.4cm x 7.8cm).

27

Figure 3-12: Photo of the VSPS casing of 4 cm height.

Figure 3-13: Casing resonances using Sonnet: | |.

28

3.1.2 Experimental results

As seen in figure 3-14, the measured input return loss is larger than 15 dB from 10

to 100 MHz and larger than 10 dB from 10 to 200 MHz. The insertion loss is between 7 to

10 dB with amplitude imbalance of less than 1 dB from 10 to 100 MHz and between 7 to

14 dB with amplitude imbalance of less than 2.5 dB from 10 to 200 MHz as seen in figure

2-18. The amplitude imbalance of the insertion loss can be further minimized by tuning

the voltage control at the selected frequency of interest. The measured RMS phase error is

around 1.5º from 10 to 100 MHz and less than 5º over the wide frequency range of 10 to

200 MHz as seen in figure 2-19. The RMS phase error of 5º is still within acceptance limit

for a 3 bit phase shifter where the maximum allowable RMS phase error is half of the

phase shift interval at 22.5º.

Figure 3-14: Measured input return loss.

29

Figure 3-15: Measured phase shifts of 3 bit VSPS.

Figure 3-16: Measured insertion loss of fabricated phase shifter for 8 phase states.

30

Figure 3-17: Simulated and measured RMS phase error.

3.5 Conclusions and recommendations

A wideband vector sum phase shifter with a 20:1 bandwidth is presented. It uses

the I/Q base vector generation network topology and is fabricated using COTS

components. The design leverages on the improved performance of commercially available

low cost analog multipliers, quadrature hybrids and combiners. These surface mounted

components are then implemented on printed circuit boards to form the desired wideband

vector sum phase shifters.

The realized example demonstrates a measured input return loss larger than 15 dB,

amplitude imbalance less than 1 dB and RMS phase error less than 1.5º from 10 to 100

31

MHz. For the wider frequency range of 10 to 200 MHz, the measured input return loss is

larger than 10 dB, amplitude imbalance less than 2.5 dB and RMS phase error less than 5º.

Table I has made a performance comparison of previous phase shifters using

discrete components on PCB with the presented work. This work has shown a wide

bandwidth with low RMS phase error and amplitude imbalance. In comparison with [11]

for a wide bandwidth, this work indicates a much larger phase control range of 360º with 3

bits of phase shifts. In addition, it has a low amplitude imbalance of 2.5 dB and high return

loss of 10 dB. This VSPS can be used in VHF wideband PAA systems with digital or

continuous analog phase control.

The recommendation for possible future improvements of this design is to further

optimize the return losses especially from 100 to 200 MHz. The RMS phase error can also

be maintained at less than 1.5° with the introduction of I/Q network designs with a larger

bandwidth. The gain variation, which is about 7 dB can also be further flattened to less

than 2 dB from 10 to 200 MHz with the use of gain equalizers.

32

Chapter 4 - Vector sum phase shifter (L–Band design)

4.1 Introduction

A wideband VSPS should have low RMS phase error, flat gain, good return losses

and amplitude imbalance. These parameters are important for a phase shifter to be

appropriately implemented in a functional phased array antenna system.

A new vector-sum phase shifter has been designed at L-band using the proposed

topology in figure 4-1. The design objectives of this phase shifter are input- and output

return losses larger than 15 dB, gain variation less than 5 dB and RMS phase error less

than 5° for all 3-bit phase states over the entire L-band.

Figure 4-1: Proposed design of VSPS using analog multiplier circuits.

33

4.2 Proposed design and considerations at L-band

Figure 4-2: Analog multiplier circuit (Topology 1).

Based on the requirements of building a vector-sum phase shifter for the frequency

range of 1-2 GHz, the following COTS discrete components were selected as follow:

1. Mini-Circuits QCN-19+ quadrature hybrid (1100 to 1925 MHz)

2. TC1-1-13+ Balun (4.5 to 3000 MHz)

3. Analog Devices ADL5391 multiplier (DC to 2 GHz)

4. Mini-Circuits SYPS-2-252+ power combiner (5 to 2500 MHz)

Details of the individual components can be found in Appendix B. Rogers

RO4003C ( = 3.38, h = 32 mils) is used as the substrate for the design of the L-band

vector sum phase shifter.

Figure 4-2 shows topology 1 for the analog multiplier circuit which converts the

differential-ended analog multiplier ADL5391 input/output ports to single-ended 50 ohms

input/output ports. This allows connection with the 50 ohms single-ended ports in the

quadrature hybrid and power combiner. The analog multiplier will then be implemented as

a single-ended wideband voltage gain amplifier in the vector sum phase shifter. Although

the vector-sum phase shifter allows for continuous 360º phase control, 3-bit phase shifts

are considered in this work too.

34

4.3 Modification of topology using simulation results

With the aid of Advanced Design System (ADS) and using the measured SNP files

of all the COTS components required, the simulated scattering parameters of the vector

sum phase shifter using topology 1 analog multiplier circuit are shown in figure 4-3. The

simulated RMS phase error is shown in figure 4-4. The input return loss is more than 17.5

dB and the RMS phase error is generally flat at less than 3º from 1000 to 2000 MHz.

However, the insertion loss is 15 dB, the gain variation is 4 dB, and the output return loss

is only 5 dB.

Figure 4-3: Simulated S-parameters of VSPS (Topology 1).

35

Figure 4-4: Simulated RMS phase error of topologies 1 and 2.

In order to improve the performance, the analog multiplier circuit shown in figure

4-5 is proposed (Topology 2) after investigating the root causes of the performance

problems. The Mini-Circuits MNA-6 buffer amplifier has been selected to increase and

flatten the gain over the bandwidth from 1 to 2 GHz. The GAT-10+ attenuator is also

introduced after the in-phase combiner to increase the output return loss. This is optional

and is only needed if the output return loss is a concern. The modifications do not affect

the RMS phase error performance from 1 to 2 GHz.

Figure 4-5: Modified voltage multiplier circuit (Topology 2).

36

Figure 4-6: VSPS using analog multiplier circuit topology 2 and attenuator.

Figure 4-7: Simulated S-parameters (Topology 2).

37

With the use of the buffer amplifier in each analog multiplier circuit (T2) and the

attenuator after the power combiner as shown in figure 4-6, the simulated insertion loss

and output return loss are improved to about 5 dB and better than 22.5 dB respectively as

shown in figure 4-7. The amplitude variation has also been reduced to about 2 dB. The

RMS phase error has been slightly flattened too.

4.3.1 Experimental setup

The proposed design of the VSPS has first been tested using modular components

including the evaluation boards of the analog multiplier as shown in figure 4-8.

Figure 4-8: Photo of the modular VSPS using ADL5391 evaluation boards.

Thereafter, the circuit for the vector sum phase shifter is designed and fabricated as

shown in figure 4-9 to 4-12. As the ADL5391 analog multiplier component is a 16-lead

surface mount component, the leads are very close to one another which requires precise

38

soldering of the connections around the component. In addition, there is a grounding pad

underneath the component which is required to be soldered to the board ground. This

requirement for soldering precision can cause additional variation in the performance of

each individual analog multiplier and therefore also in the phase shifter. A total of 10

vector sum phase shifters were fabricated to cater to such soldering errors. The phase

shifters with consistent performance were selected for use. Numerous via holes were also

drilled to ensure proper grounding of the required component pins.

A metallic casing has been made with height 4 cm and box resonance simulation

results using Sonnet are shown in figure 4-13. The lowest order box resonance in | | is at

about 4250 MHz, which does not interfere with the L-band VSPS. The 9 external DC

voltage supplies required by the design are connected to a RS232 connector which then

allows easier connection to external power sources using modified RS232 cables.

Figure 4-9: Circuit of the fabricated VSPS.

39

Figure 4-10: Fabricated PCB substrate for the VSPS (front side).

Figure 4-11: Fabricated PCB substrate for the VSPS (back side).

40

Figure 4-12: Photo of the fabricated phase shifter (6.4 cm x 4.3 cm).

41

Figure 4-13: Metallic casing of height 4 cm and lowest box resonance at 4250 MHz.

4.3.2 Experimental results

Measured input and output return losses are both larger than 15 dB from 1 to 2

GHz as shown in figure 4-14. There are minimal differences in the return losses for all 8

phase states. The measured insertion losses for all 8 phase shift states have a gain variation

less than 2 dB and amplitude imbalance about 1.5 dB as shown in figure 4-15. The

measured phase shift states are shown in figure 4-16. They are relatively flat across 1 to 2

GHz. The simulated and measured RMS phase error is less than 2.5º between 1 and 2 GHz

as shown in figure 4-17. With these performances of the VSPS, initialization of a phased

array demonstrator is possible. Scattering parameters and RMS phase errors allows for the

vector sum phase shifter to perform accurately as an element for the phased array

demonstrator.

42

Figure 4-14: Measured |S11| and |S22|.

Figure 4-15: Measured insertion loss of fabricated VSPS for all 8 phase states.

43

Figure 4-16: Measured phase shifts of 3 bit VSPS.

Figure 4-17: Simulated and measured RMS phase error.

44

4.4 Conclusions and recommendations

An L-band vector sum phase shifter with I/Q base vectors generation network using

low-cost COTS components is presented. A proposed design of the vector sum phase

shifter using analog multiplier circuit topology 1 was simulated and some of the scattering

parameter performances were not acceptable i.e. the insertion loss and the output return

loss were relatively high. Thus, a modification of the design was made to improve the

return loss performances by introducing a buffer amplifier and an attenuator. The modified

design was then fabricated and the measured input and output return losses are larger than

18 dB and 25 dB respectively from 1 to 2 GHz. The gain variation is about 2 dB,

amplitude imbalance less than 1.5 dB and the RMS phase error less than 2.5º. The vector

sum phase shifter is then placed in a metallic casing with a RS232 connector to supply the

phase shifter with the required DC supplies. With the performance of the modified phase

shifter and the metallic casing, this vector sum phase shifter can be used as an element to

build a broadband phased array antenna system with digital or continuous analog phase

control. A performance comparison with other phase shifters using discrete components is

provided in Table II.

45

Possible future works on this design include further broadening of the bandwidth

through the introduction of a more wideband I/Q network design. The current design

limitation is largely due to the quadrature coupler which operates ideally only from 1 to 2

GHz. The rest of the other components are able to operate starting from a much lower

frequency. Thus using a more complex I/Q network which can split the input signal into I

and Q vectors starting from a very low frequency like 10 MHz to 2 GHz will transform the

current broadband VSPS design into a very wideband VSPS by simply using COTS

components. This covers the large spectrum of commercial broadcasting frequency bands

and also caters to the research in future dynamic spectrum access devices.

46

Chapter 5 - Phased array antenna system demonstrator

5.1 Introduction

Many phased array antennas use a large number of radiating elements each

controlled by a phase shifter. Beams are formed by shifting the phase of the signal emitted

from each radiating element, to provide constructive/destructive interference so as to steer

the beams in the desired direction. In a phase steering system, the beam is positioned

electronically by adjusting the differential phase between elements of an array in a

predetermined manner. A unique beam position corresponds to a progressive phase shift

setting in the network feeding the array. This operation is illustrated in figure 5-1.

Figure 5-1: Beam steering of main-lobe towards the target of interest

47

The relation between the resultant beam steering angle and the differential phase

setting between each vector sum phase shifter can be expressed as

(

) (5-1)

where φ is the resultant beam steering angle, (rad) is the differential phase between

each VSPS, λ is the operating wavelength and d is the centre-to-centre distance between

two adjacent patch antennas [1]. The progressive phase shift of the N-th phase shifter can

be expressed as

(

) (5-2)

5.2 Design and implementation of wideband phased array demonstrator

The architecture of the phased array demonstrator is shown in figure 5-2. The input

signal is first divided by a wideband 1:4 power divider into 4 channels. Each channel

consists of a vector sum phase shifter which includes an input hybrid coupler, two analog

multiplier circuits and a power combiner. The design of the L-band vector sum phase

shifter from the previous chapter will be used as the elemental phase shifter in each

channel. Four of these vector sum phase shifters are placed in individual metallic casings

for use in the 4-element phased array demonstrator. All external DC supplies required by

each channel will then be connected to a DAC to be controlled by a specially designated

computer. This allows easier control of the numerous DC supplies required by the 4-

element phased array demonstrator. Each of the RF outputs of the channels is then

connected to a patch antenna.

48

Figure 5-2: Block diagram of phased array demonstrator and the 360º VSPS.

5.3 Experimental setup of the phased array demonstrator

The phased array demonstrator setup is shown in figures 5-3 to 5-7. The 1:4 power

divider consists of 3 Mini-Circuits SYPS-2-252+ power combiners (5 to 2500 MHz)

mounted on a Rogers RO4003C (εr = 3.38, h = 32 mils) substrate. This PCB is then placed

in a metallic casing too with the box resonance simulated using Sonnet to ensure that no

resonance occurs in the operating frequency band of the power divider i.e. 1 to 2 GHz.

Eight analog controls are required to achieve the right polarities and weightings of

the 4 vector sum phase shifters. This is done using a precise 12-bit digital-to-analog

49

converter (DAC) AD5390, controlled through a laptop to set the right array of analog

control voltages for the different phase states. Unity gain buffers are also used to provide

sufficient currents for the vector sum phase shifter control voltages. All these components

are then secured on a hardened Styrofoam board as shown in figure 5-3 and figure 5-4 to

allow for easy testing in the anechoic chamber. In the chamber, the board will rest on a

rotating stand and thus a long parallel port cable will be used to connect the laptop to the

board to be placed beside the stand.

ZDA Communications ZDAD17002500-8 patch antenna is selected to act as the

radiating element in the phased array demonstrator because of its directional radiation

shown in figure 5-5. The interior structure of the patch antenna is also shown in figure 5-6.

Four such patch antennas are then placed in a linear array arrangement as shown in figure

5-7 and are mounted onto the Styrofoam board mentioned earlier. Emerson SMA cables

are used to connect each antenna to a RF output of the channel. Thereafter, the setup of the

4–element phased array demonstrator is completed and will be placed in anechoic chamber

for testing of beam steering capability. In this work, beam steering capability is measured

at 1.8 GHz.

Figure 5-3: Photo of the phased array demonstrator.

50

Figure 5-4: Photo of the DAC AD5390 control of 8 analog voltages for beam steering.

Figure 5-5: Radiation pattern and specifications of ZDAD17002500-8 [Appendix C].

51

Figure 5-6: Interior structure of the patch antenna.

Figure 5-7: Photo of the array of patch antennas.

52

5.4 Experimental results of the phased array demonstrator

Figure 5-8: Experimental Setup for measurements.

The experimental setup in the anechoic chamber, as shown in figure 5-7, measures

the performance of the phased array demonstrator. The phased array demonstrator

transmits at 1.8GHz while rotated from -90° to 90°. The receiving antenna will be a static

horn antenna. To demonstrate beam steering capability, an array of analog controls is

tabulated and selected for each progressive phase shift of 0°, 45° left, 45° right, 90° left

and 90° right. Based on (5-1), the resultant beam steering angles are 0º, 6.7° and 13.4°

when the progressive phase shift steps are 0º, 45° and 90° respectively. These values match

the measured results shown in figures 5-8 to 5-10. There is gain of about 6 dBi when the

array VSPS phase shift step is 0º and drops to 4 dBi when the array VSPS phase shift step

is 90º. This is desirable as there is minimal gain variation from the phased array antenna

front-end with the steering of the beam angle.

53

Figure 5-9: Radiation beam pattern at progressive 0° phase shifts.

Figure 5-10: Radiation beam pattern at progressive 45° phase shifts.

54

Figure 5-11: Radiation beam pattern at progressive 90° phase shifts.

5.5 Conclusions and recommendations

A low cost L-band 4-element phased array demonstrator is proposed using vector

sum phase shifters which are implemented using COTS components on PCB. The phased

array demonstrator with an array of four patch antennas is built on a Styrofoam board

which is measured in the anechoic chamber. Laptop control of the numerous analog

voltages is provided through a long parallel port cable. This demonstrator has shown beam

steering capabilities at 1.8 GHz. At VSPS progressive phase shift steps of 0º, 45°, and 90°,

beam steering at angles of 0º, 6.7°, and 13.4° has been achieved. This relates closely to

expression (5-1) describing the relation between the resultant beam steering angle and the

progressive phase shift step.

The main reason for the small beam steering angles is largely due to the centre-to-

centre spacing between each patch antenna element. As seen from figure 5-4, the spacing

is about 0.18 m which is comparable to the wavelength at 1.8 GHz of 0.167m. If the

55

spacing for phased array antenna elements can be reduced to for example λ/4, the beam

steering angle achievable for array VSPS progressive phase shifts of 45º will be 30º.

However, further analysis can be done to optimize the spacing for wider beam steering

angles with lower grating lobe levels.

One recommendation for future work on the phase array demonstrator is to perform

testing at more frequencies to further analyze the behavior of the phased array

demonstrator and its beam pattern. The phased array demonstrator can be modified to use a

different radiating element such as the wideband Vivaldi antenna. Based on the design of a

Vivaldi antenna, it allows further compactness of the array arrangement which can then

increase the maximum resultant beam steering angle possible. Lastly, the array of radiating

elements can also be varied in terms of the number, orientation and spacing to further

study the corresponding beam-forming pattern and behavior.

56

Chapter 6 - Conclusions and Future Works

6.1 Conclusions

Phase shifters are the most essential elements in active electronic beam-steering

systems such as phased-array antennas. To further increase the functionality and capability of

the phased array antennas, broadband performance is highly desirable. However, broadband

phase shifters are more difficult to design. In addition, phase-shifter critical design

parameters for phase shifters include RF insertion loss, phase error, amplitude variation

with phase shift, switching times, power-handling capability, and the power required to

shift phase. Unfortunately, no single type of phase shifter can satisfy the requirements for

all these parameters.

In chapter 2, various phase shifter topologies have been reviewed including the

reflection type phase shifter, the switched network phase shifter, the loaded-line phase

shifter and the vector sum phase shifters. The loaded-line phase shifter has the narrowest

bandwidth. There is high design flexibility in the switched network phase shifters as various

types of high-pass and low-pass networks can be used in the design. However to increase the

bandwidth, higher order networks are required. This increases the number of discrete

components which increases the circuit size and intrinsic variations due to tolerances which

requires delicate tuning. The reflection type phase shifter can achieve a large bandwidth only if

both the coupler and the terminations have wide bandwidths. The vector sum phase shifter can

lead to very compact circuits and provides continuous phase shifts over wide operation

bandwidths. However, the power consumption and the linearity should also be considered as

VGAs and DACs are required for the weighting of the base vectors.

57

In chapter 3, a literature review and a discussion of the fundamentals of a typical

active vector sum phase shifter is provided. The vector sum phase shifter is composed of a

base vectors generation network, a power combiner, and control circuits such as VGAs and

DACs which set the different amplitude weightings of the base vectors in the power

combiner for the necessary phase shifts. The commonly used phase difference between the

base vectors can be around 90º or around 120º. The main advantage of investigating the use

of more complex base vector generation networks like the poly-phase filter networks and the

all-pass networks is to maximize the potential for more wideband and accurate base vectors

phase and amplitude splitting. Here, the quadrature hybrid coupler is used for the base vectors

generation network although it has a narrower phase shift bandwidth of around an octave or

less. This is because the quadrature hybrid coupler is less complex and implicitly allows for a

similar bandwidth for the input return loss of the vector sum phase shifter.

With the advent of better quality and low cost analog multipliers, quadrature

hybrids and combiners, a wideband phase shifter with a 20:1 bandwidth using the VSPS

topology with COTS components on PCB is then presented. The design leverages on the

improved performance of commercially available COTS components. The realized

example has a measured input return loss larger than 15 dB, amplitude imbalance less than

1 dB, and RMS phase error less than 1.5º from 10 to 100 MHz. For the wider frequency

range of 10 to 200 MHz, the measured input return loss is larger than 10 dB, amplitude

imbalance less than 2.5 dB and RMS phase error less than 5º. Table I has made a

performance comparison of previous phase shifters using discrete components on PCB

with the presented work. This work has shown a wide bandwidth with low RMS phase

error and good amplitude balance.

Chapter 4 presents the L-band vector sum phase shifter using low-cost COTS

components. The proposed design of the vector sum phase shifter using analog multiplier

circuit topology 1 was simulated. As the insertion loss and the output return loss were not

sufficient, modification of the design were made to improve the scattering parameters

performances by introducing a buffer amplifier and an attenuator. The modified design was

58

then fabricated and the measured input and output return losses are larger than 18 dB and

25 dB respectively from 1 to 2 GHz. The gain variation is about 2 dB, amplitude

imbalance less than 1.5 dB and the RMS phase error less than 2.5º. The vector sum phase

shifter is then placed in a metallic casing with a RS232 connector to supply the phase

shifter with the required DC supply voltages. With the modified phase shifter

performances and the metallic casing, this vector sum phase shifter can be used as a phase

shifter block for a broadband phased array antenna system with digital or continuous

analog phase control. A performance comparison with other phase shifters using discrete

components is also provided in Table II. This work has shown good performance over the

entire L–band with good return losses, low RMS phase error, and low amplitude

imbalance.

Chapter 5 demonstrates a typical phased array antenna system composed of many

radiating elements each with a phase shifter. Beams are formed by shifting the phase of the

signal emitted from or received by each radiating element, to provide

constructive/destructive interference to steer the beams in the desired direction. In a phase

steering system, the beam is positioned electronically by adjusting the differential phase

between elements of an array in a predetermined manner. A unique beam position

corresponds to a progressive phase shift setting in the network feeding the array. A low

cost L–band 4-element phased array demonstrator is then proposed and implemented using

the L–band vector sum phase shifter. The phased array demonstrator with an array of four

patch antennas has demonstrated beam steering capabilities at 1.8 GHz. At VSPS

progressive phase shifts of 0º, 45° and 90°, beam steering angles of 0º, 6.7° and 13.4° are

achieved and the main reason for the small beam steering angles is largely due to the large

centre-to-centre spacing between each patch antenna element.

59

6.2 Recommendations

Although the implemented vector sum phase shifters have adequate performance

for integration into a phased array demonstrator, there are several recommendations for

future research.

1. The phased array demonstrator has only demonstrated beam steering capability

at 1.8 GHz. More frequencies should be tested to further analyze the behavior

of the phased array demonstrator and its beam pattern for other frequencies.

2. The phased array demonstrator can be modified to use a different radiating

element, such as the wideband Vivaldi antenna. This allows further

compactness of the array arrangement which can then increase the maximum

resultant beam steering angle.

3. The array of radiating elements can also be varied in terms of number,

orientation, and spacing to further study the corresponding beam-forming

pattern and behavior.

4. The VHF and L–band vector sum phase shifter can also be explored further

using a more complex but wideband I/Q network to achieve ultra-wideband

VSPS phase shifting performance of bandwidth ratio greater than 20:1, better

return losses and a flatter gain.

60

References

[1] D. Parker, and D. C. Zimmermann, “Phased-arrays—Part I: theory and architectures,” IEEE Trans.

Microwave Theory Tech., vol. 50, no. 3, pp. 678-687, Mar. 2002.

[2] X. Guan, H. Hashemi, and A. Hajimiri, “A fully integrated 24-GHz eight-element phased-array receiver

in Silicon,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2311-2320, Dec. 2004.

[3] D. Fisher, and I. Bahl, Gallium Arsenide IC Applications Handbook, Volume 1, Academic Press, 1995.

[4] IEEE Int. Phased-Array Syst. Technol. Symp. Dig., Boston, MA, Oct. 1996.

[5] G. W. Stimson, Introduction to Airborne Radar, 2nd Edition, Science, 1998.

[6] C. A. Balanis, Antenna Theory, Analysis and Design, 3rd Edition, Wiley, 2005.

[7] P. Katzin, B. E. Bedard, M. B. Shifrin, and Y. Ayasli, “High-speed, 100+ W RF switches using GaAs

MMICs,” IEEE Trans. Microwave Theory Tech., vol. 40, no. 11, pp. 1989-1996, Nov. 1992.

[8] M. Golio, The RF and Microwave Handbook, CRC Press, 2000.

[9] D. Parker, and D. C. Zimmermann, “Phased-arrays—Part II: implementations, applications and future

trends,” IEEE Trans. Microwave Theory Tech., vol. 50, no. 3, pp. 688-698, Mar. 2002.

[10] D.K.A Kpogla, C.Y. Ng, I.D. Robertson, "Shifted-quadrant microwave vector modulator," Electronics

Letters , vol. 39, no. 14, pp.1058-1059, Jul. 2003.

[11] S. Lucyszyn and I. D. Robertson, “Decade bandwidth hybrid analogue phase shifter using MMIC

reflection terminations,” Electronics Letters, vol. 28, no. 11, May 1992.

[12] K. Miyaguchi, M. Hieda, K. Nakahara, H. Kurusu, M. Nii, M.Kasahara, T. Takagi and S. Urasaki, “An

ultra-broad-band reflection-type phase-shifter MMIC with series and parallel LC Circuits,” IEEE

Trnas. Microw. Theory Tech., vol. 49, no. 12, pp. 2446-2452, Dec. 2001.

[13] X. Tang and K. Mouthaan, “Design of large bandwidth phase shifters using common mode all-pass

networks,” IEEE Microw. and wireless components Letters, vol. 22, no. 2, Feb. 2012.

[14] D. Adler and R. Popovich, “Broadband switched-bit phase shifter using all-pass networks,” in IEEE

MTT-S Int. Dig., pp. 265-268, 1991.

[15] S. J. Kim and N. H. Myung, “A new active phase shifter using a vector sum method,” IEEE Microw.

and Guided Wave Letters, vol. 10, no. 6, Jun. 2000.

[16] A. Asoodeh and M. Atarodi, “A full 360º vector-sum phase shifter with very low rms phase error over a

wide bandwidth,” IEEE Trans. Microw. Theory Tech., Feb. 2012.

[17] E. Kpodzo, K. Schünemann, and G. Begemann, “A quadriphase fin-line modulator,” IEEE Trans.

Microw. Theory Tech., vol. MTT-28, no. 7, pp. 747-752, Jul. 1980.

[18] Z. Liu, J. C. Midkiff, H. Xu, T. W. Crowe, and R. M. Weikle II, “Broad-band 180º phase shifter using

integrated submillimeter-wave Schottky diodes,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp.

2949-2955, Sep. 2005.

[19] A. W. Jacomb-Hood, D. Seielstad, and J. D. Merrill, “A three-bit monolithic phase shifter at V-band,”

IEEE 1987 Microw. Millimeter-wave Monolithic Circuit Symp., pp. 81-84, 1987.

[20] C. S. Lin, S. F. Chang, and W. C. Hsiao, “A full-360º reflection-type phase shifter with constant

insertion loss,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp. 106-108, Feb. 2008.

[21] F. Ellinger, R. Vogt, and W. Bächtold, “Ultracompact reflective-type phase shifter MMIC at C-band

with 360ºphase-control range for smart antenna combining,” IEEE J. Solid-State Circuit, vol. 37, no. 4,

pp. 481-486, Apr. 2002.

[22] J. C. Wu, T. Y. Chin, S. F. Chang, and C. C. Chang, “2.45-GHz CMOS reflection-type phase-shifter

MMICs with minimal loss variation over quadrants of phase-shift range,” IEEE Trans. Microw. Theory

Tech., vol. 56, no. 10, pp. 2180-2189, Oct. 2008.

61

[23] I. J. Bahl, and D. Conway, “L- and S-band compact octave bandwidth 4-bit MMIC phase shifters,”

IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 293-299, Feb. 2008.

[24] S. C. Chang, S. F. Chang, T. Y. Chih, and J. A. Tao, “An internally matched high-isolation CMOS

SPDT switch using leakage cancellation technique,” IEEE Microw. Wireless Compon. Lett., vol. 17, no.

7, pp. 525-527, Jul. 2007.

[25] P. Perez-Lara, I. Molina-Fernandez, J. G. Wanguemert-Perez, and A. Rueda-Perez, “Broadband five-

port direct receiver based on low-pass and high-pass phase shifters,” IEEE Trans. Microw. Theory

Tech., vol. 58, no. 4, pp. 849-853, Apr. 2010.

[26] J. F. White, “High power, p-i-n diode controlled, microwave transmission phase shifters,” IEEE Trans.

Microw. Theory Tech., vol. MTT-13, no. 3, pp. 233-243, Mar. 1965.

[27] F. L. Opp, and W. F. Hoffman, “Design of digital loaded-line phase-shift networks for microwave thin-

film applications,” IEEE Trans. Microw. Theory Tech., vol. MTT-16, no. 7, pp. 462-468, Jul. 1968.

[28] T. Yahara, “A note on designing digital diode-loaded-line phase shifters,” IEEE Trans. Microw. Theory

Tech., vol. MTT-20, no. 10, pp. 703-704, Oct. 1972.

[29] W. A. Davis, “Design equations and bandwidth of loaded-line phase shifters,” IEEE Trans. Microw.

Theory Tech., vol. MTT-22, no. 5, pp. 561-563, May 1974.

[30] I. J. Bahl, and K. C. Gupta, “Design of loaded-line p-i-n diode phase shifter circuits,” IEEE Trans.

Microw. Theory Tech., vol. MTT-28, no. 3, pp. 219-224, Mar. 1980.

[31] H. A. Atwater, “Circuit design of the loaded-line phase shifter,” IEEE Trans. Microw. Theory Tech.,

vol. MTT-33, no. 7, pp. 626-634, Jul. 1985.

[32] N. Imai and H. Ichikawa, “One-chip endless phase shifter IC’s for space diversity combiner,” IEEE

Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 43, no. 4, pp. 281–288, Apr. 1996.

[33] M. Chua and K. W. Martin, “1 GHz programmable analog phase shifter for adaptive antennas,” in Proc.

IEEE Custom Integrated Circuits Conf., pp. 71–74, 1998.

[34] S. J. Kim and N. H. Myung, “A new active phase shifter using a vector sum method,” IEEE Microw.

Guided Wave Lett., vol. 10, no. 6, pp. 233–235, Jun. 2000.

[35] P.-S.Wu, H.-Y. Chang, M.-D. Tsai, T.-W. Huang, and H.Wang, “New miniature 15–20 GHz

continuous-phase/amplitude control MMICs using 0.18m CMOS technology,” IEEE Trans. Microw.

Theory Tech., vol. 54, no. 1, pp. 10–19, Jan. 2006.

[36] A. Natarajan, A. Komijani, X. Guan, A. Babakhani, Y. Wang, and A. Hajimiri, “A 77 GHz phased-

array transmitter with local LO-path phase-shifting in silicon,” in IEEE Int. Solid-State Circuits Conf.

Dig. Tech. Papers, pp. 639–648, 2006.

[37] X. Yang and J. Lin, “A digitally controlled constant envelop phaseshift modulator for low-power

broadband wireless applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 96–105, Jan.

2006.

[38] J. Paramesh, K. Soumyanath, and D. J. Allstot, “A four-antenna receiver in 90-nm CMOS for

beamforming and spatial diversity,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2515–2524, Dec.

2005.

[39] K.-J. Koh, M.-Y. Park, C.-S. Kim, and H.-K. Yu, “Subharmonically pumped CMOS frequency

conversion (up and down) circuits for 2-GHz WCDMA direct-conversion transceiver,” IEEE J. Solid-

State Circuits, vol. 39, no. 6, pp. 871–884, Jun. 2004.

[40] P. Y. Chen, T. W. Huang, H. Wang, Y. C. Wang, C. H. Chen, and P. C. Chao, “K-band HBT and

HEMT monolithic active phase shifters using vector sum method,” IEEE Trans. Microw. Theory Tech.,

vol. 52, no. 5, pp. 1414-1424, May 2004.

[41] M. R. N. Ahmadi, L. Y. Chen, N. Fayyaz, S. Safavi-Naeini, and D. R. Banbury, “A novel CMOS

integrated smart antenna transceiver,” IEEE 2006 Radio Wireless Symp. (RWS), pp. 299-302, 2006.

62

[42] K. J. Koh and G. M. Rebeiz, “0.13-um CMOS digital phase shifter for X-, Ku-, and K-band phase

arrays,” IEEE J. Solid-State Circuits., vol. 42, no. 11, pp.2535-2546, Nov. 2007.

[43] H. Erkens, R. Wunderlich, and S. Heinen, “A novel SiGe RFIC approach towards low-cost S-band

transmit/receive modules,” IEEE 2009 Radar Conf., pp. 1-4, 2009.

[44] F. Ellinger, U. Lott, and W. Bächtold, “An antenna diversity MMIC vector modulator for HIPERLAN

with low power consumption and calibration capability,” IEEE Trans. Microw. Theory Tech., vol. 49,

no. 5, pp. 964-969, May 2001.

[45] J. Grajal, J. Gismero, M. Mahfoudi, and F. A. Petz, “A 1.4-2.7-GHz analog MMIC vector modulator for

a crossbar beamforming network,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 10, pp. 1705-1714,

Oct. 1997.

[46] G. S. K. Yong and C. E. Saavedra, “A fully integrated S-band vector phase shifter in CMOS

technology,” Silicon Monolithic Integrated Circuits in RF Systems, 2009.

[47] S. Galal, H. Ragaie, and M. Tawfik, “RC sequence asymmetric polyphase networks for RF integrated

transceivers,” IEEE Trans. Circuits Syst.-II, vol. 47, no. 1, pp. 18-27, Jan. 2000.

[48] Y. Huang, H. Jeon, Y. Yoon, W. Woo, C. Lee, J. S. Kenney, “An ultra-compact, linearly-controlled

variable phase shifter designed with a novel RC poly-phase filter,” IEEE Trans. Microw. Theory Tech.,

Feb. 2012.

[49] M. Mahfoudi, and J. I. Alonso, “A simple technique for the design of MMIC 90º phase-difference

networks,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 10, pp. 1694-1702, Oct. 1996.

[50] H. Nosaka, M. Nagatani, S. Yamanaka, K. Sano, K. Murata and T. Enoki, “Vector modulator-based

phase shifter with 810º control range for 43-Gbps optical transceivers,” Proceedings of the 39th

European Microwave Conference, Oct 2009.

63

Appendix A: (VHF band) Datasheet information for COTS

components used

http://www.minicircuits.com/pdfs/JSPQW-100A.pdf

http://www.minicircuits.com/pdfs/JPS-2-1.pdf

64

http://www.analog.com/static/imported-files/data_sheets/AD835.pdf

65

Appendix B: (L band) Datasheet information for COTS

components used

http://www.minicircuits.com/pdfs/QCN-19.pdf

http://www.minicircuits.com/pdfs/SYPS-2-252+.pdf

66

http://www.analog.com/static/imported-files/data_sheets/ADL5391.pdf

http://www.minicircuits.com/pdfs/TC1-1-13M+.pdf

67

Appendix C: Datasheet information for patch antenna

http://www.zdacomm.com/images/PDF/ZDADI7002500-8.pdf

68

http://www.analog.com/static/imported-files/data_sheets/AD5390_5391_5392.pdf

69

Appendix D: Further readings

[1] D. W. Kang, S. Hong, “A 2-10 GHz digital CMOS phase shifter for ultra-wideband phased array

system,” IEEE Radio Frequency Integrated Circuits Symposium, 2007.

[2] H. Erkens, R. Wunderlich, and S.Heinen, “A comparison of two RF vector-sum phase shifter concepts,”

German Microwave Conference, 2009.

[3] Y. Zheng and C. Saavedra, “Full 360º vector-sum phase shifter for microwave system applications,”

IEEE Trans. on Circuits and Systems-I: Regular papers, vol. 57, no. 4, Apr. 2010.

[4] K. J. Kohl and G. M. Rebeiz, “A 6–18 GHz 5-bit active phase shifter,” IEEE MTT-S Intl. Microwave

Symp. Digest, pp. 792–795, 2010.

[5] H. Nosaka, M. Nagatani, S. Yamanaka, K. Sano, K. Murata and T. Enoki, “Voltage-controlled phase

shifter in a surface mount package for 40- and 100-Gb/s optical transceivers,” Compound

Semiconductor Integrated Circuit Symposium, 2010.