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Digital LogicLecture 16

Registers

By

Ghada Al-MashaqbehThe Hashemite UniversityComputer Engineering Department


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The Hashemite University 2

OutlineIntroduction.Registers operation.Registers types.

Parallel input/parallel outputSerial input/serial output

Serial input/parallel outputParallel input/serial output.

Universal registers.


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Introduction A register is a sequential circuit that stores binaryinformation.Registers may include additional gates to determine howthe stored binary data are transferred in the register.Registers make use of D flip flops mainly since we wantto store the data as it is.Remember that a flip flop is a one bit memory unit. So,to construct a register that stores 4-bit number, forexample, we need 4 flip flops.In registers there is a common clock for all flip flops.Counters are registers that perform some operation onthe stored data (increment, decrement, etc.). So, it issaid that counters are special type of registers.


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Registers Types IRegisters have many types depending on two issues:

How you apply the binary information that you want to storein the register. Two types:

Parallel input: you apply all the bits of the data at the sametime for flip flops inputs. So, you need only 1 clock cycle (orpulse) to store the data.Serial input: you apply one bit at a time to the register. So, youneed n clock cycles to store n-bit data in the register.

How you read the binary data stored in the register.Parallel output: you read all the data bits that are stored in theregister at the same time.Serial output: you are allowed to read only one bit at a timefrom the stored data. so, you need at most n clock cycles toread n-bit data stored in the register.


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Registers Types IIDifferent combination of registers inputs and outputsleads to 4 types of registers:

Parallel input/parallel output

Serial input/serial outputSerial input/parallel outputParallel input/serial output.

The main operations performed by registers are:shifting left and right.

applied with either serial output or with serial input.No operation (just storage of data for later use).

Applied with parallel input/parallel output registers only.


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Parallel in/Parallel out

Registers IThe next figure shows a 4-bit parallelin/parallel out register.4-bit: since it contains 4 D-flip flops.

All the 4 bits are applied at the same timeto all flip flops input.

After 1 clock pulse (exactly after the +veedge) all bits are seen at the output of theflip flops (ready to read).So, 1 clock pulse is needed for

both the input and output.The values of all inputs I 0 I3

remains unchanged as long as youwant keep the stored data.

Also, you can reset all flip flops to 0 byactivating the clear direct input.


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Parallel in/Parallel

out Registers IIRegisters withParallel Load

Has an additional

gates and a controlline called load. These gates provideadditional functions:either to load a newvalue to be stored inthe register, or tokeep the same valuestored in the register.


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Parallel in/Parallel out

Registers IIRemember that to avoid changing the output value of aD FF you must do the following:

Either do not change D.Or avoid seeing the clock at the FF.

The register with parallel load avoid the need for theabove two options using the gates and the load control line.When load = 1 you load a new binary value to theregister.When load = 0 it means that you do not want tochange the stored value in the register. This done bymaking the FF input (i.e. D) equals the current flip flopoutput Q.Have a look at the circuit to trace the above operation.


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Serial in/Serial out Registers I

The above figure shows a 4-bit serial in/serial outregister.4-bit: since it contains 4 D-flip flops.

At the input you can apply only 1 bit at a time. So,you need 4 clock pulses to transfer all the input bits.


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Serial in/Serial out Registers II Also, at the output you can read only 1-bit ata time. The first bit of the stored data can beseen at the output at the last clock cycleneeded to store the data at the input (atclock cycle 4).

Additional 3 clock cycles are needed to readthe remaining 3 bits of the stored data.

So, at total we need 7 clock pulses to storeand read the data in the above register.The above register performs shift rightoperation on the input data.


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Serial in/Parallel out RegistersThe same as in the figure in the previous slidewith the exception that you are allowed to read

all the outputs of the flip flops at the same time.Here you need n clock pulses to have an n-bit datastored in the register (and also ready for read).


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Parallel in/Serial out Registers I


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Parallel in/Serial out Registers IIThis register performs shift right operation.

As you see in the previous slide there are externalgates with a control line (similar to registers withparallel load).When this control line is 0 the Load operation isperformed since it is active low.When the control line is 1 the shift operation is

performed since it is active high.For this register you enter all inputs in parallel.However, you only see one bit at a time at its serialoutput.


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Parallel in/Serial out Registers IIIWhen the Load is active (i.e. value on the control line= 0) all parallel inputs are loaded to the registers(i.e. applied to D inputs and seen on the FFs

outputs). At this instance you only see D 3 value on the output.Then you want to see all inputs values on the output,this is accomplished by shifting these values towardthe output.

To start shifting you must put 1 on the control lineand you need an additional 3 clock pulses to see theremaining three bits on the output (one bit at eachclock pulse).


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Universal Shift RegisterIs a bidirectional shift register (capable of shifting right and left) in addition to parallel

load capabilities.So, it contains all the registers types on the samecircuit and it can be configured using control linesto select one of these types.

And it perfroms the two operations supplied byregistersShifting left and right.

And no operation (storage of data).


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Universal Shift Register


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Universal Shift Register Operation I

Values of the selector lines and themode of register operation based on

each option are as follows:S1 S00 0 no change0 1 shift right1 0 shift left1 1 parallel load


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Universal Shift Register Operation II

As you can deduce from the circuit, the mode of operation of the universal register is based on thevalues of the selector lines of the multiplexers.Modes of operation:

No change: means no operation, i.e. you want to storethe data as it is in the register.Shift left: serial input to shift the data to the leftdirection.Shift right: serial input to shift the data to rightdirection.Parallel load: load the input values from the parallelinputs and store them in the register.


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Universal Shift Register Operation III

For the output you also have both types:parallel and serial output.

Parallel output: you read all the values A 3 A

2 A

1 A

0in

the previous circuit.Serial output for shift left: read only the value on

A 3 in the previous circuit.Serial output for shift right: read only the value on

A 0 in the previous circuit.So it is for you to decide whether to make itparallel or serial based on your needs.


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Universal Shift Register Operation IV

See your textbook for completedescription of the universal shift registeroperation in all modes.


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Additional Notes

This lecture covers the followingmaterial from the textbook:

Chapter 6: Sections 6.1 and 6.2

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