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ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPDENG
DATE
APPDCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OFSHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
12345678
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B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
?08/07/03287417 PRODUCTION RELEASED
441
051-6469 E
SCHEM,MLB,PB 17"
E
TABLE_5_ITEM
CRITICAL MAP31338S0094 1 IC,ASSP,MAP31-464,GRPHCS CTLR,548 BGA U43
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
820-1502 1 PCBF,MLB,PB 17 PCB1
TABLE_5_ITEM
CRITICAL MAP17338S0076 1 IC,ASSP,MAP17-464,GRPHCS CTLR,548 BGA U43TABLE_5_ITEM
051-6469 1 SCHEM,MLB,PB 17 SCH1
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
SCHEM,MLB,PB 17"
43-44
41-42
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
SYSTEM BLOCK DIAGRAM
DDR L3 CACHE
CARDBUS CONTROLLER (PCI1510)
MARVELL GIGABIT ETHERNET PHY
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED
FAN CONTROLLER, MODEM, SOUND
USB 2.0
40
INTERNAL CONNECTORS - DVD,CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH
SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEODUAL-CHANNEL LVDS
3635
37
38
39
24
23
32
33
34
31
3029
28
27
26
25
22
21
20
CONTENTSPAGE
INTREPID ENET/FW/UATA/EIDE INTERFACES
CONTENTSTITLE PAGE AND CONTENTS
MPC7450 MAXBUS INTERFACE
CPU PLL AND CONFIGURATION STRAPS
INTREPID MAXBUS AND BOOT STRAPS
INTREPID MEMORY INTERFACE / BOOT ROM
200PIN DDR MEMORY SODIMM CONNECTORS
1
PAGE
2
INTREPID AGP 4X/PCI
POWER BLOCK DIAGRAM
PCB NOTES AND HOLES
DDR MEMORY MUXES
4
3
5
6
8
7
13
10
11
12
14
9
INTREPID DECOUPLING
19
18
17
1615
INTREPID POWER RAILS/1.5V LDO
MPC7450 DATA / L3 CACHE INTERFACES/L3 LDO
NO STUFFSTUFFBOM OPTIONS
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
MAP17/31 AGP & FRAME BUFFER
MAP17/31 LVDS/TMDS/GPIO & GPU VCORE
MAP17/31 ANALOG, DVO INTERFACE, GND
D3_COLD
D3_HOT
GPU_SWITCH
GPU_SS
NO_BBANG
1_8V_MAXBUS
1_5V_MAXBUS
VCORE_OFFSET
SERIAL_DEBUG
INTREPID_USB
NEC_USB
MAP31
BBANG
MAP17
COMPONENT LOCATIONS
SIGNAL NAMES
REVISION HISTORY (1 OF 1)
FUNCTIONAL TEST POINTS
3.3V / 5V SYSTEM POWER SUPPLIES
PMU (POWER MANAGEMENT UNIT)
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
CPU CORE VOLTAGE POWER SUPPLY
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
BATTERY CHARGER AND CONNECTOR
FIREWIRE A/B PHY
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
SSCG
NO_SSCG
5V_HD_LOGIC
3V_HD_LOGIC
NO_4XVCORE
4X_VCORE
MAP17/MAP31
08/07/2003
CR-1
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 2 44E051-6469
INTREPID
P.29P.29
P.32
P.31P.31-35P.31
P.30
P.23
P.28P.27
P.27
U52
USB 2.0CONTROLLER
P.26
P.23LIGHT SENSOR
KB LED
P.101M X 8
BOOT ROM
U17
LMU
P.25
SLEEPLED
3.3V
SMBUS
BatteryConnector
I2C
I2C
LMU
PMU
TRACKPAD
P.25
P.25
P.24
P.24
AIRPOPT
P.22
OPTICAL DRIVE
TI PCI1510
Keyboard
USB PORT C
USB PORT F
Inverter
FireWire
SYSTEM BLOCK DIAGRAM
BOOTROM
VIA/PMU
CARDSLOT
PCI64BITS
33MHZ
EIDEUATA 100
DDR MEMORY
DDR SDRAM DIMM 1
DDR SDRAM DIMM 0
SO-DIMM Connector
2:1 DDR MUXES
MEMORY BUS
FIREWIRE400 MB/S
ETHERNET10/100/1000
MAXBUS
USB PORT B
USB PORT D
USB PORT E
ConfigCPU PLL
I2S
(INTERNAL MEM)
MEMORY
CH. C
MEMORY
(INTERNAL MEM)
CH. A
(INTERNAL MEM)
MEMORY
CH. D
MEMORY
(INTERNAL MEM)
CH. B
NVIDIAMAP1764MB
Connector
Connector
CardBusController
3.3V33MHZ32BITSPCI BUS
P.7
P.5-6
APOLLO
(MPC7455)
CPU
P.8
L3 Cache
P.11
P.12
P.9
P.10
4X AGPP.13
P.14
P.15
P.14P.14P.14
P.15
P.15
P.15
P.15
P.15
P.15
64BITS167MHZ2.5V P.19-21
(DDC TOO)
DVI-IConnector
TMDS
P.22ConnectorS-Video
EDID (I2C)
LVDS
P.22ConnectorLCD Panel
S-VIDEO
COMPOSITE
RGB
ConnectorP.22
P.24
P.18
P.18
ULTRA ATA/100Connector
5VSERIAL
& ChargerPower Supply
ConnectorConnector
SUTRO (PWR)Connector
TUBA (SOUND)Connector
Connector
P.25
FanCircuit
I2CP.14P.15P.15
SCCASerial Debug
Connector
32BITS
AGP BUS1.5V/3.3V
66MHZ
PHYEthernet
EthernetConnector
4 DATA PAIRS
10/100/1000
3.3V
G/MII
8BIT TX
8BIT RX
125MHZ
FW - AConnector
FW - BConnector
PHY
2 DATA PAIRS2 DATA PAIRS@ 400MHZ
@ 200MHz
P.24
P.24
8BIT TX/RX50MHZ
3.3V
1394 OHCI
UIDE
EIDEI2S
I2C
BlueTooth
LEFT USB
ConnectorModem Board
BACKUP BATTERYRIGHT USB
NOT USED
NOT USED
NOT USED
18BIT ADDRESS64BIT DATA
250/300 MHZ
L3 BUS1.5V
64BIT DATA32BIT ADDRESS
MAXBUS1.8V167MHZ
PMU
INTRPEIDI2C
33MHZ16/32 BITS3.3V/5V
J18
U49
J24 J22
U28
J13
J11
J14
U48/J2/J4
J25 J19
U36
U39
J15
CARDBUS
J10
U26
J21
J5
U43
J8
J17J7 J16
U11/U12/U13/U14
J20/J23
U42
U6/U7
U44
P.25
J9
J3 (SHARE WITH LEFT USB)
J3 (SHARE WITH BLUETOOTH)
J12 USB PORT A
USB 2.0
USB 2.0
P.14 P.14
P.15
P.13
CR-2
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 3 44E051-6469
+PBUS
+PBUS
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
12.8V CHARGES BACKUP BATTERY
+PBUS
AC: 12.8V
+PBUS (12.8V)
+PBUS (12.8V)
PG 31
PG 30
1.9 MS
2.6 MS
+1_8V_MAIN
+1_5V_MAIN
~???MS
~11MS
2.6 MS
~13.5MS
1625 NOT RUNNINGNO AC: BATTERY VOLTAGE
RUN: RUNNINGSLEEP: RUNNING
SHUTDOWN: RUNNING
(LTC1625)
BATTERY VOLTAGE
RUN/SS
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOWRC AT 1M*0.1UF @ 24V
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOWRC AT 1M*0.047UF @ 24V
INTERNAL ZENER CLAMP TO 6V
INTERNAL ZENER CLAMP TO 6V
<100UA ALLOWEDTURNS ON AT >1VRUN/SS - 5V
<100UA ALLOWED
MAIN 3V/5V
(LTC3707)DC/DC
TURNS ON AT >1V
VCC
VCC
DCDC_EN_LAFTER PMU IS UP AND RUNNINGDCDC_EN_L WILL PULL ON1/ON2LOW IN SHUTDOWN
+5V_MAIN
+1.8V_MAIN(LTC3411)DC/DC
+5V_MAIN
VCC
1_5V_2_5V_OK
+BATT
+BATT
+24V_PBUS
+24V_PBUS
NO INRUSH PROTECTIONWHEN ONLY BATTERY IS CONNECTED
TURNS ON OUTPUT @ 2.4V
RUN: RUNNINGSLEEP: RUNNING
SHUTDOWN: STOPPED
RUN/SS - 3V
SLEEP: RUNNINGRUN: RUNNING
SHUTDOWN: STOPPED
POWER SYSTEM ARCHITECTURE
24V IS OUTPUT ONLY FROM
CHARGER INPUT
BATTERY
BACKUP
BACKUP BATTERY
1V20_REF
+
-U21
FEED-IN PATH
& BOOST OUTPUT
3S 3P PRISMATIC CELLS
POWER BLOCK DIAGRAM
(UNTIL DRAINED)
AC
IN
ADAPTERLIMITERINRUSH
>~13.44V TURNS-ON
<~13.44V SHUTS-OFF
BUCKREGULATOR
+3.3V_MAIN
STBYMD
BATTERYCHARGER
(MAX1772)
+3V_PMULDO +3V_PMU
14V_PBUS
+5V_MAIN
WHEN ONLY BATTERY IS CONNECTED
NO INRUSH PROTECTION
HOLDS BOTH RUN/SS AT GNDWHEN IT’S CONNECTED TO GND
WHEN IT’S OPENTURNS CONTROL TO RUN/SS
INVERTER
BACKLIGHT
MAIN 2.5V/1.5VDC/DC
(MAX1715)
PGOOD 3V_5V_OK
PGOOD
ON1/ON2
+4_6V_BU +5V_MAIN
+1.5V_MAIN
+2.5V_MAINDDR POWERL3 COREMAP17 DDR I/O MAP17 DDR CORE
INTREPID COREAGP I/OL3 I/O
MAXBUSBROADCOM
DC/DC(MAX1717)
+5V_MAIN
SHDNVCC
SLEEPDCDC_EN
MAXBUSSEQUENCING
GPU_VCORE+1.35V/+1.2V
+5V_MAIN
RUN: RUNNINGSLEEP: D3HOT/D3COLD
EXT_VCC
TURNS ON AS LOW AS 0.8V/TYP 1.5V
VCC
D3_COLDSLEEP
DCDC_EN
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
RC CHARGING AT INT_VCC (5V)
DCDC_EN_L OR PMU_POWERUP_LBECOMES ’1’; MUCH LESS THAN THE
+5V_MAIN TURNS ON1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
INTERNAL 1.2UA CURRENT SOURCE
RUN/SS
D3_HOT
D3_HOT
1_5V_2_5V_OK
DCDC_EN_L
SEQUENCING
GPU_VCORE
~5.88MS TO START SWITCHER1M & 0.1UF @14V, IT TAKES
CPU_VCORE(+1.4V/+1.5V)
DCDC_EN_LDCDC_EN
+5V_MAIN
+3V_MAIN+5V_SLEEP
+3V_SLEEP2.4V - ??? MS3V_5V_OK
SLEEP_L_LS5SLEEP
+2_5V_MAIN+2_5V_SLEEP
+1_5V_SLEEP
1_5V_2_5V_OK(MAX1715 OUTPUT)
1_5V_2_5V_OK(AT LTC1778 RUN/SS)
GPU_VCORE(D3HOT)
GPU_VCORE(D3COLD)
SLEEPRUNSHUT-DOWN RUN SHUT-DOWN
PG 31
PG 32
PG 32
PG 31
PG 31
PG 33
PG 32
DC/DC(LTC1778)
SHUTDOWN: STOPPEDPG 20
PG 35
SHUTDOWN: STOPPEDSLEEP: STOPPED
RUN: RUNNING
PG 35
PG 34
SLEEP: STOPPEDRUN: RUNNING
SHUTDOWN: STOPPED
CR-3
www.vinafix.vn
ZT7255R158
HOLE-VIA-20R10ZT67
HOLE-VIA-20R10ZT69
HOLE-VIA-20R10ZT68
HOLE-VIA-20R10ZT71
HOLE-VIA-20R10ZT70
HOLE-VIA-20R10ZT72
HOLE-VIA-20R10ZT73
HOLE-VIA-20R10ZT74
HOLE-VIA-20R10ZT76
HOLE-VIA-20R10ZT75
HOLE-VIA-20R10ZT101
HOLE-VIA-20R10ZT103
HOLE-VIA-20R10ZT102
HOLE-VIA-20R10ZT104
HOLE-VIA-20R10ZT105
HOLE-VIA-20R10ZT106
HOLE-VIA-20R10ZT107
HOLE-VIA-20R10ZT108
HOLE-VIA-20R10ZT110
HOLE-VIA-20R10ZT109
HOLE-VIA-20R10ZT111
HOLE-VIA-20R10ZT112
HOLE-VIA-20R10ZT100
HOLE-VIA-20R10ZT114
HOLE-VIA-20R10ZT115
HOLE-VIA-20R10ZT116
ZT4235R126
ZT14146R126
ZT1146R126
OG-503040SH1SHLD-SM
SP1SPKR_CLIP_P84
SP2SPKR_CLIP_P84
SP3SPKR_CLIP_P84
SP4SPKR_CLIP_P84
SP5SPKR_CLIP_P84
BS1STDOFF-217ODX150IDX35H-TH
SP6SPKR_CLIP_P84
ZT5235R126
ZT8235R126
ZT6255R158
HOLE-VIA-20R10ZT18
HOLE-VIA-20R10ZT28
HOLE-VIA-20R10ZT27
HOLE-VIA-20R10ZT26
HOLE-VIA-20R10ZT25
HOLE-VIA-20R10ZT24
HOLE-VIA-20R10ZT23
HOLE-VIA-20R10ZT22
HOLE-VIA-20R10ZT21
ZT3255R158
HOLE-VIA-20R10ZT20
HOLE-VIA-20R10ZT19
HOLE-VIA-20R10ZT29
HOLE-VIA-20R10ZT30
HOLE-VIA-20R10ZT31
HOLE-VIA-20R10ZT32
HOLE-VIA-20R10ZT34
HOLE-VIA-20R10ZT33
HOLE-VIA-20R10ZT35
HOLE-VIA-20R10ZT36
HOLE-VIA-20R10ZT37
HOLE-VIA-20R10ZT39
HOLE-VIA-20R10ZT38
HOLE-VIA-20R10ZT40
HOLE-VIA-20R10ZT41
HOLE-VIA-20R10ZT42
HOLE-VIA-20R10ZT43
HOLE-VIA-20R10ZT44
HOLE-VIA-20R10ZT46
HOLE-VIA-20R10ZT45
HOLE-VIA-20R10ZT47
HOLE-VIA-20R10ZT49
HOLE-VIA-20R10ZT48
HOLE-VIA-20R10ZT50
HOLE-VIA-20R10ZT51
HOLE-VIA-20R10ZT52
HOLE-VIA-20R10ZT54
HOLE-VIA-20R10ZT53
HOLE-VIA-20R10ZT55
HOLE-VIA-20R10ZT56
HOLE-VIA-20R10ZT57
HOLE-VIA-20R10ZT58
HOLE-VIA-20R10ZT59
HOLE-VIA-20R10ZT61
HOLE-VIA-20R10ZT60
HOLE-VIA-20R10ZT62
HOLE-VIA-20R10ZT64
HOLE-VIA-20R10ZT63
HOLE-VIA-20R10ZT65
HOLE-VIA-20R10ZT66
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 4 44E051-6469
SPEAKER CLIPS
BOARD HOLESCHASSIS MOUNTS
I/O AREA INVERTER
12 PREPREG (3MIL)
11
9
10
8
7
6
5
4
3LAMINATE (4MIL)
PREPREG (3MIL)2
1
LAMINATE (4MIL)
PCB SPECS
SIGNAL TRACE SPACING: 4 MILSPREPREG THICKNESS: 2-3 MILS
SIGNAL TRACE WIDTH: 4 MILS
SIGNAL (1/3 OZ + COPPER PLATING)
PREPREG (3MIL)
GROUND (1/2 OZ)LAMINATE (4MIL)
SIGNAL (1/2 OZ)
PREPREG (3MIL)
LAMINATE (4MIL)
LAMINATE (3MIL)
PREPREG (2MIL)
PREPREG (2MIL)
CUT POWER PLANE(1 OZ)
CUT POWER PLANE(1 OZ)
GROUND (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/3 OZ + COPPER PLATING)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
20R10 TH VIA OR VIA IN PAD
SIGNAL (1/2 OZ)
BOARD STACK-UP AND CONSTRUCTION
DIELECTRIC: FR-4
THICKNESS : 1.2 MM / 0.047 IN1/2 OZ CU THICKNESS: 0.7 MILS 1.0 OZ CU THICKNESS: 1.4 MILS
IMPEDANCE : 50 OHMS +/- 10%
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
BOARD INFORMATION
ASICS HEATSINK MOUNTS
GROUND VIAS
LAYER COUNT: 12 CONDUCTIVE MOUNTS
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 1
2
3
CHGND1
1 1 1 1 1
1
1
1
1
CHGND6
CHGND2
1
CHGND5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CR-4
www.vinafix.vn
402MF
1/16W5%
10KR66
402MF
1/16W5%
10KR73
402MF
1/16W5%
10KR37
402MF
1/16W5%
470R13
402MF
1/16W5%
10KR65
402
R23
MF1/16W5%200
402MF
1/16W5%
10KR90
402MF
1/16W5%
1KR38
402MF
1/16W5%
10KR39
402MF
1/16W5%
10KR74
C760.1UF20%10VCERM402
C750.1UF20%10VCERM402
C740.1UF20%10VCERM402
C2030.1UF20%10VCERM402
C950.1UF20%10VCERM402
C450.1UF20%10VCERM402
C1090.1UF20%10VCERM402
C2020.1UF20%10VCERM402
C1380.1UF20%10VCERM402
C1100.1UF20%10VCERM402
C1400.1UF20%10VCERM402
C1390.1UF20%10VCERM402
C510.1UF20%10VCERM402
C300.1UF20%10VCERM402
C730.1UF20%10VCERM402
C2380.1UF20%10VCERM402
C310.1UF20%10VCERM402
C1110.1UF20%10VCERM402
402
R50
MF1/16W
5%470
C1730.1UF20%10VCERM402
C1720.1UF20%10VCERM402
C2000.1UF20%10VCERM402
C1740.1UF20%10VCERM402
C1080.1UF20%10VCERM402
C2010.1UF20%10VCERM402
402
R175
MF1/16W
5%470
402MF
1/16W5%
10KR32
402MF
1/16W5%
470R91
402MF
1/16W5%
10KR84
402MF
1/16W5%
1KR56
C15310UF20%6.3VCERM805
C23910UF20%6.3VCERM805
C14110UF20%6.3VCERM805
C25510UF20%6.3VCERM805
402MF
1/16W5%
10KR55
402MF
1/16W5%
10KR44
402
R5
MF1/16W5%10
SM11/16W5%
10KRP11
SM11/16W5%
10KRP11
SM11/16W5%
10KRP11
C1802.2UF20%10VCERM805
C2042.2UF20%10VCERM805
TEST5
TEST4
TEST3
NC13
TEST2
TEST1
TEST6
TEST0
PLL_EXT
NC12
NC11NC10NC9NC8
SPARE0SPARE1SPARE2SPARE3
NC6
NC4
NC7
NC1NC2NC3
NC5
EXT_QUAL
PMON_OUT
BMODE0
BMODE1
PMON_IN
MCP
SRESET
HRESET
SMI
INT
CKSTP_OUT
CKSTP_IN
TBEN
QREQ
TEA
QACK
TA
L2_TSTCLK
L1_TSTCLK
LSSD_MODE
TCK
TDO
TDI
TMS
TRST
DTI3
DTI2
PLL_CFG2
PLL_CFG3
DTI1
DTI0
DRDY
PLL_CFG0
PLL_CFG1
DBG
CLK_OUT
BVSEL
SYSCLK
AVDD
TS
BG
BR
HIT
SHD1
CI
WT
TSIZ1
TSIZ0
AACK
SHD0
ARTRY
TSIZ2
TBST
GBL
TT3
TT2
TT1
TT4
AP1
AP2
AP4
AP3
TT0
A35
A34
AP0
A29
A31
A30
A28
A32
A33
A27
A25
A24
A22
A21
A20
A19
A18
A23
A26
A17
A8
A7
A9
A16
A12
A10
A11
A15
A14
A13
A3
A4
A5
A6
A2
A0
A1
OVDD
GND
VDD
APOLLO
(1 OF 3)
U42
1GHZ-1.32VR3.3-NDE5-85C-BGA
C7710PF5%50VCERM402
402MF
1/16W5%
0R51
402MF
1/16W5%
10KR518
402MF
1/16W5%
10KR24
603MF
1/16W5%
0R606
603MF
1/16W5%
0R602
+1_5V_SLEEP
+1_8V_SLEEP
402
R19
MF1/16W5%470
402MF
1/16W5%
470R12
SM11/16W5%
10KRP11
C290.1UF20%10VCERM402
C92.2UF20%10VCERM805
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 5 44E051-6469
MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)
NC
NC
NCNCNC
NCNCNC
NC
NCNCNC
NCNC
NC
NC
NC
CPU_VCORE DECOUPLING NETWORK CPU_OVDD DECOUPLING NETWORK
CPU INTERNAL PLL FILTERING
MPC7450 MAXBUSNC
NC
NC
NC
NC
NC
PLACE CLOSE TO PIN
RC GLITCH FILTER
470OHM FOR BOOT BANGER
MPC7450 PULL-UPS
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
1 2
1 2
1 2
1 2
1 2
NO_BBANG1
2
1 2
1 2
1 2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1 2
1 2
1 2
1 2
1
2
1
2
1 2
1 2
2
1
3 6
4 5
2 7
1
2
1
2
CRITICAL
E10
N4
A10
U2
N2
P8
M8
W4
N6
U6
R5
Y4
E8
P1
P4
R6
M7
N7
AA3
U4
W2
W1
W3
N5
V4
AA1
D10
J4
G10
D9
C8
R2
A7
M2
A6
M1
U1
L5
L6
J1
H2
G5
T2
B2
R3
C6
C4
K1
G6
R1
F3
K6
N1
V1
T6
P2
T5
U3
P6
B9
M4
J10
L14
M9
M11
M13
N10
N12
N14
P9
P11
P13
J12
P15
B1
B5
C3
C9
D7
E2
E5
F10
G4
J14
G7
H5
J3
K5
M3
M6
P3
T4
T7
T9
K9
T13
V2
V5
V8
V12
V15
W7
Y3
Y9
Y13
K11
Y15
Y20
AA5
AA17
AB1
K13
K15
L10
L12
K2
A3
J6
H4
J2
F6
B8
A11
G11H11
F2
B6
B11C11D5
D11E7E11
F11G2
B3
G9
H7
J5
K3
L7
M5
N3
P7
R4
T3
C5
U5
U7
U11
U15
V3
V9
V13
Y2
Y5
Y7
C7
Y10
Y17
Y19
AA4
AA15
C10
D2
E3
E9
F5
G3
A2
F7
C2
D4
H8
E6
B4
K7
Y1
L4
L8
G8
A8
D3H9J8
G1
D6
N8
L3
B7
J7
E4
H1
T1
B10
H6
H10
D8
F9
F8
A9
K4
C1
P5
L1
H3
D1
F1
F4
K8
A5
E1
J9
L13
L15
M10
M12
M14
N9
N11
N13
N15
P10
J11
P12
P14
J13
J15
K10
K12
K14
L9
L11
L2
1
2
1 2
1 2
1 2
1_5V_MAXBUS
1 2
1_8V_MAXBUS
1 2
BBANG
1
2
1 2
1 8
1
2
1
2
CR-5
MAXBUS_SLEEP
JTAG_CPU_TCK
CPU_L1TSTCLK
CPU_SRESET_L
MPIC_CPU_INT_L
JTAG_CPU_TDI
JTAG_CPU_TMS
CPU_SMI_L
CPU_HRESET_L
CPU_EMODE1_L
CPU_SRWX_L
CPU_L2TSTCLK
CPU_PULLDOWN
CPU_EDTI
CPU_PULLUP
CPU_PMONIN_L
CPU_CHKSTP_OUT_L
CPU_MCP_L
CPU_LSSD_MODE
CPU_SHD0_L
CPU_TBEN
CPU_SHD1_L
CPU_CHKS_L
CPU_CLKOUT_SPN
JTAG_CPU_TRST_L
MAXBUS_SLEEP
CPU_DRDY_L_UF CPU_DRDY_L
MAXBUS_SLEEP
CPU_VCORE_SLEEP
SYSCLK_CPU
CPU_VCORE_SLEEP
CPU_HIT_L
CPU_SHD1_L
CPU_SHD0_L
CPU_ARTRY_L
CPU_CI_L
CPU_WT_L
CPU_AACK_L
CPU_TSIZ<2>
CPU_GBL_L
CPU_TSIZ<1>
CPU_TBST_L
CPU_TSIZ<0>
CPU_TT<2>
CPU_TT<3>
CPU_TT<4>
CPU_TT<1>
CPU_ADDR<31>
CPU_ADDR<30>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<7>
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<4>
CPU_ADDR<3>
CPU_ADDR<1>
CPU_ADDR<0>
CPU_ADDR<2>
CPU_PULLDOWN
CPU_TS_L
CPU_BG_L
CPU_BR_L
CPU_SRWX_L
CPU_PULLUP
CPU_PULLDOWN
CPU_EMODE1_L
CPU_EMODE0_L
CPU_PMONIN_L
CPU_SRESET_L
CPU_HRESET_L
CPU_SMI_L
CPU_MCP_L
CPU_CHKS_L
MPIC_CPU_INT_L
CPU_CHKSTP_OUT_L
CPU_QACK_L
CPU_QREQ_L
CPU_TBEN
CPU_TA_L
CPU_TEA_L
CPU_L2TSTCLK
CPU_LSSD_MODE
CPU_L1TSTCLK
JTAG_CPU_TMS
JTAG_CPU_TRST_L
JTAG_CPU_TCK
CPU_DTI<2>
JTAG_CPU_TDO_TP
JTAG_CPU_TDI
CPU_DTI<0>
CPU_DTI<1>
CPU_EDTI
CPU_DBG_L
CPU_PLL_CFG<3>
CPU_PLL_CFG<2>
CPU_PLL_CFGEXT
CPU_PLL_CFG<1>
CPU_PLL_CFG<0>
CPU_BUS_VSEL
CPU_AVDD
CPU_TT<0>
38
38
38
34
34
34
23
23
23
17
17
17
16
39
16
16
39
39
39
9
39
39
39
23
39
9
9
38
38
23
39
39
39
39
7
23
39
15
23
23
30
7
39
9
23
7
36
7
34
36
34
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
39
7
30
15
39
36
36
9
36
36
23
23
23
36
23
36
36
36
36
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
36 9
5
5
9
5
9
5
5
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
5
9
9
9
5
5
5
5
7
5
5
5
5
5
5
5
5
9
9
5
9
9
5
5
5
5
5
5
9
39
5
9
9
5
9
7
7
7
7
7
7
38
9
www.vinafix.vn
(2 OF 3)
APOLLO
D0D1
D6D7
D10
D5
D3D4
D2
D9D8
D11D12D13D14D15D16
D21
D17
D22
D25D24D23
D20D19D18
D26
D35D34D33D32D31D30D29D28D27
D36
D41D40D39
D43
D46D45D44
D42
D38D37
D56D55D54D53D52D51D50D49D48D47
D57
D60D59D58
D61D62
DP3DP4
DP0
DP2
D63
DP1
DP7
DP5DP6
R3.3-NDE5-85C-BGA1GHZ-1.32V
U42
GVDD
L3ECHO_CLK2L3ECHO_CLK3
L3ECHO_CLK1
L3CNTL1*L3CNTL0*
L3ECHO_CLK0
L3CLK1L3CLK0
L3VSEL
(3 OF 3)
APOLLO
L3A1L3A2L3A3L3A4
L3A0
L3A5L3A6L3A7
L3A14L3A13L3A12L3A11L3A10L3A9L3A8
L3A17L3A16L3A15
L3D0L3D1L3D2L3D3L3D4L3D5
L3D14L3D13
L3D6L3D7L3D8L3D9L3D10L3D11L3D12
L3D15
L3D24L3D23
L3D16L3D17L3D18L3D19L3D20L3D21L3D22
L3D25
L3D35L3D34L3D33
L3D26L3D27L3D28L3D29L3D30L3D31L3D32
L3D45L3D44L3D43
L3D36L3D37L3D38L3D39L3D40L3D41L3D42
L3D46
L3D55L3D54
L3D47L3D48L3D49L3D50L3D51L3D52L3D53
L3D56L3D57L3D58L3D59L3D60L3D61L3D62L3D63
L3DP0L3DP1
L3DP7
L3DP2L3DP3L3DP4L3DP5L3DP6
GND
1GHZ-1.32VR3.3-NDE5-85C-BGA
U42
C2370.1UF20%10VCERM402
C2970.1UF20%10VCERM402
C2900.1UF20%10VCERM402
C2650.1UF20%10VCERM402
C2360.1UF20%10VCERM402
C2950.1UF20%10VCERM402
C1710.1UF20%10VCERM402
C2660.1UF20%10VCERM402
C1790.1UF20%10VCERM402
C2960.1UF20%10VCERM402
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U47LT1962-ADJ
MSOP
C6591UF20%10VCERM603
603
R609
MF1/16W5%0
603
R627
MF1/16W5%0
+1_8V_SLEEP +2_5V_SLEEP
402
R639
MF1/16W1%10.7K
402
R644
MF1/16W1%68.1K
C6790.01UF
20%16V
CERM402 C673
10UF20%6.3VCERM805
603MF
1/16W5%
0R640
603
R649
MF1/16W5%0
+1_5V_SLEEP
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 6 44
E051-6469
NC
NC
NC
NC
NC
NC
NC
NC
MPC7450 - L3
L3 DECOUPLING CAPSPLACE 1 EACH NEAR PINS B15, D12, E19, F15, H17, K17, M19, R15, T17, AND V21 OF CPU
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
LDO OUTPUTS 1.41V (SAME AS P59)
THIS LDO WAS ADDED TO SUPPORT SCHMOO’ING OF L3_OVDD VOLTAGE
L3_OVDD GENERATOR
CRITICALAB15
T14
U12
W13
Y14
U13
T12
W12
AB12
R12
AA13
AB11
R14
Y12
V11
T11
R11
W10
T10
W11
V10
R10
U10
AB13
AA10
U9
V7
T8
AB4
Y6
AB7
AA6
Y8
AA7
V14
W8
AB10
AA16
AB16
AB17
Y18
AB18
Y16
AA18
W14
U14
R13
W15
AA14
V16
W6
AA12
V6
AB9
AB6
R7
AB14
R9
AA9
AB8
W9
W16
AA11
Y11
AA2
AB3
AB2
AA8
R8
W5
U8
AB5
CRITICAL
A22
B12
B14
B16
B18
B20
C21
D13
D15
D17
D19
E21
F12
F14
F16
F19
G17
G21
H13
H15
H19
J17
J21
K19
L17
L21
M19
N17
N21
P19
R17
R21
T15
T19
U17
U21
V19
W17
W21
AB22
B13
D21
E19
F13
F15
F17
F21
G19
H12
H14
H17
B15
H21
J19
K17
K21
L19
M17
M21
N19
P17
P21
B17
R15
R19
T17
T21
U19
V17
V21
W19
Y21
B19
B21
D12
D14
D16
D18
L18
K22
H20
G22
F22
G20
H18
E22
J16
F20
L16
K20
K18
J22
J20
H22
J18
K16
V22
C17
L20
L22
AA19
AB20
Y22
R16
V20
W22
T18
U20
N18
N20
N16
N22
U16
M16
M18
M20
M22
R18
T20
U22
T22
R20
P18
W18
R22
M15
G18
D22
E20
H16
C22
F18
D20
B22
AA20
G16
A21
G15
E17
A20
C19
C18
A19
A18
G14
AB21
E15
C16
A17
A16
C15
G13
C14
A14
E13
C13
AA21
G12
A13
E12
C12
T16
W20
U18
AB19
AA22
P22
P16
C20
E16
A15
A12
V18
P20
E18
E14
A4
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF
2
3
4
8
6
7
1
5
NO STUFF1
2
NO STUFF
1
2
NO STUFF
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF
1
2 NO STUFF
1
2
NO STUFF
1 2
1
2
CR-6
L3_OVDDLTC1962_L3_VOUT
LT1962_L3_ADJ
LT1962_L3_BYP
L3_OVDD
L3_ADDR<17>
L3_ADDR<16>
L3_ADDR<1>
L3_ADDR<2>
L3_ADDR<3>
L3_ADDR<4>
L3_ADDR<7>
L3_ADDR<6>
L3_ADDR<5>
L3_ADDR<8>
L3_ADDR<13>
L3_ADDR<14>
L3_ADDR<15>
L3_ADDR<12>
L3_ADDR<11>
L3_ADDR<10>
L3_ADDR<9>
L3_ADDR<0>
L3_DATA<9>
L3_DATA<8>
L3_DATA<5>
L3_DATA<6>
L3_DATA<7>
L3_DATA<4>
L3_DATA<3>
L3_DATA<2>
L3_DATA<1>
L3_DATA<0>
L3_DATA<10>
L3_DATA<11>
L3_DATA<12>
L3_DATA<13>
L3_DATA<14>
L3_DATA<17>
L3_DATA<16>
L3_DATA<15>
L3_DATA<18>
L3_DATA<19>
L3_DATA<20>
L3_DATA<21>
L3_DATA<22>
L3_DATA<23>
L3_DATA<24>
L3_DATA<27>
L3_DATA<26>
L3_DATA<25>
L3_DATA<28>
L3_DATA<29>
L3_DATA<30>
L3_DATA<31>
L3_DATA<32>
L3_DATA<33>
L3_DATA<34>
L3_DATA<37>
L3_DATA<36>
L3_DATA<35>
L3_DATA<38>
L3_DATA<39>
L3_DATA<40>
L3_DATA<41>
L3_DATA<42>
L3_DATA<43>
L3_DATA<44>
L3_DATA<47>
L3_DATA<46>
L3_DATA<45>
L3_DATA<48>
L3_DATA<49>
L3_DATA<50>
L3_DATA<51>
L3_DATA<52>
L3_DATA<53>
L3_DATA<54>
L3_DATA<57>
L3_DATA<56>
L3_DATA<55>
L3_DATA<58>
L3_DATA<59>
L3_DATA<60>
L3_DATA<61>
L3_DATA<62>
L3_DATA<63>
L3_ECHO_CLK<3>
L3_ECHO_CLK<2>
L3_ECHO_CLK<1>
L3_CLK<1>
L3_CLK<0>
L3_CNTL<1>
L3_CNTL<0>
CPU_L3_VSEL
L3_ECHO_CLK<0>
CPU_DATA<63>
CPU_DATA<62>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<59>
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<54>
CPU_DATA<53>
CPU_DATA<52>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<47>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<44>
CPU_DATA<43>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<40>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<31>
CPU_DATA<30>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<26>
CPU_DATA<25>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<21>
CPU_DATA<20>
CPU_DATA<19>
CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<17>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<13>
CPU_DATA<11>
CPU_DATA<12>
CPU_DATA<9>
CPU_DATA<10>
CPU_DATA<8>
CPU_DATA<7>
CPU_DATA<6>
CPU_DATA<4>
CPU_DATA<5>
CPU_DATA<3>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<0>
LTC1962_L3_VIN
38
38
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
6 38
39
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
7
8
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
38
www.vinafix.vn
402
R511
MF1/16W5%0
402
R516
MF1/16W5%0
402
R527
MF1/16W5%10K
402
R513
MF1/16W5%10K
402
R523
MF1/16W5%10K
402
R514
MF1/16W5%10K
402
R535
MF1/16W5%47K
402
R536
MF1/16W5%10K
402
R538
MF1/16W
5%47K
402
R507
MF1/16W5%0
402
R506
MF1/16W5%0
402
R505
MF1/16W5%0
402
R508
MF1/16W5%10K
G
D
S
SOT-3632N7002DWQ28
G
D
SSOT-3632N7002DWQ28
402MF
1/16W5%
22R14
402MF
1/16W5%
22R6
04
SN74AUC1G04
SC70-5
U1
402MF
1/16W5%
22R519
402MF
1/16W5%
22R529
402
R528
MF1/16W
5%10
402
R509
MF1/16W
5%10
S
D
G
Q262N7002SM
SM2N3904Q25
402MF
1/16W5%
360KR541
402
R526
MF1/16W5%0
+3V_SLEEP
402
R525
MF1/16W5%0
402
R524
MF1/16W5%0
402
R510
MF1/16W5%0
402
R512
MF1/16W5%0
402
R522
MF1/16W5%0
402
R521
MF1/16W5%0
402
R515
MF1/16W5%0
402
R520
MF1/16W5%0
402
R517
MF1/16W5%0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 7 44E051-6469
1.8V INTERFACE
MAXBUS VSEL
1.5V INTERFACE
1.8V INTERFACE
2.5V INTERFACE
L3 VSEL
1.5V INTERFACE
APOLLO REV 3.0
CPU FREQUENCY CONFIGURATION
CPU CONFIGURATION
1 1110 1E
0 0111 0712679.5X 1583
0 0110 06113314178.5X
8.0X
9.0X 1500 1200 1 0111 17
21.0X
20.0X
18.0X
17.0X
13.5X
13.0X
12.5X
11.5X
12.0X
11.0X
10.5X
10.0X
14.0X
15.0X
16.0X
28003500
2167
2250
2833
3000
3333
2000
2083
2667
2500
2333 1867
2000
2133
1733
1800
2267
2400
2667
1600
1667
1 0100 14
1 1111 1F
1 1011 1B
1 0011 13
1 0010 12
1 0000 10
0 1110 0E
1 0101 15
1 1101 1D
1 0001 11
1 1100 1C
1533
1400
1333
1467
1917
1750
1667
1833 1 1001 19
1 1000 18
0 0000 00
1 1010 1A
24.0X
28.0X 4667 3733
4000 3200 1 0110 16
7.5X
7.0X
6.5X
6.0X
1333
1250
1167
1083
1000
933
800
867
1067
1000 0 0001 01
0 1100 0C
0 0010 02
0 0101 05
0 1101 0D
5.0X
5.5X 917
833
733
667 0 1011 0B
0 1001 09
4.0X 667 533 0 1010 0A
3.0X 400500 0 1000 08
3332.0X 267 0 0100 04
0 0011 03PLL BYPASS1.0X
167MHZ
R01A R00A R10A R01B
HIGH SPEED 0 1PLL DISABLE 1 X
R00B R10B R01C R00C R10C R01D R10DR00D
LOW SPEED 0 0
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
R01E R00E R10E
CORE FREQUENCY(AT BUS FREQUENCY) CPU_PLL_CFG
0 1111 0F
MULTIPLIER
0.0X
(Bus-to-Core)
133MHZ
PLL OFF
(MHZ) E ABCD HEX
INVERTED HRESET_L
CPU CONFIGURATION
DESKTOP HAD PROBLEM USING
NEED TO CHARACTERIZEINVERTER TO INVERT HRESET_L
APOLLO ONLY SUPPORTS MAXBUS
BUSTYPE SELECT
MAX BUS MODE
APPLICATION60X BUS MODE
CPU_HRESET_L
TIEDHIGH
2.5V INTERFACE
1.5V INTERFACE
1.8V INTERFACE
2.5V INTERFACE
1.5V INTERFACE
1.8V INTERFACE
CPU_HRESET_L or INT. PU
LOW
LOW
CPU_HRESET_INV
CPU_HRESET_INV
CPU_HRESET_L
CPU_EMODE0_L(PROCESSOR)
SIGNAL
(PROCESSOR)CPU_BUS_VSEL
CPU_L3_VSEL(PROCESSOR)
CPU PLL CONFIG CIRCUITRYPLL SPEED BASED ON 167MHZ - 1GHZ/667MHZ
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF1
2
1
2
NO STUFF1
2
1
2
3
5
4
6
2
1
NO STUFF
12
1_5V_MAXBUS
12
NO STUFF
2
3
5
4
12
NO STUFF
12
1
2
1_8V_MAXBUS
1
2
3
1
2
1
3
2
1 2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
1
2
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
CR-7
CPU_HRESET_LCPU_EMODE0_L
MAXBUS_SLEEP
CPU_HRESET_INVCPU_HRESET_L
MAXBUS_SLEEP
CPU_PLL_FS00
PLL_STOP_L
CPU_PLL_CFGEXT
CPU_PLL_CFG<3>
CPU_PLL_CFG<2>
CPU_PLL_CFG<1>
CPU_PLL_CFG<0>
CPU_PLL_FS01
CPU_PLL_FS10
CPU_PLL_STOP_BASE
CPU_VCORE_HI_OC
CPU_PLL_STOP_OC
CPU_HRESET_INV
CPU_HRESET_LCPU_L3_VSEL
CPU_HRESET_INV
CPU_BUS_VSEL
38
38
34
34
23
23
17
17
39
16
39
16
39
23
9
23
9
23
7
7
7
7
34
7
5 5
5
7 5
5
5
5
5
5
5
30
30
7
5 6
7
5
www.vinafix.vn
402MF
1/16W5%
470R624
402MF
1/16W5%
470R625
+2_5V_SLEEP
402
R645
MF1/16W1%1K
402
R646
MF1/16W1%1K C685
0.1UF20%10VCERM402
C6600.1UF20%10VCERM402
402
R628
MF1/16W1%1K
402
R636
MF1/16W1%1K
C6540.1UF20%10VCERM402
C6630.1UF20%10VCERM402
C6620.1UF20%10VCERM402
C6450.1UF20%10VCERM402
C6480.1UF20%10VCERM402
C6650.1UF20%10VCERM402
C6670.1UF20%10VCERM402
C6640.1UF20%10VCERM402
C6660.1UF20%10VCERM402
C6510.1UF20%10VCERM402
C6720.1UF20%10VCERM402
C6410.1UF20%10VCERM402
C6710.1UF20%10VCERM402
C6400.1UF20%10VCERM402
C6440.1UF20%10VCERM402
C6740.1UF20%10VCERM402
C6500.1UF20%10VCERM402
C6690.1UF20%10VCERM402
C6550.1UF20%10VCERM402
C6490.1UF20%10VCERM402
402
R616
MF1/16W1%249
C6700.1UF20%10VCERM402
C6460.1UF20%10VCERM402
C6380.1UF20%10VCERM402
C6520.1UF20%10VCERM402
C6310.1UF20%10VCERM402
C6470.1UF20%10VCERM402
C6300.1UF20%10VCERM402
C6370.1UF20%10VCERM402
C6750.1UF20%10VCERM402
C6530.1UF20%10VCERM402
C6872.2UF20%10VCERM805
C66110UF20%6.3VCERM805
C64210UF20%6.3VCERM805
C6842.2UF20%10VCERM805
C6392.2UF20%10VCERM805
C6352.2UF20%10VCERM805
C68610UF20%6.3VCERM805
C63610UF20%6.3VCERM805
402MF
1/16W5%
1KR641
SM11/16W
RP4510K5%
SM11/16W
RP4610K5%
402
R617
MF1/16W1%249
NC/SA17
DQ22DQ21
DQ23
DQ28DQ27DQ26DQ25DQ24
DQ29
DQ33
DQ30DQ31DQ32
NC_P9
DQ34DQ35
NC_P2NC_P1
NC_N1
NC_N7NC_N5
NC_N9
NC_K9NC_L1NC_L9NC_M1NC_M9
NC_K2
NC_J1NC_J2NC_J9NC_K1
NC_G9
NC_N10
NC_G10
VSS
CQ1CQ1*CQ2CQ2*
VREF1VREF2
TMSTDITDOTCK
NC_A1
NC_A5NC_A2
NC_A7NC_A10
NC_F10
NC_B10
NC_A11
NC_B7NC_B5
NC_B9
NC_B1
NC_C1NC_C2NC_C9NC_D1
NC_E9NC_F1NC_F9
NC_E1NC_D9
NC_G1
DQ7DQ8
DQ12DQ11DQ10DQ9
DQ13DQ14
DQ17DQ16DQ15
DQ18
DQ20DQ19
SA10SA11
SA13SA14SA15SA16
SA12
LBO*
B2B1
B3
G*
KVDDQ
K*
DQ1
ZQ
DQ0
DQ2DQ3DQ4DQ5DQ6
VDD
SA0SA1
SA5SA6
SA4SA3SA2
SA9SA8SA7
U7300MHZ-128KX36
BGA
NC/SA17
DQ22DQ21
DQ23
DQ28DQ27DQ26DQ25DQ24
DQ29
DQ33
DQ30DQ31DQ32
NC_P9
DQ34DQ35
NC_P2NC_P1
NC_N1
NC_N7NC_N5
NC_N9
NC_K9NC_L1NC_L9NC_M1NC_M9
NC_K2
NC_J1NC_J2NC_J9NC_K1
NC_G9
NC_N10
NC_G10
VSS
CQ1CQ1*CQ2CQ2*
VREF1VREF2
TMSTDITDOTCK
NC_A1
NC_A5NC_A2
NC_A7NC_A10
NC_F10
NC_B10
NC_A11
NC_B7NC_B5
NC_B9
NC_B1
NC_C1NC_C2NC_C9NC_D1
NC_E9NC_F1NC_F9
NC_E1NC_D9
NC_G1
DQ7DQ8
DQ12DQ11DQ10DQ9
DQ13DQ14
DQ17DQ16DQ15
DQ18
DQ20DQ19
SA10SA11
SA13SA14SA15SA16
SA12
LBO*
B2B1
B3
G*
KVDDQ
K*
DQ1
ZQ
DQ0
DQ2DQ3DQ4DQ5DQ6
VDD
SA0SA1
SA5SA6
SA4SA3SA2
SA9SA8SA7
U6300MHZ-128KX36
BGA
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 8 44E051-6469
L3 REFERENCE VOLTAGE
BALL R3 IS NC ON 4MBIT PARTHAVE TO CONNECT L3_ADDR17 TO THIS PIN
HAVE TO CONNECT L3_ADDR17 TO THIS PINBALL R3 IS NC ON 4MBIT PART
Split caps of same value evenly between SRAM chips
DIRECTLY UNDERNEATH THE CHIPSSO BYPASS CAP CAN BE PLACEDBALL F9, K9 CONNECTED TO GNDNOT CONNECTED IN THE SUBSTRATESAMSUNG VERIFIED THAT ALL NC PINS ARE
within a SRAM
Data lines swappable
within a SRAM
Data lines swappable
L3 CACHE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Split caps of same value evenly between SRAM chips
NC
NC
ADDR<0..1>)
Addr lines swappable
within a SRAM (except
Split caps of same value evenly between SRAM chips
Split caps of same value evenly between SRAM chips
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1 2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1 2
1
2
4
3
8
7
5
6
1
2
4
3
8
7
5
6
1
2
CRITICAL
A4
A8
P6
M2
E2
L10
D10
P10
P11
G11
F11
E10
E11
D11
C10
C11
B11
B3
B2
N11
C3
D3
D2
E3
F3
F2
G2
G3
J3
K3
M10
L3
L2
M3
N3
N2
P3
M11
L11
K10
K11
J11
J10
H1
B6
A6
R6
A1
A10
A11
A2
A5
A7
B1
B10
B5
B7
B9
C1
C2
C9
D1
D9
E1
E9
F1
F10
F9
G1
G10
G9
J1
J2
J9
K1
K2
K9
L1
L9
M1
M9
N1
N10
N5
N7
N9
P1
P2
P9
C6
C7
A9
R4
R5
R7
R8
R9
A3
R3
B4
B8
C5
N6
P4
P5
P7
P8
R2
R11
R1
R10
E4
E8
F4
F8
G4
G8
H3
H4
H8
H9
J4
J8
K4
K8
L4
L8
F5
F7
G5
G7
H5
H7
J5
J7
K5
K7
H2
H10
C4
C8
D4
D5
D6
D7
D8
E5
E6
E7
F6
G6
H6
J6
K6
L5
L6
L7
M4
M5
M6
M7
M8
N4
N8
H11
CRITICAL
A4
A8
P6
M2
E2
L10
D10
P10
P11
G11
F11
E10
E11
D11
C10
C11
B11
B3
B2
N11
C3
D3
D2
E3
F3
F2
G2
G3
J3
K3
M10
L3
L2
M3
N3
N2
P3
M11
L11
K10
K11
J11
J10
H1
B6
A6
R6
A1
A10
A11
A2
A5
A7
B1
B10
B5
B7
B9
C1
C2
C9
D1
D9
E1
E9
F1
F10
F9
G1
G10
G9
J1
J2
J9
K1
K2
K9
L1
L9
M1
M9
N1
N10
N5
N7
N9
P1
P2
P9
C6
C7
A9
R4
R5
R7
R8
R9
A3
R3
B4
B8
C5
N6
P4
P5
P7
P8
R2
R11
R1
R10
E4
E8
F4
F8
G4
G8
H3
H4
H8
H9
J4
J8
K4
K8
L4
L8
F5
F7
G5
G7
H5
H7
J5
J7
K5
K7
H2
H10
C4
C8
D4
D5
D6
D7
D8
E5
E6
E7
F6
G6
H6
J6
K6
L5
L6
L7
M4
M5
M6
M7
M8
N4
N8
H11
CR-8
L3_ADDR<16>
L3_ADDR<8>
L3_ADDR<6>
L3_ADDR<7>
L3_ADDR<10>
L3_ADDR<13>
L3_ADDR<11>
L3_ADDR<12>
L3_ADDR<1>
L3_ADDR<0>
L3_DATA<9>
L3_DATA<4>
L3_DATA<3>
L3_DATA<6>
L3_DATA<0>
L3_DATA<1>
L3_DATA<5>
L3_ZQ<0>
L3_CLK_REF
L3_CLK<0>
L3_PULLDOWN<0>
L3_PULLDOWN<0>
L3_CNTL<1>
L3_CNTL<0>
L3_PULLDOWN<0>
L3_ADDR<17>
L3_ADDR<15>
L3_ADDR<9>
L3_ADDR<2>
L3_ADDR<4>
L3_ADDR<3>
L3_ADDR<5>
L3_ADDR<14>
L3_DATA<17>
L3_DATA<23>
L3_DATA<22>
L3_DATA<20>
L3_DATA<31>
L3_DATA<21>
L3_DATA<18>
L3_DATA<16>
L3_DATA<29>
L3_DATA<24>
L3_DATA<14>
L3_DATA<11>
L3_DATA<7>
L3_DATA<2>
JTAG_L3_TCK
JTAG_L3_SRAM2_TDI
JTAG_L3_TMS
JTAG_L3_TDI_TP
L3_DQPC<0>
L3_DQPD<0>
L3_DQPA<0>
L3_DQPB<0>
L3_DATA<10>
L3_DATA<13>
L3_DATA<8>
L3_DATA<12>
L3_DATA<15>
L3_DATA<26>
L3_DATA<27>
L3_DATA<25>
L3_DATA<28>
L3_DATA<19>
L3_DATA<30>L3_ECHO_CLK<0>
L3_ECHO_CLK<1>
L3_VREF
L3_ADDR<16>
L3_ADDR<8>
L3_ADDR<6>
L3_ADDR<7>
L3_ADDR<10>
L3_ADDR<13>
L3_ADDR<11>
L3_ADDR<12>
L3_ADDR<1>
L3_ADDR<0>
L3_DATA<43>
L3_DATA<55>
L3_DATA<60>
L3_DATA<49>
L3_DATA<42>
L3_DATA<40>
L3_DATA<35>
L3_CLK_REF
L3_CLK<1>
L3_CNTL<1>
L3_CNTL<0>
L3_PULLDOWN<1>
L3_ADDR<17>
L3_ADDR<15>
L3_ADDR<9>
L3_ADDR<2>
L3_ADDR<4>
L3_ADDR<3>
L3_ADDR<5>
L3_ADDR<14>
L3_DATA<47>
L3_DATA<48>
L3_DATA<52>
L3_DATA<57>
L3_DATA<61>
L3_DATA<53>
L3_DATA<63>
L3_DATA<59>
L3_DATA<56>
L3_DATA<54>
L3_DATA<58>
L3_DATA<51>
L3_DATA<62>
L3_DATA<50>
JTAG_L3_TCK
JTAG_L3_TDO_TP
JTAG_L3_TMS
JTAG_L3_SRAM2_TDI
L3_ECHO_CLK<3>
L3_ECHO_CLK<2>
L3_DQPC<1>
L3_DQPD<1>
L3_DQPA<1>
L3_DQPB<1>
L3_DATA<32>
L3_DATA<37>
L3_DATA<34>
L3_DATA<38>
L3_DATA<33>
L3_DATA<36>
L3_DATA<45>
L3_DATA<46>
L3_DATA<39>
L3_DATA<41>
L3_DATA<44>
L3_ZQ<1>
L3_OVDD L3_OVDD
L3_OVDD
L3_OVDD
L3_VREF
L3_PULLDOWN<1>
L3_PULLDOWN<1>
L3_DQPA<0>
L3_DQPB<0>
L3_DQPC<0>
L3_DQPD<0>
L3_DQPA<1>
L3_DQPB<1>
L3_DQPC<1>
L3_DQPD<1>
L3_PULLDOWN<0>
L3_PULLDOWN<1>
JTAG_L3_TCK
L3_OVDD
L3_CLK_REF
L3_OVDD
L3_VREF
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38 38
38
38
38 38
8
8
8
8
8
8
8
8
8
8
36
36
36
36
36
36
36
38
36
8
8
8
8
8
8
8
8
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
39
39
36
36
36
36
36
36
36
36
36
36
36 36
36
38
8
8
8
8
8
8
8
8
8
8
36
36
36
36
36
36
36
38
36
8
8
8
8
8
8
8
8
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
39
39
36
36
36
36
36
36
36
36
36
36
36
36
36
8 8
8
8
38
39
8
38
8
38
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
8
8
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
8
8
39
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6 6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
39
8
8
6
6
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6 6
6
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
6
8
6
8
www.vinafix.vn
402
R98
MF1/16W
1%1K
C2910.22UF
20%6.3VCERM402
402MF
1/16W5%
4.7R178
402MF
1/16W5%
0R104
SM11/16W5%
10KRP25
402MF
1/16W5%
0R122
402
R152
MF1/16W
1%511
402
R133
MF1/16W
5%10K
402
R134
MF1/16W
5%10K
402
R565
MF1/16W
5%10K
402
R121
MF1/16W
5%10K
402
R111
MF1/16W
5%10K
402
R87
MF1/16W
5%10K
402
R96
MF1/16W
5%10K
402
R587
MF1/16W
5%10K
402
R103
MF1/16W
5%10K
402
R586
MF1/16W
5%10K
402
R578
MF1/16W
5%10K
402
R571
MF1/16W
5%10K
402
R554
MF1/16W
5%10K
402
R558
MF1/16W
5%10K
402
R557
MF1/16W
5%10K
402
R97
MF1/16W
5%10K
402
R120
MF1/16W
5%10K
402
R132
MF1/16W
5%10K
402
R110
MF1/16W
5%10K
402
R139
MF1/16W
5%10K
402
R95
MF1/16W
5%10K
402
R119
MF1/16W
5%10K
402
R102
MF1/16W
5%10K
402
R86
MF1/16W
5%10K
402
R580
MF1/16W
5%10K
402
R572
MF1/16W
5%10K
402
R588
MF1/16W
5%10K
402
R595
MF1/16W
5%10K
402
R559
MF1/16W
5%10K
402
R579
MF1/16W
5%10K
402
R566
MF1/16W
5%10K
402
R555
MF1/16W
5%10K
402
R131
MF1/16W
5%10K
402
R101
MF1/16W
5%10K
402
R138
MF1/16W
5%10K
402
R117
MF1/16W
5%10K
402
R109
MF1/16W
5%10K
402
R118
MF1/16W
5%10K
402
R85
MF1/16W
5%10K
402
R589
MF1/16W
5%10K
402
R596
MF1/16W
5%10K
402
R567
MF1/16W
5%10K
402
R581
MF1/16W
5%10K
402
R573
MF1/16W
5%10K
402
R582
MF1/16W
5%10K
402
R556
MF1/16W
5%10K
402
R94
MF1/16W
5%10K
402
R560
MF1/16W
5%10K
402
R137
MF1/16W
5%10K
402
R129
MF1/16W
5%10K
402
R108
MF1/16W
5%10K
402
R92
MF1/16W
5%10K
402
R93
MF1/16W
5%10K
402
R130
MF1/16W
5%10K
402
R116
MF1/16W
5%10K
402
R100
MF1/16W
5%10K
402
R597
MF1/16W
5%10K
402
R574
MF1/16W
5%10K
402
R591
MF1/16W
5%10K
402
R562
MF1/16W
5%10K
402
R561
MF1/16W
5%10K
402
R590
MF1/16W
5%10K
402
R583
MF1/16W
5%10K
402
R568
MF1/16W
5%10K
(PLL6)VSSA_7
(PLL6)VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45
D_46
D_47
D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56
D_57
D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15
D_16
D_17
D_22
D_21
D_20
D_19
D_18
D_23
D_24
D_25
D_26
D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35
D_36
D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0
A_1
A_2
A_3
A_4
A_5
A_9
A_6
A_7
A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16
A_17
A_18
A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST
TSIZ_0
TSIZ_1
TSIZ_2
CI
GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
BGA
INTREPID-REV2.1U44
402
R176
MF1/16W
5%0
402MF
1/16W5%
0R168
402
R162
MF1/16W
5%0
402MF
1/16W5%
0R161
402MF
1/16W5%
0R177
402MF
1/16W5%
0R151
SM11/16W5%
10KRP25
SM11/16W5%
10KRP24
SM11/16W5%
10KRP24
SM11/16W5%
10KRP24
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP25
SM11/16W5%
10KRP24
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 9 44E051-6469
1: PLL4
0: PLL5 (NO SPREAD)
0: PLL5 (NO SPREAD)
1: PLL4
NO BUS KEEPER - PU
INPUT
IT CANNOT BE CHANGED BY SOFTWAREIF A STRAP IS NOT LISTED, THEN
CHANGED BY SOFTWARE:THE FOLLOWING STRAP BITS CAN BE
6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED
Intrepid MaxBusNO BUS KEEPER - PU
Spare
Spare
BIT 32 TO 39
Spare
Spare
1: Active low
ExtPLL_SDwn_Pol
0: Active high
0: Active high
1: Active low
DDR_TPDEn_Pol
0: Inactive
1: Active
AnalyzerClk_En_h
PCI0 Source Clock
PCI1 Source Clock
BIT 40 TO 47
InternalSpreadEn
0: Inactive
BIT 48 TO 55
Spare
Spare
TI 1394b workaround
1: TI PHY workaround
0: Normal 1394b
1: Active
0: Inactive
BUF_REF_CLK_OUTEnable_h
INTREPID BOOT STRAPS
INTREPID OUTPUTS HIGH BY DEFAULT
1: Active
SelPLL4ExtSrc
0: PLL5
1: External source
PLL4MODESEL_NXT[2:0]
100: 83.20MHZ
MaxBus output impedance
111: 28.6 ohm
011: 33.3 ohm
110: 66.6 ohm
000: 200 ohm
100: 200 ohm
010: 100 ohm
101: 40 ohm
001: 50 ohm
BIT2 BIT1 BIT0
BIT0BIT1BIT2
Vin = Intrepid Vcore (1.5V)Vout = MaxBus rail (1.8V)
NO BUS KEEPER
NO BUS KEEPER
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PD
INPUT - PU
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
SHORT = 1" SHORTER THAN MATCHED LENGTHLONG = 1" LONGER THAN MATCHED LENGTH
INTREPID BOOT STRAPSBIT 56 TO 63
0: Max Bus (G4)
1: 60x bus (G3)
Processor Bus Mode
0: REQ/GNT
1: GPIOs
0: REQ/GNT
1: GPIOs
0: REQ/GNT
1: GPIOs
Spare
PCI1_REQ0_L / PCI1_GNT0_L
PCI1_REQ2_L / PCI1_GNT2_L
PCI1_REQ1_L / PCI1_GNT1_L
FireWire PHY interface
1: B-mode interface
0: Legacy interface
MAXBUS PULL-UPS
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
000: 166.4MHZ (2.5X)001: 149.76MHZ010: 133.12MHZ (2.0X)011: 99.84MHZ (1.5X)
MODE A (2.5X) IS FOR STATIC OPERATIONMODE C (2.0X) IS FOR CLOCK SLEW OPERATION
Spare
Spare
Spare
Spare
1: TDI output
0: TDI input (JTAG)
DDR_TPDModeEnable_h
1
2
1
2
1 2
1 2
2 7
12
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF1
2
1
2
1
2
NO_SSCG1
2
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
SSCG1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF1
2
NO STUFF1
2
1
2
NO STUFF1
2
NO STUFF1
2
1
2
SSCG1
2
1
2
NO STUFF1
2
1
2
1
2
1
2
NO STUFF1
2
NO_SSCG1
2
SSCG1
2
NO_SSCG1
2
NO STUFF1
2
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
1
2
1
2
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
B29
H13
G8
H23
D24
D25
J22
B25
H22
G22
D22
B24
B23
E22
J21
G21
A27
E21
A24
D21
A23
H20
B22
H21
A22
E20
B21
E24
D20
A21
G23
B26
A26
D23
A25
E23
E26
E29
G26
J15
J24
H16 A30
G28
K25
D29
B30
D10
G12
B10
J13
A10
D12
E13
G13
B11
D13
A11
G14
E11
H14
E14
B12
G15
B13
H15
D14
B14
A12
G16
H11
E15
J16
D15
A14
A13
D16
E16
G17
B15
H17
B9
A15
B16
E17
A16
J18
H18
D17
G18
A17
B17
B8
E18
B18
D18
A18
A19
H19
B19
J19
A20
D19
A9
E19
G19
B20
G20
A8
E12
D11
A29
B31
G27
A32
AH9
AM8
AK9
E27
A31
A28
E28
B27
G24
H24
D26
E25
G25
B28
D27
J25
H26
H25
D28
NO STUFF1
2
1 2
1
2
NO STUFF
1 2
1 2
NO STUFF
1 2
3 6
1 8
4 5
2 7
2 7
1 8
3 6
4 5
4 5
3 6
CR-9
MAXBUS_SLEEP
INT_CPUFB_OUT_SHORTINT_CPUFB_OUT
SYSCLK_CPU SYSCLK_CPU_UF
INT_CPUFB_IN
CPU_QREQ_L
MAXBUS_SLEEP
CPU_BG_L
CPU_DBG_L
CPU_TEA_L
CPU_AACK_L
CPU_HIT_L
CPU_DRDY_L
CPU_ARTRY_L
CPU_BR_L
CPU_TS_L
CPU_TA_L
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
MAXBUS_SLEEP
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<63>
CPU_DATA<47>
INT_CPUFB_LONG
INT_CPUFB_IN_NORM
INT_CPUFB_OUT_NORM
INT_CPUFB_IN
CPU_DATA<32>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<54>
CPU_DATA<55>
CPU_DATA<46>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
MAXBUS_SLEEP
MAXBUS_SLEEP
+1_5V_INTREPID_PLL
CPU_TEA_L
CPU_TA_L
CPU_DTI<2>
CPU_DTI<1>
CPU_DTI<0>
CPU_DRDY_L
CPU_DBG_L
CPU_DATA<63>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<60>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<48>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<43>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<40>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<19>
CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<12>
CPU_DATA<13>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<7>
CPU_DATA<9>
CPU_DATA<8>
CPU_DATA<6>
CPU_DATA<5>
CPU_DATA<2>
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<0>
CPU_DATA<1>CPU_BR_L
CPU_BG_L
CPU_TS_L
CPU_ADDR<1>
CPU_ADDR<0>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<12>
CPU_ADDR<11>
CPU_ADDR<14>
CPU_ADDR<13>
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<19>
CPU_ADDR<18>
CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_CI_L
CPU_TBST_L
CPU_TSIZ<0>
CPU_TSIZ<2>
CPU_TSIZ<1>
CPU_TT<1>
CPU_TT<0>
CPU_TT<2>
CPU_TT<4>
CPU_TT<3>
CPU_WT_L
CPU_AACK_L
CPU_HIT_L
CPU_ARTRY_L
CPU_QREQ_L
CPU_QACK_L
INT_SUSPEND_REQ_L
INT_SUSPEND_ACK_L
INT_CPUFB_OUT
SYSCLK_LA_TP
CPU_CLK_EN
CPU_TBEN
INTREPID_ACS_REF
+1_5V_INTREPID_PLL7
CPU_GBL_L
38
38
38
38
38
34
34
34
34
34
23
23
23
23
23
17
17
17
17
17
16
16
16
16
16
9
36
9
36
36
36
36
36
36
36
36
36
36
36
36
36
9
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
9
9
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
36
36
36
9
7
9
9
9
9
9
9
9
9
9
9
9
9
9
7
9
9
9
9
9
9
36
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
7
7
15
9
9
36
36
36
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 9
9
9
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
9
9
9
9
36
36
36
5
36 9
5 36
9
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
5
6
6
6
6
6
6
36
36
36
9
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
13
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
30
30
9
30
5
38
5
www.vinafix.vn
402
R773
MF1/16W
5%10K
402MF
1/16W5%
22R188
402
R154
MF1/16W1%1K
402
R153
MF1/16W
1%10K
C2240.1UF
20%10V
CERM402402
R144
MF1/16W
1%10K
A0A1
A6
A2A3A4A5
A9A8A7
A10A11A12A13A14A15A16
A20
A17A18A19
CEOEWEWPPWD
GND
DQ0DQ1
DQ6DQ5
DQ2DQ3DQ4
DQ7
VPP VCC
FEPR-1MX8
TSOP3.3V
U17
C4412.2UF20%10VCERM805
C4510.1UF20%10VCERM402
C4590.1UF20%10VCERM402
402
R312
MF1/16W
5%10K
+3V_MAIN
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_31
DDR_DATA_32
DDR_BA_0
DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS
DDRCAS
DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1
MEMORYDDR
INTERFACE
DDR_A_10
DDR_A_11
DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
BGAINTREPID-REV2.1
U44
402
R268
MF1/16W
5%10K
402MF
1/16W5%
1KR280
SM11/16W5%
22RP31
SM11/16W5%
22RP31
SM11/16W5%
22RP32
SM11/16W5%
22RP32
SM11/16W5%
22RP31
SM11/16W5%
22RP32
402MF
1/16W5%
22R199
SM11/16W5%
22RP31
SM11/16W5%
22RP32
SM11/16W5%
22RP34
SM11/16W5%
22RP33
SM11/16W5%
22RP34
SM11/16W5%
22RP34
SM11/16W5%
22RP34
SM11/16W5%
22RP33
SM11/16W5%
22RP33
SM11/16W5%
22RP33
SM11/16W5%
22RP30
SM11/16W5%
22RP26
SM11/16W5%
22RP26
SM11/16W5%
22RP26SM1
1/16W5%
22RP26
SM11/16W5%
22RP29
SM11/16W5%
22RP29
SM11/16W5%
22RP30
SM11/16W5%
22RP29
SM11/16W5%
22RP30
SM11/16W5%
22RP30
SM11/16W5%
22RP27
SM11/16W5%
22RP29
SM11/16W5%
22RP27
SM11/16W5%
22RP27
SM11/16W5%
22RP27
+3V_MAIN
402
R770
MF1/16W
5%10K
402
R771
MF1/16W
5%10K
402
R772
MF1/16W
5%10K
TABLE_5_ITEM
CRITICAL ?341S1241 1 BOOTROM,P84 U17
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 10 44E051-6469
PULL-DOWN RESISTORS TO ENSURECKE STAYS LOW AFTER INTREPID2.5V I/O SHUTS OFF
1MB BOOT ROM
OVERRIDE ROM MODULEINTERCEPTS ROM CHIP SELECT
MEM_VREF
’2’ & ’3’ GO TO SLOT B’0’ & ’1’ GO TO SLOT A
’2’ & ’3’ GO TO SLOT B’0’ & ’1’ GO TO SLOT A
’1’S ARE SAME POLARITY (ACTIVE-HI)’0’S ARE SAME POLARITY (ACTIVE-LO)
CNTL
BA
ADDR
CKE
CS
PINS ARE SWAPABLE FOR RPAKS
CLOCKS
INT - DDR/BOOTROM
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
1
2
1 2
1
2
1
2
1
2
1
2
OMIT
21
20
36
6
5
4
3
2
1
40
13
37
19
38
18
17
16
15
14
8
7
22
25
26
27
28
32
33
34
35
23 39
24
10
30 3111
9
12
1
2
1
2
1
2
1
2
CRITICAL
H32
AN35
AM35
AM36
AL36
AN34
AN36
AL35
AL33
L29
K30
H35
G35
G33
H33
D35
G36
F36
F35
E35
E36
G32
D36
H36
L30
M29
AK32
AK33
AH35
AG36
AH36
AH32
AG32
AG31
AE32
AF35
AF36
AE36
AK31
AE35
AE33
AD36
AD35
AA36
AA35
AA33
AB36
AB35
AC36
AK35
AA32
AB33
V36
U33
U32
V35
T30
U36
U35
T36
AK36
P33
R30
P35
P36
R36
R35
R33
R32
N35
M36
AJ32
L35
M35
M33
L36
N33
M30
J32
J33
J35
K32
AJ35
K33
J36
K36
K35
AJ36
AG33
AG35
AJ33
AH33
AD33
AC35
T35
T33
N32
L33
AJ31
AH31
AD32
AB30
V30
P32
N29
L32
Y33
Y32
Y36
Y35
W30
Y30
W33
W32
V32
V33
W36
W35
AA22
AB32
AE29
N30
T32
Y22
T22
1
2
1 2
4 5
3 6
1 8
2 7
2 7
3 6
1 2
1 8
4 5
1 8
4 5
3 6
2 7
4 5
2 7
1 8
3 6
1 8
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
4 5
2 7
4 5
3 6
1 8
2 7
3 6
1
2
1
2
1
2
CR-10
RAM_CKE<0>
RAM_CKE<1>
RAM_CKE<2>
RAM_CKE<3>
+2_5V_INTREPID
MEM_RAS_L RAM_RAS_L
RAM_WE_LMEM_WE_L
MEM_CAS_L RAM_CAS_L
RAM_BA<1>MEM_BA<1>
RAM_BA<0>MEM_BA<0>
RAM_ADDR<11>MEM_ADDR<11>
RAM_ADDR<9>MEM_ADDR<9>
RAM_ADDR<12>MEM_ADDR<12>
RAM_ADDR<10>MEM_ADDR<10>
RAM_ADDR<8>MEM_ADDR<8>
RAM_ADDR<7>MEM_ADDR<7>
RAM_ADDR<5>MEM_ADDR<5>
RAM_ADDR<3>MEM_ADDR<3>
RAM_ADDR<1>MEM_ADDR<1>
RAM_ADDR<6>MEM_ADDR<6>
RAM_ADDR<4>MEM_ADDR<4>
RAM_ADDR<2>MEM_ADDR<2>
RAM_ADDR<0>MEM_ADDR<0>
RAM_CKE<3>MEM_CKE<3>
RAM_CKE<1>MEM_CKE<1>
RAM_CS_L<3>MEM_CS_L<3>
RAM_CKE<2>MEM_CKE<2>
RAM_CKE<0>MEM_CKE<0>
RAM_CS_L<2>MEM_CS_L<2>
RAM_CS_L<1>MEM_CS_L<1>
SYSCLK_DDRCLK_B0_LSYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_LSYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0_LSYSCLK_DDRCLK_A0_L_UF
RAM_CS_L<0>MEM_CS_L<0>
SYSCLK_DDRCLK_B0SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B1SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_A1_LSYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A0SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A1SYSCLK_DDRCLK_A1_UF
INT_MEM_VREF
MEM_ADDR<12>
MEM_ADDR<11>
MEM_ADDR<10>
MEM_ADDR<9>
MEM_ADDR<8>
MEM_ADDR<7>
MEM_ADDR<6>
MEM_ADDR<5>
MEM_ADDR<4>
MEM_ADDR<3>
MEM_ADDR<2>
MEM_ADDR<1>
MEM_ADDR<0>
MEM_MUXSEL_L<1>
MEM_MUXSEL_H<1>
MEM_MUXSEL_H<0>
MEM_CKE<3>
MEM_CKE<2>
MEM_CKE<1>
MEM_CKE<0>
MEM_WE_L
MEM_CAS_L
MEM_RAS_L
MEM_DQM<7>
MEM_DQM<6>
MEM_DQM<5>
MEM_DQM<4>
MEM_DQM<3>
MEM_DQM<1>
MEM_DQM<0>
MEM_DQM<2>
MEM_DQS<7>
MEM_DQS<6>
MEM_DQS<5>
MEM_DQS<4>
MEM_DQS<3>
MEM_DQS<2>
MEM_DQS<1>
MEM_DQS<0>
MEM_CS_L<2>
MEM_CS_L<1>
MEM_CS_L<0>
MEM_CS_L<3>
MEM_BA<1>
MEM_BA<0>
MEM_DATA<54>
MEM_DATA<31>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<24>
MEM_DATA<15>
MEM_DATA<63>
MEM_DATA<62>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<56>
MEM_DATA<55>
MEM_DATA<53>
MEM_DATA<52>
MEM_DATA<51>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<48>
MEM_DATA<47>
MEM_DATA<46>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<40>
MEM_DATA<39>
MEM_DATA<38>
MEM_DATA<37>
MEM_DATA<36>
MEM_DATA<35>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<32>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<23>
MEM_DATA<22>
MEM_DATA<21>
MEM_DATA<20>
MEM_DATA<19>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<16>
MEM_DATA<14>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<8>
MEM_DATA<7>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<0>
MEM_MUXSEL_L<0>
INT_DDRCLK5_N_TP
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B0_UF
INT_DDRCLK5_P_TP
INT_DDRCLK2_P_TP
INT_DDRCLK2_N_TP
INT_MEM_VREF
INT_MEM_REF_H
PCI_AD<31>
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<1>
PCI_AD<0>
ROM_OE_L
ROM_RW_L
INT_RESET_L
ROM_CS_L ROM_ONBOARD_CS_L
ROM_WP_L
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
36
36
36
36
17
36
36
36
36
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
39
39
39
12
12
12
12
16
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
12 36
12 36
36 36
12 36
12 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
24
24
30
24 39
10
10
10
10
11
10 12
12 10
10 12
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
10 10
10 10
12 10
10 10
10 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
12 10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
11
11
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
10
38
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
14
13 24
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C7060.1UF20%10VCERM402
C7120.1UF20%10VCERM402
C7170.1UF20%10VCERM402
C7000.1UF20%10VCERM402
C7010.1UF20%10VCERM402
C6990.1UF20%10VCERM402
C7160.1UF20%10VCERM402
C7110.1UF20%10VCERM402
C7050.1UF20%10VCERM402
C7070.1UF20%10VCERM402
C6910.1UF20%10VCERM402
C6980.1UF20%10VCERM402
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U14CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U13CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U12CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U11CBTV4020
BGA
402MF
1/16W5%
0R192
402MF
1/16W5%
0R202
402MF
1/16W5%
0R193
402MF
1/16W5%
0R189
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 11 44E051-6469
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GNDSEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
16BIT 2:1 DDR MUXES
BIT 48..63BIT 32..47BIT 16..31BIT 0..15
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8
CRITICAL
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8
CRITICAL
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8 CRITICAL
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8
NO STUFF
1 2
NO STUFF
1 2
1 2
1 2
CR-11
+2_5V_INTREPID+2_5V_INTREPID+2_5V_INTREPID+2_5V_INTREPID
RAM_DATA_A<57>
MEM_DQM<7>
RAM_DATA_A<56>
RAM_DATA_A<48>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<49>
RAM_DATA_A<53>
RAM_DATA_A<52>
RAM_DATA_A<54>
RAM_DATA_A<55>
RAM_DQS_A<6>
RAM_DQM_A<6>
RAM_MUXSEL_H
MEM_DATA<63>
MEM_DQS<7>
MEM_DATA<62>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<56>
MEM_DQM<6>
MEM_DATA<55>
MEM_DATA<54>
MEM_DQS<6>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<51>
RAM_DQM_A<7>
MEM_DATA<48>
RAM_DQS_A<7>
RAM_DATA_A<62>
RAM_DATA_A<63>
RAM_DATA_A<60>
RAM_DATA_A<61>
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DATA_B<59>
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DQS_B<7>
RAM_DQM_B<7>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DATA_B<55>
RAM_DATA_B<51>
RAM_DATA_B<52>
RAM_DQS_B<6>
RAM_DQM_B<6>
RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<50>
RAM_DATA_B<49>
RAM_DATA_B<48>RAM_DATA_A<41>
MEM_DQM<5>
RAM_DATA_A<40>
RAM_DATA_A<32>
RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<33>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_DATA_A<38>
RAM_DATA_A<39>
RAM_DQS_A<4>
RAM_DQM_A<4>
RAM_MUXSEL_H
MEM_DATA<47>
MEM_DQS<5>
MEM_DATA<46>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<40>
MEM_DQM<4>
MEM_DATA<39>
MEM_DATA<38>
MEM_DQS<4>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<35>
RAM_DQM_A<5>
MEM_DATA<32>
RAM_DQS_A<5>
RAM_DATA_A<46>
RAM_DATA_A<47>
RAM_DATA_A<44>
RAM_DATA_A<45>
RAM_DATA_A<43>
RAM_DATA_A<42>
RAM_DATA_B<43>
RAM_DATA_B<44>
RAM_DATA_B<45>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DQS_B<5>
RAM_DQM_B<5>
RAM_DATA_B<37>
RAM_DATA_B<38>
RAM_DATA_B<39>
RAM_DATA_B<35>
RAM_DATA_B<36>
RAM_DQS_B<4>
RAM_DQM_B<4>
RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DATA_B<42>
RAM_DATA_B<34>
RAM_DATA_B<33>
RAM_DATA_B<32>RAM_DATA_A<25>
MEM_DQM<3>
RAM_DATA_A<24>
RAM_DATA_A<16>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<17>
RAM_DATA_A<21>
RAM_DATA_A<20>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DQS_A<2>
RAM_DQM_A<2>
RAM_MUXSEL_L
MEM_DATA<31>
MEM_DQS<3>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<24>
MEM_DQM<2>
MEM_DATA<23>
MEM_DATA<22>
MEM_DQS<2>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<19>
RAM_DQM_A<3>
MEM_DATA<16>
RAM_DQS_A<3>
RAM_DATA_A<30>
RAM_DATA_A<31>
RAM_DATA_A<28>
RAM_DATA_A<29>
RAM_DATA_A<27>
RAM_DATA_A<26>
RAM_DATA_B<27>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DATA_B<31>
RAM_DQS_B<3>
RAM_DQM_B<3>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DATA_B<23>
RAM_DATA_B<19>
RAM_DATA_B<20>
RAM_DQS_B<2>
RAM_DQM_B<2>
RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DATA_B<26>
RAM_DATA_B<18>
RAM_DATA_B<17>
RAM_DATA_B<16>RAM_DATA_A<9>
MEM_DQM<1>
RAM_DATA_A<8>
RAM_DATA_A<0>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<1>
RAM_DATA_A<5>
RAM_DATA_A<4>
RAM_DATA_A<6>
RAM_DATA_A<7>
RAM_DQS_A<0>
RAM_DQM_A<0>
RAM_MUXSEL_L
MEM_DATA<15>
MEM_DQS<1>
MEM_DATA<14>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<8>
MEM_DQM<0>
MEM_DATA<7>
MEM_DATA<6>
MEM_DQS<0>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<3>
RAM_DQM_A<1>
MEM_DATA<0>
RAM_DQS_A<1>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DATA_A<11>
RAM_DATA_A<10>
RAM_DATA_B<11>
RAM_DATA_B<12>
RAM_DATA_B<13>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DQS_B<1>
RAM_DQM_B<1>
RAM_DATA_B<5>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DATA_B<3>
RAM_DATA_B<4>
RAM_DQS_B<0>
RAM_DQM_B<0>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DATA_B<10>
RAM_DATA_B<2>
RAM_DATA_B<1>
RAM_DATA_B<0>
RAM_MUXSEL_LMEM_MUXSEL_L<1>
RAM_MUXSEL_HMEM_MUXSEL_H<1>
RAM_MUXSEL_LMEM_MUXSEL_L<0>
RAM_MUXSEL_HMEM_MUXSEL_H<0>
38 38 38
38 17 17
17 17
16 16 16
16 11 11
11 11
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36 36
36 36
36 36
10 10 10
10
12
10
12
12
12
12
12
12
12
12
12
12
12
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
12
10
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12 12
10
12
12
12
12
12
12
12
12
12
12
12
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
12
10
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12 12
10
12
12
12
12
12
12
12
12
12
12
12
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
12
10
12
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12
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12
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12
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12
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12
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12
12
12
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12
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12
12 12
10
12
12
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12
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10
10
10
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10
10
10
10
10
10
10
10
10
10
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10
10
12
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12
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12
12
12
12
12
12
12
12
12
12
12
12
11 10
11 10
11 10
11 10
www.vinafix.vn
DQ58
RFU18
KEY
VDD6
VSS6
VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4
DQ5
VSS1
VREF1
VDD1
SA1
SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6
A4
A2
A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11
VSS16
RFU9
VDD14
RFU3
VSS14
RFU5
RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41
DQS5
VSS24
VDD22
DQ42
DQ34
VSS22
DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5
A3
A9
A7
VSS18
CKE1
RFU14
RFU13
VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11
DQ26
DQ27
DQS3
VDD11
DQ19
DQ24
VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11
VDD4
VSS7
CK0*
CK0
DQS1
VSS4
DQ10
VDD2
DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0
DQ1
VSS0
VREF0
A12
J20AS0A42-D2S
F-RT-SM
C55310UF20%6.3VCERM805
C55210UF20%6.3VCERM805
DQ58
RFU18
KEY
VREF0
VDD0
DQ0
DQ1
VSS0
DQS0
VSS2
DQ3
DQ8
DQ2
VDD2
VSS4
DQS1
DQ10
DQ9
DQ11
CK0
CK0*
VSS7
VDD4
DQ16
DQ18
VDD7
DQ17
DQS2
VSS9
DQ25
VDD9
DQ24
DQ19
DQS3
VDD11
DQ27
DQ26
VSS11
RFU0
VDD13
RFU4
VSS13
RFU2
RFU6
RFU13
RFU12
RFU8
RFU10
VSS15
A9
CKE1
RFU14
VDD16
A1
A5
A7
VSS18
A3
BA0
VDD18
S0*
WE*
A10_AP
DQ33
VSS20
DQ32
VDD20
RFU16
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
DQ48
VSS26
VDD26
VDD24
VSS27
VSS29
DQ50
DQ49
DQS6
VDD27
DQS7
DQ51
VDD29
DQ56
DQ57
SDA
VDD31
VSS31
DQ59
VDDSPD
SCL
RFU19
VDD32
VSS28
CK1
DQ52
VDD28
DM6
DQ54
VSS30
DM7
DQ55
DQ60
VDD30
DQ61
DQ53
SA1
SA2
SA0
DQ63
DQ62
VSS32
VSS25
DM5
DQ45
VDD23
VDD21
VSS21
DQ36
RFU17
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RAS*
CAS*
S1*
DQ46
DQ47
CK1*
VDD25
RFU7
RFU5
VDD14
VSS17
VDD15
CKE0
RFU15
VDD17
A11
A8
RFU11
VSS16
RFU9
VSS19
A0
A2
A4
A6
BA1
VDD19
VDD12
VSS12
DQ31
DQ30
DM3
DQ22
DQ21
VDD8
DQ20
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
VSS6
VSS8
RFU1
VSS14
RFU3
VREF1
DQ5
DQ4
DM0
DQ6
DQ12
DQ7
VSS3
VSS1
VDD1
VDD3
DM1
VSS5
DQ14
DQ13
DQ15
VDD5
VDD6
A12
F-RT-SMAS0A42-D2RJ23
C49810UF20%6.3VCERM805
C54310UF20%6.3VCERM805
402
R372
MF1/16W1%1K
402
R359
MF1/16W1%1K C509
0.1UF20%10VCERM402
C4600.1UF20%10VCERM402
+2_5V_MAIN+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+3V_MAIN
C8040.1UF20%10VCERM402
C8080.1UF20%10VCERM402
C8120.1UF20%10VCERM402
+3V_MAIN
C8160.1UF20%10VCERM402
C8200.1UF20%10VCERM402
C8210.1UF20%10VCERM402
C8170.1UF20%10VCERM402
C8130.1UF20%10VCERM402
C8090.1UF20%10VCERM402
C8050.1UF20%10VCERM402
C8220.1UF20%10VCERM402
C8180.1UF20%10VCERM402
C8230.1UF20%10VCERM402
+3V_MAIN
C8190.1UF20%10VCERM402
C8140.1UF20%10VCERM402
C8150.1UF20%10VCERM402
C8110.1UF20%10VCERM402
C8100.1UF20%10VCERM402
C8060.1UF20%10VCERM402
C8070.1UF20%10VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 12 44E051-6469
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
ONE 0.1UF PER SLOTDDR VREF
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DDR SODIMM CONNS
FACTORY SLOTSLOT "A"STANDARD REVERSED
SLOT "B"CUSTOMER SLOT
ADDR=0XA0(WR)/0XA1(RD) ADDR=0XA2(WR)/0XA3(RD)
SLOT "A"
SLOT "B"
DDR BYPASS CAPS
FOR RETURN CURRENT
CRITICAL
112111
115
10099
110109
108107
106105
102101
117
116
120
35
37
160
158
9695
12
26
48
62
134
148
170
184
5
7
29
31
20
24
30
32
41
43
49
53
13
42
44
50
54
55
59
65
67
56
60
17
66
68
127
129
135
139
128
130
136
140
6
141
145
151
153
142
146
152
154
163
165
8
171
175
164
166
172
176
177
181
187
189
14
178
182
188
190
18
19
23
11
25
47
61
133
147
169
183
201
202
118
71 72
85 86
89
91
97 98
123 124
199 200
73 74
77 78
79 80
83 84
121 122
194
196
198
195
193
9 10
58
69 70
81 82
92
93 94
113 114
21
131 132
143 144
155 156
157
167 168
179
22
180
191 192
33 34
36
45 46
57
197
1 2
3 4
52
63 64
75 76
87 88
90
103 104
15
125 126
137 138
149 150
159
161 162
173
16
174
185 186
27 28
38
39 40
51
119
1
2
1
2
CRITICAL
112 111
115
100 99
110 109
108 107
106 105
102 101
117
116
120
35
37
160
158
96 95
12
26
48
62
134
148
170
184
5
7
29
31
20
24
30
32
41
43
49
53
13
42
44
50
54
55
59
65
67
56
60
17
66
68
127
129
135
139
128
130
136
140
6
141
145
151
153
142
146
152
154
163
165
8
171
175
164
166
172
176
177
181
187
189
14
178
182
188
190
18
19
23
11
25
47
61
133
147
169
183
201
202
118
7172
8586
89
91
9798
123124
199200
7374
7778
7980
8384
121122
194
196
198
195
193
910
58
6970
8182
92
9394
113114
21
131132
143144
155156
157
167168
179
22
180
191192
3334
36
4546
57
197
12
34
52
6364
7576
8788
90
103104
15
125126
137138
149150
159
161162
173
16
174
185186
2728
38
3940
51
119 1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CR-12
DDR_VREF
RAM_DATA_B<4>
RAM_DATA_B<5>
RAM_DQM_B<0>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DATA_B<12>
RAM_DQM_B<1>
RAM_DATA_B<13>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DATA_B<20>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DQM_B<2>
RAM_DATA_B<23>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DQM_B<3>
RAM_DATA_B<31>
RAM_CKE<2>
RAM_BA<1>
RAM_ADDR<2>
RAM_ADDR<11>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<0>
RAM_ADDR<4>
RAM_CS_L<3>
RAM_RAS_L
RAM_CAS_L
RAM_DATA_B<36>
RAM_DATA_B<37>
RAM_DQM_B<4>
RAM_DATA_B<38>
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DATA_B<39>
RAM_DATA_B<44>
RAM_DQM_B<5>
RAM_DATA_B<45>
SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_B1
RAM_DATA_B<52>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DQM_B<6>
RAM_DATA_B<55>
RAM_DATA_B<60>
RAM_DATA_B<63>
RAM_DATA_B<61>
RAM_DQM_B<7>
RAM_DATA_B<62>
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_B<59>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DQS_B<7>
RAM_DATA_B<51>
RAM_DATA_B<56>
RAM_DQS_B<6>
RAM_DATA_B<50>
RAM_DATA_B<49>
RAM_DATA_B<48>
RAM_DATA_B<43>
RAM_DATA_B<42>
RAM_DQS_B<1>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DATA_B<3>
RAM_DATA_B<2>
RAM_DQS_B<0>
RAM_DATA_B<1>
RAM_DATA_B<0>
DDR_VREF
RAM_DATA_A<31>
RAM_DQM_A<2>
RAM_DATA_A<63>
DDR_VREF
RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DQS_A<0>
RAM_DATA_A<2>
RAM_DATA_A<8>
RAM_DATA_A<3>
RAM_DATA_A<9>
RAM_DATA_A<10>
RAM_DQS_A<1>
RAM_DATA_A<11>
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A0
RAM_DATA_A<16>
RAM_DATA_A<17>
RAM_DQS_A<2>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<25>
RAM_DATA_A<24>
RAM_DQS_A<3>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_CKE<1>
RAM_ADDR<12>
RAM_ADDR<9>
RAM_ADDR<7>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<1>
RAM_ADDR<10>
RAM_WE_L
RAM_BA<0>
RAM_CS_L<0>
RAM_DATA_A<33>
RAM_DATA_A<32>
RAM_DATA_A<34>
RAM_DQS_A<4>
RAM_DATA_A<40>
RAM_DATA_A<35>
RAM_DATA_A<41>
RAM_DATA_A<42>
RAM_DQS_A<5>
RAM_DATA_A<43>
RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DATA_A<50>
RAM_DQS_A<6>
RAM_DATA_A<51>
RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DQS_A<7>
RAM_DATA_A<58>
RAM_DATA_A<59>
INT_I2C_DATA0
INT_I2C_CLK0
DDR_VREF
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DQM_A<0>
RAM_DATA_A<6>
RAM_DATA_A<12>
RAM_DATA_A<7>
RAM_DATA_A<13>
RAM_DQM_A<1>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<20>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DATA_A<28>
RAM_DATA_A<29>
RAM_DQM_A<3>
RAM_DATA_A<30>
RAM_CKE<0>
RAM_ADDR<11>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<2>
RAM_ADDR<4>
RAM_ADDR<0>
RAM_BA<1>
RAM_CAS_L
RAM_RAS_L
RAM_CS_L<1>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_DQM_A<4>
RAM_DATA_A<38>
RAM_DATA_A<44>
RAM_DATA_A<39>
RAM_DATA_A<45>
RAM_DQM_A<5>
RAM_DATA_A<46>
RAM_DATA_A<47>
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_A1
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<54>
RAM_DQM_A<6>
RAM_DATA_A<55>
RAM_DATA_A<60>
RAM_DQM_A<7>
RAM_DATA_A<62>
RAM_DATA_A<61>
RAM_DATA_A<21>
DDR_VREF
RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DQS_B<5>
RAM_DATA_B<25>
RAM_DQS_B<3>
RAM_DATA_B<26>
RAM_DATA_B<27>
RAM_CKE<3>
RAM_ADDR<9>
RAM_ADDR<7>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<1>
RAM_ADDR<10>
RAM_BA<0>
RAM_CS_L<2>
RAM_WE_L
RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DQS_B<4>
RAM_DATA_B<34>
RAM_DATA_B<35>
RAM_ADDR<12>
RAM_DATA_B<10>
RAM_DATA_B<11>
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L
RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DQS_B<2>
RAM_DATA_B<18>
RAM_DATA_B<24>
RAM_DATA_B<19>
39
39 39
39
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
36
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
14
14
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
14
14
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
36
12
36
36
36
36
36
12
36
36
36
36
36
36
36
36
36
36
12
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
10
10
11
11
11
11
11
11
11
11
11
11
12
12
11
11
11
11
11
11
11
11
11
11
11
11
11
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www.vinafix.vn
402MF
1/16W5%
4.7R106
402MF
1/16W5%
0R170
402
R163
MF1/16W1%60.4
SM11/16W5%
10KRP23
SM11/16W5%
10KRP21
SM11/16W5%
10KRP20 SM1
1/16W5%
10KRP20
402MF
1/16W5%
4.7R77
C870.22UF
20%6.3VCERM402
(PLL4)VDD15A_6
(PLL4)VSSA_6
ROM_WE
ROM_OE
PCI_STOP
PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY
PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0
PCI_GNT_1
PCI_GNT_2
PCI/ROMINTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23
PCIAD_24
PCIAD_20
PCIAD_21
PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12
PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7
PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1
PCIAD_2
PCIAD_0
ROM_OVRLY_EN
U44BGA
INTREPID-REV2.1
402MF
1/16W5%
33R146
402MF
1/16W5%
33R107
402MF
1/16W5%
33R126
402
R141
MF1/16W5%47
+3V_SLEEP
SM11/16W5%
10KRP19
SM11/16W5%
10KRP18
SM11/16W5%
10KRP18
SM11/16W5%
10KRP18
SM11/16W5%
10KRP19
SM11/16W5%
10KRP18
SM11/16W5%
10KRP19
SM11/16W5%
10KRP19
402MF
1/16W5%
22R49
402MF
1/16W5%
22R54
402MF
1/16W5%
22R71
402MF
1/16W5%
33R1399
402MF
1/16W5%
22R1350
+3V_MAIN
402MF
1/16W5%
10KR145
402MF
1/16W5%
10KR181
402MF
1/16W5%
10KR147
402MF
1/16W5%
10KR125
402MF
1/16W5%
10KR148
402MF
1/16W5%
10KR169
402
R140
MF1/16W
1%4.99K
402
R135
MF1/16W
1%4.99K C226
0.22UF20%6.3VCERM402
SM11/16W5%
10KRP21
SM11/16W5%
10KRP23
SM11/16W5%
10KRP21
SM11/16W5%
10KRP20
SM11/16W5%
10KRP20SM1
1/16W5%
10KRP21
SM11/16W5%
10KRP23
SM11/16W5%
10KRP23
VSSA_5(PLL5)
(PLL5)VDD15A_5
STP_AGP
AGPPVT
AGPVREF0
AGPVREF1
AGP_BUSY
AGP_CLK
AGP_FB_IN
AGP_FB_OUT
AGPAD0
AGPREQ
AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY
AGPIRDY
AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGP_ST2
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P
AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGPINTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)BGA
INTREPID-REV2.1U44
C1440.22UF
20%6.3VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 13 44E051-6469ARE POWERED IN SLEEP
+3V_MAIN BECAUSE THESE CHIPSUSB2 AND CBUS REQ REMAINS ON
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
PLACE CLOSE TO INTREPID SIDE
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPSSIMPLY PROVIDING REFERENCE TO CHIP
(PLACE CLOSE TO INTREPID AGP BALLS)
AGP I/O REFERENCE
OUTPUT IMPEDANCE IS ABOUT 20OHMNeed divider for 3.3V slot!
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
Vin = Vcore (1.5V)
Vout = AGPIO (1.5V)
use 52-ohm a resistor here.NOTE: Designs using AGP slot should
PCI PULL-UPS
VOUT = 3.3V
VIN = 1.5V (CORE)
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
1 2
1 2
1
2
1 8
1 8
1 8
2 7
1 2
1
2
CRITICAL
AM10
AR8
AR10
AT9
AR11
AM12
AN12
AK11
AT11
AT10
AN13
AM13
AK12
AR12
AJ11
AT12
AM11
AR13
AK15
AH15
AN14
AT13
AK14
AJ8
AN15
AM15
AN10
AT8
AN11
AH13
AK13
AR9
AR14
AK16
AM16
AJ15
AR18
AH18
AT18
AJ19
AM18
AM17
AN16
AT16
AN18
AN17
AH16
AT14
AR17
AR16
AT17
AR15
AT15
AM9
AR7
AK17
AN9
J11
J10
1 2
1 2
1 2
1
2
1 8
3 6
1 8
2 7
3 6
4 5
4 5
2 7
1 2
1 2
1 2
1 2
NEC_USB
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
2
1
2
1
2
4 5
2 7
2 7
3 6
4 5
3 6
4 5
3 6
CRITICALAR19
AM19
AR22
AN22
AM22
AN23
AR23
AT24
AM23
AR24
AT25
AR25
AT20
AM24
AN25
AL24
AR26
AT26
AM25
AN26
AM26
AR27
AT27
AR20
AR28
AN27
AT21
AN20
AR21
AN21
AM21
AT22
AM20
AT23
AN24
AL25
AM27
AN28
AM29
AT28
AT29
AJ29
AJ24
AK24
AT33
AM28
AR29
AB20
AB21
AK19
AK20
AK22
AK21
AT19
AK28
AK27
AK25
AT32
AR32
AM31
AN31
AR31
AT31
AM30
AN30
AG25
AH25
AN29
AT30
AR30
AK30
AN19
V14
V13
1
2
CR-13
CLK33M_CBUS_UF
CLK66M_GPU_AGP
CLK66M_GPU_AGP_UF
CLK33M_USB2 CLK33M_USB2_UF
INT_PCI_FB_IN
INT_PCI_FB_OUT
CLK33M_CBUS
CLK33M_AIRPORT
CLK33M_AIRPORT_UF
INT_ROM_RW_L
INT_ROM_CS_L
INT_ROM_OE_L
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_PCI_GNT_L
AIRPORT_PCI_GNT_L
USB2_PCI_GNT_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
AIRPORT_PCI_REQ_L
+1_5V_INTREPID_PLL6
PCI_AD<30>
PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<19>
PCI_AD<21>
PCI_AD<20>
PCI_AD<17>
PCI_AD<18>
PCI_AD<15>
PCI_AD<14>
PCI_AD<16>
PCI_AD<12>
PCI_AD<13>
PCI_AD<9>
PCI_AD<11>
PCI_AD<10>
PCI_AD<7>
PCI_AD<8>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<2>
PCI_AD<1>
PCI_AD<3>
PCI_AD<0>
+1_5V_INTREPID_PLL
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_DEVSEL_L
PCI_FRAME_L
+1_5V_AGP
INT_AGPPVT
+1_5V_INTREPID_PLL5
AGP_SBA<1>
AGP_REQ_L
AGP_GNT_L
STOP_AGP_L
AGP_BUSY_L
INT_AGP_VREFAGP_AD<0>
AGP_AD<1>
AGP_AD<2>
AGP_AD<3>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<8>
AGP_AD<9>
AGP_AD<10>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
AGP_AD<7>
AGP_CBE<0>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_PAR
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_STOP_L
AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<6>
AGP_SBA<7>
AGP_SB_STB
AGP_SB_STB_L
AGP_ST<0>
AGP_ST<2>
AGP_ST<1>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
AGP_PIPE_L
AGP_RBF_L
AGP_WBF_L
+1_5V_INTREPID_PLL
AGP_BUSY_L
AGP_GNT_L
STOP_AGP_L
+3V_GPU
AGP_FRAME_L
AGP_REQ_L
AGP_DEVSEL_L
AGP_TRDY_L
AGP_RBF_L
AGP_PIPE_L
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_IRDY_L
AGP_WBF_L
AGP_STOP_L
AGP_AD_STB<0>
+1_5V_AGP
AGP_SB_STB
AGP_AD_STB_L<1>
AGP_SB_STB_L
CLK66M_AGP_15V_TP
INT_AGP_FB_IN
INT_AGP_FB_OUT
+1_5V_AGP
INT_AGP_VREF
ROM_CS_LINT_ROM_CS_L
ROM_OE_LINT_ROM_OE_L
ROM_RW_LINT_ROM_RW_L
AIRPORT_PCI_REQ_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
38
38
38
39
39
39
39
37
37
37
37
37
39
37
37
37
37
37
37
37
37
39
39
37
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
20
38
20
20
37
37
37
37
26
26
26
26
26
37
26
26
26
26
26
26
26
26
37
37
26
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
38
26
26
26
26
26
19
38
21
19
19
39
26
26
26
26
24
24
24
24
24
26
39
24
24
24
24
24
24
24
24
26
26
24
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
15
24
24
24
24
24
17
37
37
37
37
37
37
37
37
37
37
37
37
37
37
15
37
20
37
37
37
37
37
37
37
37
37
37
17
37
37
37
17
39
39
39
39
36
36
36
36
24
24
24
24
18
18
18
18
18
24
39
26
18
24
18
18
18
18
18
18
18
18
24
24
18
24
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
13
18
18
18
18
18
16
37
19
19
19
19
38 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
19
19
19
19
19
37
37
37
37
37
37
37
19
19
19
19
19
19
19
19
19
13
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
16
19
19
19
16
38
24
24
24
24
26
18
36
19
36
26 36
36
36
18
24
36
13
13
13
18
18
18
18
13
13
13
13
13
18
18
24
26
13
13
13
38
10
10
10
10
10
10
10
10
18
18
10
18
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
13
13
13
13
13
13
38
19
13
13
13
13
13 19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
13
13
13
13
13
19
19
19
19
19
19
19
13
13
19
19
19
13
13
13
13
13
13
13
9
13
13
13
15
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
36
36
13
13
10 13
10 13
10 13
13
13
13
www.vinafix.vn
402MF
1/16W5%
1KR549
SM11/16W5%
10KRP17
402MF
1/16W5%
10KR547
402
R27
MF1/16W5%10K
SM11/16W5%
22RP16
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP16
SM11/16W5%
22RP16
SM11/16W5%
22RP16
+3V_MAIN
402MF
1/16W5%
10KR1402
+3V_MAIN
+3V_MAIN
402MF
1/16W5%
1KR544
SM11/16W5%
10KRP13
SM11/16W
5%
10KRP13
SM11/16W5%
10KRP13
SM11/16W5%
10KRP13
SM11/16W5%
10KRP17
SM11/16W5%
10KRP17
SM11/16W5%
10KRP17
402
R112
MF1/16W1%1K
CS_CE2
CS_CE1
CS_IORD
CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0
IDECS1
IDEDMACKIDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE
CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
U44INTREPID-REV2.1
BGA
402MF
1/16W5%
82R26
402MF
1/16W5%
82R61
IICDATA_1
IICCLK_1
IICCLK_0
IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4
RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
(4 OF 9)
MISCTXD_3
TXD_2
TXD_1
TXD_4
TXD_5
TXD_6
TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
BGAINTREPID-REV2.1
U44
402MF
1/16W5%
22R105
402MF
1/16W5%
22R15
402MF
1/16W5%
10R543 402
MF1/16W5%
10R548
402MF
1/16W5%
10R88
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 14 44E051-6469
D1-RDD0-WR
6A-WR6B-RD
59-RD58-WR
A1-RD
ADDR
84-WR85-RD
AD-RD
A0-WR
A2-WRA3-RD
AE-WRAF-RD
AC-WR
BUS
LMU
(MAIN)
RAM - STANDARD
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
N/A
N/A
N/A
I2C-0
RAM - REVERSED
N/ABOOTBANG E2PROM
N/ACLOCK SLEW SSCG
N/A
N/AFAN CONTROLLER
SNAPPER SOUND
N/A
N/A
N/A
N/A
N/A
N/A
(MAIN)
N/A
N/A
I2C-1
N/A
(SLEEP)
I2C-2
N/A
N/A
DASH MODEM
N/A N/A
N/A
N/A
N/A
(SLEEP)
N/A
PMU
000
00
0
0
1
0
0
JTG_RSTN_L
11
111
0(I)0(I)
1(I)1(I)1(I)
0(I) 1X
0
01(I)1(I)
10(I)
1(I)
EXTPLL
X
0
0
X
TST_TEI_H(I/O)
HWPLL_
0
1
SHUTDOWN(OUTPUT)
JTG_TDO_H
TESTSEL5
(OUTPUT)
(INPUT)
0(I)
X
(OUTPUT)
DDR_TPDENABLE
1
X
1
0(I)
0(I)
1(I)
0
(I/O)JTG_TDI_H TST_PLLEN_H
MEMWE
X(I)X(I)X(I)X(I)X(I)
ATPG IDDQ
POSTSCALAR BYPASS
POSTSCALAR BYPASS
PLL OUTPUTSSELECTED
SELECTEDPLL OUTPUTS
X(OUTPUT)
SYNC/MEM DATABYPASS
ANALYZER_CLK
JTAG MODE
ATPG NORMAL
DESCRIPTION
VIEW PLLS (SOFTWARE)
NORMAL OPERATION
TEST TRI-STATE
VIEW PLLS (HARDWARE)
FUNCTIONAL TEST WITHOUT
FUNCTIONAL TEST IDDQ
FUNCTIONAL TEST WITH
UDMA - STOP
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE
NOT USING CARDSLOT INTERFACE
CS_WAIT IS AN INPUT
EIDE/I2CINT - ENET/FW/UATA
ENET_TXD SERIES TERMINATION
I2C PULL-UPS
TEST PULL-UPS/DOWNS
J20 - PG 12
J23 - PG 12
U37 - PG 23
U36 - PG 23
U48 - PG 25
U56 - PG 15
J14 - PG 25
J9 - PG 25
1 2
1 8
1 2
1
2
2 7
4 5
3 6
1 8
2 7
3 6
1 8
4 5
2 1
1 2
2 7
1 8
4 5
3 6
3 6
2 7
4 5
1
2
CRITICAL
Y5
AB1
Y7
AA5
AA4
AB2
V5
T1
W4
W5
Y2
Y1
W7
Y8
U1
U2
V4
V2
W1
V1
W2
W8
AC1
AC2
AA8
AA2
Y4
Y15
AA1
AD1
AB4
AB5
AD2
AC4
AE2
AE1
AF5
AE7
AK1
AG5
AH4
AL1
AK2
AH5
AF7
AG7
AK4
AB7
AM1
AC5
AD4
AF4
AH2
AD7
AG4
AJ1
AJ2
AF1
AG1
AF2
AH1
AD5
AG2
AE4
AE5
AG8
AH7
AA7
AL2
AJ4
AM2
1 2
1 2
CRITICAL
C5
E6
U14
T7
N2
N1
L13
H12
AN2
AK5
AN1
AM3
B6
B5
P5
L1
L4
M4
P7
N5
K1
K2
L2
N4
M1
M2
T2
U5
D3
E7
D6
B4
A4
D7
G9
E8
J12
C4
D2
AP5
AK8
AT5
AH10
AR5
AN6
AM7
AK10
AR6
H10
E9
D8
A6
B7
G10
D9
E10
H9
A7
A5
1 2
1 2
1 2
1 2
1 2
CR-14
JTAG_ASIC_TMS
JTAG_ENET_TDI
JTAG_ASIC_TDI
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
JTAG_ASIC_TRST_L
INT_JTAG_TEI
JTAG_ASIC_TCK
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_CLK0
INT_I2C_DATA0
ENET_LINK_TXD<6>ENET_PHY_TXD<6>
ENET_LINK_TXD<7>ENET_PHY_TXD<7>
ENET_LINK_TXD<5>ENET_PHY_TXD<5>
ENET_LINK_TXD<2>ENET_PHY_TXD<2>
ENET_LINK_TXD<4>ENET_PHY_TXD<4>
ENET_LINK_TXD<3>ENET_PHY_TXD<3>
ENET_LINK_TXD<0>ENET_PHY_TXD<0>
ENET_LINK_TXD<1>ENET_PHY_TXD<1>
CLKENET_PHY_GTX CLKENET_LINK_GTX
INT_PU_RESET_L
INT_RESET_L
JTAG_ASIC_TDI
JTAG_ENET_TDI
JTAG_ASIC_TCK
JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_DATA0
INT_I2C_CLK0
INT_TST_MONOUT_TP
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
ENET_MDC
ENET_MDIO
ENET_COL
ENET_CRS
CLKENET_LINK_GBE_REF
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<2>
ENET_LINK_RXD<3>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
ENET_RX_ER
ENET_RX_DV
CLKENET_LINK_RX
CLKFW_LINK_LCLK
FW_PINT
FW_LKON
ENET_LINK_TX_ER
CLKENET_LINK_TX
ENET_LINK_TX_EN
ENET_LINK_TXD<1>
ENET_LINK_TXD<0>
ENET_LINK_TXD<2>
ENET_LINK_TXD<3>
ENET_LINK_TXD<4>
ENET_LINK_TXD<6>
ENET_LINK_TXD<5>
ENET_LINK_TXD<7>FW_LINK_DATA<1>
FW_LINK_DATA<3>
FW_LINK_DATA<0>
FW_LINK_DATA<2>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
FW_LINK_DATA<6>
FW_LINK_DATA<7>
FW_PHY_LPS
FW_LINK_CNTL<1>
FW_LINK_CNTL<0>
FW_LINK_LREQ
CLKFW_LINK_PCLK
ENET_PHY_TX_ER
ENET_PHY_TX_EN
CLKFW_PHY_LCLK
FW_PHY_LREQ
UIDE_REF
UIDE_CS1_L
UIDE_CS0_L
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<2>
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<5>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<11>
UIDE_DATA<10>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<4>
UIDE_DATA<3>
UIDE_DATA<2>
UIDE_DATA<1>
UIDE_DATA<0>
EIDE_DATA<11>
EIDE_DATA<13>
EIDE_DATA<15>
EIDE_DATA<14>
EIDE_ADDR<0>
EIDE_ADDR<1>
EIDE_IOCHRDY
EIDE_ADDR<2>
EIDE_DATA<12>
EIDE_DATA<9>
EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6>
EIDE_DATA<7>
EIDE_DATA<4>
EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<2>
EIDE_DATA<1>
EIDE_DATA<0>
EIDE_CS0_L
EIDE_CS1_L
EIDE_INT
EIDE_DMACK_L
EIDE_DMARQ
EIDE_WR_L
EIDE_RD_L
EIDE_RST_L
HD_DMARQ
UIDE_DMARQ
HD_INTRQUIDE_INTRQ
CSLOT_IOWAIT_L_PU
NO_TEST=TRUE CSLOT_CE1_L_SPN
NO_TEST=TRUE CSLOT_CE2_L_SPN
NO_TEST=TRUE CSLOT_IORD_L_SPN
NO_TEST=TRUE CSLOT_IOWR_L_SPN
NO_TEST=TRUE CSLOT_OE_L_SPN
NO_TEST=TRUE CSLOT_WE_L_SPN
NO_TEST=TRUE CSLOT_ADDR3_SPN
NO_TEST=TRUE CSLOT_ADDR4_SPN
NO_TEST=TRUE CSLOT_ADDR5_SPN
NO_TEST=TRUE CSLOT_ADDR6_SPN
NO_TEST=TRUE CSLOT_ADDR7_SPN
NO_TEST=TRUE CSLOT_ADDR8_SPN
NO_TEST=TRUE CSLOT_ADDR9_SPN
39
39
39
39
39
39
39
39
39
39
39
25
25
23
23
39
39
39
25
25
23
23
27
27
39
27
27
15
15
14
14
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
36
30
30
39
27
27
27
27
15
15
14
14
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
36
37
36
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
36
37
37
36
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
14
14
14
14
14
14
14
14
14
14
12
12
14 27
14 27
14 27
14 27
14 27
14 27
14 27
14 27
27 36
25
10
14
14
14
14
14
14
14
14
12
12
14
14
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
36
28
28
37
27
37
14
14
14
14
14
14
14
14 28
28
28
28
28
28
28
28
28
28
28
37
28
27
27
28
28
38
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
24 37
www.vinafix.vn
+3V_MAIN
C9910UF20%6.3VCERM805
402MF
1/16W5%
100KR76
+3V_MAIN
C890.1UF20%10VCERM402
C880.01UF20%16VCERM402
402MF
1/16W5%
22R45
402MF
1/16W5%
22R4
402MF
1/16W5%
22R60
SM11/16W5%
47RP8
SM11/16W5%
47RP8
SM11/16W5%
47RP8
SM11/16W5%
47RP8
402MF
1/16W5%
22R59
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT
PCIPME
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA
SCCGPIOA
SCCTRXCA
SCCTXDB
SCCGPIOB
SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSEGENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4
EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI
AUD_SYNC
MOD_DTO
AUD_BITCLK
AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ
PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P
USB_VD0_N
USB_VD1_P
USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1
USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2
USB_PWRFLT2
BGAINTREPID-REV2.1
U44
+3V_SLEEP
402MF
1/16W5%
24R504
402
R80
MF1/16W5%15K
402MF
1/16W5%
24R532
402MF
1/16W5%
24R58
402MF
1/16W5%
24R52
C1760.22UF
20%6.3VCERM402
402MF
1/16W5%
4.7R113
C1370.22UF
20%6.3VCERM402
402MF
1/16W5%
4.7R89
C1660.22UF
20%6.3VCERM402
402MF
1/16W5%
4.7R114
C3310.22UF
20%6.3VCERM402
402
R79
MF1/16W
5%15K
C1780.22UF
20%6.3VCERM402
402MF
1/16W5%
4.7R194
402MF
1/16W5%
4.7R123
Y1
SM
18.432M
402MF
1/16W5%
10MR540
C12922PF5%50VCERM402
C1622PF
5%50V
CERM402
402MF
1/16W5%
0R25
F-ST-SMU.FL-R_SMT
J1
402
R7
MF1/16W5%51
402
R550
MF1/16W5%0
C4111UF20%10V
CERM603
402
R225
MF1/16W
1%68.1K
402
R226
MF1/16W
1%15.8K
C39910UF20%6.3VCERM805
603MF
1/16W5%
0R242
603MF
1/16W5%
0R207
+2_5V_MAIN
+1_8V_MAIN
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U10LT1962-ADJ
MSOP
C4040.01UF
20%16V
CERM402
402
R599
MF1/16W
5%10K
402MF
1/16W5%
10KR2
402MF
1/16W5%
10KR78
402
R8
MF1/16W5%4.7K
402
R70
MF1/16W5%4.7K
SM11/16W5%
10KRP42
SM11/16W5%
10KRP7
SM11/16W5%
10KRP40
SM11/16W5%
10KRP40
SM11/16W5%
10KRP41
SM11/16W5%
10KRP41
SM11/16W5%
10KRP7
SM11/16W5%
10KRP41
SM11/16W5%
10KRP42
SM11/16W5%
10KRP6
SM11/16W5%
10KRP28
SM11/16W5%
10KRP28
SM11/16W5%
10KRP47
SM11/16W5%
10KRP41
SM11/16W5%
10KRP40
SM11/16W5%
10KRP47
SM11/16W5%
10KRP47
SM11/16W5%
10KRP28
SM11/16W5%
10KRP1
SM11/16W5%
10KRP6
SM1
1/16W5%
10KRP42
SM11/16W5%
10KRP6
SM11/16W5%
10KRP42
SM11/16W5%
10KRP28
SM11/16W5%
10KRP25
SM11/16W5%
10KRP7
SM11/16W5%
10KRP6
402
R68
MF1/16W5%75SM1
1/16W5%
10KRP40
SM11/16W5%
10KRP1
SM11/16W5%
10KRP1
SM11/16W5%
10KRP1
402MF
1/16W5%
0R889
402
R888
MF1/16W5%10K
C8410.1UF20%10VCERM402
C8401UF20%10VCERM603
C8390.1UF
20%10V
CERM402
SM-1400-OHM-EMIL49
+3V_MAIN
SM-1400-OHM-EMIL50
C8420.1UF20%10VCERM402
+2_5V_MAIN
402MF
1/16W5%
0R891
402
R887
MF1/16W5%10K
402
R886
MF1/16W5%10K
SM11/16W5%
10KRP47
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK
ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TSSOP
U56CY28512B
402MF
1/16W5%
33R890
402
R758
MF1/16W
5%10K
402
R759
MF1/16W
5%0
+3V_SLEEP
SMFERR-EMI-100-OHM
L1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 15 44E051-6469
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
NO_SSCG116S1104 1 RES,METAL FILM,10 K OHM,5,1/16W,0402,SM R68
PORT C - LEFT USB
PORT A - RIGHT USB 1
INTERNAL 250K PULL-UPOUTPUT IMPEDANCE ~18-20OHM
PLACE R68 CLOSE TO INTREPID SIDEOTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT
OPEN-DRAIN OUTPUT
INTERNAL 250K PULL-UP
INTERNAL 250K PULL-DOWN
FOR D3COLD SUPPORT
VCORE_A/B SEL
VGATE/LOCK INTERRUPT
INT - USB/GPIOS/I2S
TESTMUXSELHWPLL_
5432
01
JTG_TDO_H
MOD_DTI_B_H
MOD_SYNC_B_H
MOD_DTO_B_H
MOD_CLKOUT_B_H
MOD_BITCLK_B_H
SIGNAL NAME
USB PORT ASSIGNMENTS
PORT F - MODEM
PORT E - BLUETOOTH
PORT D - UNUSED
PORT B - UNUSED
CRYSTAL LOAD CAPACITANCE IS 16PF
VIA
SCK
ACK*
MOSI
REQ*
MISO
CBUS_IREQ_L
POWERBOOK SPARE
NC
NC
FAN PWM
BRIGHTNESS PWM
CONTRAST PWM
USB POWER FAULT SIGNALS1
2
1 2
1
2
1
2
1 2
1 2
1 2
2 7
3 6
4 5
1 8
1 2
CRITICAL
P2
R5
R7
R4
T5
U15
D30
F33
E34
B32
E30
J9
F4
D1
E2
H7
G4
C33
D34
B33
A33
E31
G30
D31
C32
G5
E1
J5
K8
F1
K7
J7
F2
J8
H5
L9
H4
AL4
AH8
V8
P1
T4
R2
R1
AJ7
AA16
AJ12
AJ17
AJ18
AN8
AT6
AF10
AG9
AP4
AN3
AL5
AG11
AG10
AT4
AM5
AF9
AR4
K9
AN7
J4
J2
M5
K4
J1
N7
L7
L8
G1
G2
H1
H2
M8
M7
L5
K5
N8
P8
AG29
T8
U8
AA15
AJ13
AJ16
AK18
AH29
R9
R8
AT7
U4
V15
INTREPID_USB
1 2
1
2
INTREPID_USB
1 2
INTREPID_USB
1 2
INTREPID_USB
1 2
1
2
1 2
1
2
1 2
1
2
1 2
1
2
1
2
1
2
1 2
1 2
CRITICAL
1 2
NO STUFF
12
1
2
1
2
NO STUFF
1 2
NO STUFF
3
2
1
NO STUFF1
2
1
2
1
21
2
1
2 1
2
NO STUFF
1 2
1 22
3
4
8
6
7
1
5
1
2
1
2
2 1
2 1
2
1
2
1
6 3
5 4
7 2
8 1
8 1
6 3
1 8
7 2
1 8
4 5
2 7
4 5
2 7
5 4
3 6
4 5
1 8
1 8
1 8
2 7
4 5
3 6
2 7
3 6
1 8
3 6
1 8
SSCG2
1
4 5
4 5
3 6
2 7
SSCG
1 2
NO STUFF1
2
SSCG1
2
SSCG1
2
SSCG
1
2
SSCG
1
2
SSCG
1
2
SSCG1
2
SSCG
1 2
NO STUFF1
2
NO STUFF1
2
3 6
SSCG
CRITICAL
14
2016
3
2
4
13
17
9
8
1 10
12
5 18
7
19
11 6
15
SSCG
1 2
SSCG1
2
NO STUFF
1
2
2
1
CR-15
+3V_CG_PLL_MAIN
AIRPORT_PCI_INT_L
SND_HW_RESET_L
INT_MOD_BITCLK_PD
INT_MOD_SYNC_PD
INT_MOD_DTI_PD
INT_GPIO9_PU
INT_EXTINT10_PU
INT_EXTINT12_PU
INT_EXTINT11_PU
INT_EXTINT16_PU
INT_EXTINT3_PU
INT_EXTINT13_PU
INT_GPIO12_PU
INT_MOD_DTO_PU
PMU_INT_NMI
PMU_REQ_L
CBUS_INT_L
PMU_INT_L
INT_GPIO15_PU
INT_MOD_CLKOUT_PU
COMM_RING_DET_L
INT_GPIO1_PU
INT_EXTINT14_PU
INT_EXTINT8_PU
USB2_PCI_INT_L
USB_OC_CD_L
USB_PWREN_CD_L
USB_PWREN_AB_L
USB_OC_AB_L
USB_OC_EF_L
USB_PWREN_EF_L
CLK18M_INT_EXT
CLK18M_INT_XOUT
CLK18M_INT_XIN
CLK18M_XTAL_IN
INT_AUDIO_TO_SND
SND_TO_AUDIO
INT_SND_TO_AUDIO
INT_SND_SYNC
INT_SND_SCLK
SND_SCLK
SND_CLKOUTINT_SND_CLKOUT
SND_SYNC
INT_EXTINT12_PU
INT_EXTINT13_PU
INT_EXTINT14_PU
INT_EXTINT16_PU
USB2_PCI_INT_L
SND_HP_SENSE_L
MPIC_CPU_INT_L
PMU_PME_L
INT_ENET_RST_L
INT_GPIO15_PU
SND_AMP_MUTE_L
SND_HP_MUTE_L
COMM_RESET_L
COMM_SHUTDOWN
USB_DFM
USB_DFP
USB_PWREN_EF_L
USB_OC_EF_L
USB_DEM
USB_DEP
USB_OC_CD_L
USB_PWREN_CD_L
USB_DDM
USB_DDP
USB_OC_AB_L
USB_PWREN_AB_L
USB_DCM
USB_DCP
USB_DBM
USB_DBP
USB_DAP
USB_DAM
PMU_TO_INT
PMU_CLK
COMM_RXD
COMM_TRXC
INT_REF_CLK_IN
INT_REF_CLK_OUT
INT_WATCHDOG_L
SYSTEM_CLK_EN
INT_PEND_PROC_INT
INT_PROC_SLEEP_REQ_L
INT_MOD_BITCLK_PD
INT_MOD_CLKOUT_PU
INT_MOD_SYNC_PD
INT_MOD_DTI_PD
INT_MOD_DTO_PU
INT_EXTINT11_PU
PMU_INT_NMI
INT_EXTINT8_PU
ENET_ENERGY_DET
AIRPORT_PCI_INT_L
CBUS_INT_L
SND_LIN_SENSE_L
INT_EXTINT3_PU
COMM_RING_DET_L
PMU_INT_L
INT_GPIO9_PU
SND_HW_RESET_L
INT_GPIO12_PU
PMU_REQ_L
PMU_ACK_L
PMU_FROM_INT
COMM_DTR_L
COMM_GPIO_L
COMM_RTS_L
COMM_TXD_L
+1_5V_INTREPID_PLL1
INT_GPIO1_PU
CG_FSEL
FW_PHY_PD
+1_5V_INTREPID_PLL8
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL2
+3V_INTREPID_USB
INT_I2C_CLK2
INT_I2C_DATA2
USB_DBM
USB_D2PUSB_DAP
USB_D2MUSB_DAM
USB_DBP
USB_D1PUSB_DCP
USB_D1MUSB_DCM
USB_DDP
USB_DDM
BT_USB_DPUSB_DEP
MODEM_USB_DPUSB_DFP
BT_USB_DMUSB_DEM
MODEM_USB_DMUSB_DFM
+1_5V_INTREPID_PLL
LT1962_INT_ADJ
LT1962_INT_BYP
LTC1962_INT_VIN
INT_EXTINT10_PUVCORE_VGATE
+3V_GPU
AGP_NV_INT_L
+2_5V_CG_MAIN
VCORE_VGATE
CG_CLKOUT INT_REF_CLK_ININT_REF_CLK_OUT
CG_FSEL
INT_I2C_CLK1
INT_I2C_DATA1
CG_ADDRSEL
SYSTEM_CLK_EN
CG_LOCK
SYSTEM_CLK_EN
CG_RESET_L
38
39
39
21
39
39
30
39
39
39
30
39
39
39
39
39
38
38
20
38
39
39
24
25
30
30
18
30
25
34
26
39
39
36
36
39
26
39
30
39
39
39
39
37
37
37
37
26
26
26
26
39
39
36
36
30
30
24
18
39
25
30
25
30
39
39
39
39
34
39
39
39 26
39 26
39 26
39 26
37 37
37 37
37 37
37 37
13
34
19
34
36 36
25
25
30
30
38
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
36
36
36
36
25
25
25
25
25
15
15
15
15
15
25
5
26
27
15
25
25
25
25
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
30
30
25
25
15
15
30
15
30
30
15
15
15
15
15
15
15
15
27
15
15
25
15
15
15
15
15
15
15
30
30
25
25
25
25
38
15
15
28
38
38
38
38
38
25
25
15
26 15
26 15
15
26 15
26 15
15
15
24 15
25 15
24 15
25 15
9
38
15 15
13
19
38
15
15 15
15
14
14
15
15
www.vinafix.vn
POWER/GROUND
VSS
(8 OF 9)
VDD2.5
VSS
VDD1.8/CPUVIO
BGAINTREPID-REV2.1
U44
GROUND
POWER
(9 OF 9)
VDD1.5
AGP_IO_VDD
VDD3.3
AGP_IO_VSS
VSS
VSS
VDD3.3
BGAINTREPID-REV2.1
U44
+1_5V_MAIN +3V_MAIN
C160210UF20%6.3VCERM805
402
R1601
MF1/16W1%15.8K
402
R1602
MF1/16W1%68.1K
C16010.01UF
20%16V
CERM402
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U1600LT1962-ADJ
MSOP
C16001UF20%10VCERM603
+1_8V_MAIN
603
R1600
MF1/16W5%0 603
MF1/16W5%
0R1603
+2_5V_MAIN
805
R764
FF1/10W
5%0
805
R765
FF1/10W5%0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 16 44E051-6469
Intrepid Power
NC
NC
THIS LDO WAS ADDED IN CASE INTREPID CORE DOES NOT RUN AT 1.5V
1.5V LDO GENERATOR
C12
F15
F18
F21
F24
F27
M15
M16
M19
M22
M23
C15
N18
N21
N23
P16
P19
C18
C21
C24
C27
C30
C9
F12
AA25
AA29
AE34
AF28
AH30
AH34
AK34
AP35
C35
G31
G34
K31
AB25
K34
N28
N31
N34
N36
P25
P28
R25
R27
T25
AB27
T28
T29
T31
T34
U25
U28
V25
V29
W25
W31
AB31
W34
Y27
Y29
E33
AB34
AC25
AC27
AC28
AE31
M6
M9
N15
N25
P12
P17
P22
P29
P4
R14
R16
R18
R19
R21
R23
R24
R26
R29
R3
R31
R34
R6
T11
T14
T23
T24
T27
U10
U16
AN33
AN4
AP1
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP34
AP36
AP6
AP9
AR2
AR35
AT3
AT34
B2
B35
C1
C10
C13
C16
C19
C22
C25
C28
C3
C31
C34
C36
C7
D33
D4
F10
F13
F16
F19
F22
F25
F28
F3
F31
F34
F6
G7
J3
J31
J34
J6
L24
M14
M17
M18
M20
M21
M24
M28
M3
M31
M32
M34
AD20
AE20
AL22
AL28
AL30
AN32
AP19
AP22
AP25
AP28
AP31
AR33
AE23
AR34
AF22
AH19
AH22
AH28
AJ21
AJ23
AL19
AB11
AB12
AB14
AB16
AB18
AB24
AB28
AB29
AC11
AC15
A3
AC16
AC18
AC20
AC22
AC26
AD12
AD23
AD25
A34
AA20
AA27
AA3
AA31
AA34
AA6
AA21
AA24
AD15
AD22
P15
P18
P20
P21
R17
R20
T13
U17
AB13
U18
U24
V16
V19
V20
V22
W16
W24
Y13
Y18
AB15
AB17
AB19
AC17
AC19
AC23
AD13
AA11
AA12
G6
AC14
AD21
AE15
AE17
AE3
AE6
AF25
AH3
AH6
AB3
AK6
AL10
AL13
AL16
AL3
AL7
AM4
AN5
AP10
AP13
AB6
AP16
K3
K6
N24
N3
N6
P13
P14
R22
T12
AC12
T18
T3
T6
U12
W12
W13
W3
W6
AP2
AP7
AC13
AR3
B3
C2
C6
D32
D5
B34
E4
F30
F7
F9
G3
AD28
AD3
AE22
AE28
AG21
U19
AG23
U22
U27
U29
V10
V12
V17
V18
V21
V24
V3
AG24
V31
V34
V6
W11
W14
W23
W26
Y11
Y12
Y14
AG3
Y16
Y19
Y23
Y24
Y25
AG30
AG34
AG6
AH20
AD31
AH21
AH23
AH27
AK3
AK7
AL12
AL15
AL18
AL21
AD34
AL27
AL31
AL34
AL6
AL9
AD6
AE14
AE16
AE18
AE19
AE21
NO STUFF
1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
NO STUFF
2
3
4
8
6
7
1
5
NO STUFF1
2
NO STUFF
1
2
NO STUFF
1 2
1
2
NO STUFF
1
2
CR-16
MAXBUS_SLEEP
LTC1962_1V5_VIN
LTC1962_1V5_VOUT
LT1962_1V5_ADJ
LT1962_1V5__BYP
+1_5V_LDO
+1_5V_AGP
+2_5V_SLEEP
+2_5V_INTREPID38 34 23
38
17
20
38
9
38
19
17
7
35
17
11
5
38
38 19
13
38
10
www.vinafix.vn
C2190.22uF20%6.3VCERM402
C2180.22uF20%6.3VCERM402
C1580.22uF20%6.3VCERM402
C1830.22uF20%6.3VCERM402
C32610uF
20%6.3VCERM805
C1110uF
20%6.3VCERM805
C3280.22uF20%6.3VCERM402
C2400.22uF20%6.3VCERM402
C2980.22uF20%6.3VCERM402
C2160.22uF20%6.3VCERM402
C1600.22uF20%6.3VCERM402
C2170.22uF20%6.3VCERM402
C2690.22uF20%6.3VCERM402
C970.22uF20%6.3VCERM402
C2990.22uF20%6.3VCERM402
C1130.22uF20%6.3VCERM402
C960.22uF20%6.3VCERM402
C2200.22uF20%6.3VCERM402
C2050.22uF20%6.3VCERM402
C1590.22uF20%6.3VCERM402
C1550.22uF20%6.3VCERM402
C1570.22uF20%6.3VCERM402
C18110uF
20%6.3VCERM805
C21510uF
20%6.3VCERM805
C3060.22uF20%6.3VCERM402
C3500.22uF20%6.3VCERM402
C3720.22uF20%6.3VCERM402
C2760.22uF20%6.3VCERM402
C3080.22uF20%6.3VCERM402
C3640.22uF20%6.3VCERM402
C3700.22uF20%6.3VCERM402
C3300.22uF20%6.3VCERM402
C3490.22uF20%6.3VCERM402
C2720.22uF20%6.3VCERM402
C3030.22uF20%6.3VCERM402
C2730.22uF20%6.3VCERM402
C3210.22uF20%6.3VCERM402
C3850.22uF20%6.3VCERM402
C3920.22uF20%6.3VCERM402
C2930.22uF20%6.3VCERM402
C3710.22uF20%6.3VCERM402
C2770.22uF20%6.3VCERM402
C3810.22uF20%6.3VCERM402
C2740.22uF20%6.3VCERM402
C3040.22uF20%6.3VCERM402
C3890.22uF20%6.3VCERM402
C3470.22uF20%6.3VCERM402
C3070.22uF20%6.3VCERM402
C39710uF
20%6.3VCERM805
C40210uF
20%6.3VCERM805
C40310uF
20%6.3VCERM805
C39810uF
20%6.3VCERM805
C3690.22uF20%6.3VCERM402
C3320.22uF20%6.3VCERM402
C3830.22uF20%6.3VCERM402
C3670.22uF20%6.3VCERM402
C2700.22uF20%6.3VCERM402
C3790.22uF20%6.3VCERM402
C3660.22uF20%6.3VCERM402
C3840.22uF20%6.3VCERM402
C3820.22uF20%6.3VCERM402
C2710.22uF20%6.3VCERM402
C3860.22uF20%6.3VCERM402
C3230.22uF20%6.3VCERM402
C2800.22uF20%6.3VCERM402
C3730.22uF20%6.3VCERM402
C3110.22uF20%6.3VCERM402
C2480.22uF20%6.3VCERM402
C2080.22uF20%6.3VCERM402
C3330.22uF20%6.3VCERM402
C1940.22uF20%6.3VCERM402
C3350.22uF20%6.3VCERM402
C3580.22uF20%6.3VCERM402
C2290.22uF20%6.3VCERM402
C2490.22uF20%6.3VCERM402
C2790.22uF20%6.3VCERM402
C2460.22uF20%6.3VCERM402
C2280.22uF20%6.3VCERM402
C2090.22uF20%6.3VCERM402
C2470.22uF20%6.3VCERM402
C3340.22uF20%6.3VCERM402
C2070.22uF20%6.3VCERM402
C2300.22uF20%6.3VCERM402
C21010uF
20%6.3VCERM805
C37410uF
20%6.3VCERM805
C33610uF
20%6.3VCERM805
C26210uF
20%6.3VCERM805
C1920.22uF20%6.3VCERM402
C1310.22uF20%6.3VCERM402
C1460.22uF20%6.3VCERM402
C1850.22uF20%6.3VCERM402
C1450.22uF20%6.3VCERM402
C1750.22uF20%6.3VCERM402
C1650.22uF20%6.3VCERM402
C1430.22uF20%6.3VCERM402
C1900.22uF20%6.3VCERM402
C2060.22uF20%6.3VCERM402
C2210.22uF20%6.3VCERM402
C1610.22uF20%6.3VCERM402
C1640.22uF20%6.3VCERM402
C1630.22uF20%6.3VCERM402
C2440.22uF20%6.3VCERM402
C2430.22uF20%6.3VCERM402
C2220.22uF20%6.3VCERM402
C1620.22uF20%6.3VCERM402
C1880.22uF20%6.3VCERM402
C1890.22uF20%6.3VCERM402
C2250.22uF20%6.3VCERM402
C1360.22uF20%6.3VCERM402
C2230.22uF20%6.3VCERM402
C1330.22uF20%6.3VCERM402
C10310uF
20%6.3VCERM805
C30110uF
20%6.3VCERM805
C12410uF
20%6.3VCERM805
C15410uF
20%6.3VCERM805
C1320.22uF20%6.3VCERM402
C380.22uF20%6.3VCERM402
C230.22uF20%6.3VCERM402
C460.22uF20%6.3VCERM402
C560.22uF20%6.3VCERM402
C3290.22uF20%6.3VCERM402
C1770.22uF20%6.3VCERM402
C550.22uF20%6.3VCERM402
C2580.22uF20%6.3VCERM402
C980.22uF20%6.3VCERM402
C790.22uF20%6.3VCERM402
C1340.22uF20%6.3VCERM402
C630.22uF20%6.3VCERM402
C490.22uF20%6.3VCERM402
C370.22uF20%6.3VCERM402
C1070.22uF20%6.3VCERM402
C1000.22uF20%6.3VCERM402
C1220.22uF20%6.3VCERM402
C2420.22uF20%6.3VCERM402
C420.22uF20%6.3VCERM402
C1210.22uF20%6.3VCERM402
C1300.22uF20%6.3VCERM402
C390.22uF20%6.3VCERM402
C1350.22uF20%6.3VCERM402
C470.22uF20%6.3VCERM402
C1680.22uF20%6.3VCERM402
C580.22uF20%6.3VCERM402
C1160.22uF20%6.3VCERM402
C1060.22uF20%6.3VCERM402
C260.22uF20%6.3VCERM402
C1470.22uF20%6.3VCERM402
C620.22uF20%6.3VCERM402
C540.22uF20%6.3VCERM402
C1180.22uF20%6.3VCERM402
C3550.22uF20%6.3VCERM402
C37710uF
20%6.3VCERM805
C14810uF
20%6.3VCERM805
C400.22uF20%6.3VCERM402
C170.22uF20%6.3VCERM402
C410.22uF20%6.3VCERM402
C1010uF
20%6.3VCERM805
C1210uF
20%6.3VCERM805
C780.22uF20%6.3VCERM402
C480.22uF20%6.3VCERM402
C640.22uF20%6.3VCERM402
C220.22uF20%6.3VCERM402
C250.22uF20%6.3VCERM402
C610.22uF20%6.3VCERM402
C1870.22uF20%6.3VCERM402
C2270.22uF20%6.3VCERM402
C1200.22uF20%6.3VCERM402
C3780.22uF20%6.3VCERM402
C1010.22uF20%6.3VCERM402
C180.22uF20%6.3VCERM402
C430.22uF20%6.3VCERM402
C190.22uF20%6.3VCERM402
C2780.22uF20%6.3VCERM402
C1670.22uF20%6.3VCERM402
C1910.22uF20%6.3VCERM402
C2610.22uF20%6.3VCERM402
C2590.22uF20%6.3VCERM402
C2600.22uF20%6.3VCERM402
C2450.22uF20%6.3VCERM402
C1170.22uF20%6.3VCERM402
C1190.22uF20%6.3VCERM402
C210.22uF20%6.3VCERM402
C600.22uF20%6.3VCERM402
C330.22uF20%6.3VCERM402
C350.22uF20%6.3VCERM402
C530.22uF20%6.3VCERM402
C570.22uF20%6.3VCERM402
C340.22uF20%6.3VCERM402
C590.22uF20%6.3VCERM402
C270.22uF20%6.3VCERM402
C360.22uF20%6.3VCERM402
C3460.22uF20%6.3VCERM402
C3450.22uF20%6.3VCERM402
C3560.22uF20%6.3VCERM402
C3650.22uF20%6.3VCERM402
C3870.22uF20%6.3VCERM402
C3880.22uF20%6.3VCERM402
C3800.22uF20%6.3VCERM402
C2920.22uF20%6.3VCERM402
C3220.22uF20%6.3VCERM402
C3050.22uF20%6.3VCERM402
C2750.22uF20%6.3VCERM402
C3680.22uF20%6.3VCERM402
C3200.22uF20%6.3VCERM402
C3480.22uF20%6.3VCERM402
C3020.22uF20%6.3VCERM402
C1930.22uF20%6.3VCERM402
C3570.22uF20%6.3VCERM402
C3090.22uF20%6.3VCERM402
C3100.22uF20%6.3VCERM402
C1420.22uF20%6.3VCERM402
C2670.22uF20%6.3VCERM402
C3000.22uF20%6.3VCERM402
C2410.22uF20%6.3VCERM402
C3270.22uF20%6.3VCERM402
C1150.22uF20%6.3VCERM402
C2680.22uF20%6.3VCERM402
C1140.22uF20%6.3VCERM402
C1840.22uF20%6.3VCERM402
C1560.22uF20%6.3VCERM402
C1820.22uF20%6.3VCERM402
C1860.22uF20%6.3VCERM402
C1230.22uF20%6.3VCERM402
C1020.22uF20%6.3VCERM402
C1690.22uF20%6.3VCERM402
+1_5V_MAIN
+3V_MAIN
C520.22uF20%6.3VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 17 44E051-6469
INTREPID 3.3V DECOUPLING
INTREPID CORE DECOUPLING
INTREPID AGP I/O DECOUPLING21 Balls 4 X 10UF (0805)24 X 0.22UF (0402)
INTREPID MAXBUS DECOUPLING
INTREPID DDR DECOUPLING
72 X 0.22UF (0402)
32 X 0.22UF (0402)
44 Balls
51 X 0.22UF (0402) 4 X 10UF (0805)
57 Balls 4 X 10UF (0805)
30 Balls 4 X 10UF (0805) 4 X 10UF (0805)
24 Balls
Intrepid Decoupling
29 X 0.22UF (0402)
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CR-17
+2_5V_INTREPID
+1_5V_AGP
MAXBUS_SLEEP38 34
38
23
38
20
16
16
19
9
11
16
7
10
13
5
www.vinafix.vn
+3V_MAIN
+5V_MAIN
+3V_MAIN
C4480.1UF20%10VCERM402
402MF
1/16W5%
10KR670
402MF
1/16W5%
10KR669
402MF
1/16W5%
10KR662
SM
RP38
25V1/32W5%10K
+3V_MAIN
J10QT500806-L111
M-ST-SM
C57910UF20%6.3VCERM805
C/BE3*C/BE2*C/BE1*C/BE0*
VR_EN*VR_PORT
VCCCBVCCP
GND
VCC
GRST
MFUNC4MFUNC5MFUNC6
MFUNC3
MFUNC0
SUSPEND
MFUNC1MFUNC2
PCLK
SPKROUT
GNT
TRDYSTOPFRAME
PRSTREQ
DEVSEL
PERRIDSELSERRIRDY
AD31
PAR
AD30AD29AD28AD27
AD20AD21
AD18AD19
AD26AD25AD24AD23AD22
AD17
AD10AD11
AD9AD8
AD16AD15AD14AD13AD12
AD7
AD0
AD2AD3AD4AD5AD6
AD1
D14/RSVDD13/CAD6D12/CAD4D11/CAD2
D10/CAD31
D15/CAD8
D9/CAD30D8/CAD28D7/CAD7D6/CAD5D5/CAD3D4/CAD1D3/CAD0D2/RSVDD1/CAD29D0/CAD27
A22/CTRDY*
A20/CSTOP*
A23/CFRAME*
A21/CDEVSEL*
A19/CBLOCK*
A15/CIRDY*A14/CPERR*
A12/CC/BE2*
A8/CC/BE1*
A25/CAD19A24/CAD17
A18/RSVDA17/CAD16A16/CCLK
A13/CPAR
A11/CAD12A10/CAD9A9/CAD14
A7/CAD18A6/CAD20A5/CAD21
CE2/CAD10*INPACK/CREQ*WAIT/CSERR*
A4/CAD22A3/CAD23A2/CAD24A1/CAD25A0/CAD26
VPPD1VPPD0
VCCD0*VCCD1*
IORD*/CAD13IOWR*/CAD15
OE*/CAD11
WE*/CGNT*
CD2*/CCD2*CD1*/CCD1*
CE1*/CC/BE0*
RDY/IREQ*/CINT*
VS1*/CVS1VS2*/CVS2
REG*/CC/BE3*RESET/CRST*
BVD1/CSTSCHG/STSCHG*/RI*BVD2/SPKR*/CAUDIO
WP/IOIS16*/CCLKRUN*
RI_OUT/PME
CLK_48_RSVD/NCU26BGA
PCI1510GGU
+2_5V_MAIN 402
R676
MF1/16W
5%10K
C7482.2UF20%10VCERM805
C7422.2UF20%10VCERM805
402MF
1/16W5%
47R763
402
R774
MF1/16W5%47
402
R299
MF1/16W
5%10K
C7540.22UF20%6.3VCERM402
TPS2211
OC
AVPP
AVCC2AVCC1AVCC0
GND
SHTDWN
VCCD0VCCD1VPPD0VPPD1
V_5_2V_5_1
V_3_2V_3_1
V_12 SSOI
U20
C7560.22UF20%6.3VCERM402
C7630.22UF20%6.3VCERM402
C7550.22UF20%6.3VCERM402
C7620.22UF20%6.3VCERM402
C7640.22UF20%6.3VCERM402
402MF
1/16W5%
47R661
C7610.22UF20%6.3VCERM402
C7390.1UF
20%10V
CERM402
402
R684
MF1/16W
5%22
402MF
1/16W5%
47R675
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 18 44E051-6469
THIS PROPERLY SHUTS DOWNCARDBUS POWER FOR PSUEDO-D3COLD
PCI1510 PULL-UPS
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES
NC
NC
TO MINIMIZE INDUCTANCE!
CARDBUS
NC
NC
NCCLAMP FOR PCICLAMP FOR PC-CARD
INTEGRATED PULL-UP
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
PC CARD/CARDBUS CONNECTOR
1
2
1 2
1 2
1 2
5
10
6
4
7
3
9
8
2
1
CRITICAL
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
3536
3738
39
4
40
4142
4344
4546
4748
49
5
50
5152
5354
5556
5758
59
6
60
6162
6364
6566
6768
69
7
70
7172
7374
7576
7778
79
8
80
81
8283
84
9
1
2
CRITICAL
C7
D7
G11
G12
D9
E12
D12
C10
B13
F10
E13
A13
B7
E10
D11
C12
A10
B10
B9
D10
B12
C8
C9
A12
E11
F11
N8
M7
M5
L4
N3
K5
L5
M4
J4
H1
H3
H2
L7
G2
G4
F1
C3
F3
E2
F4
B1
D2
E4
N6
D3
E3
K4
M6
L6
N5
N4
M2
C6
D6
K6
M3
J2
A1
L13
B5
H13
G13
H10
A4
C4
B3
M12
J11
K13
J12
H11
A3
K11
K12
J13
J10
H12
C5
B4
K2
J1
A2 A11 D1 F13 H4 K8 M13 N2
C1
L11
F2
B8
F12
C11
K1
K7
N9
L9
K10
M10
N12
L10
G10
N1
G1
K3
G3
A6
A8
C2
D8
M8
L2
M9
L1
N10
J3
A7 C13 D5 E1 M1 N7 N11
B11
N13
L12
L3
K9
M11
D4
L8
B2
A9
B6
D13
A5
1
2
1
2
1
2
1 2
1
2
NO STUFF
1
2
1
2
11
12
13
10
7 8
16
1
2
15
14
9
3
4
5
61
2
1
2
1
2
1
2
1
2
1 2
1
2
1
2
1
2
NO STUFF
1 2
CR-18
IO_RESET_L CBUS_PCI_RESET_L
CBUS_DET_2_L
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_REG_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_RESET_L
CBUS_VS2
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_IOWR_L
CBUS_IORD_L
CBUS_VS1
CBUS_CE2_L
CBUS_DATA<15>
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DET_1_L
CBUS_ADDR<25>
CBUS_ADDR<8>
CBUS_WP_L
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<6>
CBUS_ADDR<7>
CBUS_ADDR<12>
CBUS_ADDR<15>
CBUS_ADDR<16>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_READY
CBUS_WE_L
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<9>
CBUS_ADDR<11>
CBUS_OE_L
CBUS_ADDR<10>
CBUS_CE1_L
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
PCI1510_VR_EN_L
CBUS_MFUNC3_PD
CBUS_MFUNC2_PD
CBUS_MFUNC1_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_BVD1_L
CBUS_DET_1_L
CBUS_DET_2_L
CBUS_IORD_L
CBUS_IOWR_L
CBUS_OE_L
CBUS_CE1_L
CBUS_WE_L
CBUS_READY
CBUS_RESET_L
CBUS_REG_L
CBUS_BVD2_L
CBUS_WP_L
CBUS_CE2_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<25>
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_ADDR_16_UF
CBUS_ADDR<15>
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<12>
CBUS_ADDR<11>
CBUS_ADDR<10>
CBUS_ADDR<9>
CBUS_ADDR<8>
CBUS_ADDR<7>
CBUS_ADDR<6>
CBUS_ADDR<5>
CBUS_ADDR<4>
CBUS_ADDR<3>
CBUS_ADDR<2>
CBUS_ADDR<1>
CBUS_ADDR<0>
CBUS_DATA<15>
CBUS_VS1
CBUS_VS2
CBUS_ADDR<16>
CBUS_PCI_PERR_L
CBUS_PCI_SERR_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_SUSPEND_PU
CBUS_INT_L
CBUS_PCI_GNT_L
CBUS_PCI_REQ_L
PCI_DEVSEL_L
PCI_TRDY_L
PCI_STOP_L
CLK33M_CBUS
PCI_AD<0>
PCI_AD<1>
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<2>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<31>
PCI_AD<30>
PCI_AD<3>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
CBUS_PCI_IDSEL
PCI_AD<26>
PCI_AD<19>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_VPPD1
CBUS_VPPD0
CBUS_VCCD1_L
CBUS_VCCD0_L
MAIN_RESET_L
CBUS_PCI_PERR_L
CBUS_SUSPEND_PU
CBUS_PCI_SERR_L
TPS2211_SHDN_L_PU
MAIN_RESET_L
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
30
30
39
39
39
39
39
39
37
37
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
26
26
27
37
37
37
37
37
37
26
26
37
37
37
37
26
26
26
26
26
26
26
26
26
26
26
37
37
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
24
24
26
26
26
26
26
26
26
24
24
26
26
26
26
24
24
24
24
24
24
24
24
24
24
24
26
26
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
21
21
23
39
38
38
39
38
38
39
39
24
24
24
24
24
24
36
13
13
24
24
24
24
13
13
13
13
13
13
13
13
13
13
13
24
24
24
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
38
38
19
19
19
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
13
13
13
18
18
18
18
18
18
18
15
13
13
13
13
13
13
10
10
13
13
13
13
10
10
10
10
10
10
10
10
10
10
10
13
13
13
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
18
18
18
18
18
18
18
www.vinafix.vn
402MF
1/16W5%
47R155
402
R28
MF1/16W
1%4.99K
402
R22
MF1/16W
1%4.99K
C130.22UF20%6.3VCERM402
402MF
1/16W5%
0R115
402MF
1/16W5%
0R99
C940.1UF20%10VCERM402
C2510.1UF20%10VCERM402
C840.1UF20%10VCERM402
C440.1UF20%10VCERM402
C280.01UF20%16VCERM402
C1500.1UF20%10VCERM402
C1960.01UF20%16VCERM402
C930.1UF20%10VCERM402
C1040.1UF20%10VCERM402
C1250.1UF20%10VCERM402
C1490.01UF20%16VCERM402
C920.1UF20%10VCERM402
C650.01UF20%16VCERM402
C2880.1UF20%10VCERM402
C2830.1UF20%10VCERM402
C2890.1UF20%10VCERM402
C26410UF20%6.3VCERM805
C850.1UF20%10VCERM402
C660.01UF20%16VCERM402
C810.1UF20%10VCERM402
C2940.01UF20%16VCERM402
C670.1UF20%10VCERM402
C3140.01UF20%16VCERM402
C720.1UF20%10VCERM402
C3130.1UF20%10VCERM402
C2540.1UF20%10VCERM402
C800.1UF20%10VCERM402
C1050.01UF20%16VCERM402
C17010UF20%6.3VCERM805
C3170.1UF20%10VCERM402
C3180.1UF20%10VCERM402
C2820.1UF20%10VCERM402
402
R35
MF1/16W
5%10K
603
R635
MF1/16W5%0
603
R634
MF1/16W5%0
+1_5V_MAIN
402MF
1/16W5%
47R601
805
R245
FF1/10W5%0
805
R244
FF1/10W5%0
+3V_MAIN +3V_SLEEP
805
R648
FF1/10W5%0
805
R647
FF1/10W5%0
+2_5V_MAIN
+1_5V_SLEEP
402
R136
MF1/16W1%49.9
402
R128
MF1/16W1%49.9
402
R173
MF1/16W
5%10K
402
R82
MF1/16W5%100
402
R185
MF1/16W5%100
402MF
1/16W5%
120R72
402MF
1/16W5%
120R83
402MF
1/16W5%
120R186
402MF
1/16W5%
120R191
(1 OF 5)
AGPRBF*
VDDAGP9VDDAGP8VDDAGP7VDDAGP6VDDAGP5VDDAGP4VDDAGP3VDDAGP2VDDAGP1VDDAGP0
NC
PCIINTA*
PCIPARPCISTOP*PCIDEVSEL*PCITRDY*PCIIRDY*PCIFRAME*
PCIREQ*
PCICBE3*
PCICBE1*PCICBE2*
PCICBE0*
PCIAD27
PCIAD31
PCIAD28
PCIAD30PCIAD29
PCIAD21PCIAD22PCIAD23PCIAD24PCIAD25PCIAD26
PCIAD19PCIAD18PCIAD17
PCIAD20
PCIAD16
PCIAD9PCIAD10PCIAD11PCIAD12PCIAD13PCIAD14
PCIAD8PCIAD7
PCIAD15
PCIAD6PCIAD5PCIAD4PCIAD3PCIAD2PCIAD1PCIAD0
AGPPIPE*AGPWBF*
AGPSBA7AGPSBA6AGPSBA5AGPSBA4AGPSBA3AGPSBA2AGPSBA1AGPSBA0
AGP_MB_DET*
AGPSBSTBAGPSBSTB*
AGPVREF
AGPSTOP*AGPBUSY*
PCIGNT*
PCIRST*PCICLK
AGPADSTB0*AGPADSTB0AGPADSTB1*AGPADSTB1
AGPST2AGPST1AGPST0
AGP_CAL_PDAGP_CAL_PUAGP_DBI_LO
U43BGA
MAP31-64MB
FBDQS2
MEM_CAL_CLKMEM_CAL_PUMEM_CAL_PD
(3 OF 5)
FBDQS3
FBDQS0FBDQS1
VDDFBIO0
FBCLK1*
FBD1
FBCLK0FBCLK0*
FBAA0_0FBAA0_1
FBAWE*
FBD33
FBD8_0FBD8_1FBVREF
ROMA14
ROMCS*ROMA15
FBCLK1
FBACKE
VDDFBC
VIPD
VIPHAD0VIPHAD1
VIPHCTLVIPHCLK
VIPPCLK
BGAMAP31-64MB
U43
402
R31
MF1/16W1%49.9
402
R30
MF1/16W
1%49.9
402
R29
MF1/16W1%49.9
603
R1605
MF1/16W5%0
+2_5V_SLEEP
402
R1900
MF1/16W
5%10K
402
R1901
MF1/16W
5%10K
GND GND
(4 OF 5)BGA
MAP31-64MBU43
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 19 44E051-6469
USE SIMPLE REFERENCE TO CHIP
BULK CAP ON INTREPID SIDE
AGP I/O REFERENCE(PLACE CLOSE TO NV17M AGP BALLS)
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
FOR AGP 8XNC
AGP 4X I/O - 1.5V
IMPORTANT NOTES ON MAP17NEED TO RESET GRAPHIC CHIP DURING RESTARTS
MAP17 AGP/DDR RAM
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FRAME BUFFER CLOCK TERMINATION
1.5V
2.5V
3V
INTREPID AGP IS ALSO CONNECTED TO +1_5V_AGP
D3HOT VS. D3COLD POWER INTAKE
HARDWARE DEBUG PORT
NC
NC
NC
NC
THERE’S NO ON-CHIP VOLTAGE DIVIDER
FBACKE PULL-DOWN IS NEEDED
NCFB SIGNALS USED FOR INTERNAL TESTING ONLYCHANGE TO NC FOR NEXT SYMBOL UPDATE NC
NC
NC
NC
NC
NC
MEMORY I/O - 2.5V
MEMORY CORE - 2.5V
MAIN_RESET_L IS TOGGLED FOR SLEEP
IO_RESET_L IS NOT TOGGLED FOR SLEEP
D3HOT
1 2
1
2
1
2
1
2
1 2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
D3HOT
1
2
D3COLD
1
2
D3COLD
1 2
D3HOT1
2
D3COLD1
2
D3HOT
1
2
D3COLD1
2
MAP311
2
MAP31
1
2
1
2
NO STUFF
1
2
NO STUFF
1
2
NO STUFF
1 2
NO STUFF
1 2
NO STUFF
1 2
NO STUFF
1 2
OMIT
AK28
AJ28
AK21
AJ21
AF10
AF18
AJ13
AJ15
AF15
AK15
AG16
AK16
AF16
AJ16
AH18
AH16
AH17
AF12
AF13
AG13
AG10
AC30
AG15
AH15
AH14
AH19
AK13
A1
A10
A11
A13
A14
A15
A16
A17
A2
A20
A21
A22
A23
A25
A26
A27
A28
A3
AA28
AA29
AA30
AA4
AA5
AB28
AB29
AB30
B1
B13
B15
B16
B18
B19
B21
B22
B24
B25
B27
B28
B3
C1
C10
C13
C14
C15
C16
AD30
AE30
AH29
AE28
AJ30
AG28
AK30
AG27
AH23
AJ24
AH22
AK24
AD29
AH21
AJ22
AH20
AK22
AG21
AJ19
AG18
AK19
AG19
AJ18
AE29
AF19
AK18
AD28
AG30
AF28
AG29
AH30
AC28
AH28
AJ27
AK25
AF21
AJ12
AK27
AH24
AG12
AK11
AJ25
AH27
AK12
AH11
AH26
AH25
AF30
AG14
AG17
AG20
AK14
AK17
AK20
AK23
AK26
AK29
OMIT
A24
B10
N28
C11
C21
C20
B4
A4
D28
D13
AA27
J28
F28
AA26
K28
E12
A18
K30
G30
J30
J1
F2
AH2
AB25
AB6
F7
F9
G25
G6
J25
J6
AD25
AD6
AE22
AE24
AE7
AE9
F22
F24
AB27
AG24
AG26
AG5
AG7
D22
D24
D26
D5
AD27
D7
D9
E25
E27
E4
E6
F26
F5
G27
G4
AD4
J27
J4
AE26
AE5
AF25
AF27
AF4
AF6
K4
J3
H3
K5
G2
G1
F1
G3
C8
C7
A5
B6
B7 MAP312
1
MAP311
2
MAP311
2
NO STUFF
1
2
1
2
1
2
OMIT
J7
AB24
L24
L26L29L5L7
AB26
M12M13M14M15M16M17M18M19
AB5
N12N13N14N15N16N17
AB7
N18N19
P12P13P14P15
AC2
P16P17P18P19
P24P26P29P7
AC29
R12R13R14R15R16R17R18R19
AD11
T12T13T14T15T16T17
AD14
T18T19
U12U13U14U15U16U17U18U19
U24U26U29U7
AD20
V12V13V14V15V16V17V18V19
AD22
W12W13W14W15W16W17
AD24
W18W19
AD26
Y24Y26Y29Y5
AD5
Y7
AD7AD9AE25AE27AE4AE6AF11AF14AF17AF2AF20AF22AF24AF26AF29AF5AF7AF9AG25AG6AH12
AJ11AJ14AJ17AJ2AJ20AJ23AJ26AJ29AJ5B11B14B17B2
B20B23B26
B5B8
D25D6
E11E14E17E2
E20E22E24E26E29E5E7E9
F25F27F4F6
G11G14G17G20G22G24G26G5G7G9H2
H29J24J26J5
CR-19
GPU_VIPHAD1_TP
GPU_VIPHAD0_TP
GPU_VIPHCLK_TP
GPU_VIPHTCL_TP
MEM_CAL_PD
+2_5V_GPU_FB
GPU_ROMCS_TP
GPU_ROMA15_TP
GPU_ROMA14_TP
AGP_CAL_PU
+1_5V_AGP
AGP_CAL_PD
AGP_GPU_RESET_LIO_RESET_L
MAIN_RESET_L
MEM_CAL_CLK
VIPPCLK_PD
MEM_CAL_PU
+2_5V_GPU_FB
+2_5V_GPU_FB
GPU_FB_VREF
+2_5V_GPU_FB
GPU_FBACKE
GPU_FBCLK0
GPU_FBCLK0_L
GPU_FBCLK1_L
GPU_VIPD0_TP
GPU_VIPD1_TP
GPU_VIPD2_ROMTYPE<1>
GPU_VIPD3_PCI_DEVID<2>
GPU_VIPD4_PCI_DEVID<0>
GPU_VIPD5_PCI_DEVID<1>
GPU_VIPD6_CRYSTAL<1>
GPU_VIPD7_TP
GPU_FBCLK1
+1_5V_LDO
+1_5V_AGP
+2_5V_GPU_FB
+3V_GPU
GPU_FBCLK1_L
+2_5V_GPU_FB
GPU_FBCLK1
GPU_FBCLK0_L
+2_5V_GPU_FB
GPU_FBCLK0
AGP_PIPE_L
AGP_WBF_L
AGP_GNT_L
AGP_AD<14>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<9>
AGP_AD<10>
AGP_AD<8>
AGP_AD<6>
AGP_AD<7>
AGP_AD<4>
AGP_AD<5>
AGP_AD<3>
AGP_AD<1>
AGP_AD<0>
AGP_AD<2>
AGP_AD<27>
AGP_AD<26>
AGP_AD<24>
AGP_AD<25>
AGP_AD<23>
AGP_AD<22>
AGP_AD<21>
AGP_AD<19>
AGP_AD<20>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<15>
AGP_AD<30>
AGP_AD<29>
AGP_AD<28>
AGP_BUSY_L
AGP_AD_STB<0>
AGP_AD_STB_L<1>
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_ST<1>
AGP_ST<0>
AGP_NV_PIPE_L
AGP_ST<2>
AGP_RBF_L
AGP_NV_INT_L
AGP_PAR
AGP_NV_WBF_L
AGP_STOP_L
AGP_DEVSEL_L
AGP_TRDY_L
AGP_FRAME_L
AGP_IRDY_L
AGP_REQ_L
AGP_CBE<3>
AGP_CBE<2>
AGP_CBE<1>
CLK66M_GPU_AGP
AGP_CBE<0>
AGP_AD<31>
STOP_AGP_L
GPU_AGP_VREF
AGP_SBA<0>
AGP_SBA<3>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<7>
AGP_SBA<6>
AGP_SB_STB_L
AGP_SB_STB
+1_5V_AGP
GPU_AGP_VREF
+1_5V_AGP
38
39
38
38
38
20
30
30
20 38
20
20
19
27
26
19 21
19
19
17
26
24
38
17 20
17
17
38
16
23
21
38
38
38
36
36
36
36
35
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15
36
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13
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www.vinafix.vn
C2340.22UF20%6.3VCERM402
C21310UF20%6.3VCERM805
C21210UF20%6.3VCERM805
C1260.22UF20%6.3VCERM402
C830.22UF20%6.3VCERM402
C710.22UF20%6.3VCERM402
C690.22UF20%6.3VCERM402
C820.22UF20%6.3VCERM402
C2860.22UF20%6.3VCERM402
C1270.22UF20%6.3VCERM402
C1970.22UF20%6.3VCERM402
C500.22UF20%6.3VCERM402
C1280.22UF20%6.3VCERM402
C1990.22UF20%6.3VCERM402
C2840.22UF20%6.3VCERM402
C700.22UF20%6.3VCERM402
C2350.22UF20%6.3VCERM402
C1980.22UF20%6.3VCERM402
C2870.22UF20%6.3VCERM402
C1510.22UF20%6.3VCERM402
C2330.22UF20%6.3VCERM402
C1520.22UF20%6.3VCERM402
C2850.22UF20%6.3VCERM402
C3630.01UF20%16VCERM402
C3400.01UF20%16VCERM402
C680.22UF20%6.3VCERM402
402
R229
MF1/16W5%10K
402
R276
MF1/16W1%10K
C65822UF
20%10V
CERM1210
C680330UF20%6.3VPOLYSMD
MBRS130LT3SMD24
D5SOT23
1N914
C4810.1UF
20%25V
CERM603
603MF
1/16W1%
15R339
C4670.1UF
20%25V
CERM603
603
R347
MF1/16W5%1
402
R281
MF1/16W1%576K
C4534.7UF20%10VCERM1206
+5V_MAIN
402
R283
MF1/16W5%0
402
R374
MF1/16W1%49.9K
402
R275
MF1/16W1%20K
C4820.1UF20%10VCERM402
402MF
1/16W5%
10KR333
SMXW4
B00ST
SW
TG
EXTVCC VCC
INT VIN
SGND PGND
RUN/SS
BG
VFB
ITH
ION
PGOOD
VRNG
FCB
U19LTC1778SSOP
402
R271
MF1/16W5%0
C442220PF
5%25V
CERM402
+PBUS
402
R340
MF1/16W5%1M
C4610.1UF20%10VCERM402C432
470PF10%50V
CERM402
402
R282
MF1/16W
1%20K
C3540.01UF20%16VCERM402
C3420.01UF20%16VCERM402
C3610.1UF20%10VCERM402
C3600.1UF20%10VCERM402
C39010UF20%6.3VCERM805
402
R220
MF1/16W1%16.2K
402
R230
MF1/16W1%12.7K
C4082.2UF
20%10V
CERM805
C3390.1UF20%10VCERM402
C39310UF20%6.3VCERM805
C39110UF20%6.3VCERM805
603
R219
MF1/16W5%0
603
R217
MF1/16W5%0
402
R206
MF1/16W1%1K
402
R201
MF1/16W1%1K C343
0.047UF10%16VCERM402
C3410.047UF10%16VCERM402
402
R227
MF1/16W
5%10K
402
R218
MF1/16W5%10K
402MF
1/16W1%
49.9R236
402
R284
MF1/16W1%63.4K
402
R277
MF1/16W5%0
402
R187
MF1/16W
5%10K
402
R198
MF1/16W
5%10K
402
R167
MF1/16W
5%10K
402
R174
MF1/16W5%10K
402MF
1/16W1%
49.9R237
C406470PF10%50VCERM402
C407470PF
10%50V
CERM402
402MF
1/16W1%
49.9R157
402MF
1/16W1%
49.9R158
C252470PF10%50VCERM402
C253470PF
10%50V
CERM402
402MF
1/16W1%
49.9R240
C410470PF10%50VCERM402
C409470PF
10%50V
CERM402
402MF
1/16W1%
49.9R241
402MF
1/16W1%
49.9R216
C375470PF10%50VCERM402
C376470PF
10%50V
CERM402
402MF
1/16W1%
49.9R215
Q42IRF7805SM
C681330UF
20%6.3VPOLYSMD
C682330UF
20%6.3VPOLYSMD
3.8UHL25
SM
C5100.01UF
20%16V
CERM402
402
R378
MF1/16W
5%0
G
D
SSOT-3632N7002DWQ12
G
D
SSOT-3632N7002DWQ12
SYM_VER2
GND
OUTIN
BYP ADJ
SOT-23-1LTC1761ES5-BYP
U8
C4000.1UF20%10VCERM402
GPIOD9
GPIOD8
GPIOD7
(5 OF 5)
TXD10TXD10*
TXC1TXC1*
TXD7*TXD7
TXD6TXD6*TXD5
TXD5*TXD4
TXD4*
TXC2TXC2*
TXC0*TXC0
TXD3TXD3*
TXD2*TXD2
TXD1TXD1*TXD0
TXD0*
TXD9TXD9*TXD8
TXD8*
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD1
I2C2SCLI2C2SDA
I2C0SDAI2C0SCL
I2C1SDAI2C1SCL
IFP0IOBGND
IFP0PLLGND
IFP0PLLVDD
IFP0VREF
IFP0RSET
TESTMODE
IFP0IOAVDD
IFP0IOAGND
IFP0IOBVDDIFP1IOGND
IFP1PLLVDD
IFP1PLLGND
IFP1VREF
IFP1RSET
BUFRST*
IFP1IOVDD
GPIOD0
VDDCORE
BGAMAP31-64MB
U43
402
R142
MF1/16W
5%10K
402
R150
MF1/16W5%10K
402MF
1/16W5%
0R2000
402
R2001
MF1/16W
5%0
402
R2003
MF1/16W
5%100K
402
R2002
MF1/16W
5%100K
SOT-363BAS16TWDP20
SM2N3904Q2000
SM2N3904Q2001
402
R2004
MF1/16W
5%10K
SOT-363BAS16TWDP20
SOT-363BAS16TWDP20
+5V_MAIN
Q39IRF7811WSO-8
C7284.7UF20%25VCERM1206
C7334.7UF20%25VCERM1206
C3620.1UF20%10VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 20 44E051-6469
WHEN HIGH => 1.36V
49.9K IN PARALLEL => VOUT = 1.36V53.6K IN PARALLEL => VOUT = 1.35V57.6K IN PARALLEL => VOUT = 1.338V
VOUT = 0.8V * (1 + UPPER R / LOWER R)
’1’ DURING SHUTDOWN’0’ DURING SLEEP/RUN
GPU VCORE SUPPLYWHEN LOW => 1.2V
TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN
TMDS TERMINATION
CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
I2C1 PULL-UP
ONLY GPIO6 IS ENABLED
ALL I2C ARE 5V TOLERANT
GPIOS HAVE CLAMP TO 5V
GPIOS ARE PLACED IN TRISTATE DURING SLEEP
IADJ = 30NA AT 25C
VOUT = 1.22(1 + R2/R1) + IADJ*R2 ONE SET OF ,0.1UF,0.01UF
FOR IFP0 AND IFP1
SHARES 10UF
2.8V IFP PLL SUPPLY
NVIDIA CONFIRMED NO CONNECT ON BUFRST*THIS IS A BUFFERED VERSION OF PCI RESET
MAP17 PWR/LVDS/TMDS
UNUSED
VGATMDS
LVDS
ADDR X50
ADDR X3E
ADDR X36
2.8V IS DEPENDENT ON CORE VOLTAGE
CHANGE TO FERRITE IF NECESSARY
PLACE VREF AND RSET DISCRETE CLOSE TO PIN
ONLY "GPIO"
ACTIVE HIGH
ACTIVE HIGH
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
3
1
2
1 2
1
2
1
2
1
2
4.7UF1
2
NO STUFF1
2
GPU_SWITCH
1
21
2
GPU_SWITCH
1
2
GPU_SWITCH
1 2
OMIT
1 2
CRITICAL
12
16
9
4
11
7
5
13
2
1
6
14
15
8
10
3
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
2
1
1
2
12
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
12
1
2
1
2
1212
1
2
1
2
12
1
2
1
2
12
12
1
2
1
2
12
CRITICAL
5 6 7 8
4
1 2 3
1
2
1
2
CRITICAL
1 2
D3HOT
1
2
D3HOT1
2
3
5
4
6
2
1
CRITICAL
1
2
OMIT
A9
C6
A6
A7
A8
C9
B9
C5
F3
B12
C12
AK4
AJ4
AH5
AH4
AK6
AJ6
T2
T1
U2
U1
V2
V1
R1
R2
M2
M1
N2
N1
L1
L2
AJ3
K2
K1
T5
T4
L3
K3
P5
P4
R5
R4
N5
N4
R3
P3
P2
P1
U5
U4
U3
T3
V5
V4
W5
W4
N3
M3
M5
M4
AE11
AE14
F17
F20
L25
L27
L6P25
P27
P6U25
U27
AE17
U6Y25
Y27
Y6
AE20
D11
D14
D17
D20
F11
F14
MAP31
1
2
MAP31
1
2
D3HOT
12
D3COLD1
2
1
2
1
216
1
3
21
3
2
1
2
2 5
3 4
CRITICAL
5 6 7 8
4
1 2 3
1
2
1
2
1
2
CR-20
GPU_VCORE
GPU_VCORE_SW
1778_BG
+3V_GPU
+3V_GPU
TMDS_CLKNTMDS_CLKP
TMDS_CLK_CMF
2_8V_ADJ1
+3V_GPU
2_8V_BYP
+2_8V_IFP_PLLVDD
+3V_GPU
TMDS_DN<0>TMDS_DP<0>
TMDS_D0_CMF
TMDS_DN<1>TMDS_DP<1>
TMDS_D1_CMF
TMDS_DN<2>TMDS_DP<2>
TMDS_D2_CMF
HIGH_VCORE
GPU_VCORE_CNTL_L
1778_BST_RC
1778_GND
DCDC_EN_L
1_5V_2_5V_OK
LTC1778_SHDN
1778_ION
1778_VCC
1778_TG
1778_BST
1778_VRNG
1778_ITH
1778_FCB
1778_ITH_RC
+1_5V_AGP
GPU_VCORE_PWR_SEQ
GPU_VCORE_SEQ
GPU_VCORE_SEQ_L
1778_SHDN_L
1778_GND
+3V_GPU
1778_VIN
DCDC_EN
1778_SHDN_L_D3COLD
SLEEP_L_LS5
GPU_BUFRST_TP
GPU_GPIO9
GPU_GPIO8
GPU_VCORE_CNTL_L
CLKLVDS_UP
CLKLVDS_UN
LVDS_U3P_SPN
LVDS_U3N_SPN
LVDS_U2P
LVDS_U2N
LVDS_U1P
LVDS_U1N
LVDS_U0P
LVDS_U0N
GPU_TMDS_DN<2>
GPU_TMDS_DP<2>
CLKLVDS_LP
CLKLVDS_LN
LVDS_L2P
LVDS_L2N
LVDS_L1P
LVDS_L1N
LVDS_L0P
LVDS_L0N
LVDS_L3P_SPN
LVDS_L3N_SPN
GPU_TMDS_CLKP
GPU_TMDS_CLKN
GPU_SSCLK_S1
GPU_SUS_STAT_L_PU
GPU_HPD
HPD_PWR_SNS_EN
FP_PWR_EN27 26
INV_ON_PWM
LVDS_DDC_CLK
LVDS_DDC_DATA
GPU_I2C1SCL
GPU_I2C1SDA
GPU_DVI_DDC_DATA
GPU_DVI_DDC_CLK
+2_8V_IFP_PLLVDD
GPU_IFP1RSET
+2_8V_IFP_PLLVDD
+3V_GPU_AVDD1
GPU_TMDS_DP<1>
GPU_TMDS_DN<1>
GPU_TMDS_DP<0>
GPU_TMDS_DN<0>
GPU_SSCLK_S0
GPU_VCORE
GPU_IFP1VREF
+3V_GPU_AVDD0
GPU_XOR_TESTMODE_ENABLE
GPU_IFP0VREF
GPU_IFP0RSET
1778_VFB
GPU_VCORE_CNTL_L_RC
38
38
38
38
38
21
21
21
21
38
21
39
20
20
20
20
39 39
39 39
39 39
19
20
34
35
39
19
19
37 37
19
19
37 37
37 37
37 37
17
19
33
34
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
38
15
15
22 22
15
38
15
22 22
22 22
22 22
38
35
38
16
38
15
32
33
37
37
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www.vinafix.vn
C32410UF20%6.3VCERM805
603
R127
MF1/16W5%0
402
R164
MF1/16W1%113
402
R196
MF1/16W1%63.4 C353
0.01UF20%16VCERM402
603
R228
MF1/16W5%0
603
R183
MF1/16W5%0
C3590.1UF20%10VCERM402
C3250.1UF20%10VCERM402
C39510UF20%6.3VCERM805
C21110UF20%6.3VCERM805
C62910UF20%6.3VCERM805
C6340.1UF20%10VCERM402
402MF
1/16W5%
33R620
+3V_SLEEP
SMFERR-EMI-100-OHML19
XIN/CLKINSSCLK
VSSS0S1
FRSEL
XOUT
VDD
SOICY25811U46
402
R235
MF1/16W5%10K
402
R234
MF1/16W5%10K
402
R211
MF1/16W
5%10K
402
R243
MF1/16W5%10K
402
R197
MF1/16W
5%10K
402
R208
MF1/16W5%10K
402
R223
MF1/16W
5%10K
402
R222
MF1/16W5%10K
402
R224
MF1/16W
5%10K
402
R221
MF1/16W5%10K
402
R159
MF1/16W
5%10K
402
R160
MF1/16W
5%10K
402
R195
MF1/16W
5%10K
402
R605
MF1/16W1%75
402
R149
MF1/16W1%75
402
R165
MF1/16W1%75
402
R205
MF1/16W1%75
402
R203
MF1/16W1%75
402
R204
MF1/16W1%75
402
R631
MF1/16W
5%10K
402
R632
MF1/16W
5%10K
402
R200
MF1/16W5%10K
402
R210
MF1/16W
5%10K
402
R233
MF1/16W
5%10K
402
R238
MF1/16W5%10K
402
R239
MF1/16W5%10K
402
R209
MF1/16W
5%10K
402
R212
MF1/16W5%10K
402
R232
MF1/16W
5%10K
402
R633
MF1/16W
5%10K
C35127PF5%50VCERM402
C28127PF
5%50V
CERM402
402MF
1/16W5%
10MR172
402
R171
MF1/16W
5%0
402MF
1/16W5%
0R180
402MF
1/16W5%
0R613
402
R184
MF1/16W5%10K
402
R213
MF1/16W
5%10K
402
R190
MF1/16W5%10K
402
R214
MF1/16W
5%10K
Y2SM-3
27.000M
402
R615
MF1/16W
5%0
402
R619
MF1/16W5%0
402
R614
MF1/16W
5%0
402
R623
MF1/16W5%0
MSTRAPSEL3MSTRAPSEL2MSTRAPSEL1MSTRAPSEL0
THERMDATHERMDC
XTALSSIN
XTALIN
VDD(MAP31)3.3V
VDD3.3V
VDD5V
PLLVDD
(2 OF 5)
DACVREFDACRSET
NCNC
XTALOUTBUFFVDDDVO_1
DVOD8
DVOD0DVOD1DVOD2DVOD3DVOD4
DVOVSYNCDVOHSYNCDVOCLKIN
VDDDVO_0
DVOD11DVOD10DVOD9
DVOD7DVOD6DVOD5
XTALOUT
DVOCLKOUT*DVOCLKOUTDVODEDVOVREF
DAC2BLUE
CRT2VSYNC
DAC2VDDDAC2GND
CRT2HSYNC
DAC2REDDAC2GREEN
DAC2VREFDAC2RSET
DACREDDACGREENDACBLUE
CRTVSYNCCRTHSYNC
DACGNDDACVDD
U43MAP31-64MB
BGA
C3160.1UF20%10VCERM402
C3440.1UF20%10VCERM402
C39410UF20%6.3VCERM805
C2320.1UF20%10VCERM402
C3150.1UF20%10VCERM402
C3380.1UF20%10VCERM402
C3190.1UF20%10VCERM402
C3370.1UF20%10VCERM402
402MF
1/16W5%
33R179
402
R750
MF1/16W5%10K
402
R751
MF1/16W
5%10K
402
R749
MF1/16W
5%10K
402
R748
MF1/16W
5%10K
400-OHM-EMIL4
SM-1
C846100PF
5%50V
CERM402
C848100PF
5%50V
CERM402
C847100PF
5%50V
CERM402
C849100PF
5%50V
CERM402
C850100PF5%50VCERM402
400-OHM-EMIL5
SM-1
400-OHM-EMIL53
SM-1
C84510UF
20%6.3VCERM805
C84410UF
20%6.3VCERM805
402MF
1/16W5%
33R166
402MF
1/16W5%
33R156
C85210UF20%6.3VCERM805
C851100PF5%50VCERM402
C2410UF
20%6.3VCERM805
402
R752
MF1/16W5%330
SM11/16W
RP55225%
SM11/16W
RP56225%
SM11/16W
RP570K5%
SM11/16W
RP580K5%
PAD
THRML
GND
SDA/DK0SCL/DK1
AGND
PD*EDGE/HTPLG
DEHSYNCVSYNCIDCK+IDCK-
D11D10
D2D3D4D5D6D7D8D9
D1D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1-
TX2+
TX0+TX0-
TXC-TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2ISEL/RST*
TSSOP
SIL1162U55
402
R757
MF1/16W
5%10K
603
R760
MF1/16W5%0
C3520.01UF20%16VCERM402
C2500.01UF20%16VCERM402
C2310.1UF20%10VCERM402
C3120.01UF20%16VCERM402
C2630.22UF
20%6.3VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 21 44E051-6469
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK
OKAY PER ICT
PTREEOUT
DVOCLKOUT* NOT USED IN HIGH SWING
MAP17 BOOT STRAPS
SET TO HIGH SWING MODE
FOR EXTERNAL TV OUT SUPPORTDVOCLKIN IS USED ONLY
TO GND OR UNCONNECTED ON SUBSTRATEMSTRAPSEL WILL BE CONNECTED
CRYSTAL = 2: 27MHZ CRYSTALPCI_AD = 1: NORMAL AGP PIN OUTSUBVENDOR = 0: NO VIDEO BIOS ROM
BUSTYPE
ROMTYPE<0>
CRYSTAL<1>
CRYSTAL<0>
RAMCFG<3>
RAMCFG<2>
RAMCFG<1>
RAMCFG<0>
DEVID<3>
DEVID<2>
DEVID<1>
DEVID<0>
SUBVENDOR
PCI_AD
BUS TYPE = 1: AGPROM TYPE <1..0> = 00: ONLY
PCI_DEVID<3..0> = 1001: MAP17(464)RAM CONFIG<3..0> = 1101: 4MX32, 1 DQS PER BYTE, LOW DRIVE STRENGTH
(NVIDIA CONFIRMED OKAY)
MAP17 ANALOG DAC/BOOT STRAPS
SPREAD SPECTRUM SUPPORT
MAP TMDSSILICON IMAGE 1162 TMDS
REPLACE WITH FERRITE IF NECESSARY
PLACE SERIES R CLOSE TO GPU
Y2 LOAD CAPACITANCE IS 18PF
DVO<7..0> HARDWARE DEBUG PORT
TESTCTL0_TP
TESTCTL1_TP
TESTCTL2_TP
S0=1;S1=M => -1.5% DOWN-SPREADDIVIDER ON CHIP - SO M IS TO FLOAT THE LINES
THERE’S 20K (10K/10K) RESISTOR
NC
NC
3.3V IO SUPPLY
REPLACE WITH FERRITE IF NECESSARY
REPLACE WITH FERRITE IF NECESSARY
NCNCNC
XTALOUTBUFF GENERATED INTERNALLY
TESTCTL3_TP
PLACE CLOSE TO PIN
DVO VREF
NC
NCNC
NC
NCNC
NCNC
NC
NC
NCNC
NC
NC
NCNCNCNC
NC
NCNCNCNC
NC
NCNCNC
NC
NCNCNCNCNC
NCNC
NC
NCNC
NCNC
NCNC
NC
NCNCNC
NCNC
NCNCNCNCNCNCNCNCNCNCNCNC
NCNCNCNCNCNCNCNCNCNC
NCNCNC
NCNC
NC
NCNC
NCNC
NCNC
EXTERNAL SPREAD SPECTRUM CLOCK INPUT
IPDIPDIPDNC
NC
SHOULD BE 10MIL SPACINGCHANGED TO 8MIL BECAUSE OF PACKAGE PWR PINS
1
2
1
2
2
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
GPU_SS1
2
GPU_SS1
2
GPU_SS
1 2
GPU_SS
1
2
CRITICAL
GPU_SS
6
4
3
5
7
2
1
8
NO STUFF1
2
1
2
1
2
1
2
1
21
2
1
2
NO STUFF1
2
NO STUFF
1
2
1
2
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF
1 2
1
2
NO STUFF
1 2
NO STUFF
1 2
NO STUFF
1
2
1
2
1
2
NO STUFF1
2
CRITICAL
1 3
NO STUFF1
2
NO STUFF1
2
NO STUFF1
2
GPU_SS
1
2
OMITAA3
Y3
AH10
AH9
W3
W1
AA2
Y2
W2
AA1
Y1
AH8
AK8
AJ10
AJ9
AJ8
AK10
AK9
AB2
AD2
AD1
AK2
AK3
AG3
AH1
AH3
AJ1
AG1
AG2
AD3
AE1
AE3
AE2
AK1
AB3
AB1
AC3
B30
B29
A30
A29
AB4AG9
C17C18C19C2
C22C23C24C25C26C27C28C29C3
C30C4D1
D10D12D15D16D18D19D2
D21D27D29D30E10E13E15E16E18E19E21E28E30F29F30G28G29
H28H30
J2J29
K26K27K29
L28L30M26M27M28M29
N26N27
N29N30P28
P30
R26R27R28R29R30T26T27T28T29T30U28U30V26V27V28V29V3V30W26W27W28W29
Y28Y30
AK5
E3
D3
AC1
AF1
AH13
M30
W30
E1
H1
L4
Y4
A12
A19
AD17
AG22
AG11
D4
AF3
AG4
AJ7
AK7
AH6
AH7
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
GPU_SS
1 2
NO STUFF
1
2
1
2
NO STUFF
1
2
1
2
1 2
1
2
1
2
1
2
1
2
1
2
1 2
1 2
1
2
1
2
2 1
2 1
1
2
1
2
1
2
1
2
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
NO STUFF
1
2
3
4
8
7
6
5
NO STUFF
1
2
3
4
8
7
6
5
37
43
31
34
40
24
18
17
6
5
16
15
14
13
10
9
8
7
19
44
30
4
231
20
12
11
25
48
47
29
45
28
46
27
26
49
36
35
39
38
42
41
33
32
322
2
21
NO STUFF
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CR-21
GPU_CRT2HSYNC_TP
GPU_CRT2VSYNC_TP
+3V_GPU
+3V_GPU_DVO
+3V_GPU
SI_TMDS_DN<2>
SI_TMDS_CLKP
SI_TMDS_DP<0>
SI_TMDS_DP<1>
SI_TMDS_DP<2>
SI_TMDS_DN<1>
SI_TMDS_DN<0>
SI_TMDS_CLKN
MAIN_RESET_L
SI_DK<0>
SI_DK<1>
+3V_GPU
15 13 +3V_GPU
GPU_DVO_CLKIN
+3V_GPU
GPU_SSCLK_UF
GPU_CLK27M_OUT
GPU_SSCLK_S1
CY25811_S1
GPU_SSCLK_S0 CY25811_S0
GPU_SSCLK_IN
+3V_GPU_SS
CLK27M_XTAL_IN
GPU_CLK27M_OUT
GPU_DVO_VREF
VGA_HSYNC
VGA_VSYNC
+3V_GPU
SI_TMDS_DP<0>
SI_TMDS_DN<0>
SI_TMDS_CLKP
SI_TMDS_CLKN
TMDS_DP<0>
TMDS_DN<0>
TMDS_CLKP
TMDS_CLKN
SI_TMDS_DN<2>
SI_TMDS_DP<1>
SI_TMDS_DN<1>
TMDS_DP<2>
TMDS_DN<2>
TMDS_DP<1>
TMDS_DN<1>
GPU_TMDS_CLKN
GPU_TMDS_CLKP
GPU_TMDS_DN<0>
GPU_TMDS_DP<0>
TMDS_CLKN
TMDS_CLKP
TMDS_DN<0>
TMDS_DP<0>
GPU_TMDS_DN<1>
GPU_TMDS_DP<1>
GPU_TMDS_DN<2>
GPU_TMDS_DP<2>
TMDS_DN<1>
TMDS_DP<1>
TMDS_DN<2>
TMDS_DP<2>
8 MIL SPACINGSI_TMDS:::50SI_CLKTMDSSI_TMDS_CLKN
8 MIL SPACINGSI_TMDS:::50SI_CLKTMDSSI_TMDS_CLKP
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D0SI_TMDS_DN<0>
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D0SI_TMDS_DP<0>
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D1SI_TMDS_DN<1>
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D1SI_TMDS_DP<1>
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D2SI_TMDS_DN<2>
8 MIL SPACINGSI_TMDS:::50SI_TMDS_D2SI_TMDS_DP<2>
GPU_DVOD<1>
GPU_DVOD<10>
GPU_VIPD2_ROMTYPE<1>
GPU_DVOD<6>
GPU_DVOD<3>
GPU_DVOD<2>
GPU_DVOD<5>
GPU_DVOD<4>
+3V_GPU
+3V_GPU
10 MIL SPACINGGPU_TMDS_CLKP GPU_CLKTMDS GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_CLKN GPU_CLKTMDS GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DN<0> GPU_TMDS_D0 GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DN<1> GPU_TMDS_D1 GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DP<0> GPU_TMDS_D0 GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DP<1> GPU_TMDS_D1 GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DN<2> GPU_TMDS_D2 GPU_TMDS:::50
10 MIL SPACINGGPU_TMDS_DP<2> GPU_TMDS_D2 GPU_TMDS:::50
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<2>
GPU_DVOD<1>
GPU_DVOD<0>
GPU_DVO_CLKP
21 GPU_DVO_VSYNC
21 GPU_DVO_HSYNC
GPU_DVO_DE
GPU_DVOD<11>
GPU_DVOD<10>
SI_EDGE
+3V_SI_AVCC
SI_EXT_SWING_SET
+3V_SI_VCC
SI_I2C_OFF
+3V_SI_PLLVCC
GPU_MSTRAPSEL<3>
GPU_MSTRAPSEL<2>
GPU_MSTRAPSEL<1>
GPU_MSTRAPSEL<0>
GPU_THERMDA_TP
GPU_THERMDC_TP
GPU_SSCLK_IN
GPU_CLK27M_UF
GPU_DVOD<11>
GPU_DVOD<10>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<6>
GPU_DVOD<5>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<1>
GPU_DVOD<0>
21 GPU_DVO_VSYNC
GPU_DVO_CLKN_TP
GPU_DVO_HSYNC
GPU_DVO_CLKIN
GPU_DVO_CLKP
GPU_VSYNC
GPU_HSYNC
+3V_DAC1VDD
GPU_B
GPU_R
GPU_G
CLK27M_GPU_XOUT
GPU_COMP
+3V_DAC2VDD
GPU_C
GPU_Y
GPU_RSET2
GPU_DACVREF2
GPU_RSET1
GPU_DACVREF1
+3V_GPU_PLLVDD
CLK27M_GPU_XIN
GPU_DVO_DE
GPU_DVO_VREF
GPU_MSTRAPSEL<2>
GPU_MSTRAPSEL<3>
GPU_MSTRAPSEL<1>
GPU_MSTRAPSEL<0>
GPU_VIPD6_CRYSTAL<1>
GPU_DVOD<11>
GPU_DVO_HSYNC
GPU_VIPD3_PCI_DEVID<2>
GPU_VIPD4_PCI_DEVID<0>
GPU_VIPD5_PCI_DEVID<1>
GPU_DVOD<0>
15 +3V_GPU13
GPU_FBACAS_TP
NO_TEST=TRUE SI_TMDS_DP<2>
38
38
39
38
38
38
38
38
38
38
21
21
30
21
21
21
21
39
39
39
39
39
39
39
39
39
39
39
39
21
21
21
20
20
26
20
20
20
20
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
20
20
20
19
19
24
19
19
19
19
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
19
19
19
15
15
19
15
15
15
36
36
36
39
39
15
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
37
37
37
37
37
37
37
15
15
21
21
21
21
21
21
21
21
37
37
37
37
37
37
37
37
37
37
36
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
37
37
37
36
37
37
37
15
13
38
13
21
21
21
21
21
21
21
21
18
13
13
21
13
36
21
20
20
21
38
36
21
21
22
22
13
21
21
21
21
20
20
20
20
21
21
21
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
21
21
21
21
21
21
21
21
21
21
19
21
21
21
21
21
13
13
20
20
20
20
20
20
20
20
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
38 38
38
21
21
21
21
21
36
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
38
22
22
22
36
22
38
22
22
38
36
21
21
21
21
21
21
19
21
21
19
19
19
21
13
21
www.vinafix.vn
+5V_MAIN
402
R256
MF1/16W
5%100K
C7210.001UF20%50VCERM402
C7130.001UF20%50VCERM402
C7090.001UF20%50VCERM402
C41810UF20%6.3VCERM805
FERR-1K-OHM-EMIL26
SM
400-OHM-EMIL29
SM-1
+PBUS
+3V_PMU
C5940.1UF
20%10V
CERM402
G2
D2S2
SC70-6FDG6324L
Q1
G1
S1
D1
Q1FDG6324LSC70-6
0.068uHL15
SM
C6163.3PF0.25%50VCERM402
C6083.3PF0.25%50VCERM402
C6153.3PF0.25%50VCERM402
0.068uHL10
SM
C6184.7PF
5%50V
CERM402
0.068uHL12
SM
C6094.7PF
5%50V
CERM402
0.068uHL16
SM
C6174.7PF
5%50V
CERM402
0.068uHL11
SM
0.068uHL13
SM
402
R585
MF1/16W5%10K
402
R576
MF1/16W5%10K
G
SD
SOT-3632N7002DW
Q29
+3V_SLEEP
G
SD
SOT-3632N7002DW
Q29
402
R607
MF1/16W5%100KC604
100pF5%50VCERM402
402
R570
MF1/16W5%4.7K
402
R575
MF1/16W
5%4.7K
C633100pF5%50VCERM402
C6570.01UF20%50VCERM603
400-OHM-EMIL18
SM-1
G
SD
SOT-3632N7002DW
Q68
SM
0.5AMP-13.2VF1
MBR0530
D21SM
C603100pF5%50VCERM402
SM2N3904Q36
402MF
1/16W5%
20KR610
C6250.1UF20%10VCERM402
402
R593
MF1/16W
1%68.1K
SM
U45LMC7211
402MF
1/16W1%
10KR577
402
R594
MF1/16W
1%100K
402
R598
MF1/16W
1%10K
G
D
SSOT-3632N7002DWQ33
402
R611
MF1/16W
5%100K
SM2N3904Q34
402MF
1/16W5%
10KR604
402
R600
MF1/16W
5%330
G
DS
TP0610SM
Q32
C6560.01UF
20%50V
CERM603
FERR-10-OHM-500MAL21
SM
3.3UHL20
0603
3.3UHL24
0603
C6760.01UF
20%50V
CERM603
3.3UHL22
0603
FERR-10-OHM-500MAL23
SM
+3V_SLEEP
+5V_SLEEP
SMXW14
SMXW15
402
R618
MF1/16W
5%0
402
R500
MF1/16W5%0
402MF
1/16W5%
100R584
402MF
1/16W5%
100R563
402MF
1/16W5%
100R564
SM-2MTJ8
400-OHM-EMIL28
SM-1
SYM_VER-1
L17165-OHM
SM
MINIDINJ17RT-THMH1177
C4050.001uF
20%50V
CERM402
402
R267
MF1/16W
5%100K
C4330.001uF
20%50V
CERM402
+3V_SLEEP
402
R272
MF1/16W
5%100K
F-RT-SM
J7G-501973
20%50VCERM402
0.001uFC473
C4430.001uF
20%50V
CERM402
FERR-250-OHML2
SM
+3V_MAIN
5%50VCERM603
2200pFC462
TSOP
Q5SI3443DV
402MF
1/16W5%
100KR313
402
R320
MF1/16W5%100K
S
D
G
Q22N7002SM
32U32
TSSOP74LVC32
402MF
1/16W5%
680R603
20%50VCERM603
0.01uFC601
F-RT-THQH1112J16
402MF
1/16W5%
0R2200
402
R756
MF1/16W5%68K
+PBUS
G
DS
TP0610SM
Q70402
R755
MF1/16W5%330
C85347UF
20%6.3VCERM1210
D S
GSOT-3632N7002DWQ33
402
R754
MF1/16W
5%100K
402
R671
MF1/16W
5%100K
C8650.001uF
20%50V
CERM402
C643560PF
10%50V
CERM402
C690560PF
10%50V
CERM402
C678560PF
10%50V
CERM402
C632560PF
10%50V
CERM402
C688560PF
10%50V
CERM402
C677560PF
10%50V
CERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 22 44E051-6469
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
CRITICAL155S0147 1 CHOKE,COMM MODE 370OHM,2-LINE,SMD L17
SHARES LOGIC WITH KB RESET SIGNALS (PG 28)
INVERTER INTERFACE
LCD POWER SWITCHES
LCD INTERFACE
DVI POWER SWITCHEXTERNAL VIDEO (DVI) INTERFACE
no-panel case (development)Panel has 2K pull-ups
100K pull-ups are for
NC
LVDS INTERFACE
INVERTER EXPECTS ACTIVE HIGH SIGNAL
PLACE CLOSE TO CONNECTORANALOG FILTERING
NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
VIDEO CONNECTORS
3904 from turning
has active, self-
Pulldown prevents
powered DDC clock
on when DVI monitor
pullup.
Isolation required for DVI power switch
(TMDS_DN<4>)
(+5V_DDC SLEEP)
(TMDS_DP<3>)
(TMDS_DP<4>)
(TMDS_DN<3>)
DVI DDC CURRENT LIMIT(55mA requirement per DVI spec)
3V LEVEL SHIFTERS
DDC_CLK is isolated from
into DDC_CLK. Since host rails
system is shutdown or asleep..
power key on remote deviceis pressed, 5V will be driven
Power key detect path when
NV17M DURING SHUTDOWN. WHEN
will be low, TP0610 will turnon, driving SOFT_PWR_ON_L low.
Isolation will be disabled as well.device path into DDC_CLK.
As host rails rise, TP0610will turn off, as will remote
(LVDS DDC POWER)
(TMDS_DN<5>)
(TMDS_DP<5>)
PLACE NEAR C5A & C5BPLACE NEAR 3, 11 & 19
S-VIDEO/COMP OUT INTERFACEPlace GND shorts at
Place GND shorts at
graphics controller
graphics controller
COMPARATOR ENABLED BY NV17MAP
Power key detect path
HPD will be driven to 5V.on remote device pressed,3.3V. When power keyHPD normally driven towhen system is running.
GPIO.
NOTE: DVI_HPD SHARES Q68 WITH ALSBECAUSE OF BOARD REAL ESTATE
NC
NC
NC
NC
NC
NC
NEED PULL-DOWN BECAUSE THISSIGNAL IS TRISTATED INITIALLY
PLACE CLOSE TO CONNECTORTMDS FILTERING
1
2
1
2
CHGND2
1
2
1
21
2
2 1
1 2
1
2
6
2
3
4
6
5
1
1 2
1
2
1
2
1
2
1 2
1
2
1 2
1
2
1 2
1
2
1 2
1 2
1
2
1
2
6
2
1
3
5
4
1
2
1
2
1
2
1
2
1
2
1
2
CHGND1
1 2
3
5
4
1 2
1 2
1
2
1
3
2
1 2
1
2
1
2
4
3
1
5
2
1 2
1
2
1
2
6
2
1
1
2
1
3
2
1 2
1
2
3
1
2
1
2
CHGND1
CHGND1
1 2
1 2
1 2
1
2
1 2
1 2
1 2
1 2
1
2
1
2
1 2
1 2
1 2
CRITICAL
5
6
1
2
3
4
1 2
OMIT
1
2 3
4
CRITICAL
8 9
10 11
12
34
5
CHGND41
2
1
2
1
2
CHGND4
1
2
CRITICAL
33
34
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
4
5
6
7
8
9
CHGND4
12
CHGND4
1
2
1 2
1 2
1
2
5
63
4
1 2
1
2
3
1
2
7
1
2
3
14
12
CHGND5
CHGND2
1 2
CRITICAL
C1
C2
C3
C4
C5AC5B
31
32
33
34
35
36
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
3
4
5
6
7
8
9
1 2
1
2
3
1
2
1
2
1
2
3
5
4
1
2
1
2
NO STUFF
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CR-22
TMDS_CLKP
TMDS_CLKN TMDS_CONN_CLKN
TMDS_CONN_CLKP
HPD_PWR_SNS_EN
HPD_ON
HPD_PWR_SW
COMP_ENABLEHPD_BASE
SOFT_PWR_ON_L
COMP_DISABLE
DVI_HPD_UF DVI_HPD_DIV
HPD_4V_REF
+3V_LCD
DVI_DDC_CLK_UF DVI_TURN_ON
+5V_DDC_SLEEP
DVI_TRUN_ON_ILIM
DVI_TURN_ON_BASE
GPU_R_FILTR
GPU_G_FILTRGPU_G
GPU_B_FILTRGPU_B
GPU_R VGA_R
VGA_G
VGA_B
GPU_DVI_DDC_CLK
DVI_HPD
DVI_DDC_DATA
DVI_DDC_CLK
DDC_CLK_ISO
GPU_HPD
GPU_DVI_DDC_DATA
+5V_DDC_SLEEP_UF
TV_GND1
TV_Y
TV_C
TV_COMP
TV_GND2
BRIGHT_PWM
FP_PWR_EN24
FP_PWR_EN_L
INV_ON_PWM
BRIGHT_PWM_UF
GPU_Y
GPU_C
GPU_COMP
GPU_TV_GND2
GPU_TV_GND1
LVDS_L0P
LVDS_L0N
LVDS_U0N
CLKLVDS_LN
CLKLVDS_LP
LVDS_L2P
LVDS_L2N
LVDS_L1P
LVDS_L1N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
CLKLVDS_UN
CLKLVDS_UP
+3V_LCD_SW
LCD_PWREN_L
FP_PWR_EN24
LCD_DIGON_L
TMDS_DP<1>
TMDS_DP<0> TMDS_DP<2>
TMDS_DN<0>
TMDS_DN<1>
TMDS_DN<2>
VGA_HSYNC
VGA_B
TMDS_CONN_CLKN
TMDS_CONN_CLKP
VGA_G
DVI_HPD_UF
VGA_R
VGA_VSYNC
+5V_DDC_SLEEP
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
+5V_INV_UF_SW
+5V_INV_SW
+12_8V_INV
HPD_ON_RC
LVDS_DDC_DATA
LVDS_DDC_CLK
39
39 39
39
39
39
37
37 39
39
34
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37 37
37
37
37
39
39
39
21
21 37
37
30
39
39
38
39
39
39
39
39
22
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
22
21
21 21
21
21
21
39
39
37
37
39
39
39
39
38
39
39
39
39
39
20
20 22
22
20
23
22
38
22
22 21
21
21 22
22
22
20
20
20
38
38
39
39
39
38
39
20
20
21
21
21
38
38
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
38
20
20
20 20
20
20
20
21
22
22
22
22
22
22
21
22
22
39
38
38
38
20
20
www.vinafix.vn
C7880.1UF20%10VCERM402
C77827PF5%50VCERM402
C7890.1UF20%10VCERM402
Y4
SM
8.000M
C77727PF
5%50V
CERM402
NC
PC4/OCMP2_B/AIN4PC3/ICAP2_B/AIN3
PC1/OCMP1_B/AIN1PC2/MCO/AIN2
PC5/EXTCLK_A/AIN5
PC0/ICAP1_B/AINO
PB3/OCMP2_APB2/ICAP2_APB1/OCMP1_APB0/ICAP1_A
PB6/SCKPB7/SS*
PB5/MISOPB4/MOSI
PA6/SDAIPA7/TDO
PA5/RDIPA4/SCLI
PA1/ICCDATAPA0/ICCCLK
PA2PA3
VDD
RESET*
OSC2OSC1
TEST
VSS
U36ST72264G2H1
256KX8BGA
SM11/16W5%
10KRP48
SM11/16W5%
10KRP48
SM11/16W5%
10KRP51
SM11/16W5%
10KRP51
SM11/16W5%
10KRP48
SM11/16W5%
10KRP48
VCC
VSS
E2E1E0 SDA
SCL
WC*
SOI16KX8_M24128BU37402
R495
MF1/16W5%10K C600
0.1UF20%10VCERM402
402
R493
MF1/16W5%10K
+3V_PMU
402MF
1/16W5%
100KR693
SM
RP50
25V1/32W5%10K
SM
RP53
25V1/32W5%10K
GND
LED3
LED1
LED2EN
SET
U50MAX1916SOT23-6
Y
B
A
SN74AUC1G08SC70-5
U2
402MF
1/16W5%
0R1
+3V_MAIN
+3V_MAIN
V+
V-
MAX4236EUTTSOT23-6
U40
+3V_MAIN
402MF
1/16W1%
1KR537
402MF
1/16W5%
120KR534
20%6.3VCERM402
0.22UFC606
402
R501
MF1/16W
1%15K
402
R533
MF1/16W1%1K
C6020.1UF20%10VCERM402
402MF
1/16W1%
1KR531
402
R530
MF1/16W5%5.1M
C6050.01UF20%16VCERM402
THBS520PD1
402
R21
MF1/16W
5%10K
402
R33
MF1/16W
5%10K
Y
B
A
SN74AUC1G08SC70-5
U3
402
R459
MF1/16W5%47
402
R20
MF1/16W
5%10K
+3V_SLEEP
402MF
1/16W5%
2.2KR708
C4700.1UF20%10VCERM402
C4940.1UF20%10VCERM402
SM11/16W5%
RP5110K
+3V_MAIN
402
R470
MF1/16W
5%100
+5V_MAIN
402
R469
MF1/16W
5%2.2K
2N3906SM
Q18
402MF
1/16W5%
4.7KR468
402
R451
MF1/16W5%10K SM-1
400-OHM-EMIL39
C781470pF
10%50V
CERM603
G
D
SSOT-3632N7002DWQ20
G
D
SSOT-363
2N7002DWQ20
402
R608
MF1/16W5%10K
F-RT-SM
J1540FLH-SM1-TB
+3V_MAIN
2N3906SM
Q63
402MF
1/16W5%
200R691
+3V_MAIN
402MF
1/16W5%
200R702
2N3906SM
Q64
400-OHM-EMIL44
SM-1
C7990.001UF20%50VCERM402
+5V_SLEEP
400-OHM-EMIL45
SM-1
400-OHM-EMIL43
SM-1
C8010.001UF20%50VCERM402
+3V_PMU
402MF
1/16W5%
22R692
C8030.001UF20%50VCERM402
400-OHM-EMIL46
SM-1
C8000.001UF
20%50V
CERM402
400-OHM-EMIL42
SM-1C8020.001UF20%50VCERM402
402
R262
MF1/16W5%0
402
R753
MF1/16W5%100K
+3V_PMUG
D
SSOT-3632N7002DWQ68
+3V_MAIN
402MF
1/16W1%
17.4KR690
TABLE_5_ITEM
CRITICAL ?341S1194 1 IC,LMU,P84 U36
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 23 44E051-6469
LMU
KB LED DRIVER
NC
NOTE: KEEP L39 CLOSE TO C781LOAD CAPACITANCE = 16PF
XIN
XOUT
SLEEP LED
BOOT BANGER E2PROM
LMU PULL-DOWNS
LMU/BOOTBANGER/SPIDEY
NC
NC
NC
NC
NC
NC
NC
NC
(PMU_PWM)
SHDN_L
MLB - ALS SENSOR
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
BOOT BANGING SIGNAL DEFINITION
2/ PMU_HRESET_L (3V INPUT INTO LMU)
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
SPIDEY FLEX
KEYBOARD PULLUPS
INPUTS ARE 3V TOLERANT
INPUTS ARE 3V TOLERANT
NC
PULL-UP FOR I2C (IN-CIRCUIT PROGRAMMING)
1
2
1
2
1
2
CRITICAL
1 2
1
2
OMIT
B6
C1
C2
C5
D1
D5
D6
E5
C4
B3
A5
A6
D4
C6
E6
F6
F5
E4
F1
E1
D2
C3
B2
B1
A1
A2
D3
F4
E3
F3
E2
F2
A3
B5
B4
A4
1 8
2 7
2 7
1 8
3 6
4 5
CRITICALBBANG
1
2
3
6
5
8
4
7
BBANG1
2
BBANG
1
2
BBANG1
2
1 2
5
10
3
7
4
6
1
2
9
8
5
10
1
2
8
9
6
3
7
4
CRITICAL
1
2
6
5
4
3
BBANG
1
2
3
5
4
NO_BBANG
1 2
3
4
1
5
6
2
1 2
1 2
1 2
1
2
1
2
1
2
1 2
1
2
1
2
CRITICAL
12
BBANG1
2
BBANG1
2
BBANG
1
2
3
5
4
1
2
BBANG1
2
1 2
1
2
1
2
4
5
1
2
1
2
1
3
2
1 2
1
2
1
2
1
2
6
2
1
3
5
4
1
2
41
42
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
5
6
7
8
9
1
3
2
12
12
1
3
2
12
1
2
2 1
12
1
2
12
1
2
21
1
2
1 2
1
2
1
2
1
2
6
2
1
1 2
CR-23
+3V_HALL_EFFECT
JTAG_CPU_TDI
JTAG_CPU_TRST_L
ST7_SENSOR5_SCK_PU
ST7_SENSOR5_SDA_PU
EEPROM_WP_PD
MAXBUS_SLEEP
KBD_LED2_OUT
TPAD_F_TXD
TPAD_F_RXD
LID_CLOSED_L
+5V_TPAD_SLEEP
KBD_LED1_OUT
PWR_BUTTON_L
KBD_X<0>
KBD_SHIFT_L
KBD_OPTION_L
KBD_COMMAND_L
KBD_CONTROL_L
KBD_FUNCTION_L
KBD_CAPSLOCK_LED
KBD_ID
KBD_Y<7>
KBD_Y<6>
KBD_Y<4>
KBD_Y<5>
KBD_Y<3>
KBD_Y<2>
KBD_X<9>
KBD_Y<0>
KBD_Y<1>
KBD_X<1>
KBD_X<2>
KBD_X<3>
KBD_NUMLOCK_LED
KBD_X<4>
KBD_X<5>
KBD_X<6>
KBD_X<7>
KBD_X<8>
PMU_CPU_HRESET_L
CPU_HRESET_L
BBANG_HRESET_L
JTAG_CPU_TCK
BBANG_JTAG_TCK
BBANG_TCK_EN
MAXBUS_SLEEP
KBD_SHIFT_L
KBD_CONTROL_L
KBD_FUNCTION_L
KBD_COMMAND_L
KBD_OPTION_L
KBD_X<1>
KBD_X<0>
KBD_X<8>
KBD_X<7>
KBD_X<6>
KBD_X<9>
KBD_X<2>
KBD_X<4>
KBD_X<3>
KBD_X<5>
KBD_ID
TPAD_TXD
TPAD_RXD
PMU_LID_CLOSED_L
CAPSLOCK_LED
CAPSLOCK_LED_L
SOFT_PWR_ON_L
NUMLOCK_LED
NUMLOCK_LED_L
MLB_PHOTODIODE
GAIN_SETTING2
MLB_ALS_GAIN_SW
MLB_ALS_OP_COMP
MLB_ALS_OP_IN
MLB_ALS_OUT_FB MLB_ALS_OUT
SUTRO_ALS_OUT
MLB_ALS_OUT
ST7_SLEEP_LED_H
JTAG_CPU_TMS
PMU_LID_CLOSED_L
MLB_ALS_GAIN_SW
ST7_KBD_LED_OUT
BBANG_JTAG_TCK
PMU_CPU_HRESET_L
SUTRO_ALS_GAIN_SW
BBANG_HRESET_L
SLEEP
ST7_PB6_PD
ST7_SENSOR4_SDA_PD
INT_I2C_CLK0
ST7_SENSOR4_SCK_PD
INT_I2C_DATA0
ST7_ICP_SEL_PD
ST7_RESET_L
ST7_SENSOR5_SDA_PU
ST7_SENSOR4_SDA_PD
ST7_SENSOR5_SCK_PU
ST7_SENSOR4_SCK_PD
ST7_PB6_PD
ST7_ICP_SEL_PD
INT_I2C_DATA0
INT_I2C_CLK0
EEPROM_ADDR
SLEEP_LED_ISLEEP_LED_L
SLEEP_LED_UF
SLEEP_LED
ST7_OSC1
ST7_OSC2
ST7_XTAL_IN
PMU_SLEEP_LED
PMU_SLEEP_LED_L
SLEEP_LED_SW_L
ST7_SLEEP_LED_H
ST7_KBD_LED_OUT
KBD_LED2_OUT
KBD_LED1_OUT
KBD_LED_EN
KBD_LED_SET
IO_RESET_L
38
38
34
34
23
23
17
17
30
16
16
39
39
39
39
27
9
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
9
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
34
35
23
23
23
23
39
39
26
39
39
39
7
38
39
38
39
30
30
30
30
30
30
30
39
39
39
39
39
39
30
39
39
30
30
30
30
30
30
30
30
30
7
39
39
7
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
39
39
30
30
39
39
33
14
14
14
14
38
38
19
38
5
5
23
23
5
23
39
39
39
38
23
25
23
23
23
23
23
23
39
23
30
30
30
30
30
30
23
30
30
23
23
23
39
23
23
23
23
23
23
5
23
5
23
5
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
30
30
23
30
22
30
23
23
24
23
23
5
23
23
23
23
23
24
23
30
23
23
12
23
12
23
23
23
23
23
23
23
12
12
25
30
23
23
23
23
18
www.vinafix.vn
402
R34
MF1/16W
5%10K
402MF
1/16W5%
33R46
402
R3
MF1/16W
5%10K
402MF
1/16W5%
22R41
402MF
1/16W5%
22R16
402MF
1/16W5%
22R503
402MF
1/16W5%
33R47
+5V_SLEEP
402
R334
MF1/16W5%10K
402
R362
MF1/16W5%10K
402
R381
MF1/16W5%10K
M-ST-SMJ11
402
R375
MF1/16W
5%100K
402
R361
MF1/16W
5%20K
402
R18
MF1/16W5%10K
402MF
1/16W5%
22R11
402MF
1/16W5%
82R48
402MF
1/16W5%
82R53
402
R502
MF1/16W5%100K
402MF
1/16W5%
22R9
402MF
1/16W5%
82R81
402MF
1/16W5%
22R64
402MF
1/16W5%
33R10
402MF
1/16W5%
33R42
+3V_SLEEP
402
R63
MF1/16W
5%10K
402MF
1/16W5%
82R62
C9010PF5%50VCERM402
+3V_SLEEP
SM11/16W5%
33RP2
SM11/16W5%
33RP9
SM11/16W5%
33RP9
SM11/16W5%
33RP9
SM11/16W5%
33RP2
SM11/16W5%
33RP2
SM11/16W5%
33RP9
SM11/16W5%
33RP2
SM11/16W5%
33RP3
SM11/16W5%
33RP4
SM11/16W5%
33RP3
SM11/16W5%
33RP3
SM11/16W5%
33RP4
SM11/16W5%
33RP5
SM11/16W5%
33RP4
SM11/16W5%
33RP5
SM11/16W5%
33RP5
SM11/16W5%
33RP4
SM11/16W5%
33RP3
SM11/16W5%
33RP5
SM11/16W5%
33RP44
SM11/16W5%
33RP14
SM11/16W5%
33RP14
SM11/16W5%
33RP44
SM11/16W5%
33RP43
SM11/16W5%
33RP10
SM11/16W5%
33RP14
SM11/16W5%
33RP10
SM11/16W5%
33RP44
SM11/16W5%
33RP14
SM11/16W5%
33RP43
SM11/16W5%
33RP44
SM11/16W5%
33RP10
SM11/16W5%
33RP43
SM11/16W5%
33RP10
SM11/16W5%
33RP12
SM11/16W5%
33RP12
SM11/16W5%
33RP43
SM11/16W5%
33RP12
SM11/16W5%
33RP12
402
R658
MF1/16W5%22
+3V_MAIN+5V_MAIN
402
R36
MF1/16W5%15K
402
R43
MF1/16W5%15K
M-ST-SMJ13
J354550-1490
F-RT-SM
402
R664
MF1/16W
5%10K
+3V_SLEEP
402
R499
MF1/16W
5%0
402
R498
MF1/16W5%0
J21QT510806-L111
F-ST-SM1
402
R17
MF1/16W
5%20K
402
R69
MF1/16W5%10K
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 24 44E051-6469
EIDE SERIES TERMINATIONPLACE TERMINATORS NEAR INTREPID
+5V_HD_SLEEP AND +3V_SLEEP?ANY SEQUENCING REQUIREMENT BETWEEN
BLUETOOTH/LEFT-SIDE USB
NC
NCNC
NC
INTERNAL I/O CONNECTORS
NCNC
PLACE SERIES R CLOSE TO INTERPID
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
OPTICAL DRIVE INTERFACE (EIDE)
PLACE PULLUP RESISTORS CLOSE TO INTREPID
HARD DRIVE INTERFACE (UATA100)
NC
WIRELESS INTERFACE
1
2
1 2
1
2
1 2
1 2
1 2
2 1
NO STUFF
1
2
1
2
1
2
CRITICAL
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25 26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
6
7
8
9
NO STUFF
1
2
1
2
1
2
1 2
1 2
1 2
1
2
1 2
1 2
1 2
1 2
1 2
1
2
1 2
1
2
4 5
2 7
1 8
3 6
1 8
3 6
4 5
2 7
1 8
4 5
2 7
3 6
2 7
2 7
3 6
1 8
4 5
1 8
4 5
3 6
1 8
2 7
4 5
3 6
3 6
3 6
1 8
7 2
7 2
6 3
7 2
5 4
1 8
8 1
5 4
3 6
4 5
5 4
1 8
2 7
2
1
1
2
1
2
CRITICAL
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25 26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
6
7
8
9
CRITICAL
15
16
1
10
11
12
13
14
2
3
4
5
6
7
8
9
1
2
3V_HD_LOGIC
1
2
5V_HD_LOGIC
1
2
CRITICAL
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
3536
3738
39
4
40
4142
4344
4546
4748
49
5
50
5152
5354
5556
5758
59
6
60
6162
6364
6566
6768
69
7
70
7172
7374
7576
7778
79
8
80
81
8283
84
9
1
2
1
2
CR-24
MAIN_RESET_L
RF_DISABLE_L_SPN
PCI_AD<0>
PCI_AD<2>
PCI_AD<4>
PCI_AD<6>
ROM_OE_L
PCI_CBE<0>
PCI_AD<9>
PCI_AD<11>
PCI_AD<13>
PCI_AD<15>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_AD<16>
PCI_AD<18>
PCI_PAR
PCI_AD<20>
PCI_AD<22>
AIRPORT_IDSEL
PCI_AD<24>
PCI_AD<26>
PCI_AD<28>
PCI_AD<30>
AIRPORT_PCI_INT_L
AIRPORT_PME_L_TP
AIRPORT_PCI_GNT_L
CLK33M_AIRPORT
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<15>
38 EIDE_OPTICAL_DMA_RQ
38 EIDE_OPTICAL_RD_L
38 EIDE_OPTICAL_DMAACK_L EIDE_OPTICAL_INT
EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_RST_L
NEC_LEFT_USB_PWREN
LEFT_USB_DP
EIDE_OPTICAL_DATA<8>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<11>
+HD_LOGIC_SLEEP
+5V_HD_SLEEP
HD_DATA<4>
HD_CS0_L
HD_ADDR<0>
HD_DMACK_L
HD_DIOR_L
HD_DATA<6>
HD_DATA<7>
HD_RESET_L
PCI_AD<18>
HD_DATA<11>
HD_DATA<1>
HD_DATA<0>
HD_DATA<5>
HD_CS0_L
HD_DATA<14>
HD_DATA<9>
HD_DATA<6>
HD_DATA<12>
HD_DATA<15>
HD_ADDR<2>
HD_ADDR<1>
HD_DATA<13>
HD_DATA<10>
HD_ADDR<0>
HD_DATA<4>
HD_DATA<8>
HD_DATA<2>
HD_DATA<7>
HD_DATA<3>
UIDE_DATA<5>
UIDE_DATA<0>
UIDE_DATA<1>
UIDE_DATA<11>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<6>
UIDE_DATA<9>
UIDE_DATA<14>
UIDE_CS0_L
UIDE_DATA<4>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_ADDR<0>
UIDE_DATA<12>
UIDE_DATA<15>
UIDE_ADDR<1>
UIDE_DATA<13>
UIDE_ADDR<2>
UIDE_IOCHRDY
UIDE_DIOR_L HD_DIOR_L
HD_RESET_L
UIDE_DIOW_L HD_DIOW_L
HD_DMACK_L
EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_CS0_L
PCI_CBE<3>
PCI_AD<31>
PCI_AD<25>
PCI_AD<27>
PCI_AD<29>
AIRPORT_PCI_REQ_L
PCI_CBE<2>
PCI_AD<17>
PCI_AD<23>
PCI_AD<21>
PCI_AD<19>
PCI_AD<7>
PCI_AD<8>
ROM_RW_L
PCI_AD<10>
PCI_AD<12>
PCI_CBE<1>
PCI_AD<14>
ROM_CS_L
PCI_AD<1>
PCI_AD<5>
ROM_ONBOARD_CS_L
PCI_AD<3>
UIDE_DATA<7>
PCI_IRDY_L
UIDE_DMACK_L
UIDE_RST_L
HD_IOCHRDY
UIDE_CS1_L HD_CS1_L
HD_DATA<5>
HD_DATA<2>
HD_DATA<3>
HD_DATA<0>
HD_DATA<1>
HD_DMARQ
HD_DATA<15>
HD_DATA<14>
HD_DATA<13>
HD_DATA<12>
HD_DATA<10>
HD_DATA<8>
HD_DATA<9>
HD_DATA<11>
HD_IOCHRDY
HD_ADDR<2>
HD_CS1_L
HD_DIOW_L
HD_ADDR<1>
HD_INTRQ
LEFT_USB_DM
SUTRO_ALS_GAIN_SW
NEC_LEFT_USB_OVERCURRENT
SUTRO_ALS_OUT
BT_USB_DP
BT_USB_DM
AIRPORT_CLKRUN_L
EIDE_DATA<8> EIDE_OPTICAL_DATA<8>
EIDE_DATA<9> EIDE_OPTICAL_DATA<9>
EIDE_DATA<10> EIDE_OPTICAL_DATA<10>
EIDE_DATA<12> EIDE_OPTICAL_DATA<12>
EIDE_DATA<13> EIDE_OPTICAL_DATA<13>
EIDE_DATA<14> EIDE_OPTICAL_DATA<14>
EIDE_DATA<11> EIDE_OPTICAL_DATA<11>
EIDE_DATA<2> EIDE_OPTICAL_DATA<2>
EIDE_DATA<0> EIDE_OPTICAL_DATA<0>
EIDE_DATA<15> EIDE_OPTICAL_DATA<15>
EIDE_DATA<1> EIDE_OPTICAL_DATA<1>
EIDE_DATA<6> EIDE_OPTICAL_DATA<6>
EIDE_DATA<4> EIDE_OPTICAL_DATA<4>
EIDE_DATA<3> EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<7>
EIDE_CS0_L EIDE_OPTICAL_CS0_L
EIDE_ADDR<2> EIDE_OPTICAL_ADDR<2>
EIDE_DATA<5> EIDE_OPTICAL_DATA<5>
EIDE_ADDR<1> EIDE_OPTICAL_ADDR<1>
EIDE_ADDR<0> EIDE_OPTICAL_ADDR<0>
EIDE_DATA<7>
EIDE_OPTICAL_DMA_RQ 38 EIDE_DMARQ
EIDE_OPTICAL_DMAACK_L 38 EIDE_DMACK_L
EIDE_OPTICAL_CS1_LEIDE_CS1_L
EIDE_OPTICAL_RD_L 38 EIDE_RD_L
EIDE_OPTICAL_IOCHRDYEIDE_IOCHRDY
EIDE_OPTICAL_WR_LEIDE_WR_L
EIDE_OPTICAL_INTEIDE_INT
EIDE_OPTICAL_RST_LEIDE_RST_L
39
39
39
39
39
39
39
39
39
39
39
39
37
39
39
39
39
39
37
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
37
37
37
37
39
37
37
37
37
39
39
39
39
37
26
39
37
39
37
37
37
37
26
39
37
37
37
37
39
37
39
39
37
37
37
37
37
39
37
37
37
37
39
26
26
26
26
26
37
26
26
26
26
37
37
37
37
26
24
37
26
37
26
26
26
26
24
37
26
26
26
26
37
26
37
37
26
26
26
26
26
37
26
26
26
26
37
21
18
18
18
18
39
26
18
18
18
18
26
26
26
26
18
18
26
18
26
18
18
18
18
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
18
39
39
39
39
39
39
39
39
39
26
18
18
18
18
26
18
26
26
18
18
18
39
18
18
26
18
39
18
18
18
26
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
19
13
13
13
13
13
18
13
13
13
13
18
18
18
18
13
13
18
13
18
13
13
13
13
39
39
36
37
37
37
37
37
37
37 37
37
37
37
37
37
39
37
37
37
37
37
37
37
38
37
37
37
37
37
37
37
37
13
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37 37
37
37
37
37
37
37
37
37
37
37
18
13
13
13
13
39
18
13
18
18
13
13
13
13
13
13
18
13
13
13
13
39
13
37
18
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
39
39
37
37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
18
39
10
10
10
10
10
13
10
10
10
10
13
13
13
13
10
10
13
10
13
39
10
10
10
10
15
13
13
24
24
24
24
24
24
24 24
24
24
24
24
24
26
26
24
24
24
24
24
24
38
33
24
24
24
24
24
24
24
24
10
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14 24
24
14 24
24
24
24
24
24
24
24
24
24
24
13
10
10
10
10
13
13
10
13
13
10
10
10
10
10
10
13
10
10
10
10
10
10
14
13
14
14
24
14 24
24
24
24
24
24
14
24
24
24
24
24
24
24
24
24
24
24
24
24
14
26
23
26
23
15
15
39
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
24
14 24
14 24
14 24
14 24
14 24
14
24 14
24 14
24 14
24 14
24 14
24 14
24 14
24 14
www.vinafix.vn
PWM_OUT2
TACH/AIN1PWM_OUT1
GND
FAN_FAULTTHERM
INT
TACH/AIN2
D2-D2+
D1-D1+
SCLSDAADD
VCCU48QSOP
ADM1031
C6680.1UF
20%10V
CERM402 402
R542
MF1/16W
5%10K
402
R539
MF1/16W5%10K
+3V_MAIN
+5V_SLEEP
SM2N3904Q31
+5V_SLEEP
SM2N3904Q56
402
R569
MF1/16W
5%10K
402
R592
MF1/16W
5%10K
SM-2MT
J4
SM-2MT
J2
+5V_MAIN+3V_MAIN
C45010UF20%6.3VCERM805
C4580.1UF20%10VCERM402
402
R325
MF1/16W
5%10K
C73410UF20%6.3VCERM805
C4800.1UF20%10VCERM402
SM2N3904Q53
SM2N3904Q38
402MF
1/16W5%
0R637
402MF
1/16W5%
0R642
402MF
1/16W5%
0R626
402MF
1/16W5%
0R629
402MF
1/16W5%
0R638
402MF
1/16W5%
0R643
402MF
1/16W5%
0R622
402MF
1/16W5%
0R630
+5V_MAIN
J5M-ST-5087
SM
603MF
1/16W5%
0R261
F-ST-SMQT510166-L010
J9
603MF
1/16W5%
0R2500
603MF
1/16W5%
0R2501
Q27
TSOP
SI3446DV
Q30
TSOP
SI3446DV
C8564.7UF20%10VCERM1206
C8554.7UF20%10VCERM1206
TSOP
Q49SI3443DV
402MF
1/16W5%
100KR761
20%10VCERM402
0.1UFC857
C85810UF20%6.3VCERM805
+5V_MAIN
QT510306-L111F-ST-SM
J14
+5V_MAIN +3V_SLEEP
SMXW17
C8660.001UF20%50VCERM402
C8670.001UF20%50VCERM402
G
D
SSOT-363
2N7002DWQ69
G
D
SSOT-363
2N7002DWQ69
SM11/16W5%
RP59100K
+5V_MAIN
SM11/16W5%
RP59100K
G
D
SSOT-363
2N7002DWQ67
G
D
SSOT-363
2N7002DWQ67
SM11/16W5%
RP59100K
SM11/16W5%
RP59100K
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 25 44E051-6469
SND - INTREPIDAUDIO - SNAPPER
SOUND BOARD (TUBA)
NC
NC
FAN CONTROLLER
FAN/MODEM/SOUND/SLEEP LED/DEBUG
PLACE CLOSE TO CONNECTOR
PLACE CLOSE TO CONNECTOR
SERIAL DEBUG INTERFACE
DEBUG POWER BUTTON
DEBUG JUMPERS
MODEM_I2C_A0
MODEM_I2C_A1
KEEP STUFFING RESISTORS CLOSE TO ADM1031 CONTROLLER
PLACE UNDERNEATH UPPER RAM
PLACE CLOSE TO BATTERY CHARGER/VCORE
ALTERNATE2
ALTERNATE1
KEEP STUFFING RESISTORS CLOSE TO ADM1031 CONTROLLER
PLACE CLOSE TO CPU
MAIN1
MAIN2
FAN INTERFACEPLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
CAPS FOR EMI EXPERIMENTATION ONLY
PLACE XW17 CLOSE TO 5V SWITCHER (U27)
MODEM
CRITICAL
13
10
9
12
11 8
5
14
1
316
15 2
4
7
61
2
1
2
1
2
1
3
2
1
3
2
1
2
1
2
CRITICAL
4
5
1
2
3
CRITICAL
4
5
1
2
3
1
2
NO STUFF
1
2
1
2
1
2
NO STUFF
1
2
NO STUFF
1
3
2
NO STUFF
1
3
2
1 2
1 2
1 2
1 2
NO STUFF
1 2
NO STUFF
1 2
NO STUFF
1 2
NO STUFF
1 2
SERIAL_DEBUG
CRITICAL
1 10
2
3
4
5 6
7
8
9
NO STUFF
1 2
CRITICAL
1
10
11 12
13 14
15 16
2
3 4
5 6
7 8
9
NO STUFF
1 2
NO STUFF
1 2
1 2 5 63 4
1 2 5 63 4
1
2
1
2
1
2
5
63
4
1 2
1 2
1
2
CRITICAL
1
10
11 12
13 14
15 16
17 18
19
2
20
21 22
23 24
25 26
27 28
29
3
30
4
5 6
7 8
9
1 2
NO STUFF
1
2
NO STUFF
1
2
6
2
1
3
5
4
7
2
8
1
6
2
1
3
5
4
4
5
3
6
CR-25
SND_AMP_MUTE_L
SND_HP_MUTE_L
INT_PU_RESET_L
AMP_CONTROL
INT_PU_RESET_L
HP_CONTROL
SND_HP_MUTE +5V_SOUND_SLEEP
SND_AMP_MUTE
+5V_SOUND_SLEEP
THERM2_M_DP
THERM2_M_DM
THERM2_M_DM THERM2_DM
THERM1_M_DP
THERM1_M_DM
THERM2_M_DP THERM2_DP
THERM1_M_DM THERM1_DM
THERM1_M_DP THERM1_DP
THERM2_A_DP
THERM2_A_DM
THERM1_A_DP
THERM1_A_DM
THERM2_A_DM THERM2_DM
THERM1_A_DM THERM1_DM
THERM2_A_DP THERM2_DP
THERM1_A_DP THERM1_DP
MODEM_USB_DP
MODEM_USB_DM
COMM_SHUTDOWN
COMM_RESET_L
COMM_RING_DET_L
INT_I2C_DATA2
INT_I2C_CLK2
PMU_RESET_BUTTON_L
PMU_NMI_BUTTON_L
PWR_BUTTON_L
COMM_DTR_L
COMM_RTS_L
COMM_RXD
COMM_TXD_L
COMM_TRXC
COMM_GPIO_L
FAN1_PWM
THERM_L_OC
FAN2_TACH
FAN2_PWM
THERM2_DM
THERM2_DP
THERM1_DM
THERM1_DP
INT_I2C_CLK1
INT_I2C_DATA1
FAN2_PWM
SLEEP_LS5 5V_SND_PWREN
SND_TO_AUDIO
SND_HP_SENSE_L
INT_AUDIO_TO_SND
SND_SYNC
INT_I2C_DATA2
SLEEP_LED
SND_HW_RESET_L
SND_LIN_SENSE_L
INT_I2C_CLK2
SND_AGND
SND_SCLK
SND_CLKOUT
FAN1_TACH
FAN1_GND
FAN2_GND
FAN2_TACH
30
30
39
39
39
39
39
39
39
39
39
39
39
39
39
25
25
38
38
37
37
37 37
37
37
37 37
37 37
37 37
37
37
37
37
37 37
37 37
37 37
37 37
37
37
39
39
30
25
25
39
39
39
39
39
39
39
39
37
37
37
37
15
15
39
39
39
39
25
39
39
25
36
36
39
39
39
15
15
14
14
25
25
25
25
25 25
25
25
25 25
25 25
25 25
25
25
25
25
25 25
25 25
25 25
25 25
15
15
15
15
15
15
15
30
30
23
15
15
15
15
15
15
30
25
25
25
25
25
25
14
14
25
33
15
15
15
15
15
23
15
15
15
38
15
15
39
38
38
25
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402
R710
MF1/16W
5%22
+3V_MAIN
+3V_MAIN
603
R711
MF1/16W5%0
402MF
1/16W1%
9.09KR712
FERR-EMI-100-OHML48
SM
C83327PF5%50VCERM402
Y7
SM-1
30.0000M
C83427PF5%50VCERM402
402
R713
MF1/16W5%100
AVDDVDD
VDD_PCI
AD3
AD4
AD5
AD2
AD0
AD1
VSS
AD6
AD7
AD17
AD16
AD15
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD27
AD26
AD25
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME
IRDY
TRDY
STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA
INTB
INTC
PCLK
PME
LEGC
XT2
DM1
DP1
DM2
DP2
DM3
DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4
DP4
DM5
DP5
RREF
OCI1
OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1
NC2
SMC
TEB
NTEST1
PPON2
PPON3
PPON4
PPON5
AVSS(R)
AVSS
SRCLK
SRDTA
SRMOD
NANDTEST
AMC
TEST
U52NEC_UPD720101_USB2
FBGA
402
1%36
R717
402
1% 36
R716
402
1% 36
R714
402
1%36
R715
+3V_MAIN
402MF
1/16W5%
15KR729
C8360.1uF20%10VCERM402
402MF
1/16W5%
15KR728
C8350.1uF20%10VCERM402
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W
RP39475%
SM11/16W
RP37475%
402MF
1/16W5%
0R719
402MF
1/16W5%
0R723
402MF
1/16W5%
0R725
402MF
1/16W5%
0R720
402MF
1/16W5%
0R721
402MF
1/16W5%
0R726
402MF
1/16W5%
0R724402
MF1/16W5%
0R722
402
R718
MF1/16W5%10K
SM11/16W5%
RP5110K
+3V_MAIN
402
R741
MF1/16W5%10K
402
R124
MF1/16W5%1.5K
402
R182
MF1/16W5%1.5K
402
R667
MF1/16W5%10K
402
R666
MF1/16W5%10K
C4950.1uF20%10VCERM402
C8270.1uF20%10VCERM402
C8240.1uF20%10VCERM402
C8280.1uF20%10VCERM402
C8250.1uF20%10VCERM402
C7030.1uF20%10VCERM402
C4960.1uF20%10VCERM402
C5160.1uF20%10VCERM402
C5170.1uF20%10VCERM402
C8260.1uF20%10VCERM402
C8290.1uF20%10VCERM402
C73010uF20%6.3VCERM805
402
R709
MF1/16W
5%4.7K
C83210uF20%6.3VCERM805
C8310.1uF20%10VCERM402
C8300.1uF20%10VCERM402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 26 44E051-6469
Tie to GND at ball N11
SERR_L AND PERR_L
HAS DEDICATED PULL-UP
FOR BOTH CBUS AND USB2
LEFT PORT
RIGHT PORT
Y7 LOAD CAPACITANCE IS 16PF
SUTRO CONNECTOR
PLACE NEAR J12
BUBBA CONNECTOR
Low/Full/High Speed (External)
Low/Full/High Speed (External)
IPD
IPD
IPD
IPD
IPD
IPD
OUT
OUT
OUT
OUT
OUT
OD
OD
OD
OD
OD
OD
(PCI_AD<27>)
NC
NC
NC
NC
NC
USB 2.0NC
(NEC_USB_DAM)
(NEC_USB_DAP)
(NEC_USB_DBM)
(NEC_USB_DBP)
NC
NC
NC
NC
NC
NC
facilitate NAND-tree testingSeries Rpaks required to
PLACE NEAR J3
INTREPID USB CONSTRAINTS
NEED PULL-UP RESISTORS IN CASE USB 1.0 IS USED FOR PORT POWER
NEC_USB1
2
NEC_USB1
2
NEC_USB
1 2
NEC_USB
1 2
NEC_USB
1
2
CRITICALNEC_USB
1 2
NEC_USB
1
2
NEC_USB
1
2
NEC_USB
CRITICAL
M5
P5
K2
L3
K1
K3
J2
J1
F2
E3
E1
D3
N5
D1
D2
C2
C1
B4
A4
B5
C4
A5
C5
P4
B6
A6
N4
M3
N3
M1
L2
L1
P7
N10
N12
P13
M12
N11
M2
J3
F1
C3
N6
G2
M13
K12
G11
F14
D14
L14
J14
G13
E12
C13
F3
D6
B3
C7
B7
A7
F4
L7
M10
P6
M6
M8
B12
B11
B10
A10
B9J4
A8
H2
D9
C12
A11
C11
C10
A9
C6
P11
M14
K14
H11
F12
E13
K13
J12
G14
E14
C14
H1
M7
L6
M9
N9
P9
G3
N7
L8
G1
B8
C9
P2
J13
H13
F13
D13
G12
H4
D7
P3
P12
A13
A12
A3
E2
N8
L13
H3
M4
C8
B1
N13
B13
M11
L12
H12
D12
G4
J11
F11
D8
N1
P10
N14
H14
B14
A2
B2
N2
L9
P8
NEC_USB
1 2
NEC_USB
1 2
NEC_USB
1 2
NEC_USB
1 2
NEC_USB
1 2
NEC_USB
1
2
NEC_USB
1 2
NEC_USB
1
2
NEC_USB
4
5 NEC_USB
3
6
NEC_USB
2
7 NEC_USB
1
8
NEC_USB
1
2
3
4
8
7
6
5
NEC_USB
1
2
3
4
8
7
6
5
NEC_USB
1 2
INTREPID_USB
1 2
INTREPID_USB
1 2
NEC_USB
1 2
NEC_USB
1 2
INTREPID_USB
1 2
INTREPID_USB
1 2
NEC_USB
1 2
NEC_USB2
1
3
6NEC_USB
1
2
NEC_USB
1
2
NEC_USB
1
2
INTREPID_USB
1
2
INTREPID_USB
1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB1
2
NEC_USB
NEC_USB1
2
NEC_USBNEC_USB1
2
NEC_USB1
2
CR-26
NEC_OCI<1> NEC_LEFT_USB_OVERCURRENT
NEC_OCI<2> NEC_RIGHT_USB_OVERCURRENT
NEC_LEFT_USB_PWREN
NEC_NC1_TP
NEC_NC2_TP
NEC_USB_RSDM2
NEC_USB_RSDM1
CLK33M_USB2
5 MIL SPACINGUSB_D2:::200USB_D2USB_D2P
5 MIL SPACINGUSB_D2:::200USB_D2USB_D2M
5 MIL SPACINGUSB_D1:::200USB_D1USB_D1P
5 MIL SPACINGUSB_DC:::200USB_DCUSB_DCP
5 MIL SPACINGUSB_D1:::200USB_D1USB_D1M
USB_DAM USB_DA USB_DA:::200 5 MIL SPACING
USB_DAP USB_DA USB_DA:::200 5 MIL SPACING
5 MIL SPACINGUSB_DC:::200USB_DCUSB_DCM
NEC_CRUN_L
NEC_IO_RESET_L
NEC_PME_L
NEC_MAIN_RESET_LMAIN_RESET_L
PMU_PME_L
IO_RESET_L
NEC_PME_L
NEC_MAIN_RESET_L
NEC_IO_RESET_L
NEC_PCI_INTC_L
NEC_PPON5_TP
NEC_LEGC
NEC_PCI_INTB_L
NEC_PCI_INTA_LUSB2_PCI_INT_L
NEC_PCI_INTC_L
NEC_PCI_INTB_L
NEC_PCI_INTA_L
PCI_AD<27>
NEC_RREF
+3V_NEC_VDD
NEC_OCI<1>
NEC_OCI<2>
NEC_NANDTESTOUT_TP
NEC_PPON4_TP
NEC_SMI_L_TP
NEC_PCI_SERR_L
NEC_PCI_PERR_L
USB2_PCI_GNT_L
USB2_PCI_REQ_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_FRAME_L
PCI_PAR
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_AD<31>
PCI_AD<30>
PCI_AD<28>
PCI_AD<29>
PCI_AD<25>
PCI_AD<26>
PCI_AD<24>
PCI_AD<23>
PCI_AD<20>
PCI_AD<22>
PCI_AD<21>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<0>
PCI_AD<1>
NEC_IDSEL
NEC_XT1
NEC_AVDD
NEC_XT2_R
NEC_XT2
NEC_AMC_TP
NEC_NANDTESTEN_TP
NEC_PPON3_TP
NEC_USB_DAM LEFT_USB_DM
USB_D1M
USB_D1P
LEFT_USB_DPNEC_USB_DAP
USB_D2M
RIGHT_USB_DMNEC_USB_DBM
USB_D2P
RIGHT_USB_DPNEC_USB_DBP
+3V_NEC_VDD
NEC_PCI_SERR_L
NEC_PCI_PERR_L
NEC_USB_DAPNEC_USB_RSDP1
NEC_USB_DAM
NEC_USB_DBM
NEC_USB_DBP
NEC_USB_RSDP2
NEC_RIGHT_USB_PWREN
NEC_OCI<5>
NEC_OCI<4>
NEC_OCI<3>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
30
37
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
39
37
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
24
27
24
37
37
37
37
37
37
37
37
37
37
24
24
24
24
24
24
24
37
24
37
37
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
39
39
39
39
21
23
18
24
24
24
24
24
24
24
24
24
24
18
18
18
18
18
18
18
24
18
24
24
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
39
39
39
39
39
39
39
39
39
39
39
36
26
26
26
26
19
30
19
13
38
18
18
18
18
18
18
18
18
18
18
13
13
13
13
13
13
13
18
13
18
18
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
37 37
26
26
37 37
26
37 37
26
37 37
38
37
37
37
37
39
26 24
26 32
24
37
37
13
15
15
15
15
15
15
15
15
26
26
26 18
15
18
26
26
26
26
26
26 15
26
26
26
10
26
26
26
26
26
13
13
13
13
13
13
13
13
13
13
13
13
10
10
10
10
10
10
10
13
10
13
13
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10 36
38
36
26 24
15
15
24 26
15
32 26
15
32 26
26
26
26
26 37
26
26
26
37
32
www.vinafix.vn
402
R305
MF1/16W
1%49.9
402
R298
MF1/16W1%49.9
402
R289
MF1/16W
1%49.9
402
R297
MF1/16W1%49.9
C43033pF
5%50V
CERM402
C42933pF
5%50V
CERM402
402MF
1/16W5%
0R288
Y3
SM-2
25.0000M
402
R377
MF1/16W
5%10K
C725100pF10%3KVCERM1808
402
R327
MF1/16W
1%49.9
402
R315
MF1/16W
1%49.9
402
R326
MF1/16W1%49.9
402
R323
MF1/16W1%49.9
XFR-ENET-1000BTSM
T1
C4260.01UF20%16VCERM402
C4310.01UF20%16VCERM402
C4340.01UF20%16VCERM402
C4870.1UF20%10VCERM402
C4740.1UF20%10VCERM402
C4470.1UF20%10VCERM402
C4570.1UF20%10VCERM402
402
R253
MF1/16W
1%49.9
402
R254
MF1/16W
1%49.9
402MF
1/16W5%
0R331
402
R343
MF1/16W5%10K
402
R345
MF1/16W5%75
402
R328
MF1/16W5%75
402
R307
MF1/16W5%75
402
R290
MF1/16W5%75
402MF
1/16W5%
0R278
402
R263
MF1/16W
5%1.5K
402
R438
MF1/16W1%4.99K
C4252.2uF
20%10V
CERM805
402MF
1/16W5%
1KR287
C7270.01UF20%16VCERM402
C7190.1UF20%10VCERM402
C7260.01UF20%16VCERM402
C7020.1UF20%10VCERM402
C71810uF20%6.3VCERM805
C4860.1UF20%10VCERM402
C4660.01UF20%16VCERM402
C4350.1UF20%10VCERM402
C4280.01UF20%16VCERM402
C4850.1UF20%10VCERM402
C47910uF20%6.3VCERM805
FERR-EMI-600-OHML27
SM
+2_5V_MAIN
GND
VIN
RUN
MODE
SW
VFB
U51SOT23-6
LTC3405 3.3uHL47
SM1
402
R705
MF1/16W1%665K C456
22pF5%50V
CERM402 402
R706
MF1/16W1%49.9K
402
R707
MF1/16W1%182K
402
R703
MF1/16W
5%0
C4830.01UF20%16VCERM402
C7100.1UF20%10VCERM402
C4550.01UF20%16VCERM402
C4520.1UF20%10VCERM402
C4380.01UF20%16VCERM402
C4840.1UF20%10VCERM402
402
R704
MF1/16W
5%0
D11N914
SOT23
+3V_MAIN
C46410uF20%6.3VCERM805
C42710uF
20%6.3VCERM805
G
D
SSOT-3632N7002DWQ65
G
D
SSOT-3632N7002DWQ65
TX_EN
TXD7TXD6TXD5TXD4
TX_ER
GTX_CLK
125CLK
RX_CLK
TXD0
TXD3TXD2TXD1
TX_CLK
VDDOX
VDDOH
VDDO
DVDD
CTRL10
MDC
CRSCOL
RX_ERRX_DV
RXD7
RXD1RXD2RXD3RXD4RXD5RXD6
RXD0
MDI1-MDI2+MDI2-MDI3+
MDI1+MDI0-MDI0+
AVDD
VSSC
XTAL2
HSDAC-HSDAC+
S_CLK-S_CLK+
XTAL1
S_OUT-S_OUT+
S_IN-S_IN+
COMA
RESET
INT+INT-/
MDIO
LED_LINK1000LED_LINK100
GNDSEL_2.5VSEL_OSC
TRST
RSET
TDOTDI
TCKTMS
CONFIG5CONFIG6
CONFIG4
CONFIG0CONFIG1CONFIG2CONFIG3
LED_TXLED_RX
LED_DUPLEX
LED_LINK10
MDI3-
BCC
88E1111U49
402MF
1/16W5%
20KR342
402
R344
MF1/16W5%0
RT-THRJ45J18
402
R311
MF1/16W
5%10K
C4650.01UF20%16VCERM402
603
R259
MF1/16W5%0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 27 44E051-6469
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
197S0603197S0703 Y3
R2EQV = R2A||R2B
R2AR2B
VOUT = 0.8V*(1+R2EQV/R1)
R1
MARVELL 88E1111
Ethernet routing priority:
MDI pairs and all RJ45 pairs
1. Decoupling caps
3. RX SERIES TERMINATION - LOCATE NEAR PHY
2. TX SERIES TERMINATION - LOCATE NEAR LINK
Sandwich each RJ54 pair between chassis grounds
Must maintain 50-ohms trace impedance on all
All differential signals should be close,
via count, and short if possible
parallel, matched lengths, with minimum
10/100/1000 ETHERNET
PLACE RESISTORS CLOSE TO PHY
NC
NC
NC
NC
NC
NC
PLACE ALL SERIES RES CLOSE TO PHY
PLACES PHY IN "COMA" MODE WHENASLEEP ON BATTERY (SAVES POWER)
(000)
(111)
(110)
(111)
(101)
(000)
SEE CONFIG TABLES(BELOW)
(000)
Y3’S LOAD CAPACITANCE IS 20PF
Short shielded RJ-45
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
PLACE CAPS AT TRANSFORMER PINS 1, 4, 7 & 10
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
NC
NC
NC
NC
NC CONFIG DEFINITIONS
101110
100
010011
001000
111
BIT[2:0]
LED_LINK10
LED_DUPLEXLED_RXLED_TXVSS
VDDO
LED_LINK100LED_LINK1000
PIN
PHYADR[0]PHYADR[3]
BIT[0]
ANEG[1]DIS_125MODE[0]
75/50 OHMMODE[3]
BIT[1]
INT_POL
ENA_XCANEG[2]
MODE[1]
CONFIG INPUTS
DIS_SLEEP
PHYADR[4]PHYADR[1]
BIT[2]
PHYADR[2]ENA_PAUSE
ANEG[0]ANEG[3]
MODE[2]
SEL_BDTDIS_FC
CONFIG<6>
CONFIG<3>
CONFIG<5>CONFIG<4>
CONFIG<0>CONFIG<1>CONFIG<2>
PINPUT CRYSTAL CIRCUIT CLOSE TO PHY
1
2
1
2
1
2
1
2
1
2
1
2
1 2
CHGND1
CRITICAL
1 2
1
2
CHGND1
1
2
1
2
1
2
1
2
1
2CRITICAL
10
7
4
1
11
8
5
2
12
9
6
3
14
17
20
23
13
16
19
22
15
18
21
24
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF
1
2
NO STUFF
1
2
1 2
1
2
1
2
1
2
1
2
1
2
1 2
1
2
1
2
1
2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
2 1
CRITICAL
2
6
1 3
5
4
CRITICAL
1 2
1
2
1
2
1
2
1
2
NO STUFF1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
13
1
2
1
2
6
2
1
3
5
4
CRITICAL
22
32
35
36
40
45
78
83
27
65
64
63
61
60
59
58
84
51
1
6
10
15
57
62
67
71
85
97
8
37
38
23
70
76
74
73
69
68
25
29
31
33
34
39
41
42
4324
28
30
95
92
93
91
90
89
87
86
2
94
3
13
56
79
80
82
81
77
75
49
44
50
46
47
11
12
14
16
17
18
19
20
4
9
7
5
21
88
96
52
66
72
26
48
53
55
54NO STUFF
1 2
1
2
CRITICAL
9
10
11
12
1
2
3
4
5
6
7
8
1
2
1
2
1
2
CR-27
+2_5V_MARVELL
LTC3405_SW
ENET_COMA
ENET_CTAP_CHGND
CLK25M_XTAL_IN
+2_5V_MARVELL_AVDD
+1_0V_MARVELL
RJ45_DN<3>
RJ45_DP<3>
RJ45_DN<1>
RJ45_DN<2>
RJ45_DP<2>
RJ45_DP<0>
RJ45_DN<0>
RJ45_DP<1>
LED_LINK10
LED_LINK100
LED_RX_SPN
CLK25M_ENET_XOUT
ENET_VSSC
CLK25M_ENET_XIN
ENET_HSDACP
ENET_RST_L
ENET_HSDACM
ENET_ENERGY_DET
ENET_MDIO
ENET_MDC
ENET_RX_ER
ENET_CRS
ENET_COL
ENET_RX_DV
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_PHY_TXD<5>
ENET_PHY_TXD<6>
ENET_PHY_TXD<7>
ENET_PHY_TX_EN
ENET_PHY_TX_ER
CLKENET_PHY_GTX
ENET_PHY_TXD<1>
ENET_PHY_TXD<2>
ENET_PHY_TXD<0>
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
JTAG_ASIC_TCK
JTAG_ASIC_TDO_TP
MDI_M<3>
MDI_P<3>
MDI_M<2>
MDI_P<2>
MDI_M<1>
MDI_M<0>
AC_IN
SLEEP_L_LS5
CLKENET_PHY_TX
CLKENET_PHY_GBE_REF
CLKENET_PHY_RX
JTAG_ENET_TDI
MDI_P<1>
MDI_P<0>
MDI0_PD MDI1_PD MDI2_PD MDI3_PD
3405_MODE
3405_VFB
RJ45_C3_PD
CLKENET_LINK_TX
CLKENET_LINK_RX
CLKENET_LINK_GBE_REF
ENET_RSET
RJ45_C0_PD
RJ45_C1_PD
RJ45_C2_PD
INT_ENET_RST_L
IO_RESET_L
+2_5V_MARVELL
30
35
26
31
34
23
38
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
39
39
39
30
33
36
36
36
19
38
27
38
38
38
38
37
37
37
37
37
37
37
37
36
36
15
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
39
37
37
37
37
37
37
29
20
36
36
36
14
37
37
14
14
14
15
18
27
www.vinafix.vn
402
R365
MF1/16W
5%1KC505
0.22UF20%
6.3VCERM402
SM11/16W
RP36225%
SM11/16W
RP35225%
402MF
1/16W5%
22R404
402MF
1/16W5%
22R403
C5770.1UF20%10VCERM402
C5070.1UF20%10VCERM402
C5910.01UF20%16VCERM402
OE
GND
OUT
VCC
OSCSM-A
98.304MG1
402
R367
MF1/16W5%0
402
R674
MF1/16W
5%100K
402MF
1/16W5%
47R440
402
R673
MF1/16W5%100
C5840.22UF20%6.3VCERM402
20%10VCERM603
1UFC575
20%10VCERM603
1UFC578
20%10VCERM603
1UFC546
20%10VCERM603
1UFC531
603MF
1/16W5%
1R460
603MF
1/16W5%
1R463
603MF
1/16W5%
1R409
603MF
1/16W5%
1R392
SYM_VER2
GND
OUTIN
BYP ADJ
SOT-23-1LTC1761ES5-BYP
U33
C5872.2UF
20%10V
CERM805
402
R482
MF1/16W1%16.2K
402MF
1/16W1%
27.4KR483
402
R485
MF1/16W1%16.2K
402
R484
MF1/16W1%27.4K
C5882.2UF
20%10V
CERM805
603MF
1/16W5%
1R462
C7751UF20%10VCERM603
402
R472
MF1/16W
5%1K
C5761UF20%10VCERM603
603
R461
MF1/16W5%3.3
603
R672
MF1/16W
5%3.3
C5132.2UF20%10VCERM805
C5142.2UF20%10VCERM805
402
R369
MF1/16W5%10
SM-1400-OHM-EMIL3
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U34LT1962-ADJ
MSOP
603MF
1/16W5%
1R1000
C10000.1UF20%10VCERM402
402
R425
MF1/16W
1%56.2
402
R419
MF1/16W1%56.2
C5561UF20%10V
CERM603
402
R410
MF1/16W1%56.2
402
R420
MF1/16W
1%56.2
402
R411
MF1/16W1%4.99KC542
220PF5%25V
CERM402
C5231UF20%10VCERM603
402
R405
MF1/16W
1%56.2
402
R397
MF1/16W1%56.2
402
R429
MF1/16W1%56.2
402
R433
MF1/16W1%4.99K
C563220PF
5%25V
CERM402
402
R432
MF1/16W1%56.2
402
R650
MF1/16W
5%1K
D27SC-59
SDM20E40C
+5V_SLEEP
(SYM_VER1)
VREG_PD
PADTHRML AGND
SM
TESTM
SE
D5D6
RESETZ
D7
DGND
PLLVDD1.8
3.3DVDD
PLLGND
PLL
3.3VDD
D3D4
D1D2
BMODE
PC2
PD
PC1
CPS
PC0
D0
LREQ
LPS
LCLK
3.3AVDD DVDD
1.8
TPA1+TPA1-
PCLK
TPA0-TPA0+
TPA2+TPA2-
C/LKON
CTL0CTL1
CNA
PINT
TPBIAS0TPBIAS1
XOXI
TPBIAS2
R1R0
TPB2-TPB2+
TPB1-TPB1+
TPB0-TPB0+
DS0DS1
U28TSB81BA3A
PQFP
C7690.1UF20%10VCERM402
C59310UF20%6.3VCERM805
C7490.1UF20%10VCERM402
402
R393
MF1/16W
5%1K
C5060.1UF20%10VCERM402
C51910UF20%6.3VCERM805
C5950.01UF20%16VCERM402
C59010UF20%6.3VCERM805
C7580.1UF20%10VCERM402
C783100UF
20%10V
POLYSMD-3
220uHL41
SM-3
MBR0540SMD20
ON/OFFGNDVOUT
FBVINSM
LM2594U31
C77910UF
N20P20%50V
CERM2320
402
R456
MF1/16W
1%402K
C5080.1UF20%10VCERM402
402MF
1/16W5%
22R396
C7450.1UF20%10VCERM402
402MF
1/16W1%
6.34KR471
402
R388
MF1/16W5%10K
402
R368
MF1/16W
5%1K
402
R366
MF1/16W5%1K
402
R364
MF1/16W
5%1K
402
R659
MF1/16W
5%470
402
R391
MF1/16W5%1K
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 28 44E051-6469
SPEC SAID TO USE 10K
RECEIVES POWERRESET PULSE WHEN PHY FIRSTINTERNAL PULLUP PROVIDESCAPACITOR IN CONJUCTION WITH
(TXD-FWA)
(TXD-FWB)
(RXD-FWA)
(RXD-FWA)
(RXD-FWB)
(RXD-FWB)
(TXD-FWA)
(TXD-FWB)
(TXD-FWB)
(TXD-FWB)
(TXD-FWA)
(TXD-FWA)
(RXD-FWB)
(RXD-FWB)
(RXD-FWA)
(RXD-FWA)
FW_TPB1N
FW_TPA1P
FW_TPB0N
FW_TPB1P
FW_TPB0P
FW_TPA1N
FW_TPA0N
FW_TPA0P
PHY PIN 25 PHY PIN 28
PHY PIN 38
NC
FIREWIRE
IADJ = 30NA AT 25C
IADJ = 30NA AT 25C
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
PHY PIN 64
PHY PIN 40
NC
NC
NC
PHY PIN 21
PHY PIN 50
PHY PIN 61
R2
R1
RX0
TX0
R2
R1
NC
NC
NC
PHY PINS 72,76
PLACE NEAR PHY
PLACE NEAR PHY
1MA(MAX) BUS HOLDER EACH
1 -> A-ONLY PORT
0 -> BILINGUAL PORT
DSX STRAP OPTIONS
PHY PINS 4,14
165MA MAX LOAD
(PC0 IS MSB, PC2 IS LSB) MAY REQUIRE UP TO 3W)(MAY PROVIDE POWER, ORPWR CLASS = 100 SN0201029PFP
1
2
1
2
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1 2
1 2
1
2
1
2
1
2
CRITICAL
2
13
4
1
2
NO STUFF1
2
1 2
1
2
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2CRITICAL
43
2
1 5
1
2
1
2
1 2
1
2
1
2
1
2
1 2
2
1
2
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2
2
3
4
8
6
7
1
5
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
3
CRITICAL
21
40
43
50
61
62
24
39
44
51
57
63
74
79
34
9
10
2
11
12
13
15
16
17
19
20
4
14
38
64
72
76
33
32
8 37
65
71
6 18
69
70
7
80
3
66
67
68
5
77
1
25
28
29
30
31
23
22
75
35
36
78
81
46
45
53
52
59
58
42
41
49
48
56
55
47
54
60
73
27
26
1
2
1
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
1 2
1
2
CRITICAL
4
6 5
7
8
1
2
1
2
1
2
1 2
1
2
2 1
2
1
1
2
1
2
1
2
1
2
1
2
CR-28
FW_PC_PD
FW_INPUT_PD
FW_PORT1_SEL
+3V_FW
FW_VREG_PD
FW_PC_PU
FW_BMODE
FW_TESTM
+1_95V_FW_DVDD
FW_PHY_PD
FW_PHY_RESET_L
FW_PHY_LREQ
FW_PHY_DATA<7>
FW_PHY_DATA<6>
FW_PHY_DATA<5>
FW_PHY_DATA<4>
FW_LINK_DATA<7>
FW_LINK_DATA<6>
FW_LINK_DATA<5>
FW_LINK_DATA<4>
FW_PHY_DATA<3>
FW_PHY_DATA<2>
FW_PHY_DATA<1>
FW_PHY_DATA<0>
FW_LINK_DATA<3>
FW_LINK_DATA<2>
FW_LINK_DATA<1>
FW_LINK_DATA<0>
LM2594_IN
+FW_PWR_OR
+3V_FW_UF
FW_PHY_CNTL<1>
FW_PHY_CNTL<0>
FW_BIAS0
FW_BIAS1
FW_PINT
CLKFW_PHY_PCLK
+1_95V_FW_DVDD_TX0
+1_95V_FW_DVDD_PORT1
FW_CPS
+3V_FW_AVDD_PORT0
+1_95V_FW_DVDD
+1_95V_FW_DVDD_RX0
+3V_FW_AVDD_PORT2
FW_TPA1N
FW_TPA1P
FW_TPA0P
FW_TPA0N
FW_R0
FW_R1
FW_TPB1N
FW_TPB1P
FW_TPB0N
FW_TPB0P
FW_TPB2_PD
FW_XI
+3V_FW_AVDD
+3V_FW_AVDD_PORT1
CLKFW_PHY_LCLK
FW_PHY_LPS
+1_95V_FW_PLL400VDD
+1_95V_FW_PLL500VDD
FW_LKON
FWB_TPB0
FW_CORE_BYP
+1_95V_FW_PLLVDDFW_PLL_ADJ
FW_CORE_ADJ
FWPLL_BYP
+FW_PWR_OR
FW_OSC_ENFW_OSC
+1_95V_FW_PLLVDD
FWB_TPB1
FW_LINK_CNTL<0>FW_PHY_CNTL<0>
CLKFW_LINK_PCLKCLKFW_PHY_PCLK
FW_LINK_CNTL<1>FW_PHY_CNTL<1>
+3V_FW
+1_95V_FW_DVDD
38
38
38
38
29
38
37
37
37
37
37
37
37
37
37
29
37
37
37
36
38
37
37
37
37
37
37
37
37
36
38
29
38
37 37
36 36
37 37
29
38
28
28
15
14
37
37
37
37
14
14
14
14
37
37
37
37
14
14
14
14
38
28
38
28
28
14
28
38
38
38
28
38
38
29
29
29
29
29
29
29
29
36
38
38
14
14
38
38
14
28
28
36
28
14 28
14 28
14 28
28
28
www.vinafix.vn
402
R668
MF1/16W5%1M
C8590.01UF
20%16V
CERM402
C8620.01UF20%16VCERM402
SM
1.5AMP-33VF2
Q7SOI
NDS9407
G
D
SSOT-3632N7002DWQ71
D31B240
SM
SMFERR-250-OHML34
SMFERR-250-OHM
L37
SM
1.5AMP-33VF3
C7510.1UF20%50VCERM805
SOT-363BAS16TWDP4
402
R655
MF1/16W5%470K
SOT-363BAS16TWDP4
SOT-363BAS16TWDP4
C5490.01UF
20%16V
CERM402
J221394BF-RT-SM
805
R376
FF1/10W5%0
VP
VGND
TPI#
TPO
TPI
TPO#
F-RT-TH1394AJ24
C7700.01UF20%16VCERM402
C7720.01UF20%16VCERM402
C7400.01UF20%16VCERM402
SYM_VER-2
L51260-OHM-330MA
SM1
SYM_VER-2
L52260-OHM-330MA
SM1
805
R434
FF1/10W5%0
C7460.01UF20%16VCERM402
+3V_PMU
402
R654
MF1/16W
5%100K
402MF
1/16W5%
10KR656
402
R265
MF1/16W5%470K
402
R653
MF1/16W5%330K
C7380.01UF20%16VCERM402
+PBUS
D6SOT-363BAV99DW
D6SOT-363BAV99DW
D8SOT-363
BAV99DW
D8SOT-363
BAV99DW
D15SOT-363
BAV99DW
D15SOT-363
BAV99DW
D13SOT-363BAV99DW
D13SOT-363BAV99DW
G
D
SSOT-3632N7002DWQ17
SOT231N5227B
DZ2
C8610.001UF20%50VCERM402
C8600.1UF20%10VCERM402
C8630.01UF
20%16V
CERM402
C8640.01UF20%16VCERM402
400-OHM-EMIL54
SM-1
402MF
1/16W5%
10KR762
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 29 44E051-6469
PORT POWER SWITCH
NC
FIREWIRE PORTS
INPUT
OUTPUTTPA(R)
TPA
TPA*
VG
TPB
TPB(R)
TPB*
SC
VP
(TPI0R)BREF
AREF
SO WHEN A BILINGUAL DEVICE
THERE’S NO DC PATH BETWEEN
ALL LOCAL GROUNDS PER 1394B SPECAREF NEEDS TO BE ISOLATED FROM
IS PLUGGED TO BETA-ONLY DEVICE,
THEM (TO AVOID GROUND OFFSET ISSUE)
PER 1394B V1.33
BREF SHOULD BE HARD CONNECTED TOLOGIC GROUND FOR SPEED SIGNALINGAND CONNECTION DETECTION CURRENTS
FIREWIRE A
PORT 1514-0057
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
PMU_POWER_UP_LSTATE
(AC)SLEEP(AC)
(AC)RUN
SHUTDOWN
SHUTDOWN
RUN
(BATT)
(BATT)
1
1
(BATT)SLEEP 1
0
DCDC_ENPOWER_UP
0
0
0
0
1
1
0
0
1
1
1
1
2.99V +4_6V_BU
OFF
ON
0
1
OFF
ON
ON
+3V_PMU +3V_PMU
AC_IN
1
1
1
0
0
0
OFF
RUNNING OR WHEN ASLEEP ON AC
ENABLES PORT POWER WHEN MACHINE IS
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
FIREWIRE B - BILINGUAL
PORT 0514S0024
Q7_ON_OFF
(PULL-DOWN RESISTOR)
1
2
1
2
1
2
12
CRITICAL
5
6
7
8
4
1
2
3
3
5
4
1 2
1
2
1
2
12
1
2
1 6
1
2
34
2 5
NO STUFF
1
2
CHGND1
CRITICAL
10
11
1
2
3
4
5
6
7
8
9
2
1
CRITICAL
7 8 9 10
4
3
6
5
2
1
1
2
1
2
1
2
CRITICAL
3
2 1
4
CRITICAL
3
2 1
4
1
2
CHGND6
CHGND6
NO STUFF
1
2
1
2
12
CHGND1
1
2
1
2
1
2
4
5
3
1
2
6
4
5
3
1
2
6
4
5
3
1
2
6
4
5
3
1
2
6
CHGND6
6
2
1
1
31
2
1
2
1
2
1
2
1 21 2
CR-29
+FW_VP1
+FW_PWR_PORTA
FW_TPA0P
FW_TPB0P
FW_TPA0N
FW_TPB0N
FW_VGND1
FW_TPB1P
FW_TPB1N
FW_TPA1N
FW_TPA1P
FW_TPI1N
FW_TPI1P
FW_TPO1P
FW_TPO1N
FW_TPO0R
FW_VGND0
+FW_VP0
+FW_PWR_OR
+3V_FW_ESD+3V_FW_ESD_ILIM
+3V_FW
+3V_FW_ESD
+FW_SW
FW_PWR_GATE
FW_PWREN_L
DCDC_EN
AC_IN AC_IN_FW_CNTL
PMU_POWER_UP_L
RUN_OR_AC
POWER_UP
+FW_FUSE
39 34 33
31
37
37
37
37
37
37
37
37
39
39
39
39
39
38
38
38
38
32
30
33
38
38
28
28
28
28
38
28
28
28
28
37
37
37
37
38
38
38
28
29 38
28
29
38
20
27
30
38
www.vinafix.vn
402
R687
MF1/16W5%0
402MF
1/16W5%
10MR688
402MF
1/16W5%
1KR479
402MF
1/16W5%
1KR444
402MF
1/16W5%
10MR491
402
R489
MF1/16W
5%0
402
R492
MF1/16W5%1K
402MF
1/16W5%
2.2KR448
402MF
1/16W5%
4.7R686
402MF
1/16W5%
2.2KR449
C5970.1UF
20%10V
CERM402
C59812PF
5%50V
CERM402
C7970.1UF
20%10V
CERM402
C7980.1UF
20%10V
CERM402
C79612PF5%50VCERM402
C79412PF5%50VCERM402
C59212PF
5%50V
CERM402
C7910.1UF
20%10V
CERM402
Y5
SM
10.00M
Y6SM-1
32.768K
P86_XCOUT
AVSSVSS
XINRESETVREFCNVSS
BYTEXOUT
AVCC
P50_WRL_WRP51_WRH_BHE
P52_RD
P65_CLK1P66_RXD1P67_TXD1
P74_TA2OUT_WP75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUTP56_ALE
P55_HOLDP54_HLDAP53_BCLK
P61_CLK0P62_RXD0P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_VP73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3P91_TB1IN_SIN3
P92_TB2IN_SOUT3P93_DA0_TB3INP94_DA1_TB4IN
P95_ANEX0_CLK4P96_ANEX1_SOUT4P97_ADTRG_SIN4
P87_XCIN
P85_NMIP84_INT2P83_INT1P82_INT0
P81_TA4IN_UP80_TA4OUT_U
P77_TA3INP76_TA3OUT
P107_AN7_KI3P106_AN6_KI2P105_AN5_KI1P104_AN4_KI0
P103_AN3P102_AN2P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1P00_D0
P02_D2P03_D3P04_D4P05_D5P06_D6P07_D7
P10_D8P11_D9P12_D10P13_D11
P21_A1_D1_D0P22_A2_D2_D1P23_A3_D3_D2P24_A4_D4_D3P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6P26_A6_D6_D5
P30_A8_D7P31_A9P32_A10P33_A11P34_A12P35_A13P36_A14P37_A15
P45_CS1P46_CS2P47_CS3
P44_CS0P43_A19
P40_A16P41_A17P42_A18
FLAS
U39M16C62
C58910UF
20%6.3VCERM805
402MF
1/16W5%
10KR700
402MF
1/16W5%
10KR701
+5V_SLEEP
+3V_MAIN
402MF
1/16W5%
10KR496
402MF
1/16W5%
100KR497
402MF
1/16W5%
470KR477
402MF
1/16W5%
470KR480
402MF
1/16W5%
100KR436
402
R430
MF1/16W1%100K
+3V_PMU
402MF
1/16W5%
10KR699
402MF
1/16W5%
10KR696
402MF
1/16W5%
100KR442
402MF
1/16W5%
10KR443
402MF
1/16W5%
100KR697
402MF
1/16W5%
100KR698
402MF
1/16W5%
470KR450
402MF
1/16W5%
10KR478
402MF
1/16W5%
10KR481
+3V_PMU
402MF
1/16W5%
1KR689
402MF
1/16W5%
10KR490
SM11/16W5%
100KRP52
SM11/16W5%
100KRP52
SM11/16W5%
100KRP52
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
402MF
1/16W1%
7.15KR447402
MF1/16W1%
7.15KR446
402MF
1/16W5%
100KR695
32U32
TSSOP74LVC32
32U32
TSSOP74LVC32
+3V_PMU
+3V_PMU
+3V_PMU
32U32
TSSOP74LVC32
RSET*MR*
GND
VCCU38
MAX6804SOT143
SM11/16W5%
100KRP52
402
R445
MF1/16W1%100K
402
R902
MF1/16W1%402K
+3V_SLEEP
SM
U53LMC7211
402
R269
MF1/16W1%12.7K
402
R266
MF1/16W1%5.23K
+3V_PMU
402MF
1/16W1%
499KR270
C2570.1UF20%10VCERM402 402
R324
MF1/16W
5%10K
S
D
G
Q572N7002SM
+3V_PMU
+3V_PMU
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_5_ITEM
341S1008 1 IC,PMU,V81B U39
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 30 44E051-6469
TABLE_ALT_ITEM
197S0604197S0704 Y5 Alt crystal size
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
50MV OF HYSTERSIS
PMU KEYBOARD RESET CIRCUIT
Y5’S LOAD CAPACITANCE IS 12PF
Keep crystal subcircuit close to PMU.
PMU
Keep crystal subcircuit close to PMU.
NC
(CHARGE_I)NC
NC
NC
NC
NC
NC
UNDERVOLTAGE RESET CIRCUIT
NC
NC
both are off during PMU reset.will act as our pulldown sinceto +3V_MAIN or +3V_SLEEP, which
CPU_VCORE_HI_OC/PMU_AP shouldhave a pulldown for coming out ofreset. MLB will have a pull-up
(PMU_AP)
Y6’S LOAD CAPACITANCE IS 12.5PF
RECOGNIZES AS A29
RECOGNIZES AS Q11FULL FUNCTIONS
LIMITED FUNCTIONSRECOGNIZES AS HOOPER
NO BATTERY CHARGINGFULL FUNCTIONS
LIMITED FUNCTIONS
SYSTEM STATUSID VOLT
2.31V1.65V- RANGE
3.28V
PIN VOLT
2.066V2.007V-
2.558V-2.661V
0.589V-0.663V
3.19V-
ADAPTER
Q11 (65W)
A29 (45W)
AIRLINE
HOOPER
1
2
3
CASE
4
2.31V-2.97V
0.33V-0.99V
2.97V-3.30V
Q11 ADAPTER DETECTION SCHEME
A29 DETECT CIRCUIT
1
2
NO STUFF
1 2
1 2
1 2
NO STUFF
1 2
1
2
1
2
1 2
1 2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
1 2
CRITICAL
1 4
OMIT
97
94
6
7
86
85
84
83
82
81
80
79
95
93
92
91
90
89
88
87
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
61
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
9
8
5
4
3
2
1
100
99
98
10
14 60
96
12 62
13
11
1
2
2 1
2 1
2 1
2 1
2 1
2 1
2 1
1
2
2 1
2 1
2 1
1 2
1 2
2 1
1 2
1 2
1 2
2 1
2 1
4 5
3 6
2 7
4 5
3 6
2 7
1 8
2 1
2 1
1 2
7
13
12
11
14
7
10
9
8
147
4
5
6
14
CRITICAL
1
3 2
4
1 8
1
2
1
2
4
3
1
5
2
1
2
1
2
1 2
1
2
1
2
3
1
2
CR-30
+4_85V_RAW
A29_DETECT
PMU_AC_DET
ADAPTER_DET
2_34V_REF
A29_DET_L
PMU_KB_RESET_L
PMU_KB_RESET_IN2
PMU_KB_RESET_IN1
KBD_OPTION_L
KBD_SHIFT_L
KBD_CONTROL_L
SOFT_PWR_ON_L
PMU_I2C_CLK
PMU_I2C_DATA
PMU_SMB_DATA
PMU_SMB_CLK
PMU_KB_RESET_L
PMU_RESET_L
+3V_PMU_RESET
PMU_NMI_L
PMU_NMI_BUTTON_L
PMU_BATT1_DET_L_PU
PMU_BATT_DET_L
PMU_POWERUP_OK
PMU_OOPS
THERM_L_OC
+3V_PMU_AVCC
PMU_LID_CLOSED_L
POWER_VALID
PMU_PME_L
TPAD_RXD
TPAD_TXD
PMU_RESET_BUTTON_L
PMU_EPM
+3V_PMU_AVCC
CLK10M_PMU_XOUT_UF
CLK10M_PMU_XOUT
CLK10M_PMU_XIN
CAPSLOCK_LED_L
PMU_CAPSLOCK_LED_L
NUMLOCK_LED_L
PMU_NUMLOCK_LED_L
CLK32K_PMU_XIN
CLK32K_PMU_XOUT_UF
PMU_AC_IN
AC_IN
PMU_BATT0_DET_L
PMU_BATT_DET_L
CLK32K_PMU_XOUT
+3V_PMU_AVCC
PMU_CNVSS
PMU_BYTE
CPU_VCORE_HI_OC
INT_RESET_L
MAIN_RESET_L
PMU_INT_NMI
PMU_EPM
INT_PU_RESET_L
PMU_CPU_HRESET_L
PMU_FROM_INT
PMU_TO_INT
PMU_ACK_L
PMU_CLK
PMU_REQ_L
PMU_LID_CLOSED_L
PMU_RESET_BUTTON_L
PMU_NMI_BUTTON_L
TPAD_RXD
TPAD_TXD
SYSTEM_CLK_EN
CPU_CLK_EN
PMU_CHARGE_V
PMU_CHRG_BATT_0
PMU_SLEEP_LED_L
CPU_SMI_L
POWER_VALID
PMU_PME_L
INT_PEND_PROC_INT
PMU_NMI_L
PMU_BATT1_DET_L_PU
INT_PROC_SLEEP_REQ_L
PMU_POWERUP_OK
THERM_L_OC
PMU_OOPS
PMU_I2C_CLK
PMU_I2C_DATA
PMU_SMB_CLK
PMU_SMB_DATA
KBD_Y<1>
KBD_Y<0>
KBD_Y<2>
KBD_Y<4>
KBD_Y<3>
KBD_Y<7>
KBD_Y<6>
KBD_Y<5>
PMU_POWER_UP_L
CHARGE_LED_L
COMM_RING_DET_L
SOFT_PWR_ON_L
KBD_X<0>
INT_WATCHDOG_L
KBD_X<2>
KBD_X<1>
KBD_X<5>
KBD_X<4>
KBD_X<3>
KBD_X<7>
KBD_X<6>
KBD_X<9>
KBD_X<8>
IO_RESET_L
KBD_CONTROL_L
KBD_COMMAND_L
KBD_FUNCTION_L
KBD_OPTION_L
KBD_SHIFT_L
KBD_ID
PMU_INT_L
CPU_PLL_STOP_OC
INT_SUSPEND_ACK_L
SLEEP
INT_SUSPEND_REQ_L
CHARGE_LED_L
SOFT_PWR_ON_L
PMU_POWER_UP_L
SLEEP
INT_SUSPEND_REQ_L
PMU_CNVSS
PMU_BYTE
IO_RESET_L
INT_RESET_L
MAIN_RESET_L
INT_PU_RESET_L
PMU_AC_DET
39
39
30
30
30
30
26
27
27
26
34
24
34
26
35
34
35
26
24
39
39
39
30
39
30
31
39
30
21
30
30
33
39
39
30
23
39
39
39
33
39
30
33
33
23
30
21
30
38
39
39
30
30
30
23
31
31
39
30
31
30
38
30
26
30
30
30 38
29
31
38
34
14
19
25
30
30
30
30
30
26
30
31
31
39
39
39
39
39
39
39
39
30
31
25
23
39
39
39
39
39
39
39
39
39
39
19
30
39
39
30
30
39
30
30
31
23
30
30
30
19
14
19
25
32
31
30
31
30
23
23
23
22
30
30
30
30
30
34
30
25
30
30
30
30
25
30
23
30
15
23
23
25
30
30
23
23
27
30
30
30
30
7
10
18
15
30
14
23
15
15
15
15
15
23
25
25
23
23
15
9
31
31
23
5
30
15
15
30
30
15
30
25
30
30
30
30
30
23
23
23
23
23
23
23
23
29
30
15
22
23
15
23
23
23
23
23
23
23
23
23
18
23
23
23
23
23
23
15
7
9
23
9
30
22
29
23
9
30
30
18
10
18
14
30
www.vinafix.vn
CSIP
CSIN
BATT
PGND
DLO
LX
DHI
BST
DLOV
LDO
CELLS
GND
CSSNCSSP
REF
CCS
CCI
CCV
IINP
ICHG
ICTL
VCTL
RFIN
ACOK
ACIN
DCIN
CLS
MAX1772U30QSOP
C7731UF20%10VCERM603
402
R407
MF1/16W
5%47K
402
R422
MF1/16W
5%10K
S2
GATE
S1
S3 D4D3
D2
D1
Q16SI4435DY
SOI
+PBUS
F55AMP-125V
SM-2
F45AMP-125V
SM-2
402
R412
MF1/16W1%1K
402
R455
MF1/16W
1%1K
+24V_PBUS
1206FF1/8W5%
33R678
+BATT
C5320.01UF20%50VCERM603S2
GATE
S1
S3 D4D3
D2
D1
Q8SI4435DY
SOI
402
R300
MF1/16W5%470K
402
R458
MF1/16W
5%100K
C4390.1UF
20%50V
CERM805402
R336
MF1/16W
5%330K
C4490.01UF
20%16V
CERM402
402MF
1/16W5%
1MR316
+3V_PMU
402
R473
MF1/16W1%20K
402
R292
MF1/16W
1%100K
402
R309
MF1/16W
1%102K
402
R293
MF1/16W
1%57.6K
402
R301
MF1/16W
1%10K
S2
GATE
S1
S3D4D3
D2
D1
Q10SI4435DY
SOI
G
D
SSOT-3632N7002DWQ14402
R415
MF1/16W5%470K
D111N914
SOT23
402
R660
MF1/16W
5%47K
402
R657
MF1/16W
5%10K
C5152.2UF20%50VCERM1812
C5242.2UF20%50VCERM1812
C5252.2UF20%50VCERM1812
C5262.2UF20%50VCERM1812
C5272.2UF20%50VCERM1812
603
R441
MF1/16W
5%1
G
D
SSOT-3632N7002DWQ19
G
D
SSOT-3632N7002DWQ19
C4900.1UF
20%25V
CERM603
402
R467
MF1/16W
5%100K
C55110UF
20%6.3VCERM805
G
D
SSOT-3632N7002DWQ22
402
R291
MF1/16W5%10K
402
R308
MF1/16W5%470K
G
D
SSOT-3632N7002DWQ4
G
D
SSOT-363
2N7002DWQ4
G
D
SSOT-3632N7002DWQ14
402
R457
MF1/16W1%10K
G
D
SSOT-3632N7002DWQ22
G
D
SSOT-3632N7002DWQ23
402
R486
MF1/16W
5%100K
G
D
SSOT-3632N7002DWQ23
+3V_PMU
C5570.1UF
20%50V
CERM805
603
R384
MF1/16W0.1%
2.21K
603
R371
FF1/16W0.1%82.5K
402MF
1/16W1%
150R383
SM
U16LMC7211
D30RS3AB
SM
D28RS3AB
SM
SOT-363BAS16TWDP3
SOT-363
BAS16TW
DP3
C5684.7UF20%25VCERM1206
402
R465
MF1/16W
5%100K
C5814.7UF
20%25V
CERM1206
C5834.7UF
20%25V
CERM1206
C5824.7UF20%25VCERM1206
402
R679
MF1/16W
1%4.12K
402
R683
MF1/16W
1%10K
J19M-RT-SM
87438-0833
+BATT
FERR-50-OHML40
SM
FERR-EMI-100-OHML8
SM
FERR-EMI-100-OHML6
SMFERR-50-OHM
L9
SM
J25M-RT-SM
87438-0833
SMFERR-EMI-100-OHML7
Q55IRF7811WSO-8
GNDOUT
PG
RS-
V+
RS+
NC2
NC1
TSSOPMAX4172U24
2512MF1W1%
0.025R382
402MF
1/16W1%
10KR742
603
R745
FF1/16W0.1%
42.2K
603
R746
FF1/16W0.1%51.1K
G
D
SSOT-3632N7002DWQ3100
603
R743
FF1/16W0.1%
42.2K
402
R406
MF1/16W
5%4.7
402MF
1/16W1%
1KR744
20%10VCERM402
0.1UFC757
C4720.1UF20%10VCERM402
+3V_PMU
SOT-363BAS16TWDP3
G
D
SSOT-3632N7002DWQ3100 C838
1UF20%10VCERM603
+24V_PBUS
402
R413
MF1/16W5%4.7
+24V_PBUS
402
R332
MF1/16W
1%6.34K
C8430.1UF
20%50V
CERM805
U54LMC7111SOT23-5
G
D
SSOT-3632N7002DWQ66
G
D
SSOT-3632N7002DWQ66
402
R747
MF1/16W
5%100K
+3V_PMU
C5340.47UF
20%50V
CERM1206
MBRS140T3SMD29
GATE
D4D3
D2
D1
S2S3
S1
SOIIRF7416Q60
C5350.47UF20%50VCERM1206
C5801UF20%10V
CERM603
402
R663
MF1/16W
1%100K
402
R665
MF1/16W
1%12.7K
C5501UF20%50VCERM11210
10uHL36
SM1
2512MF1W1%
0.05R677
603
R421
MF1/16W
5%1
C5650.01UF20%16VCERM402
C7820.1UF
20%25V
CERM603
C7680.1UF20%25VCERM603
+3V_PMU
402
R476
MF1/16W
1%27.4K
402
R466
MF1/16W
1%4.12K
402
R464
MF1/16W
1%10K
402
R474
MF1/16W
1%48.7K
402
R488
MF1/16W1%5.23K C570
0.01UF20%16V
CERM402
402
R475
MF1/16W
1%1K
Q54IRF7805SM
SM
U35LMC7211
+3V_PMU
402
R435
MF1/16W
1%1K
402
R680
MF1/16W
1%100K
402
R682
MF1/16W
1%100K
402
R487
MF1/16W1%499K
402
R681
MF1/16W1%100K C774
0.047uF10%16VCERM402
C5640.1UF20%10VCERM402
D10SOT231N914
C5690.1UF20%10VCERM402
C5664.7UF20%25VCERM1206
C5674.7UF
20%25V
CERM1206
C79533UF20%25VELECSM1
SMXW20
603
R685
MF1/16W5%4.7
402
R394
MF1/16W5%47K
402
R414
MF1/16W5%68K
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 31 44E051-6469
U24 SENSE VOLTAGE DROP ACROSS R382
PLACE U24 NEXT TO R382
RC TIME IS 480K*10UF @ +3V_PMU
(BATT_IN_PD)
CONNECTORBATTERY
BATTERY SWITCH-OVER CIRCUIT
REF = 4.096V
NC
NC
NC
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
GREATER THAN 13.5V DETECT
PMU SELECTS BETWEEN TWO VOLTAGES
SWITCHER VOLTAGE CONTROL
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
(GND)
(+3V_PMU)
(POWER JACK, ETC. ON SEPARATE BOARD)
DC POWER INPUT
BATTERY CHARGER
REFINVCTL
I = (0.2048/R ) * (V / V )
V = CELLS X (4.096 + (0.4096 * V / V ))BATT
CHG
For 4.15V cells, VCTL = 0.123 REFIN
For 4.20V cells, VCTL = 0.245 REFIN
ICTL REFIN_62
SWITCHER CURRENT CONTROL
DC INRUSH LIMITER
ADJUST CURRENT SETTINGIF ADAPTER IS OVER 18V,
ADJUST CURRENT SETTINGIF A29 ADAPTER USED,
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
ROUTE LTC1625_ITH CAREFULLY
PLACE R383 CLOSE TO LTC1625
1MSEC INTEGRATION TIME
CRITICAL
11
12
17
25
6
5
7
16
3
18
19
2627
1
24
21
22
8 9
10
14
28
2
23
20
4
13
15
1
2
1
2
1
2
5
6
7
8
4
1
2
3
1
2
1
2
1
2
1
2
1 2
1
2
5
6
7
8
4
1
2
3
2
1
1
2
1
2
2
1
1
2
1 2
2
1
1
2
2
1
2
1
2
1
5
6
7
8
4
1
2
3
3
5
4
1
2
1 3
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
6
2
13
5
4
1
2
1
2
1
2
6
2
1
1
2
2
1
3
5
4
6
2
1
6
2
1
1
2
3
5
4
6
2
1
1
2
3
5
4
1
2
1
2
1
2
12
4
3
1
5
2
12 12
25
34
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
1
2
3
4
5
6
7
8
1 2
1 2
1 2
1 2
CRITICAL
1
2
3
4
5
6
7
8
2
1
CRITICAL
5 6 7 8
4
1 2 3
5
3
4 6
7
1 2
8
1 2
1 2
1
2
1
2
3
5
4
1
2
1
2
1 2 1 2
1
2
16
6
2
1
1
2
1
2
1
2
1
2
4
3
1
5
2
3
5
4
6
2
1
1
2
1
2
1
2
5
6
7
8
4
1
2
3
1
2
1
2
1
2
1
2
1
2
CRITICAL
1 2 1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
5 6 7 8
4
1 2 3
4
3
1
5
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
3
1
2
1
2
1
2
1
2
1 2
1
2
1
2
1
2
CR-31
BCKFD_PROT_EN_L
LTC1625_ITH
ADAPTER_I_REG
A29_CLS_ADJ
A29_DETECT
MAX4172_OUT
AC_GTR_18VA29_DETECT
A29_CURRENT_ADJ
CURRENT_THRESHOLD
1772_ACOK_L
OVER_18V_ADJ
BCKFD_PROT_GATE
AC_IN
PMU_SMB_DATA
PMU_SMB_CLK
1772_CCI
1772_DLOV
1772_CSSN
1772_CSSP
1772_CCS
1772_CELLS
1772_LDO
1772_BST
1772_DHI
1772_IINP
1772_CCV
1772_CCV_RC
1772_ICHG
BATT_LOW_L
CHARGE_DISABLE
PMU_CHRG_BATT_0
1772_ACOK_L
1772_ICTL
1772_VCTL
BATTV_HIGH
BATTV_LOW
PMU_CHARGE_V
1772_BST_ESR
1772_CSIP
1772_CSIN
+BATT_24V_FUSE
1V65_REF
BATT_DIVBATT_LOW
+BATT_RSNS
1772_DLO
ADAPTER_DET
CHARGE_LED_L
1V20_REF
AC_DIV
AC_IN_L
AC_IN
AC_ENABLE_L
1772_DCIN
+ADAPTER +BATT_14V_FUSE
BATT_14V_GATE
AC_IN_L
BATT_14PBUS_EN
AC_IN_L_RC
BATT_24PBUS_EN
BATT_24V_GATE
+BATT_24V_FUSE+ADAPTER_SENSE
BATT_CLK
BATT_DATA
+BATT_POS
+BATT_VSNS
PMU_BATT_DET_L
BATT_NEG
1772_GND
1772_REF
1772_CLS
1625_COMP
AC_ENABLE_GATE
1772_ACIN
IAC_RC_COMP
IAC_FB
+ADAPTER_SW
1772_LX
31
31
30
30
31
31
29
38
39
39
38
29
38 38
39
39
39
30
30
31
27
30
30
38
37
37
38
30
31
30
37
37
31
38
30
30
32
31
27
38
32 38
31
31 38
39
39
38
38
30
38
38
32
38
38
www.vinafix.vn
603
R335
MF1/16W
5%1
+PBUS
402
R304
MF1/16W
1%4.99K
Q50IRF7805SM
8.0UH-6.8ASM1
L32
+24V_PBUS
1N914
D4
SOT23
C76033UF20%25VELECSM1
C71422uF
20%35V
ELECSM-1
C78522uF20%35VELECSM-1
C78622uF20%35VELECSM-1
C76522uF
20%35V
ELECSM-1
C78422uF20%35VELECSM-1
C73233UF
20%25V
ELECSM1
C78733UF
20%25V
ELECSM1
C73633UF20%25VELECSM1
C75933UF
20%25V
ELECSM1
C72233UF20%25VELECSM1
C4690.1UF20%10VCERM402
+3V_PMUVTAP
IN OUTSENSE
GNDFDBKERR
LP2951
SHUT
SOI-3.3V
U25
603
R390
MF1/16W5%1
C54010UF20%6.3VCERM805
C5180.1UF20%10VCERM402
603
R402
MF1/16W5%1
C5302.2UF20%10VCERM805
402
R428
MF1/16W
1%294K C562
470pF10%50VCERM603
402
R454
MF1/16W
1%100K
SHUT
PLUS5VTAP
LP2951
ERRFDBK
GND
SENSEOUTIN
U29SOI
C5480.1UF
20%10V
CERM402
C5740.1UF20%50VCERM805
MBR0540
D17SM
MBR0540SMD19
1210FF1/4W5%
390R418
MBR0540
D18SM
+PBUS
402
R285
MF1/16W1%158K
402
R286
MF1/16W1%16.2K
SM
U22LMC7211
+3V_PMU
C5040.1UF
20%10V
CERM402
402
R363
MF1/16W
1%102K
402
R357
MF1/16W
1%10K
402MF
1/16W1%
1MR356
G1
S1
D1
Q9FDG6324LSC70-6
G2
D2S2
SC70-6FDG6324L
Q9+5V_MAIN
402
R341
MF1/16W
5%470K
+24V_PBUS
MBR0520LT
D9SM
+5V_MAIN
MBR0520LT
D12SM
+BATT
+5V_MAIN
603
R321
MF1/16W5%2.2
C4444.7UF20%10VCERM1206
402
R322
MF1/16W5%0
402
R314
MF1/16W5%0
SMXW6
J1254550-1490
F-RT-SM
C7410.0047UF10%25VCERM402
Q51IRF7811WSO-8
MBRS140T3SMD26
C5552.2UF
20%50V
CERM1812
C5412.2UF20%50VCERM1812
C5222.2UF
20%50V
CERM1812
C5862.2UF20%50VCERM1812
C7522.2UF
20%50V
CERM1812
C7672.2UF20%50VCERM1812
C4770.22UF20%25VCERM805
C5034.7UF
20%25V
CERM1206
C5024.7UF20%25VCERM1206
MBR0540
D3SM
BOOST
SW
SGND PGND
TK
VIN
SYNC
RUN/SS
VPROG
ITH
FCB
INTVCC
TG
VOSENSE
BGLTC1625
EXTVCCU18SSOP
C4634700pF
5%25V
CERM603
C445470pF10%50VCERM603
C4780.1UF
20%50V
CERM805
C4464700pF
5%25V
CERM603
C5722.2UF
20%50V
CERM1812
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 32 44E051-6469
12.8V PBUS SUPPLY
24V IS AN OUTPUT FROM BUBBA
NC
BACKUP BATTERY / USB CONNECTOR
NC
ADAPTER OR BATTERYBOOTSTRAP SYSTEM FROM
PBUS HOLD-UP CAPS
CONNECT LTC1625 TK PIN AT TOP-SIDE FET
PMU SUPPLY
(+4_6V_BU)
KEEP VIN/TK LOOP SHORT
3V_PMU_SENSE
WHEN +24V_PBUS IS BELOW ~13.44V,
1625 IS SHUT-OFF
12.8V REGULATOR
+PBUS IS BOTH AN INPUT AND OUTPUT TO BUBBA
2
1
2
1
5 6 7 8
4
1 2 3
CRITICAL
12
3 CRITICAL
13
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
5
7
4
8 1
2
3
6
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
5
7
4
8 1
6
2
3
1
2
1
2
1 2
1
2
1 2
1 2
1
2
1
2
4
3
1
5
2
1
2
1
2
1
2
1 2
6
5
1
CRITICAL
6
2
3
4
CRITICAL
1
2
1 2
1 2
1
2
1
2
1
2
NO STUFF
1
2
1 2
OMIT
15
16
1
10
11
12
13
14
2
3
4
5
6
7
8
9
CRITICAL
1
2
NO STUFF
5 6 7 8
4
1 2 3
CRITICAL
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1 210
12
1
4
11
5
9
3
6
14
2
1315
16
7
8
CRITICAL
1
2
1
2
1
2
1
2
1
2
CR-32
NEC_RIGHT_USB_OVERCURRENT
RIGHT_USB_DM
NEC_RIGHT_USB_PWREN
RIGHT_USB_DP
3V_PMU_VTAP
+4_6V_BU
1625_FCB
1625_INTVCC
1625_SGND
1625_RUNSS
1625_COMP
COMP_RC
1625_VIN
1625_ENABLE
1625_TG
1625_ENABLE_L
1V20_REF
1625_VFB
+ADAPTER_OR_BATT
FB_4_85V_BU
+4_85V_RAW
+ADAPTER +ADAPTER_ILIM
+4_85V_ESR+3V_PMU_ESR
1625_DIV
1625_BST_ESR
1625_BST
DCDC_EN
1625_BG
1625_VSW
1625_EXTVCC
39 34
39
39
33
39
37
39
37
38
38
38
38
29
26
26
26
26
33
38
38
31
38
31
38
30
31 38
38 38
20
38
38
www.vinafix.vn
SGND PGND
STBYMD
FCB
FREQSET
SNS1-
PGOOD
VOSNS2
VOUT3.3
VCCVCCEXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2
RUN/SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1
ITH1
RUN/
SSOPLTC3707U27
402
R303
MF1/16W5%10
402
R416
MF1/16W5%470K
G
D
SSOT-3632N7002DWQ15
C5710.01UF20%16VCERM402
G
D
SSOT-3632N7002DWQ17
402MF
1/16W5%
100KR437
1206FF1/4W1%
0.005R424
G
D
SSOT-3632N7002DWQ15
+5V_SLEEP
C792100UF20%10VPOLYSMD-3
C5120.22UF
20%25V
CERM805
20%16VCERM402
0.01UFC599
+5V_MAIN
TSOP
Q24SI3443DV
C623100UF20%10VPOLYSMD-3
TSOP
Q35SI3443DV
20%10VCERM402
0.1UFC628
C62610UF20%6.3VCERM805
402MF
1/16W5%
100KR494
402MF
1/16W5%
100KR612
603
R380
MF1/16W5%2.2
402
R274
MF1/16W
5%100K
G
D
SSOT-3632N7002DWQ3
C4370.01UF20%16VCERM402
402MF
1/16W5%
100KR294
+5V_MAIN
402
R302
MF1/16W
5%100K
G
D
SSOT-3632N7002DWQ3
+3V_SLEEP+3V_MAIN
20%50VCERM402
0.001uFC454
TSOP
Q21SI3443DV
5%50VCERM603
2200pFC585
402MF
1/16W5%
100KR295
402MF
1/16W5%
100KR452
4.8UHSM1
L35
4.8UHSM1
L33
402
R387
MF1/16W
1%113K
SMD7
MBR0540SMD14MBR0540
603
R401
MF1/16W
5%2.2
1N914
D16
SOT23
402MF
1/16W5%
1MR431
C5580.01UF20%16VCERM402
C59610UF20%6.3VCERM805
402
R386
MF1/16W
1%21.5K
C501220PF5%25VCERM402
MBRS140T3SM
D22MBRS140T3SMD33
C528180pF5%50VCERM402
C5294.7UF20%10VCERM1206
Q61SI4888DYSOI
C5610.1UF20%10VCERM402
C5000.047UF
10%16V
CERM402
C5470.22UF20%25VCERM805
C545180pF
5%50V
CERM402
Q62SI4888DYSOI
402
R417
MF1/16W1%63.4K
402
R423
MF1/16W1%20KC521
0.01UF20%16V
CERM402
402
R379
MF1/16W
5%0
402
R395
MF1/16W5%47K
402
R389
MF1/16W5%20K
C5600.001uF20%50VCERM402
C559270PF
5%25V
CERM402 402
R426
MF1/16W1%4.99K
C5390.001uF
20%50V
CERM402
Q52SI4888DY
SOI
C533270PF5%25VCERM402402
R400
MF1/16W
1%4.99K
+5V_MAIN
C79322UF
20%10V
CERM1210
C78022UF20%10VCERM1210Q43
SI4888DYSOI
C72422UF20%10VCERM1210
C72322UF
20%10V
CERM1210
C720330UF
20%6.3VTANT
CASE-D4
XW11SM
C4922.2UF
20%50V
CERM1812
C4682.2UF
20%50V
CERM1812
C7292.2UF
20%50V
CERM1812
C7372.2UF
20%50V
CERM1812
C7502.2UF20%50VCERM1812
C7432.2UF20%50VCERM1812
C7662.2UF20%50VCERM1812
C7712.2UF20%50VCERM1812
402
R296
MF1/16W5%10
C790330UF20%6.3VPOLYSMD
402
R453
MF1/16W
5%10
402
R439
MF1/16W
5%10
1206FF1/4W1%
0.005R651
+24V_PBUS
20%50VCERM402
0.001uFC573
402
R360
MF1/16W
5%1M
402
R427
MF1/16W5%1M
+5V_MAIN +3V_MAIN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 33 44E051-6469
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD
1
DCDC_EN TRUTH TABLE
+3V_PMU+4_6V_BU+3V_PMU+3V_PMU VOLTAGE
Shutdown1
1 0
00
DCDC_EN_LDCDC_EN
1
0
0
0
1 Run
Sleep
PMU_POWER_UP_L SLEEP State
3V START TO TURN ON ~25MS AFTER DCDC_EN_L
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L
POWERDOWN DELAY IS AROUND 4MS-15.6MS
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
3.3V/5V REGULATOR
3.3V/5V MAIN SUPPLY
NC
+5V_SLEEP LOADS
SLEEP LEVEL SHIFTER (3V -> 5V)
+3V_SLEEP LOADS1) CPU PLL Config Control
1 (2.99V) 3) MAP17 - 3V RAIL (IF USING D3COLD)
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
6) DVI LEVEL SHIFTERS & PULL-UPS & HPD
THERE’S NO 10UF INPUT CAPBECAUSE Q21 IS PLACED ATOUTPUT OF +3V_MAIN SWITCHER
220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
1) OPTICAL DRIVE
3) TRACKPAD
2) DVI
4) FANS
5) FIREWIRE PHY
5) LVDS DDC PULL-UPS
2) INTREPID - IIC AND PCI PULL-UPS
8) BOOT BANGER
11) PMU - IIC Pull-ups
12) PCI PULL-UPS
10) WIRELESS (IF POWERING OFF IN SLEEP)
9) HARD DRIVE (IF USING 3V LOGIC)
7) SOUND BOARD
CRITICAL
10
23 19
25 18
22
7
5
21
8 11
20
28
1 15
2
3
14
13
9
6
26 17
27 16
24
4 12
1
2
1
2
6
2
11
2
3
5
4
1 2
1 2
3
5
4
1
2
1
2
1 2
1
2
5
63
4
1
2
1
2
5
63
4
1 2
1
2
1 2
1 2
1
2
1
2
3
5
41
2
1 2
1
2
6
2
1
1 2
1
2
5
63
4
2 1
1 2
1 2
CRITICAL
21
3
CRITICAL
21
3
1
2
1
2
1
2
1
2
13
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
5 6 7 8
4
1 2 3
1
2
1
2
1
2
1
2
CRITICAL
5 6 7 8
4
1 2 3
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
5678
4
123
1
2
1
2
1
2
1
2CRITICAL
5678
4
123
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
330UF1
2
1
2
1
2
1 2
1 2
1
2
1
2
CR-33
3V_SW
3707_FCB
5V_ITH 3V_ITH
3V_ITH_RC
+5V_HD_SLEEP
5V_HD_PWREN
3V_RSNS5V_RSNS
5V_ITH_RC
3707_INTVCC
SLEEP
DCDC_EN_L
SLEEP
3V_SLEEP_PWREN_L
SLEEP
SLEEP_L_LS5_EN_L
SLEEP_L_LS5
SLEEP_LS5_EN_L
SLEEP_LS5
SLEEP_LS5
5V_SLEEP_PWREN
5V_SNSM
5V_SNSP
DCDC_EN
+4_6V_BU
5V_VOSNS
5V_SW
5V_BG
3707_STBY
5V_RUNSS
5V_BOOST_ESR
5V_BOOST
3707_FSET
3V_RUNSS
3V_VOSNS
3V_TG
3V_BOOST
3V_BG
3V_SNSP
3V_SNSM
5V_TG
3V_BOOST_ESR
3707_SGND
PMU_POWER_UP_L
DCDC_EN_L LTC3707_START_RC
3V_5V_OK
39
35
35
35
35
34
33
35
33
33
34
32
35
38
30
33
30
30
27 33
33
29
38
30
33
38
24
38 38
38
23
20
23
23
20 25
25
37
37
20
32
38
37
37
38
29
20
35
www.vinafix.vn
402
R319
MF1/16W
5%100K
+5V_MAIN
402
R330
MF1/16W
5%100K
SM2N3904Q6
SM2N3904Q11
402
R338
MF1/16W
5%10K
SMXW18
C6951000UF20%2.5VPOLYSM
SMXW2
C6921000UF
20%2.5VPOLY
SM
+PBUS
SMD2MBR0530C471
1UF20%10VCERM603
+5V_MAIN
402
R273
MF1/16W
5%20
C6961000UF20%2.5VPOLYSM
C6971000UF20%2.5VPOLYSM
C6931000UF
20%2.5VPOLYSM
C4880.1UF20%25VCERM603
D0D1D2D3D4
SKP/SDN
VCC VDD
V+
ILIMFBS
GNDSA/B
REF
TON
CC
BSTDH
LX
DL
GND
VGATE
FBTIME
MAX1717U21QSOP
402MF
1/16W5%
100R337
SMXW9
C4930.001UF
20%50V
CERM402402
R358
MF1/16W
5%390K
C4751UF20%10V
CERM603
402
R329
MF1/16W
5%0
C489220PF
5%25V
CERM402
402
R317
MF1/16W
1%27.4K
C4401UF20%10VCERM603402
R318
MF1/16W
1%12.7K
C4970.01UF
20%16V
CERM402
402
R246
MF1/16W5%0
402
R249
MF1/16W5%470K
402
R251
MF1/16W5%470K
402
R258
MF1/16W5%0
402
R247
MF1/16W5%0
402
R255
MF1/16W5%470K
402
R257
MF1/16W5%0
SMXW7
402
R306
MF1/16W1%2K
603
R310
MF1/16W1%162K
SOT-363BAS16TWDP1
SOT-363BAS16TWDP1
SOT-363BAS16TWDP1
402
R260
MF1/16W5%470K
402
R370
MF1/16W
1%66.5K
C4360.0047uF10%25VCERM402
C7350.0047uF
10%25V
CERM402
1210
R652
MF1/4W
5%2.2
603MF
1/16W5%
2.2R346
C62110UF
20%6.3VCERM805
C610UF
20%6.3VCERM805
C62710UF
20%6.3VCERM805
C3210UF
20%6.3VCERM805
C310UF
20%6.3VCERM805
C61210UF
20%6.3VCERM805
C810UF
20%6.3VCERM805
C210UF
20%6.3VCERM805
C60710UF
20%6.3VCERM805
C61410UF
20%6.3VCERM805
C62410UF
20%6.3VCERM805
C710UF
20%6.3VCERM805
C11210UF
20%6.3VCERM805
C1410UF
20%6.3VCERM805
C62210UF
20%6.3VCERM805
C62010UF
20%6.3VCERM805
C410UF
20%6.3VCERM805
C510UF
20%6.3VCERM805
C110UF
20%6.3VCERM805
C61110UF
20%6.3VCERM805
Q41IRF7805SM
C7310.0022uF
10%50VCERM603
C6941000UF
20%2.5VPOLY
SM
Q40IRF7805SM
1.2UH-18.3ASM1
L31
D25B540CSM
Q45IRF7822SM
Q46IRF7822SM
Q44IRF7822SM
+3V_MAIN
402
R737
MF1/16W5%0
402
R735
MF1/16W5%470K
402
R733
MF1/16W5%470K
402
R734
MF1/16W5%0
402
R732
MF1/16W5%0
402
R731
MF1/16W5%470K
402
R736
MF1/16W5%470K
402
R738
MF1/16W5%470K
402
R739
MF1/16W5%1K
+3V_MAIN
402MF
1/16W5%
0R694
402MF
1/16W5%
0R727
402
R740
MF1/16W5%10K
402MF
1/16W5%
0R730
C8370.1UF20%10VCERM402
SYM_VER-2
GNDOESEL
B4
B3A4
A3
A2B2
Y3
Y4
A1B1
VCC
Y2
Y1PI3B3257U41QSOP
402
R248
MF1/16W5%0
C8541000UF20%2.5VPOLYSM
402
R766
MF1/16W5%0
402
R767
MF1/16W5%0
402
R768
MF1/16W5%0
402
R769
MF1/16W5%0
C41922UF20%20VTANT-D2SMD
C42022UF20%20VTANT-D2SMD
C41322UF20%20VTANT-D2SMD
C41522UF20%20VTANT-D2SMD
C41722UF20%20VTANT-D2SMD
C41222UF20%20VTANT-D2SMD
C41422UF20%20VTANT-D2SMD
C41622UF20%20VTANT-D2SMD
M-ST-SM-52465-1217J6402
MF1/16W1%
2.05KR250
402MF
1/16W1%
100R252
402
R279
MF1/16W1%100K
TABLE_11_HEAD
5%1/16W0402RES10
RES,MTL FILM,1/16W,0 OHM,5%,0402,SMD116S1000 VCORE_NO_OFFSETR306
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 34 44E051-6469
TABLE_11_HEAD
REFERENCE DESIGNATOR(S) BOM OPTIONQTY DESCRIPTION VALUE VOLT. WATT. TOL.PART # PACKAGEDEVICE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEMCRITICAL
126S0036 7CAP,AL CAP,AL,POLY,8.2UF,20,16V,V CASE,SMD
C412,C414,C415,C416,C417,C419,C420
FMAX CONNECTOR
NC (RFU)
NOTE: R310 (R2) NO STUFFED FOR NO OFFSET CASE
VREF = 2.0V, HENCE VOFFSET = 2.0V * (R1/(R1+R2)) AND VCORE = VDAC + VOFFSET.
R1
R2
CLOSEST TO CPUPIN OF 1000uF CAP
PLACE THIS SHORT AT
TO PINS 15 & 13!!PLACE C423 CLOSE
VCORE_VPLUS
Keep trace fat and short!!
OUTPUT VOLTAGE
111
11
11
01 0 11
01
111
1
000
1
1
0
0 1
0
0
00
00
0
0
1
0
1
0
1
1
010
1
0
11
00
0
1 0
10
101
1
00
00
1
0
D3 D2 D0D1
0.9250.950
1.1001.0751.0501.0251.0000.975
1.125
1.2751.2501.2251.2001.1751.1501.75
1.901.851.80
1.952.00
1.70
1.451.50
1.60
1.40
1.55
1.65
1.351.30
DACV
NO CPU NO CPU
D4=1D4=0
ROUTE AS DIFFERENTIAL PAIR
GROUND SENSE VOLTAGE DIVIDER
to GND at bottom-side FETConnect MAX1717 GND pin 13
This allows for an offset to the ground sense to adjust the output voltage.
A
<D0>
When A/B_ is low (slow): <=1K-ohm -> 0
When A/B_ is high (fast): D4-D0 read as-is
>=100K-ohm -> 1
If all pull-ups are >=100K and all
pull-downs are <=1K, V = V .B
VCORE SUPPLY
FOR V-STEP:
<= 1K PU
>= 100K PU
>= 100K PD
<= 1K PD
Lo/SlowHi/Fast
1
1
0
0
0
1
1
0
A/B_ =
D<4..0>
Keep trace fat and short!!
(VCORE_SNS)
(VCORE_GNDSNS)
Keep trace fat and short!!
VCORE POWER SEQUENCINGCPU core follows CPU I/O voltage
(approx. 7ms delay)
<D1><D2><D3><D4>
NEW 1.35V->1.30V
<D1><D2><D3><D4>
MAX1717 VID CAN TAKE 3.3V TO 5.5V INPUTS
+20MV OFFSET
[email protected]>[email protected]
SEL = 0; Y1=A1SEL = 1; Y1=B1
KEEP TRACE FAT (40-100 MILS)AND SHORT!!
1
2
1
2
1
3
2
1
3
2
1
2
1 2
CRITICAL1
2
1 2
CRITICAL1
2
1
21
2
1
2
CRITICAL1
2
CRITICAL1
2
CRITICAL1
2
1
2
CRITICAL
16
22
6
21
20
19
18
17
24
14
4
5
13
11
10
23
9
2
3
8
1
7 15
12
1 2
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
NO STUFF1
2
1
2
1
2
1
2
1
2
NO STUFF1
2
NO STUFF1
2
1 2
VCORE_OFFSET1
2
VCORE_OFFSET1
2
25
34
16
1
2
1
2
NO STUFF1
2
1
2
NO STUFF
1
2
12
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
CRITICAL
5 6 7 8
4
1 2 3
NO STUFF
1
2
CRITICAL1
2
CRITICAL
5 6 7 8
4
1 2 3
CRITICAL
12
3
CRITICAL
1
2
CRITICAL
5 6 7 8
4
1 2 3
CRITICAL
5 6 7 8
4
1 2 3
CRITICAL
5 6 7 8
4
1 2 3
NO STUFF1
2
4XVCORE1
2
4XVCORE1
2
NO STUFF1
2
4XVCORE1
2
NO STUFF1
2
NO STUFF1
2
4XVCORE1
2
4XVCORE1
2
NO STUFF
1 2
1 2
4XVCORE1
2
NO STUFF
1 2
4XVCORE
1
2
4XVCORE
15
8
2
3
5
6
11
10
14
13
1
16
4
7
9
12
NO STUFF1
2
CRITICAL1
2
NO_4XVCORE1
2
NO_4XVCORE1
2
NO_4XVCORE1
2
NO_4XVCORE1
2
OMIT
1
2
OMIT
1
2
OMIT
1
2
OMIT
1
2
OMIT1
2
OMIT1
2
OMIT1
2
OMIT1
2
NO STUFF
12
4
5
6
11
10
9
8
7
1
2
3
NO STUFF
1 2
NO STUFF
1 2
1
2
CR-34
CPU_VCORE_SLEEP
VCORE_MUX_EN
CPU_VCORE_SLEEP
VCORE_SNS
VCORE_GNDSNS
VCORE_VGATE
VCORE_GNDA
VCORE_SHDN_L
MIN_LINE_WIDTH=10VCORE_VID<0>
DCDC_EN
SLEEP_L_LS5
CPU_VCORE_PWR_SEQ
CPU_VCORE_SEQ_L
CPU_VCORE_SEQ
CPU_VCORE_HI_OC
MAX1717_AB_SELINT_GPIO1_PU
VCORE_VCC
VCORE_GNDDIV
VCORE_DH
VCORE_FB
VCORE_TIME
VCORE_GND
VCORE_LX
VCORE_BST
VCORE_CC
VCORE_TON
VCORE_REF
VCORE_ILIM
MIN_LINE_WIDTH=10VCORE_VID<4>
MIN_LINE_WIDTH=10VCORE_VID<2>
MIN_LINE_WIDTH=10VCORE_VID<1>
MIN_LINE_WIDTH=10VCORE_VID<3>
MAXBUS_SLEEP
CPU_VCORE_SNUB
VCORE_BOOST
VCORE_DL
CPU_VCORE_HI_OC
VCORE_FAST<1>
VCORE_MUX_SEL
VCORE_SLOW<4>
VCORE_FAST<3>
VCORE_SLOW<3>
VCORE_FAST<2>
VCORE_SLOW<2>
VCORE_SLOW<1>
VCORE_FAST<4>
VCORE_VID<4>
VCORE_FAST<4>
VCORE_VID<3>
VCORE_VID<2>
VCORE_VID<1>
VCORE_FAST<1>
VCORE_FAST<2>
VCORE_FAST<3>
VCORE_GNDDIV
VCORE_GNDSNS
VCORE_VID<4>
VCORE_GNDSNS_TEST
VCORE_GNDDIV_TEST
SOFT_PWR_ON_L
+3V_PMU_RESET VCORE_VID<3>
VCORE_VID<2>
VCORE_VID<1>
VCORE_VID<0>
38 23
39
17
39
39
33
35
16
38
38
32
33
34
9
34
30
34
34
38
38
29
27
30
38
39
7
30
38
38
23
5
5
38
34
15
34
20
20
7
15
38
34
38
38
38
38
38
38
38
38
38
38
34
34
34
34
5
38
38
7
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34 22
30 34
34
34
34
www.vinafix.vn
2.2UHL14
SM1
+2_5V_MAIN
C4761UF20%10VCERM603
402MF
1/16W5%
20R399
+1_8V_SLEEP+1_8V_MAIN
C25610UF
20%6.3VCERM805
5%50VCERM603
2200pFC214
402MF
1/16W5%
100KR143
SI3447DVU5
TSOP
SI3447DVU9
TSOPC40110UF
20%6.3VCERM805
5%50VCERM603
2200pFC396
402MF
1/16W5%
100KR231
+2_5V_MAIN +2_5V_SLEEP
C61310PF
5%50V
CERM402
AGND THRML
NC_28NC_23NC_15
BST2
OUT1
TON
PGOODREF
DL1
LX1
DH1
VCC
BST1
ON2ON1ILIM2ILIM1
OUT2
SKIP
DL2
LX2
PGND
DH2
VDD
V+
FB1 FB2
MAX1715U23QSOP
4.7UHL30
SM4
Q48IRF7805
SM
Q59IRF7805SM
402
R353
MF1/16W1%158K
402
R348
MF1/16W
1%158K
SOT-363
BAS16TW
DP2
603MF
1/16W5%
4.7R408
603MF
1/16W5%
4.7R398
C5370.1UF20%25VCERM603
MBRS130LT3SM
D23
402
R355
MF1/16W1%5.11K
402
R354
MF1/16W1%10K
+1_5V_MAIN
+5V_MAIN
SOT-363
BAS16TW
DP2
C5360.1UF20%25VCERM603
C715150UF20%6.3VTANTSMD-1
4.7UHL38
SM4
402
R350
MF1/16W5%0
402
R349
MF1/16W5%0
+PBUS
+PBUS
+PBUS
C708150UF20%6.3VTANTSMD-1
C747150UF20%6.3VTANTSMD-1
C744150UF20%6.3VTANTSMD-1
C753150UF20%6.3VTANTSMD-1
C5204.7UF20%25VCERM1206
C5384.7UF20%25VCERM1206C491
4.7UF20%25V
CERM1206
C5114.7UF
20%25V
CERM1206
402
R351
MF1/16W5%0
402
R352
MF1/16W
5%0
MBRS130LT3SMD32
C61022UF20%10VCERM1210
402
R553
MF1/16W5%1M
402
R67
MF1/16W5%10K
402
R75
MF1/16W5%10K
402
R545
MF1/16W1%16.2K
C6191000PF5%25VCERM603
PVINSVIN
SHDN/RT
SYNC/MODE
SW
VFB
ITHPGOOD
PGND SGND
U4LTC3411
MSOP
SMXW1
SMXW8
402
R57
MF1/16W1%324K
+1_5V_SLEEP
+1_5V_MAIN
C6892200pF5%50VCERM603
C68310UF
20%6.3VCERM805
C77610UF20%6.3VCERM805
C70410UF20%6.3VCERM805
C5542.2UF20%10VCERM805
C5442.2UF20%10VCERM805
SOT-363BAS16TWDP2
402MF
1/16W5%
330KR373
C4990.01UF20%16VCERM402
Q37TSOP
SI3446DV
S
D
G
Q132N7002SM
402
R385
MF1/16W
5%100K
603MF
1/16W5%
0R1606
603MF
1/16W5%
0R1607
Q47IRF7811W
SO-8
Q58IRF7811WSO-8
+1_5V_MAIN
+2_5V_MAIN
C8610UF
20%6.3VCERM805
402
R546
MF1/16W
1%887K
402
R551
MF1/16W
1%698K
402MF
1/16W5%
10R40
C151UF20%10V
CERM603
402
R552
MF1/16W5%1M
+1_8V_MAIN
+3V_MAIN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 35 44E051-6469
2) +1_5V_LDO1) INTREPID PLLS
+1_8V_MAIN LOADS
1) MPC7450 - MAXBUS I/O - IF 1.8V INTERFACE
+1_8V_SLEEP LOADS
3) CPU PLL Config Straps
2) CPU JTAG & MaxBus Pull-ups
4) L3_OVDD (IF NOT USING 1.5V)
2) AGP I/O IF USING D3HOT1) INTREPID CORE
+1_5V_MAIN LOADS
4) INTREPID MEMORY I/O
1) L3 CORE
3) L3 I/O IF L3_OVDD EXCEEDS 1.5V
MAX1715_GND
CONNECTING 1_5V_FB TO GND, FORCES 1.8V OUTPUT
1) AGP I/O - IF USING D3COLD
1.5V/1.8V/2.5V SUPPLIESCONTINOUS MODE
PULSE MODE
BURST MODE
NC
NC
NC
2) GIGABIT ETHERNET - AVDDL
+2_5V_MAIN LOADS
1.8V SWITCHER
1.5V/2.5V SWITCHER+2_5V_SLEEP LOADS
2) FBCORE/FBIO IF USING D3COLD
1) MAP17 - FBCORE/FBIO IF USING D3HOT
3) DDR SODIMMS - CORE/IO
DIODE PROVIDE PROVIDE QUICK SHUT-DOWNPOWER DOWN DELAY 1.5MS TO 3.5MS
+1_5V_SLEEP LOADS
THERE’S 100K PULL-UP ON PG 31 ALREADY
1) MAXBUS I/O - IF 1.5V INTERFACE
1) L3 I/O
CHANGE R354 BACK TO 10K, 1%, AND STUFF 5.11K FOR 1.5V OPERATION
4) DDR MUXES
6) PCI1510 CORE
5) CLOCK SLEWING I/O
CRITICAL
1 2
1
2
12
1
2
2 1
1 2
1
2
5
63
4
1
2
5
63
4
1
2
1 2
1 2
1
2
CRITICAL
8
25 18
26 17
24 19
2 13
3
12
27 16
15
23
28
10
11
1 14
22
7
9 6
29
5
4
21 20
CRITICAL
1 2
CRITICAL
5678
4
123
CRITICAL
5 6 7 8
4
1 2 3
1
2
1
2
25
1 2 1 2
1
2
1
2
1
2
1
2
34
1
2
POSCAPS
1
2
CRITICAL
1 2
1
2
NO STUFF
1
2
POSCAPS
1
2
POSCAPS
1
2
POSCAPS1
2
POSCAPS
1
2
CRITICAL
1
2
CRITICAL
1
2CRITICAL
1
2
CRITICAL
1
2
NO STUFF
1
2
NO STUFF1
2
1
2
1
21
2
NO STUFF
1
2
NO STUFF
1
2
1
2
1
2
CRITICAL
10
5
8
6
3
1
7
4
2 9
OMIT
1 2
OMIT
1 2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
16
1 2
1
2
1
2
5
6 3
4
3
1
2
1
2
1 2
NO STUFF
1 2
CRITICAL
5678
4
123
CRITICAL
5 6 7 8
4
1 2 3
1
2 1
2
1
2
1 2
1
2
1
2
CR-35
LTC3411_ITH_RC
+1_5V_LDO
+1_5V_SLEEP_VIN
SLEEP_L_LS5
DCDC_EN_L MAX1715_ON_RC
1_5V_BOOST
SLEEP
1_8V_SLEEP_PWREN_L
1_5V_2_5V_OK
MAX1715_GND
MAX1715_VCC
1_5V_LX
1_5V_DL
1_5V_DH
2_5V_SLEEP_PWREN_L
SLEEP
2_5V_LX
LTC3411_SYNC
1_8V_SW
1_8V_VFB
LTC3411_ITH
MAX1715_REF
MAX1715_TON
2_5V_ILIM
MAX1715_GND
1_5V_ILIM
2_5V_DH
2_5V_DL
1_5V_FB
1_5V_BST 2_5V_BST
1_5V_FB
2_5V_BOOST
LTC3411_VCC
LTC3411_GND
LTC3411_SHDN
MAX1715_SKIP
3V_5V_OK
34
35
35
38
33
33
33
19
27
33
30
38
38
30
38
38
38
38
16
20
20
38
23
20
35
38
38
38
38
23
38
38
38
38
38
38
38
38
35
38
38
38
35
38 38
35
38
38
38
38
38
33
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 36 44E051-6469
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
MAP17
L3 CACHE
CLOCK LINE CONSTRAINTS
GROUP
INTREPID CLOCKS
SIG_NAME DELAY_RULE MATCHED_DELAY MAX VIAS MAX EXPOSED LENGTH STUB_LENGTH NET_SPACING_TYPE PULSE PARAM
SIGNAL CONSTRAINTS - PAGE 1
PULSE_PARAMNO_TESTNET_SPACING_TYPESTUB_LENGTHMAX_EXPOSED_LENGTHMAX_VIASDELAY_RULESIG_NAME
MAXBUS
GROUP
CACHEL3
DIGITAL SIGNALS
GROUP 0
GROUP 1
RAMDDR
GROUP 6
GROUP 4/5
GROUP 2/3
GROUP 7
ADDR
CONTROL
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
SOUND
FIREWIRE
ETHERNETMARVELL
CRYSTALS
THERE’S ANOTHER 280MIL LEG
CR-36
5 500 200SND_SCLK 10 MIL SPACING
5 10 MIL SPACINGSND_CLKOUT 500 200
10 MIL SPACINGNEC_XT2 ::300:400
10 MIL SPACINGNEC_XT1 ::600:700
10 MIL SPACINGCLK25M_ENET_XOUT :::400
10 MIL SPACINGCLK25M_ENET_XIN :::650
:::400CLK18M_INT_EXT 10 MIL SPACING
:::300CLK18M_XTAL_IN 10 MIL SPACING
CLK18M_INT_XOUT 10 MIL SPACING::1300:1400
CLK27M_GPU_XIN 10 MIL SPACING::300:400
::1400:1500CLK18M_INT_XIN 10 MIL SPACING
:::250 10 MIL SPACINGCLK27M_XTAL_IN
CLK27M_GPU_XOUT 10 MIL SPACING:::150
250::600:1300GPU_DVO_CLKP 2003 10 MIL SPACING
GPU_FBCLK1_L 2003 10 MIL SPACING:::250
:::300 200FW_OSC 10 MIL SPACING 98.034 MHZ
:::520 200FW_XI 10 MIL SPACING 98.034 MHZ
:::300CLKFW_LINK_LCLK 49.152 MHz200
::7500:8000 200CLKFW_PHY_LCLK 49.152 MHz3 500 10 MIL SPACING
::7500:8000 10 MIL SPACING5003 49.152 MHzCLKFW_LINK_PCLK 200
200 49.152 MHzCLKFW_PHY_PCLK :::300
::8000:9000 3CLKENET_PHY_GTX 200500 125 MHz10 MIL SPACING
200:::300 125 MHzCLKENET_LINK_GTX
::8000:9000 4 200500CLKENET_LINK_TX 25 MHz10 MIL SPACING
200:::300CLKENET_PHY_TX 25 MHz
::8000:9000 2005003CLKENET_LINK_GBE_REF 125 MHz10 MIL SPACING
200:::300 125 MHzCLKENET_PHY_GBE_REF
::8000:9000 3CLKENET_LINK_RX 125 MHz500 200 10 MIL SPACING
200 125 MHZ:::300CLKENET_PHY_RX
250CPU_GBL_L 5::1500:2500
5RAM_MUXSEL_L ::1800:2600
5RAM_MUXSEL_H ::1800:2600
3MEM_MUXSEL_L<1..0> :::500
3MEM_MUXSEL_H<1..0> :::500
6RAM_WE_L 200::2000:3100
4MEM_WE_L :::500
6RAM_CAS_L 200::2000:4100
4:::500MEM_CAS_L
6RAM_RAS_L 200::2000:4100
4:::500MEM_RAS_L
::1800:2500 6RAM_CKE<3..0> 200
4:::500MEM_CKE<3..0>
::1800:2500 6RAM_CS_L<3..0> 200
4:::500MEM_CS_L<3..0>
6RAM_BA<1..0> 200::2000:3300
:::500 4MEM_BA<1..0>
6::2000:3000RAM_ADDR<12..0> 200
:::500 83 MHZ4MEM_ADDR<12..0>
RAM_GROUP7_B:::500 200 167 MHZ4RAM_DQM_B<7> :::2200
RAM_GROUP7_A:::500 200 167 MHZ4RAM_DQM_A<7> :::1600
200 167 MHZ4MEM_DQM<7> :::1600
RAM_GROUP7_B:::500 200 167 MHZ4RAM_DQS_B<7> :::2200
RAM_GROUP7_A:::500 200 167 MHZ4RAM_DQS_A<7> :::1600
200 167 MHZ4MEM_DQS<7> :::1600
RAM_GROUP7_B:::500 200 167 MHZ4RAM_DATA_B<63..56> :::2200
RAM_GROUP7_A:::500 200 167 MHZ4RAM_DATA_A<63..56> :::1600
200 167 MHZ4MEM_DATA<63..56> :::1600
RAM_GROUP6_B:::800 200 167 MHZ4RAM_DQM_B<6> :::2400
RAM_GROUP6_A:::800 200 167 MHZ4RAM_DQM_A<6> :::1800
200 167 MHZ4MEM_DQM<6> :::1650
RAM_GROUP6_B:::800 200 167 MHZ4RAM_DQS_B<6> :::2400
RAM_GROUP6_A:::800 200 167 MHZ4RAM_DQS_A<6> :::1800
200 167 MHZ4MEM_DQS<6> :::1650
RAM_GROUP6_B:::800 200 167 MHZ4RAM_DATA_B<55..48> :::2400
200 167 MHZ4MEM_DATA<55..48> :::1650
RAM_GROUP6_A:::800 200 167 MHZ4RAM_DATA_A<55..48> :::1800
4RAM_DQM_B<5..4> 167 MHZ200:::2350 RAM_GROUP45_B:::950
4RAM_DQM_A<5..4> 167 MHZ200:::1850 RAM_GROUP45_A:::900
:::1500 4MEM_DQM<5..4> 167 MHZ200
4RAM_DQS_B<5..4> 167 MHZ200:::2350 RAM_GROUP45_B:::950
4RAM_DQS_A<5..4> 167 MHZ200:::1850 RAM_GROUP45_A:::900
4MEM_DQS<5..4> 167 MHZ200:::1500
4RAM_DATA_B<47..32> 167 MHZ200:::2350 RAM_GROUP45_B:::950
4RAM_DATA_A<47..32> 167 MHZ200:::1850 RAM_GROUP45_A:::900
RAM_GROUP23_B:::850 200 167 MHZRAM_DQM_B<3..2> 4:::2200
:::1500 4MEM_DATA<47..32> 167 MHZ200
RAM_GROUP23_A:::850 200 167 MHZRAM_DQM_A<3..2> 4:::1700
200 167 MHZMEM_DQM<3..2> 4:::1650
RAM_GROUP23_B:::850 200 167 MHZRAM_DQS_B<3..2> 4:::2200
RAM_GROUP23_A:::850 200 167 MHZRAM_DQS_A<3..2> 4:::1700
200 167 MHZMEM_DQS<3..2> 4:::1650
RAM_GROUP23_B:::850 200 167 MHZRAM_DATA_B<31..16> 4:::2200
RAM_GROUP23_A:::850 200 167 MHZRAM_DATA_A<31..16> 4:::1700
200 167 MHZMEM_DATA<31..16> 4:::1650
RAM_GROUP1_B:::700:::2100 4 167 MHZ200RAM_DQM_B<1>
RAM_GROUP1_A:::7004 167 MHZ200RAM_DQM_A<1> :::1550
4 167 MHZ200MEM_DQM<1> :::1500
RAM_GROUP1_B:::700:::2100 4 167 MHZ200RAM_DQS_B<1>
RAM_GROUP1_A:::7004 167 MHZ200RAM_DQS_A<1> :::1550
4 167 MHZ200MEM_DQS<1> :::1500
RAM_GROUP1_B:::700:::2100 4 167 MHZ200RAM_DATA_B<15..8>
RAM_GROUP1_A:::7004 167 MHZ200RAM_DATA_A<15..8> :::1550
:::1500 4 167 MHZ200MEM_DATA<15..8>
RAM_GROUP0_B:::6004 167 MHZ200RAM_DQM_B<0> :::2150
RAM_GROUP0_A:::4504 167 MHZ200RAM_DQM_A<0> :::1550
4 167 MHZ200MEM_DQM<0> :::1600
RAM_GROUP0_B:::6004 167 MHZ200RAM_DQS_B<0> :::2150
RAM_GROUP0_A:::4504 167 MHZ200RAM_DQS_A<0> :::1550
4 167 MHZ200MEM_DQS<0> :::1600
RAM_GROUP0_B:::6004 167 MHZ200RAM_DATA_B<7..0> :::2150
RAM_GROUP0_A:::4504 167 MHZ200RAM_DATA_A<7..0> :::1550
4 167 MHZ200MEM_DATA<7..0> :::1600
4L3_CNTL<1..0> ::1200:1800 200
4L3_ADDR<17..0> ::1200:1800 200
4L3_DATA<63..32> ::750:1250 200
4L3_DATA<31..0> ::750:1250 200
::1500:3100 250CPU_WT_L 5
::1500:3400 5CPU_TT<0..4> 250
::1500:3500 250CPU_TSIZ<0..2> 5
5CPU_TS_L ::1500:2500 250 10 MIL SPACING
250CPU_TEA_L 5::1500:3000
250CPU_TBST_L 10 MIL SPACING5::1500:2600
5 250::1500:2500CPU_TA_L 10 MIL SPACING
5 10 MIL SPACINGCPU_QREQ_L 250::1500:2600
5 10 MIL SPACINGCPU_QACK_L ::1500:2500 250
5 10 MIL SPACINGCPU_HIT_L 250::1500:2800
250::1500:2500CPU_DRDY_L 10 MIL SPACING5
10 MIL SPACINGCPU_DRDY_L_UF :::500 250
250CPU_DTI<0..2> 5::1500:2950
5 10 MIL SPACINGCPU_DBG_L ::1500:2500 250
250 83 MHZCPU_DATA<32..63> 5::1100:2500
83 MHZ250CPU_DATA<0..31> 5::1100:2500
::1500:2700 5CPU_CI_L 250
::1500:2500 250CPU_BR_L 10 MIL SPACING5
5 10 MIL SPACINGCPU_BG_L ::1500:2500 250
5CPU_ARTRY_L ::1500:2500 250 10 MIL SPACING
::1500:3100 250CPU_ADDR<0..31> 83 MHZ5
::1500:2500 10 MIL SPACING250CPU_AACK_L 5 167 MHZSYSCLK_CPU_UF 10 MIL SPACING:::150
10 MIL SPACING2503 167 MHZ200SYSCLK_CPU ::2650:2750
2503 167 MHZ10 MIL SPACING:::150INT_CPUFB_OUT
::500:600 10 MIL SPACING 167 MHZINT_CPUFB_OUT_NORM 3 250
::700:850 10 MIL SPACING 167 MHZINT_CPUFB_OUT_SHORT 3 250
::500:600 10 MIL SPACING 167 MHZINT_CPUFB_IN_NORM 3 250
::1050:1150 10 MIL SPACING 167 MHZINT_CPUFB_LONG 3 250
::700:800 250 10 MIL SPACING2003 167 MHZINT_CPUFB_IN
167 MHZ250 10 MIL SPACING200SYSCLK_DDRCLK_A0_UF 3::475:575
167 MHZ250 10 MIL SPACING200SYSCLK_DDRCLK_A0_L_UF 3::475:575
167 MHZ10 MIL SPACING200250SYSCLK_DDRCLK_A1_UF 3::300:400
::430:530 167 MHZSYSCLK_DDRCLK_B0_UF 200 10 MIL SPACING2503
167 MHZ250 200 10 MIL SPACINGSYSCLK_DDRCLK_A1_L_UF 3::300:400
::400:510 250 200 10 MIL SPACING3SYSCLK_DDRCLK_B1_UF
::430:530 167 MHZ
167 MHZ
200 10 MIL SPACING2503SYSCLK_DDRCLK_B0_L_UF
::400:510 167 MHZ10 MIL SPACING2002503SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0:::25DDRCLK_A0 167 MHZSYSCLK_DDRCLK_A0 250 10 MIL SPACING2003::1850:1950
DDRCLK_A0 SYSCLK_DDRCLK_A0:::25 167 MHZSYSCLK_DDRCLK_A0_L 250 10 MIL SPACING2003::1850:1950
::1925:2025 DDRCLK_A1 SYSCLK_DDRCLK_A1:::25 167 MHZSYSCLK_DDRCLK_A1 10 MIL SPACING2002503
::1925:2025 DDRCLK_A1 SYSCLK_DDRCLK_A1:::25 167 MHZSYSCLK_DDRCLK_A1_L 250 200 10 MIL SPACING3
::2375:2475 DDRCLK_B0 SYSCLK_DDRCLK_B0:::25 167 MHZSYSCLK_DDRCLK_B0 200 10 MIL SPACING2503
::2375:2475 DDRCLK_B0 SYSCLK_DDRCLK_B0:::25 3 250 10 MIL SPACING200SYSCLK_DDRCLK_B0_L 167 MHZ
::2450:2550 DDRCLK_B1 SYSCLK_DDRCLK_B1:::25 167 MHZSYSCLK_DDRCLK_B1 250 200 10 MIL SPACING3
::2450:2550 250DDRCLK_B1 SYSCLK_DDRCLK_B1:::25 167 MHZSYSCLK_DDRCLK_B1_L 10 MIL SPACING2003
3::1250:1400 49.92 MHZ250INT_REF_CLK_OUT 200 10 MIL SPACING
:::150 200 66 MHzCLK66M_GPU_AGP_UF 10 MIL SPACING
4::1900:2000INT_REF_CLK_IN 10 MIL SPACING250 200 167 MHZ
::1400:1500 10 MIL SPACINGCLK66M_GPU_AGP 66 MHz2004 400
::1400:1500INT_AGP_FB_IN 66 MHz200 10 MIL SPACING5004
:::150 10 MIL SPACING200 66 MHzINT_AGP_FB_OUT
10 MIL SPACING200CLK33M_CBUS_UF 33 MHz:::250
6 500CLK33M_CBUS 200 10 MIL SPACING 33 MHz::5000:6000
:::250 10 MIL SPACINGCLK33M_AIRPORT_UF 200 33 MHz
33 MHz200 10 MIL SPACING:::250CLK33M_USB2_UF
6CLK33M_AIRPORT 500 200 10 MIL SPACING 33 MHz::11000:12000
6 33 MHz10 MIL SPACING200500CLK33M_USB2 ::4000:6000
200 33 MHzINT_PCI_FB_OUT 10 MIL SPACING:::300
3 500 200 10 MIL SPACING 33 MHzINT_PCI_FB_IN ::6500:7500
250 200L3_CLK<0> ::900:1100 3 250 MHZ10 MIL SPACING
250 200L3_ECHO_CLK<0..1> ::900:1100 3 250 MHZ10 MIL SPACING
250 200L3_ECHO_CLK<2..3> ::900:1100 3 250 MHZ10 MIL SPACING
250 200L3_CLK<1> ::900:1100 3 250 MHZ10 MIL SPACING
10 MIL SPACING200GPU_CLK27M_OUT :::400 3
10 MIL SPACINGGPU_CLK27M_UF :::250 3 200
10 MIL SPACING200:::200GPU_SSCLK_UF
:::250 10 MIL SPACING2003GPU_FBCLK0
500 10 MIL SPACING3GPU_SSCLK_IN 200:::920
:::250 10 MIL SPACING200GPU_FBCLK1 3
:::250 10 MIL SPACING200GPU_FBCLK0_L 3
39
39
39
25
25
28
28
27
27
27
27
9
11
11
12
12
12
12
12
12
12
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
11
12
12
12
11
12
12
11
12
12
12
11
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
8
8
8
8
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
12
12
12
12
12
12
12
12
19
18
24
26
8
8
8
8
15
15
26
26
27
27
15
15
15
21
15
21
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21
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www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 37 44E051-6469
TMDS
FOR FIREWIRE
ZDIFF = 99.8OHM
ZSINGLE = 51.57OHM
S = 10MIL (SEPERATION OF DIFF TRACES)
T = 0.7MIL (TRACE THICKNESS)
B = 12.2MIL (DIST BETW 2 GND PLANES)
ER = 4.3 (DIELECTRIC CONSTANT)
INTERNAL LAYER
W = 4MIL (TRACE WIDTH)
ZDIFF = 107.17OHM
ZSINGLE = 53.37OHM
W = 3.4MIL (TRACE WIDTH)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ER = 4.3 (DIELECTRIC CONSTANT)
AROUND MARVELL PHY
OF PHYSICAL CONSTRAINTS
SPACING DELETED BECAUSE
Differential Signals
SIGNAL CONSTRAINTS - PAGE 2
FIREWIRE MII
TOTAL UIDE+HD SKEW <500MIL
NEED TO MATCH DELAY TO 250
MAX_VIASNET_SPACING_TYPEMAX_EXPOSED_LENGTHMATCHED_DELAYDIFFERENTIAL_PAIRSIG_NAME
ETHERNET
GROUP
FIREWIRE
LOWERLVDS
UPPER
USB
SUPPLIES
THERMOSTAT
POWER
INTERNAL LAYER (USB1.1/USB 2.0)ER = 4.3 (DIELECTRIC CONSTANT)
T = 0.7MIL (TRACE THICKNESS)
B = 12.2MIL (DIST BETW 2 GND PLANES)
S = 5MIL (USB 1.1) (SEPERATION OF DIFF TRACES)
W = 4MIL(USB 1.1)/ 5MIL(USB 2.0) (TRACE WIDTH)
S = 10MIL (USB 2.0) (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.5OHM (USB 1.1)/ 46.2OHM (USB 2.0)ZDIFF = 89.3OHM (USB 1.1)/ 89.4OHM (USB 2.0)
ETHERNET MII
EIDEINTREPID
OPTICAL
ULTRA ATA-100
PCI Digital Signals (cont’d)
NET_SPACING_TYPE NO_TEST PULSE_PARAMSTUB_LENGTHMAX_VIAS MAX_EXPOSED_LENGTHDELAY_RULESIG_NAME
AGP BYTES 0-1
GROUP
AGP
AGP CONTROL
AGP SIDEBAND
AGP BYTES 2-3
DVO
CR-37
2505::600:1300GPU_DVOD<0..11>
2505::600:1300GPU_DVO_HSYNC
2505::600:1300GPU_DVO_VSYNC
250::1200:1900 6AGP_RBF_L 66 MHz
::1200:1900 2506AGP_REQ_L 66 MHz
66 MHzAGP_PAR 6 250::1200:1900
66 MHzAGP_STOP_L 6 250::1200:1900
66 MHzAGP_TRDY_L 6 250::1200:1900
66 MHzAGP_DEVSEL_L 6 250::1200:1900
6 66 MHzAGP_FRAME_L 250::1200:1900
66 MHzAGP_IRDY_L 6 250::1200:1900
4::1500:1700 350 8 MIL SPACING 66 MHzAGP_SB_STB_L 100
::1500:1700 350 8 MIL SPACING 66 MHzAGP_SB_STB 4 100
5 66 MHzAGP_SBA<7..0> 100::1100:1700
::1500:1600 250 8 MIL SPACING 133 MHZAGP_AD_STB_L<1> 4 100
5 66 MHzAGP_CBE<3..2> 100::1350:1680
::1500:1600 250 8 MIL SPACING 133 MHZAGP_AD_STB<1> 4 100
::1500:1600 250 8 MIL SPACINGAGP_AD_STB_L<0> 133 MHZ4 100
::1350:1650 5 66 MHzAGP_AD<31..16> 100
::1500:1600 250 8 MIL SPACINGAGP_AD_STB<0> 133 MHZ4 100
::1350:1650 5AGP_CBE<1..0> 66 MHz100
::1350:1650 5AGP_AD<15..0> 66 MHz100
33 MHzPCI_PAR MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_STOP_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_DEVSEL_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_TRDY_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_FRAME_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_IRDY_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_CBE<3..0> MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_AD<31..0> MIN_DAISY_CHAIN::8000:13500
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200 100 MHZHD_IOCHRDY 10 MIL SPACING5
HD_INTRQ 100 MHZ::6000:8000 5
::7500:9000 200HD_DMARQ 100 MHZ5
::6000:9000 200 100 MHZ5HD_CS0_L
::6000:9000 200 100 MHZ5HD_CS1_L
::7500:9000 200HD_DMACK_L 100 MHZ5
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200 100 MHZ10 MIL SPACING5HD_DIOR_L
200 100 MHZ::6000:8000 5HD_DIOW_L
::8000:9500 200 100 MHZHD_ADDR<2..0> 5
::5000:7000 200 100 MHZ5HD_RESET_L
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200HD_DATA<15..0> 100 MHZ5
200UIDE_INTRQ 100 MHZ:::400
200 100 MHZ:::600 10 MIL SPACINGUIDE_IOCHRDY
200UIDE_DMARQ 100 MHZ:::400
:::500 200 100 MHZUIDE_CS1_L
:::500 200 100 MHZUIDE_CS0_L
200 100 MHZ:::600 10 MIL SPACINGUIDE_DIOR_L
:::400 200UIDE_DMACK_L 100 MHZ
:::400 200UIDE_RST_L 100 MHZ
:::400 200 100 MHZUIDE_DIOW_L
:::650 200UIDE_ADDR<2..0> 100 MHZ
:::600 200UIDE_DATA<6..0> 100 MHZ
U44.V1:RP9.4::600 200UIDE_DATA<7> 100 MHZ
:::710 200UIDE_DATA<15..8> 100 MHZ
EIDE_OPTICAL_DMAACK_L ::5000:7000 33 MHZ
EIDE_OPTICAL_DMA_RQ ::5000:7000 33 MHZ
EIDE_OPTICAL_INT ::5500:7500 33 MHZ
EIDE_OPTICAL_RST_L ::5000:7000 33 MHZ
EIDE_OPTICAL_IOCHRDY ::5000:7000 33 MHZ
EIDE_OPTICAL_RD_L ::5000:7000 33 MHZ
EIDE_OPTICAL_WR_L ::5000:7000 33 MHZ
EIDE_OPTICAL_CS0_L ::5000:7000 33 MHZ
EIDE_OPTICAL_CS1_L ::5000:7000 33 MHZ
EIDE_OPTICAL_ADDR<2..0>::4500:6500 33 MHZ
EIDE_OPTICAL_DATA<15..0>::4500:6500 33 MHZ
EIDE_DMARQ :::500 33 MHZ
EIDE_DMACK_L :::500 33 MHZ
EIDE_INT :::500 33 MHZ
:::500EIDE_RST_L 33 MHZ
:::500EIDE_WR_L 33 MHZ
:::500EIDE_IOCHRDY 33 MHZ
:::500EIDE_RD_L 33 MHZ
:::850EIDE_CS0_L 33 MHZ
:::850EIDE_CS1_L 33 MHZ
:::900EIDE_ADDR<2..0> 33 MHZ
EIDE_DATA<15..0> 33 MHZ:::855
10 MIL SPACINGFW_TPI1 FW_TPI1:::4%FW_TPI1NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB1 FW_TPB1:::4%FW_TPB1N 500MIN_LINE_WIDTH=3.4
500 10 MIL SPACINGFW_TPA1 FW_TPA1:::4%FW_TPA1NMIN_LINE_WIDTH=3.4
10 MIL SPACINGCLKLVDS_U LVDS:::110CLKLVDS_UP 4500
10 MIL SPACINGNEC_USB_RSD2:::20NEC_USB_RSD2NEC_USB_RSDM2 MIN_LINE_WIDTH=5
10 MIL SPACINGRIGHT_USB RIGHT_USB:::20RIGHT_USB_DP MIN_LINE_WIDTH=5
10 MIL SPACINGRIGHT_USB RIGHT_USB:::20RIGHT_USB_DM MIN_LINE_WIDTH=5
10 MIL SPACINGLEFT_USB LEFT_USB:::20LEFT_USB_DP MIN_LINE_WIDTH=5
10 MIL SPACINGLEFT_USB LEFT_USB:::20LEFT_USB_DM MIN_LINE_WIDTH=5
5 MIL SPACINGMODEM_USB_D MODEM_USB:::200MODEM_USB_DP
5 MIL SPACINGMODEM_USB_D MODEM_USB:::200MODEM_USB_DM
10 MIL SPACINGNEC_USB_RSD2:::20NEC_USB_RSD2NEC_USB_RSDP2 MIN_LINE_WIDTH=5
5 MIL SPACINGBT_USB_D:::200BT_USB_DBT_USB_DM
5 MIL SPACINGBT_USB_D:::200BT_USB_DBT_USB_DP
10 MIL SPACINGNEC_USB_RSD1:::20NEC_USB_RSD1NEC_USB_RSDM1 MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_RSD1:::20NEC_USB_RSD1NEC_USB_RSDP1 MIN_LINE_WIDTH=5
5 MIL SPACINGUSB_DF USB_DF:::200USB_DFP
5 MIL SPACINGUSB_DF USB_DF:::200USB_DFM
10 MIL SPACINGNEC_USB_DB NEC_USB_DB:::20NEC_USB_DBP MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_DB NEC_USB_DB:::20NEC_USB_DBM MIN_LINE_WIDTH=5
THERM2_A_DP THERM2_ALT:::100THERM2_ALT
THERM2_A_DM THERM2_ALT:::100THERM2_ALT
THERM1_A_DP THERM1_ALT:::100THERM1_ALT
THERM1_A_DM THERM1_ALT:::100THERM1_ALT
THERM2_M_DP THERM2_MAIN:::100THERM2_MAIN
THERM2_M_DM THERM2_MAIN:::100THERM2_MAIN
THERM1_M_DP THERM1_MAIN:::100THERM1_MAIN
THERM1_M_DM THERM1_MAIN:::100THERM1_MAIN
THERM2_DP THERM2:::100THERM2
THERM2_DM THERM2:::100THERM2
THERM1_DP THERM1:::100THERM1
THERM1_DM THERM1:::100THERM1
5V_SNSP 5V_SNS:::1005V_SNS
5V_SNSM 5V_SNS:::1005V_SNS
3V_SNSP 3V_SNS:::1003V_SNS
3V_SNSM 3V_SNS:::1003V_SNS
1772_CSIP 1772_CSI:::1001772_CSI
1772_CSIN 1772_CSI:::1001772_CSI
1772_CSSP 1772_CSS:::1001772_CSS
1772_CSSN 1772_CSS:::1001772_CSS
5 MIL SPACINGUSB_DE USB_DE:::200USB_DEP
5 MIL SPACINGUSB_DE USB_DE:::200USB_DEM
10 MIL SPACINGNEC_USB_DA NEC_USB_DA:::20NEC_USB_DAP MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_DA NEC_USB_DA:::20NEC_USB_DAM MIN_LINE_WIDTH=5
10 MIL SPACINGLVDS_U2 LVDS:::110LVDS_U2P
10 MIL SPACINGLVDS_U2 LVDS:::110LVDS_U2N
10 MIL SPACINGLVDS_U1 LVDS:::110LVDS_U1P
10 MIL SPACINGLVDS_U1 LVDS:::110LVDS_U1N
10 MIL SPACINGLVDS_U0 LVDS:::110LVDS_U0P
10 MIL SPACINGLVDS_U0 LVDS:::110LVDS_U0N
10 MIL SPACINGLVDS_L2 LVDS:::110LVDS_L2P
10 MIL SPACINGCLKLVDS_U LVDS:::110CLKLVDS_UN 4500
10 MIL SPACINGLVDS_L2 LVDS:::110LVDS_L2N
10 MIL SPACINGLVDS_L1 LVDS:::110LVDS_L1P
10 MIL SPACINGLVDS_L1 LVDS:::110LVDS_L1N
10 MIL SPACINGLVDS_L0 LVDS:::110LVDS_L0P
10 MIL SPACINGLVDS_L0 LVDS:::110LVDS_L0N
10 MIL SPACINGCLKLVDS_L LVDS:::110CLKLVDS_LP 4500
10 MIL SPACINGCLKLVDS_L LVDS:::110CLKLVDS_LN 4500
10 MIL SPACINGFW_TPO1 FW_TPO1:::4%FW_TPO1PMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPO1 FW_TPO1:::4%FW_TPO1NMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPI1 FW_TPI1:::4%FW_TPI1PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB1 FW_TPB1:::4%FW_TPB1P 500MIN_LINE_WIDTH=3.4
500 10 MIL SPACINGFW_TPA1 FW_TPA1:::4%FW_TPA1PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPO0 FW_TPO0:::4%FW_TPO0PMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPO0 FW_TPO0:::4%FW_TPO0NMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPI0 FW_TPI0:::4%FW_TPI0PMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPI0 FW_TPI0:::4%FW_TPI0NMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPB0 FW_TPB0:::4%FW_TPB0PMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPB0 FW_TPB0:::4%FW_TPB0NMIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPA0 FW_TPA0:::4%FW_TPA0PMIN_LINE_WIDTH=3.4
10 MIL SPACINGRJ45_DP3 RJ45_DP3:T1.22:J18.7:100RJ45_DP<3>
10 MIL SPACINGRJ45_DP3 RJ45_DP3:T1.23:J18.8:100RJ45_DN<3>
10 MIL SPACINGRJ45_DP2 RJ45_DP2:T1.19:J18.4:100RJ45_DP<2>
10 MIL SPACINGRJ45_DP2 RJ45_DP2:T1.20:J18.5:100RJ45_DN<2>
10 MIL SPACINGRJ45_DP1 RJ45_DP1:T1.16:J18.3:100RJ45_DP<1>
10 MIL SPACINGRJ45_DP1 RJ45_DP1:T1.17:J18.6:100RJ45_DN<1>
10 MIL SPACINGRJ45_DP0 RJ45_DP0:T1.13:J18.1:100RJ45_DP<0>
10 MIL SPACINGRJ45_DP0 RJ45_DP0:T1.14:J18.2:100RJ45_DN<0>
ENET_MDI3 ENET_MDI3:U49.42:T1.3:100MDI_P<3>
ENET_MDI3 ENET_MDI3:U49.43:T1.2:100MDI_M<3>
ENET_MDI2 ENET_MDI2:U49.39:T1.6:100MDI_P<2>
ENET_MDI2 ENET_MDI2:U49.41:T1.5:100MDI_M<2>
ENET_MDI1 ENET_MDI1:U49.33:T1.9:100MDI_P<1>
ENET_MDI1 ENET_MDI1:U49.34:T1.8:100MDI_M<1>
ENET_MDI0 ENET_MDI0:U49.31:T1.11:100MDI_M<0>
ENET_MDI0 ENET_MDI0:U49.29:T1.12:100MDI_P<0>
FW_PINT ::8500:9500
FW_PHY_LREQ ::8500:9500
FW_LINK_LREQ :::300
:::300FW_PHY_CNTL<1..0>
FW_LINK_CNTL<1..0> ::9000:10000
5FW_PHY_DATA<7..0> ::4700:5500
5::2700:3500FW_LINK_DATA<7..0>
ENET_CRS ::7500:9000
ENET_COL ::7500:9000
ENET_MDC ::8000:9000
ENET_MDIO ::8000:9000
:::400ENET_LINK_TX_EN
:::400ENET_LINK_TX_ER
ENET_PHY_TX_EN 5::8000:9200
ENET_PHY_TX_ER 5::8000:9200
:::600ENET_LINK_TXD<7..0>
ENET_PHY_TXD<7..0> 5::8300:9300
ENET_RX_ER ::8000:9000
ENET_RX_DV ::8000:9000
ENET_LINK_RXD<7..0> 5::8000:9000
FW_TPA0 FW_TPA0:::4%FW_TPA0N 10 MIL SPACINGMIN_LINE_WIDTH=3.4
TMDS:::50 10 MIL SPACINGTMDS_D2TMDS_DP<2>
TMDS:::50 10 MIL SPACINGTMDS_D1TMDS_DP<1>
TMDS:::50 10 MIL SPACINGTMDS_D2TMDS_DN<2>
TMDS:::50 10 MIL SPACINGTMDS_D1TMDS_DN<1>
TMDS:::50 10 MIL SPACINGTMDS_D0TMDS_DN<0>
TMDS:::50 10 MIL SPACINGTMDS_D0TMDS_DP<0>
TMDS:::50 10 MIL SPACINGCLKTMDSTMDS_CLKN 4500
TMDS:::50 10 MIL SPACINGCLKTMDSTMDS_CLKP 4500
TMDS_CONN:::50 10 MIL SPACINGCLKCONN_TMDSTMDS_CONN_CLKP 4500
TMDS_CONN:::50 10 MIL SPACINGCLKCONN_TMDSTMDS_CONN_CLKN 4500
66 MHzAGP_GNT_L 6 250::1200:1900
39
39
39
39
39
39
39
39
26
26
26
26
26
26
26
26
24
39
39
39
39
39
39
24
24
24
24
24
24
24
18
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
22
22
22
22
22
22
22
22
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
18
18
18
18
18
18
18
13
24
24
24
24
24
24
24
24
24
24
24
24
24
39
39
39
39
39
39
39
39
39
39
39
24
24
24
24
24
24
24
24
24
24
24
39
29
29
22
32
32
26
26
25
25
24
24
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
39
39
39
29
29
29
29
29
39
39
39
39
39
39
39
39
28
28
28
28
27
27
27
27
27
27
27
27
27
27
29
21
21
21
21
21
21
21
21
39
39
19
21
21
21
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
10
24
14
14
24
24
24
24
24
24
24
24
14
14
14
14
14
14
14
14
14
14
14
14
14
24
24
24
24
24
24
24
24
24
24
24
14
14
14
14
14
14
14
14
14
14
14
29
28
28
20
26
26
26
24
24
15
15
26
15
15
26
26
15
15
26
26
25
25
25
25
25
25
25
25
25
25
25
25
33
33
33
33
31
31
31
31
15
15
26
26
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
29
29
29
28
28
28
28
28
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
14
14
14
28
14
28
14
14
14
14
14
14
14
14
14
14
14
14
14
14
28
20
20
20
20
20
20
20
20
22
22
13
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 38 44E051-6469
SOUND
KB LED
FAN GND
VIDEO
HALL EFFECT
TRACKPAD
HDMISC
FW
88E1111
IMAGESILICON
I/O AREA
I/O AREA
REFERENCE
INTREPIDPLLS
SIGNAL CONSTRAINTS - PAGE 3
LTC1778
2.5V SWITCHER
SIG_NAME VOLTAGE MIN_LINE_WIDTH MIN_NECK_WIDTH
LTC1625
GROUP
14V SWITCHER
SIG_NAME VOLTAGE MIN_LINE_WIDTH MIN_NECK_WIDTH
SIG_NAMEGROUP VOLTAGE
POWER NET CONSTRAINTSMIN_LINE_WIDTH MIN_NECK_WIDTH
GROUP
CPU
L3 CACHE
DDR RAM
3V SWITCHER
5V SWITCHERLTC3707
MAX1715
INVERTER
TRACKPAD
I/O AREA
LVDS
CHARGERBATTERY
ADAPTER
PMU
MAIN/SLEEP
NVIDIANV17MAP
CARDBUS
MIN_NECK_WIDTH REDUCED FOR TESTPOINTS
USB 2.0
INTREPIDSSCG
1.5V SWITCHER
INT PLLSLTC1962
LTC3411
MAX1717
CONTROL
CHGND1
CHGND3
CHGND4
CHGND5
CHGND6
CHGND2
CR-38
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30MAX1715_GND
VOLTAGE=5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10MAX1715_VCC
MIN_LINE_WIDTH=8MAX1715_SKIP
VOLTAGE=2.0V MIN_LINE_WIDTH=8MAX1715_REF
MIN_LINE_WIDTH=8MAX1715_TON
2_5V_ILIM MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=81_5V_ILIM
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201_5V_DL VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201_5V_DH VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V1_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V1_5V_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=2.5V2_5V_DL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=2.5V2_5V_DH
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V2_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V2_5V_BST
VOLTAGE=0VVCORE_GNDDIV MIN_LINE_WIDTH=8
VOLTAGE=1.4VVCORE_SNS MIN_LINE_WIDTH=8
VOLTAGE=0VVCORE_GNDSNS MIN_LINE_WIDTH=8
VOLTAGE=0VVCORE_GND MIN_LINE_WIDTH=30
VCORE_VGATE MIN_LINE_WIDTH=8
VCORE_TIME MIN_LINE_WIDTH=8
VOLTAGE=1.4VVCORE_FB MIN_LINE_WIDTH=8
VCORE_CC MIN_LINE_WIDTH=8
VOLTAGE=5VVCORE_TON MIN_LINE_WIDTH=8
VCORE_ILIM MIN_LINE_WIDTH=8
VCORE_REF MIN_LINE_WIDTH=8
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VCORE_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VCORE_BOOST VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VCORE_DL
VCORE_DH MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=200VCORE_LX VOLTAGE=1.4V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VCORE_VCC VOLTAGE=5V
1778_VRNG MIN_LINE_WIDTH=8
1778_FCB MIN_LINE_WIDTH=8
1778_VFB MIN_LINE_WIDTH=8
1_5V_2_5V_OK MIN_LINE_WIDTH=8
1778_ITH_RC MIN_LINE_WIDTH=8
1778_ITH MIN_LINE_WIDTH=8
1778_ION MIN_LINE_WIDTH=8
LTC3411_SHDN MIN_LINE_WIDTH=8
LTC3411_SYNC MIN_LINE_WIDTH=8
LTC3411_ITH MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=8LTC3411_ITH_RC
1_8V_VFB MIN_LINE_WIDTH=8
3707_SGND MIN_LINE_WIDTH=10VOLTAGE=0V
1V20_REF VOLTAGE=1.2V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=101625_SGND VOLTAGE=0V
VOLTAGE=5V1625_INTVCC MIN_LINE_WIDTH=10
VOLTAGE=5V1625_EXTVCC MIN_LINE_WIDTH=10
VOLTAGE=1.5V1_5V_LX MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=100VOLTAGE=12.8V+FW_SW
+3V_FW_ESD VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=100VOLTAGE=12.8V+FW_FUSE
LM2594_IN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_FW_ESD_ILIM
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_INTREPID_USB
MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_INTREPID MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10VOLTAGE=1.5V MIN_LINE_WIDTH=15+1_5V_INTREPID_PLL
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_PWR_OR
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10VOLTAGE=2.8V+2_8V_IFP_PLLVDD
VOLTAGE=0.75V MIN_LINE_WIDTH=10GPU_AGP_VREF
GPU_FB_VREF MIN_LINE_WIDTH=10VOLTAGE=1.25V
VOLTAGE=3.3V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+3V_CG_PLL_MAIN
VOLTAGE=2.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+2_5V_CG_MAIN
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25NEC_AVDD
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_NEC_VDD
VOLTAGE=1.95V+1_95V_FW_PLL500VDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_PLL400VDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_PLLVDD MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_DVDD_PORT1 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_DVDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_DVDD_TX0 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_DVDD_RX0 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_FW_AVDD MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10
+3V_FW_AVDD_PORT0 MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW_AVDD_PORT2
+3V_FW_UF MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW
+3V_FW_AVDD_PORT1 MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_VP1
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_VP0
+FW_PWR_PORTA MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12
MIN_NECK_WIDTH=10+3V_GPU_SS MIN_LINE_WIDTH=10VOLTAGE=3.3V
VOLTAGE=3.3V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10+3V_GPU_PLLVDD
MIN_NECK_WIDTH=10+3V_GPU_AVDD0 MIN_LINE_WIDTH=15VOLTAGE=3.3V
MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_AGP MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10+3V_DAC1VDD MIN_LINE_WIDTH=15VOLTAGE=3.3V
+3V_DAC2VDD MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=3.3V
MIN_NECK_WIDTH=10+3V_GPU_AVDD1 MIN_LINE_WIDTH=15VOLTAGE=3.3V
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=15VOLTAGE=3.3V+3V_GPU_DVO
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+VPP_CBUS_SW
GPU_VCORE MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.2V
+2_5V_GPU_FB VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_GPU MIN_NECK_WIDTH=10
+VCC_CBUS_SW MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V
+1_5V_SLEEP_VIN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V
+1_5V_LDO VOLTAGE=1.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.5V+1_5V_MAIN MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_5V_SLEEP MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V
VOLTAGE=1.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=6+1_8V_MAIN
VOLTAGE=1.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+1_8V_SLEEP
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+2_5V_SLEEP
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+2_5V_MAIN
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_PMU
VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_SLEEP MIN_NECK_WIDTH=6
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_MAIN
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_SLEEP
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_MAIN
VOLTAGE=12.8V+PBUS MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+BATT
VOLTAGE=24V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+24V_PBUS
MIN_LINE_WIDTH=10+4_85V_ESR VOLTAGE=4.85V
VOLTAGE=3.3V+3V_PMU_ESR MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10+4_6V_BU VOLTAGE=4.6V
MIN_LINE_WIDTH=10+ADAPTER_ILIM VOLTAGE=24V
MIN_LINE_WIDTH=10+ADAPTER_OR_BATT VOLTAGE=24V
MIN_LINE_WIDTH=10+4_85V_RAW VOLTAGE=4.85V
1772_DLOV VOLTAGE=5.4V MIN_LINE_WIDTH=10
1772_GND VOLTAGE=0V MIN_LINE_WIDTH=10
1772_LDO VOLTAGE=5.4V MIN_LINE_WIDTH=10
+BATT_VSNS VOLTAGE=12.6V MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
+BATT_RSNS VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_14V_FUSE VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_24V_FUSE VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
1772_LX VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10BATT_NEG
1772_DCIN VOLTAGE=24V MIN_LINE_WIDTH=10
VOLTAGE=16.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+BATT_POS
MIN_NECK_WIDTH=10+ADAPTER MIN_LINE_WIDTH=50VOLTAGE=24V
MIN_NECK_WIDTH=10+ADAPTER_SW MIN_LINE_WIDTH=50VOLTAGE=24V
MIN_NECK_WIDTH=10+ADAPTER_SENSE MIN_LINE_WIDTH=50VOLTAGE=24V
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND3
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND4
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND2
VOLTAGE=5V MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=103707_INTVCC
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=103V_RSNS
VOLTAGE=3.3V MIN_LINE_WIDTH=253V_SW MIN_NECK_WIDTH=10
VOLTAGE=5V MIN_LINE_WIDTH=255V_RSNS MIN_NECK_WIDTH=10
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=105V_SW
MIN_LINE_WIDTH=25VOLTAGE=1.4VCPU_AVDD MIN_NECK_WIDTH=10
L3_VREF VOLTAGE=0.75V MIN_LINE_WIDTH=10
L3_CLK_REF VOLTAGE=0.75V MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=1.5VL3_OVDD
MIN_NECK_WIDTH=10CPU_VCORE_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=25
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=6 GND
2_5V_LX VOLTAGE=2.5V MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
VOLTAGE=1.5V1_5V_FB MIN_LINE_WIDTH=8
VOLTAGE=14V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_VIN
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_VCC
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=301778_GND
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=151778_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_TG
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=151778_BST_RC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_BG
VOLTAGE=1.2V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50GPU_VCORE_SW
VOLTAGE=24V1625_VIN MIN_LINE_WIDTH=10
VOLTAGE=12.8V1625_VSW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.8VMAXBUS_SLEEP
+1_5V_INTREPID_PLL1 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL2 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL3 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL4 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=5
MIN_NECK_WIDTH=5+1_5V_INTREPID_PLL5 VOLTAGE=1.5V MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6+1_5V_INTREPID_PLL6 MIN_LINE_WIDTH=15VOLTAGE=1.5V
+1_5V_INTREPID_PLL8 MIN_LINE_WIDTH=15VOLTAGE=1.5V MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6VOLTAGE=1.5V MIN_LINE_WIDTH=15+1_5V_INTREPID_PLL7
VOLTAGE=1.25V MIN_LINE_WIDTH=10INT_AGP_VREF
VOLTAGE=1.25V MIN_LINE_WIDTH=10INT_MEM_VREF
MIN_LINE_WIDTH=10VOLTAGE=1.25VDDR_VREF
MIN_LINE_WIDTH=10VOLTAGE=0VINT_MEM_REF_H
MIN_LINE_WIDTH=8VOLTAGE=0VUIDE_REF
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20LTC3411_VCC
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30LTC3411_GND
VOLTAGE=1.8V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=301_8V_SW
LTC1962_INT_VIN MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
LTC1962_L3_VIN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
LTC1962_L3_VOUT MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_1V5_VIN
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_1V5_VOUT
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND1
VOLTAGE=3.3V MIN_LINE_WIDTH=10+3V_PMU_AVCC
FW_TPO0R MIN_NECK_WIDTH=10VOLTAGE=0V MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=100VOLTAGE=0V MIN_NECK_WIDTH=12FW_VGND0
MIN_LINE_WIDTH=100VOLTAGE=0V MIN_NECK_WIDTH=12FW_VGND1
CHGND5VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12
ENET_CTAP_CHGND MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND6
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_PLLVCC
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_VCC
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_AVCC
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_MARVELL_AVDD
+1_0V_MARVELL VOLTAGE=1.0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8
MIN_LINE_WIDTH=25VOLTAGE=1.0VLTC3405_SW MIN_NECK_WIDTH=8
MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_MARVELL MIN_NECK_WIDTH=10
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_HD_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25+HD_LOGIC_SLEEP VOLTAGE=3.3V
VOLTAGE=5V MIN_LINE_WIDTH=10+5V_TPAD_SLEEP
+3V_HALL_EFFECT MIN_LINE_WIDTH=10VOLTAGE=3.3V
+12_8V_INV VOLTAGE=12.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+5V_INV_UF_SW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_INV_SW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_DDC_SLEEP MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_DDC_SLEEP_UF MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V
+3V_LCD MIN_LINE_WIDTH=12 MIN_NECK_WIDTH=10VOLTAGE=3.3V
MIN_NECK_WIDTH=10+3V_LCD_SW MIN_LINE_WIDTH=25VOLTAGE=3.3V
MIN_LINE_WIDTH=25VOLTAGE=0VGPU_TV_GND1
MIN_LINE_WIDTH=25VOLTAGE=0VGPU_TV_GND2
TV_GND2 MIN_LINE_WIDTH=25VOLTAGE=0V
TV_GND1 MIN_LINE_WIDTH=25VOLTAGE=0V
23KBD_LED1_OUT MIN_LINE_WIDTH=10VOLTAGE=0V
23KBD_LED2_OUT MIN_LINE_WIDTH=10VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25FAN1_GND 23VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25FAN2_GND 23VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V+5V_SOUND_SLEEP
SND_AGND VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=15
34 23
20
21
17
17
19
20
16
16
15
17
19
35
39
9
34
39
35
32
11
13
29
29
16
39
15
19
33
32
39
39
32
8
34
7
39
33
39
39
39
39
39
39
39
39
39
39
39
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
34
34
34
34
15
34
34
34
34
34
34
34
34
34
34
34
34
20
20
20
20
20
20
20
35
35
35
35
35
33
31
32
32
32
35
29
29
29
28
29
15
10
9
28
20
19
19
15
15
26
26
28
28
28
28
28
28
28
28
28
28
28
28
28
29
29
29
21
21
20
13
21
21
20
21
18
20
19
13
18
35
16
39
16
39
39
39
32
32
32
32
32
30
31
31
31
31
31
31
31
31
31
31
31
31
31
31
33
33
33
33
33
5
8
8
6
5
35
35
20
20
20
20
20
20
20
20
32
32
5
15
15
15
15
13
13
15
9
13
10
12
10
14
35
35
35
15
6
6
16
16
30
29
29
29
27
21
21
21
27
27
27
27
24
24
23
23
22
22
22
22
22
22
22
22
22
22
22
23
23
25
25
25
25
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DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 39 44E051-6469
FUNCTIONAL TEST POINTS
NO LONGER NEED BY TEST GROUP
CR-39
ROM_OE_L
FUNC_TEST=YES
CLK33M_AIRPORT
FUNC_TEST=YES
AIRPORT_IDSEL
FUNC_TEST=YES
ROM_ONBOARD_CS_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
ROM_RW_L
FUNC_TEST=YES
RF_DISABLE_L_SPN
FUNC_TEST=YES
MAIN_RESET_LFUNC_TEST=YES
+5V_INV_SW
FUNC_TEST=YES
LEFT_USB_DMFUNC_TEST=YES
RIGHT_USB_DM
FUNC_TEST=YES
LEFT_USB_DPFUNC_TEST=YES
NEC_LEFT_USB_PWRENFUNC_TEST=YES
RIGHT_USB_DP
FUNC_TEST=YES
NEC_RIGHT_USB_PWREN
FUNC_TEST=YES
NEC_LEFT_USB_OVERCURRENT
FUNC_TEST=YES
NEC_RIGHT_USB_OVERCURRENT
FUNC_TEST=YES
DCDC_ENFUNC_TEST=YES
BBANG_HRESET_L
FUNC_TEST=YES
LT1962_L3_ADJ
FUNC_TEST=YES
+PBUS
FUNC_TEST=TRUE
+24V_PBUS
FUNC_TEST=TRUE
CPU_VCORE_SLEEPFUNC_TEST=YES
GPU_VCOREFUNC_TEST=YES
+1_8V_MAIN
FUNC_TEST=TRUE
VCORE_FB
FUNC_TEST=YES
+3V_PMUFUNC_TEST=TRUE
+5V_DDC_SLEEP
FUNC_TEST=YES
+12_8V_INV
FUNC_TEST=YES
PWR_BUTTON_LFUNC_TEST=YES
PMU_KB_RESET_L
FUNC_TEST=YES
COMM_RXD
FUNC_TEST=YES
COMM_RTS_LFUNC_TEST=YES
COMM_GPIO_L
FUNC_TEST=YES
COMM_DTR_L
FUNC_TEST=YES
COMM_TXD_L
FUNC_TEST=YES
COMM_TRXC
FUNC_TEST=YES
KBD_LED2_OUT
FUNC_TEST=YES
KBD_LED1_OUT
FUNC_TEST=YES
SUTRO_ALS_OUT
FUNC_TEST=YES
ADAPTER_DET
FUNC_TEST=YES
SUTRO_ALS_GAIN_SW
FUNC_TEST=YES
CHARGE_LED_L
FUNC_TEST=YES
FW_TPI1N
FUNC_TEST=YES
FW_TPI1P
FUNC_TEST=YES
FW_TPO1P
FUNC_TEST=YES
FW_TPO1N
FUNC_TEST=YES
FW_TPO0R
FUNC_TEST=YES
RJ45_DN<3>
FUNC_TEST=TRUE
RJ45_DP<3>
FUNC_TEST=TRUE
RJ45_DN<1>
FUNC_TEST=TRUE
RJ45_DP<2>
FUNC_TEST=TRUE
RJ45_DN<2>
FUNC_TEST=TRUE
RJ45_DP<1>
FUNC_TEST=TRUE
RJ45_DN<0>
FUNC_TEST=TRUE
RJ45_DP<0>
FUNC_TEST=TRUE
FAN1_GND
FUNC_TEST=YES
FAN1_TACH
FUNC_TEST=YES
FAN2_TACH
FUNC_TEST=YES
FAN2_GND
FUNC_TEST=YES
PMU_BATT_DET_L
FUNC_TEST=YES
BATT_NEG
FUNC_TEST=YES
BATT_DATA
FUNC_TEST=YES
KBD_Y<7>
FUNC_TEST=TRUE
KBD_NUMLOCK_LED
FUNC_TEST=YES
BATT_CLK
FUNC_TEST=YES
+BATT_POS
FUNC_TEST=YES
KBD_Y<4>
FUNC_TEST=TRUE
KBD_Y<5>
FUNC_TEST=TRUE
KBD_Y<6>
FUNC_TEST=TRUE
KBD_Y<1>
FUNC_TEST=TRUE
KBD_Y<3>
FUNC_TEST=TRUE
KBD_Y<2>
FUNC_TEST=TRUE
KBD_Y<0>
FUNC_TEST=TRUE
KBD_X<9>
FUNC_TEST=TRUE
KBD_X<8>
FUNC_TEST=TRUE
KBD_X<6>
FUNC_TEST=TRUE
KBD_X<7>
FUNC_TEST=TRUE
KBD_X<5>FUNC_TEST=TRUE
KBD_X<4>
FUNC_TEST=TRUE
KBD_X<3>
FUNC_TEST=TRUE
KBD_X<2>FUNC_TEST=TRUE
KBD_X<1>
FUNC_TEST=TRUE
KBD_SHIFT_L
FUNC_TEST=YES
KBD_X<0>
FUNC_TEST=TRUE
KBD_OPTION_L
FUNC_TEST=YES
KBD_COMMAND_L
FUNC_TEST=YES
KBD_CONTROL_L
FUNC_TEST=YES
KBD_FUNCTION_L
FUNC_TEST=YES
KBD_CAPSLOCK_LED
FUNC_TEST=YES
+3V_HALL_EFFECT
FUNC_TEST=YES
+5V_TPAD_SLEEP
FUNC_TEST=YES
KBD_ID
FUNC_TEST=YES
COMM_RING_DET_L
FUNC_TEST=YES
COMM_SHUTDOWN
FUNC_TEST=YES
COMM_RESET_L
FUNC_TEST=YES
LID_CLOSED_L
FUNC_TEST=YES
TPAD_F_RXD
FUNC_TEST=YES
EIDE_OPTICAL_INT
FUNC_TEST=YES
TPAD_F_TXD
FUNC_TEST=YES
EIDE_OPTICAL_IOCHRDY
FUNC_TEST=YES
EIDE_OPTICAL_WR_L
FUNC_TEST=YES
EIDE_OPTICAL_RST_L
FUNC_TEST=YES
EIDE_OPTICAL_CS1_L
FUNC_TEST=YES
EIDE_OPTICAL_CS0_L
FUNC_TEST=YES
EIDE_OPTICAL_ADDR<2>
FUNC_TEST=TRUE
EIDE_OPTICAL_ADDR<1>
FUNC_TEST=TRUE
EIDE_OPTICAL_ADDR<0>
FUNC_TEST=TRUE
36 24 EIDE_OPTICAL_DMAACK_L
FUNC_TEST=YES
36 24 EIDE_OPTICAL_RD_L
FUNC_TEST=YES
36 24 EIDE_OPTICAL_DMA_RQ
FUNC_TEST=YES
EIDE_OPTICAL_DATA<15>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<14>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<13>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<12>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<11>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<10>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<9>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<8>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<7>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<6>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<5>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<4>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<3>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<2>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<1>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<0>
FUNC_TEST=TRUE
AIRPORT_PCI_INT_L
FUNC_TEST=YES
AIRPORT_PCI_GNT_L
FUNC_TEST=YES
AIRPORT_PCI_REQ_L
FUNC_TEST=YES
PCI_CBE<3>
FUNC_TEST=TRUE
PCI_CBE<2>
FUNC_TEST=TRUE
PCI_CBE<1>
FUNC_TEST=TRUE
PCI_CBE<0>
FUNC_TEST=TRUE
PCI_PAR
FUNC_TEST=YES
PCI_STOP_L
FUNC_TEST=YES
PCI_DEVSEL_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
PCI_AD<31>
FUNC_TEST=TRUE
PCI_AD<30>
FUNC_TEST=TRUE
PCI_AD<29>
FUNC_TEST=TRUE
PCI_AD<28>
FUNC_TEST=TRUE
PCI_AD<27>
FUNC_TEST=TRUE
PCI_AD<26>
FUNC_TEST=TRUE
PCI_AD<25>
FUNC_TEST=TRUE
PCI_AD<24>
FUNC_TEST=TRUE
PCI_AD<23>
FUNC_TEST=TRUE
PCI_AD<22>
FUNC_TEST=TRUE
PCI_AD<21>
FUNC_TEST=TRUE
PCI_AD<20>
FUNC_TEST=TRUE
PCI_AD<19>
FUNC_TEST=TRUE
PCI_AD<18>
FUNC_TEST=TRUE
PCI_AD<17>
FUNC_TEST=TRUE
PCI_AD<16>
FUNC_TEST=TRUE
PCI_AD<15>
FUNC_TEST=TRUE
PCI_AD<14>
FUNC_TEST=TRUE
PCI_AD<13>
FUNC_TEST=TRUE
PCI_AD<12>
FUNC_TEST=TRUE
PCI_AD<11>
FUNC_TEST=TRUE
PCI_AD<10>
FUNC_TEST=TRUE
PCI_AD<9>
FUNC_TEST=TRUE
PCI_AD<8>
FUNC_TEST=TRUE
PCI_AD<7>
FUNC_TEST=TRUE
PCI_AD<6>
FUNC_TEST=TRUE
PCI_AD<5>
FUNC_TEST=TRUE
PCI_AD<4>
FUNC_TEST=TRUE
PCI_AD<3>
FUNC_TEST=TRUE
PCI_AD<1>
FUNC_TEST=TRUE
PCI_AD<2>
FUNC_TEST=TRUE
MODEM_USB_DP
FUNC_TEST=YES
PCI_AD<0>
FUNC_TEST=TRUE
MODEM_USB_DM
FUNC_TEST=YES
BT_USB_DP
FUNC_TEST=YES
BT_USB_DM
FUNC_TEST=YES
USB_D2M
FUNC_TEST=YES
USB_D2P
FUNC_TEST=YES
USB_D1M
FUNC_TEST=YES
USB_D1P
FUNC_TEST=YES
INT_I2C_CLK2
FUNC_TEST=YES
FUNC_TEST=YES
SND_LIN_SENSE_L
INT_I2C_DATA2
FUNC_TEST=YES
SND_HW_RESET_L
FUNC_TEST=YES
FUNC_TEST=YES
SND_HP_SENSE_L
SND_SCLK
FUNC_TEST=YES
INT_AUDIO_TO_SND
FUNC_TEST=YES
SND_AMP_MUTE_L
FUNC_TEST=YES
SND_CLKOUT
FUNC_TEST=YES
SND_HP_MUTE_L
FUNC_TEST=YES
SND_SYNC
FUNC_TEST=YES
SND_TO_AUDIO
FUNC_TEST=YES
TV_COMP
FUNC_TEST=YES
TV_Y
FUNC_TEST=YES
TV_C
FUNC_TEST=YES
TV_GND2
FUNC_TEST=YES
LVDS_DDC_DATA
FUNC_TEST=YES
BRIGHT_PWM
FUNC_TEST=YES
TV_GND1
FUNC_TEST=YES
LVDS_DDC_CLK
FUNC_TEST=YES
CLKLVDS_UN
FUNC_TEST=YES
CLKLVDS_UP
FUNC_TEST=YES
LVDS_U2P
FUNC_TEST=YES
LVDS_U1N
FUNC_TEST=YES
LVDS_U1P
FUNC_TEST=YES
LVDS_U2N
FUNC_TEST=YES
CLKLVDS_LP
FUNC_TEST=YES
LVDS_U0N
FUNC_TEST=YES
LVDS_U0P
FUNC_TEST=YES
CLKLVDS_LN
FUNC_TEST=YES
LVDS_L1P
FUNC_TEST=YES
LVDS_L2P
FUNC_TEST=YES
LVDS_L2N
FUNC_TEST=YES
LVDS_L0N
FUNC_TEST=YES
LVDS_L0P
FUNC_TEST=YES
LVDS_L1N
FUNC_TEST=YES
VGA_HSYNC
FUNC_TEST=YES
DVI_DDC_CLK_UF
FUNC_TEST=YES
DVI_DDC_DATA_UF
FUNC_TEST=YES
DVI_HPD_UF
FUNC_TEST=YES
VGA_G
FUNC_TEST=YES
VGA_B
FUNC_TEST=YES
VGA_VSYNC
FUNC_TEST=YES
VGA_R
FUNC_TEST=YES
TMDS_CONN_CLKP
FUNC_TEST=YES
JTAG_ASIC_TMS
FUNC_TEST=YES
JTAG_ASIC_TDO_TP
FUNC_TEST=YES
JTAG_ASIC_TDI
FUNC_TEST=YES
JTAG_ASIC_TRST_L
FUNC_TEST=YES
JTAG_ASIC_TCK
FUNC_TEST=YES
CPU_CHKSTP_OUT_L
FUNC_TEST=YES
CPU_SRESET_L
FUNC_TEST=YES
CPU_HRESET_L
FUNC_TEST=YES
JTAG_CPU_TDI
FUNC_TEST=YES
JTAG_CPU_TMS
FUNC_TEST=YES
JTAG_CPU_TDO_TP
FUNC_TEST=YES
JTAG_CPU_TCK
FUNC_TEST=YES
JTAG_CPU_TRST_L
FUNC_TEST=YES
JTAG_L3_TDI_TP
FUNC_TEST=YES
JTAG_L3_TMS
FUNC_TEST=YES
JTAG_L3_TCK
FUNC_TEST=YES
JTAG_L3_TDO_TP
FUNC_TEST=YES
INT_I2C_CLK0
FUNC_TEST=YES
INT_I2C_CLK1
FUNC_TEST=YES
INT_I2C_DATA0
FUNC_TEST=YES
CBUS_DET_1_L
FUNC_TEST=YES
INT_I2C_DATA1
FUNC_TEST=YES
CBUS_DET_2_L
FUNC_TEST=YES
FUNC_TEST=TRUE
TMDS_DN<0>
FUNC_TEST=TRUE
TMDS_DP<0>
FUNC_TEST=TRUE
TMDS_DP<1>
FUNC_TEST=TRUE
TMDS_DN<1>
FUNC_TEST=TRUE
TMDS_DP<2>
FUNC_TEST=TRUE
TMDS_DN<2>
TMDS_CONN_CLKN
FUNC_TEST=YES
FUNC_TEST=YES
AIRPORT_CLKRUN_L
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www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
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AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 40 44E051-6469
355/ CHANGED L32 FROM 152S1003 TO 152S0126 (PG 32)354/ CHANGED L31 FROM 152S0036 TO 152S0125 (PG 34)
RELEASED FOR PVT
RELEASED FOR DVT2
REV A - 01/14/03
RELEASED FOR DVT
BOM UPDATE FOR PRODUCTION
BOM UPDATE FOR PRODUCTION
REV A (051-6469) - 04/09/03
REV B (051-6469) - 04/25/03
349/ UPDATED SCHEMATIC NUMBER TO 051-6469 (PG 1)
351/ CHANGED D31 FROM MBRS140T3 TO BS240 TO INCREASE THE CONSTANT CURRENT CAPABILITY FROM 1A TO 2A (PG 29)352/ CHANGED C720 TO SANYO ONLY PART BECAUSE OF PROBLEMS AT THE FACTORY/FIELD (PG 1)
350/ CHANGED C591 AND C595 TO 0.01UF TO SPEED UP 1.95V_DVDD AND 1.95V_PLLVDD RAMP TIME (PG 28)
346/ UPDATED BOOT ROM TO NEW "REV A" PART NUMBER (PG 10)
REV B (051-6442) - 03/06/03RELEASED FOR PRODUCTION
347/ CHANGED C550 TO NEW APN 138S0536 - ONLY TAIYO YUDEN APPROVED DUE TO MAX 1.9MM HEIGHT REQUIREMENT (PG 30)
ANOTHER LAST MINUTE BOM CHANGES FOR DVT2 (1/24/03)
LAST MINUTE BOM CHANGES FOR DVT2 (1/18/03)
343/ CHANGED C263 FROM 0.01UF TO 0.22UF TO FIX EXTERNAL BRIGHTNESS FLUCTUATION ON CRT (PG 21)342/ UPDATED SYMBOL FOR D22,D26,D29,D31,AND D33 - TO CORRECT SCHOTTKY DIODE SYMBOL (PG 29,31-33)341/ UPDATED SYMBOL FOR U28 - FIREWIRE A PHY (PG 28)340/ CHANGED SCHEMATIC NUMBER TO 051-6442 (PG 1)
338/ BOM OMITTED SANYO CAPS AND ADDED KEMET 10UF AND PANASONIC 8.2UF AL POLYMER CAPS AT 7 LOCATIONS (PG 34) 339/ CHANGED R8 AND R70 TO 4.7K INSTEAD OF 10K TO IMPROVE RISE/FALL TIME (PG 15)
337/ RP55 AND RP56 CHANGED TO 22OHM AND L17 CHANGED TO 370OHM COMMON MODE CHOKE (PG 21)
LAST MINUTE BOM CHANGES FOR DVT (12/20/02)
332/ REMOVED U1 BECAUSE NO USING 1.5V MAXBUS NOR 1.5V L3 INTERFACE STRAPS (PG 7)
325/ CHANGED R451 TO 10K FROM 100K (PG 23) - OTHERWISE, IT MAY BE TOO WEAK324/ CHANGED R152 TO 511 OHM, 1% TO AVOID LOW CPU CLOCK AMPLITUDE (PG 9)
314/ CHANGED CPU VCORE TO 1.32V@1GHZ AND 1.15V@667MHZ (PG 34)
312/ CHANGED VCORE OFFSET TO 10MV -> EVT BOARD MEASURED: IDLE 1.407V, SMOKE 1.387V, TRANSIENT 1.37V (PG 34)311/ ADDED 5 SPEAKER CLIPS SYMBOLS (PG 4)310/ ADDED THREE 0402 CAP PADS ON SND_SCLK, SND_CLKOUT, AND LVDS_DDC_CLK FOR EMI (PG 22, 25)309/ ADDED FOUR PULL-DOWN RESISTORS ON CKE FOR DDR MEMORY (PG 10)308/ CHANGED CURRENT LIMIT SETTINGS FOR 1.5V AND 2.5V SWITCHER (PG 35)307/ CONSOLIDATED 1UF, 10% CAPS TO 1UF, 20% CAPS (PG 28,31)306/ UPDATED ETHERNET SERIES R VALUES (PG 14, 27)305/ CHANGED TO NEW 30PIN TUBA CONNECTOR WITH SOLDER TAPS (PG 25)304/ ADDED BOM OPTION TO PCI CLOCK OUT FROM INTREPID TO USB CONTROLLER (PG 13)303/ CHANGED TO TOP CONTACT SPIDEY CONNECTOR (PG 23)302/ CHANGED ALL 132S1061 (0805 PACKAGE) TO 132S0046 (0603 PACKAGE) - (PG ALL)301/ ADDED 4 ZERO OHM RESISTORS TO NO STUFF THE QUAD_VCORE OPTION (PG 34)300/ CHANGED BOOTROM RESET TO INT_RESET_L FOR ICT (PG 10)299/ UPDATED TO NEW TUBA CONNECTOR PINOUT (PG 25)298/ CHANGED RESET CAP TO 0.22UF ON TI PHY PER TI’S RECOMMENDATION (PG 28)297/ UPDATED BOM OPTION FOR SSCG (PG 9, 15)
295/ CONNECTED MAX4172 POWER TO +ADAPTER_SW TO SAVE 1MA WHEN RUNNING ON BATTERY ONLY (PG 31)
RELEASED FOR DVT313/ ADDED RESISTOR TO TPS2211 SHUTDOWN# PIN TO SUPPORT PSUEDO-D3COLD (PG 18)
316/ CHANGED STUFFING OPTION FOR A/B* SELECT ON MAX1717 TO SUPPORT L3 AT SLOW SPEED (PG 34) 315/ CHANGED STUFFING OPTION TO ENABLE PCI SPREADING (PG 9)
317/ NO STUFFED R694 AND STUFFED R727 TO RESTOR ORIGINAL VCORE STEPPING CONTROL (PG 34)318/ CHANGED RP55 AND RP56 TO 22OHM RPAKS (PG 21) 319/ CHANGED R664 FROM 0OHM TO 10K BECAUSE IT SHOULD BE A WEAK PULL-DOWN (PG 24)
323/ REMOVED ALL JUMPERS FOR PRODUCTION (PG TOO MANY)322/ CHANGED ZT10 TO THE NEW PD STANDOFF, BS1 (PG 4)321/ MOVED AMP AND HP MUTE CONTROL FROM TUBA TO MLB, AND INT_PU_RESET_L IS NOW "AND"ED WITH THE SIGNALS (PG 25)
330/ SWITCHED FAN TACH AND GROUND ON CONNECTOR FOR PD (PG 25)331/ CHANGED TO 33OHM RPAKS FOR TMDS (PG 21)
328/ UPDATED TO NEW S-VIDEO FILTER VALUES (PG 22)329/ ADDED ONE MORE SPEAKER CLIP FOR PD (PG 4)
333/ CHANGED INPUT CAPS FOR CPU_VCORE FROM 4.7UF CERAMIC CAPS TO 22UF POSCAPS (PG 34)
335/ CHANGED SCHEMATIC NUMBER TO 051-6425 AND PCB NUMBER TO 820-1502 (PG 1)
336/ CHANGE R389 TO 20K AND R395 TO 47K TO ENABLE BURST MODE OPERATION ON LTC3707 (PG 33)
344/ CHANGED Q60 TO NEW SYMBOL WITH ONLY IRF ON AVL (PG 31)
REV A (051-6442) - 02/28/03
345/ UPDATED FIREWIRE PHY TO NEW "REV A" PART NUMBER (PG 28)
BOM UPDATE FOR PRODUCTION
BOM UPDATE FOR PRODUCTION
RELEASED FOR PVT
RELEASED FOR DVT2
RELEASED FOR PRODUCTION
294/ CHANGED GPU_VCORE SWITCHER BOM OPTIONS TO REDUCE JITTER ON SUPPLY (PG 20)
REV 5.0 - 12/03/02
RELEASED FOR EVT
267/ ALS SENSOR IS NOW RUNNING DURING SLEEP PER THAI’S REQUEST (PG 23, 24) 268/ CHGND1 NOW SPLITS INTO CHGND1 AND CHGND6 BECAUSE OF FIREWIRE B ROUTING ON THE SURFACE (PG 29) 269/ SEPARATED 0 OHM RESISTORS FOR EACH FIREWIRE GROUND PINS (PG 29)270/ CY28512 RESET PIN NOW GOES TO +3V_MAIN - INT_RESET_L WILL NOT WORK (PG 15)271/ CHANGED PULL-UPS FOR FAN CONTROL SIGNALS TO +3V_SLEEP - LEAKAGE PROBLEM THROUGH THE FAN (PG 25)272/ NO STUFFED PULL-UP RESISTORS FOR EIDE_RESET AND EIDE_DMAACK_L - PER MKE DRIVE SPEC (PG 24)
273/ UPDATED BOMOPTION "NO SSCG" TO "NO_SSCG" (PG 9)
263/ PULLED DS2 HIGH TO SHUT-OFF PORT 3 ON FIREWIRE PHY COMPLETELY (PG 28)264/ ADDED ONE MORE 1000UF POSCAP ON CPU_VCORE_SLEEP TO REDUCE RIPPLE BY ANOTHER 10MV, AND CHANGED OFFSET TO +30MV (PG 34) 265/ FINE TUNED PCI SERIES RESISTOR R VALUES FOR EMI AND DIVIDED CY28512 OUTPUT FROM 2.5V TO 1.5V (PG 13,15)266/ CY28512 NOW RUNS ON 3V_MAIN AND 2.5V_MAIN... UPDATED THE STRAPS TOO (PG 15)
293/ ADDED TWO 0805 ZERO OHM RESISTORS TO FEED IN EITHER +2_5V_SLEEP OR +2_5V_MAIN TO INTREPID (PG 16)292/ NO STUFFED R888 BECAUSE THERE’S A WEAK INTERNAL PULL-UP ALREADY (PG 15)291/ LOADED IN NEW MECHANICAL SYMBOLS FOR WIRELESS,CARDBUS, AND HARD/OPTICAL DRIVES290/ ADDED STUFFING OPTION TO FEED MAIN_RESET_L TO PCI1510 (PG 18)289/ ADDED DUAL SCHOTTKY FOR FIREWIRE PHY POWER (PG 28)288/ CHANGED SIL1162 TO RISING CLOCK EDGE - STUFFING CHANGE (PG 21) 287/ CHANGED NOMINAL VCORE VOLTAGE TO 1.36V BECAUSE OF +/-50 MV REQUIREMENT ON GPU_VCORE (PG 20)286/ ADDED ESD AND LATE VG PROTECTION FOR FIREWIRE (PG 29)285/ ADDED 5A FUSE FOR FIREWIRE PORT POWER - FOR SAFETY COMPLIANCE (PG 29)284/ ADDED SLEEP FET FOR +5V_SOUND (PG 25)283/ FIXED DRCS AROUND SIL1162 BY CHANGING CONSTRAINTS (PG 21)282/ NEW BOOT ROM AND LMU PART NUMBERS (PG 11, 23) 281/ NEW PART NUMBERS FOR INTREPID 2.1, ZEBRA-17, BS520, 50&80PIN CONNECTORS, NEW CPU DESC.280/ FAN POWER GOES BACK TO +5V_SLEEP (PG 25)279/ ADDED TWO 4.7UF BULK CAPS NEAR THE FAN CONNECTORS (PG 25)278/ CHANGED PCI PULL-UP RESISTORS TO +3V_SLEEP TO SUPPORT P50 D3COLD (PG 13) 277/ ADDED PULL-DOWN TO P50’S CLKRUN_L SIGNAL AND NO CONNECTED P50’S PME SIGNAL (PG 24)276/ CHANGED TO ONE 1.5A FIREWIRE FUSE (PG 29)275/ P50 IS ONLY POWERED BY +3V_SLEEP NOW (PG 24)
LAST MINUTE BOM CHANGES FOR PROTO2 (10/29/02)
274/ FIXED SYSTEM BUS TO 167MHZ OPERATION BECAUSE WE ARE USING INTREPID 2.0 (PG 15)
RELEASED FOR EVT
348/ CHANGED ALL 14 4.7UF, 1210, X7R CAP FROM 138S0501 TO 138S0531 (4.7UF, 1206, X5R) DUE TO MAX 1.9MM HEIGHT REQUIREMENT
327/ SWAPPED R265 AND R653 VALUES BECAUSE BATTERY VOLTAGE CAN GO DOWN TO 10.4V, AND WE NEED TO ENSURE VGS<-4.5V (PG 29)326/ REMOVED R621 AND CONNECTED R608 TO GROUND WITH 10K RESISTOR TO ENSURE KBD LED IS OFF WHEN LMU IS IN RESET (PG 23)
296/ CHANGED Q47 AND Q58 TO 7811W FOR BOM CONSOLIDATION - ALSO CHANGED R348 AND R353 TO 113K TO ADJUST CURRENT LIMIT (PG 35)
320/ REMOVED LTC4210 BECAUSE OF RELIABILITY ISSUES, AND UPDATED PORT CONTROL WITH OLD METHOD PLUS A NEW 1.5A FUSE (PG 29)
334/ CHANGED R439 FROM 100K PULL-UP TO 47OHM SERIES CONNECTED TO IO_RESET_L - MAKING SURE LMU RESETS ACROSS RESTART (PG 23)
RELEASED FOR PROTO 2RELEASED FOR PROTO 2
193/ REMOVED COMMON MODE CHOKE FOR FIREWIRE B SIGNALS (PG 28) 192/ CHANGED STUFFING OPTION TO RAISE MARVELL CORE VOLTAGE TO 1.32V (PG 27)
196/ ADDED BACK IN COMMON MODE CHOKE FOR FIREWIRE B TO ENSURE TESTABILITY (PG 28)
194/ CHANGED LINE_WIDTH FOR FIREWIRE SIGNALS TO MAKE THEM 55OHM SINGLE AND 110OHM DIFFERENTIAL (PG 36)
191/ CHANGED STUFFING OPTION TO FORCE 14V INTO FORCE CONTINUOUS MODE TO REDUCE INDUCTOR SINGING (PG 31)
195/ CHANGED STUFFING OPTION TO ENABLE 1.5V_LDO AND MAKE 1.5V_MAIN INTO 1.8V (PG 16, 19, 34)
262/ CHANGED TO SI3446DV FOR FAN FETS (PG 25)
259/ ADDED PART NUMBER TABLE FOR SPEAKER CLIP (PG 4)
254/ ADDED SILICON IMAGE SI1162 - FIRST PASS (PG 21)
237/ ADDED FIREWIRE PORT CURRENT LIMITER (PG 29)
215/ ADDED FUNCTIONAL TEST POINT DEFINITION (PG 38)
213/ REMOVED ZEBRA 15/16 SUPPORT (PG 28)214/ REMOVED NO_TEST=TRUE PROPERTY ON MAXBUS/L3 BUS (PG 35)
218/ CHANGED POWER SUPPLY TO FAN TO +3V_SLEEP (PG 25)
252/ REMOVED COMMON MODE CHOKE PADS FOR FIREWIRE B (PG 29)
246/ FINALIZED ALL POWER SUPPLY CHANGES (PG 29-32)
240/ ADDED NEW SYSTEM CURRENT MONITOR FOR +PBUS (PG 31)241/ DELETED OLD BATTERY CURRENT LIMITER CIRCUIT (PG 31)
239/ ADDED A29 ADAPTER DETECT (PG 30)
236/ CHANGED FW_PD AND FW_PU TO 5% RESISTORS (PG 28)
232/ ADDED DAMPING RESISTOR FOR 8MHZ CRYSTAL (PG 23)
227/ DELETED ALL INTREPID_REV1 STUFFING OPTION (PG 9-16)
223/ ADDED BACK INDIVIDUAL FUSE FOR FIREWIRE PORT (PG 28)
221/ FIXED AGP CLOCK CONSTRAINTS (PG 13,35)220/ SWITCHED TO NEW 16PIN MODEM CONNECTOR (PG 25)
211/ CHANGED INTRPEID PART NUMBER TO REV 2.0 (PG 9-16)
256/ REPINNED OUT TUBA CONNECTOR (PG 25)
REV 4.0 - 10/24/02
RELEASED FOR PROTO 2-ENCLOSURE
261/ FINALIZED ALL CHANGES FOR SI1162 PART - RUNNING HIGH SWING MODE (PG 21)
258/ REMOVED XW17 - CPU_VCORE_JUMPER - FOR HUGE COPPER POUR (PG 34) 257/ SWAPPED JTAG_CPU_TRST_L AND JTAG_CPU_TDI WITH SENSOR5_I2C*_PD BECAUSE 200OHM PULL-DOWN PREVENTS IN-CIRCUIT PROGRAMMING ON PA0
251/ CHANGED BACK TO OLD BAV99DW DIODES BECAUSE CMD1210 CAN ONLY HANDLE 8MA FORWARD CURRENT (PG 29)
247/ CHANGED TO NEW CALIFORNIA MICRO DEVICES LOW-CAPACITANCE ESD DIODES FOR FIREWIRE (PG 29)
245/ CHANGED LTC4210 TIMER CAPACITOR TO ONE 0805 INSTEAD OF TWO 0402 (PG 29) 244/ REPLACED LMC6462 WITH LMC7111 BECAUSE ONLY NEED 1 OP-AMP (PG 31)243/ REMOVED C650 (2MILLOHM) SENSE RESISTOR FROM CPU_VCORE SWITCHER BECAUSE IT CAUSES TOO MUCH DROOP ON VOLTAGE (PG 34)242/ ADDED C843 TO SPEED UP Q10 TURN ON AND CHANGED Q14 TURN ON TO AC_IN (PG 31)
234/ DISCONNECTED FW_LKON FROM INT_EXTINT3_PU BECAUSE FW_LKON OUTPUT NOW WORKS FINE (PG 15) 233/ CHANGED INT_PLL_EN_PD TO PULL-DOWN AND CHANGED JTAG_ENET_TDI TO PULL-UP (PG 14)
230/ CHANGED TO 10K PULL-DOWN FOR MOD_DTI, MOD_SYNC, AND MOD_BITCLK - PER INTREPID PADS SPREADSHEET (PG 14)231/ CHANGED JUMPER PADS FOR PMU_RESET_L AND PMU_NMI_L TO 0603 RESISTOR PADS (PG 25)
229/ CHANGED BOM OPTION TO 167MHZ BUS WITH PLL SET TO 1GHZ/833MHZ (PG 7,9)228/ CHANGED TO NEW MOUNTING HOLE SIZES - ALL INCREASED BY 0.2MM IN DIAMETER EXCEPT FOR THREE CPU MTG HOLES (PG 4)
224/ SEPARATED FW PORTS TO ANOTHER PAGE; UPDATED PIN DEFINTIONS (PG 28, 29)
222/ DELETED PULL-UP RESISTOR TO VCORE_VCC ON VGATE SINCE THERE’S A 10K PULL-UP RESISTOR ON INTREPID SIDE (PG 33)
219/ UPDATED TO NEW EMI SHIELD PART NUMBER, AND NEW 300MHZ SRAM PART NUMBER (PG 4, 8)
212/ ADDED 10K PULL-UP STUFFING OPTION TO CG_ADDRSEL AND 10K PULL-DOWN STUFFING OPTION TO CG_FSEL (PG 15)
216/ REPLACED IRF7822 IN THE BATTERY CHARGER AND 14V SWITCHER SECTION WITH IRF7811W (PG 30, 31) 217/ DELETED CAPACITOR OPTION ON INT_CPUFB_IN - MAKE RISE/FALL TIME WORSE (PG 9)
225/ ADDED 2 10K PULL-UP TO USB NC PINS (M6 AND P6) - PER NEC (PG 26) 226/ CHANGED SMBUS PULL-UP RESISTOR TO 7.15K (DON’T HAVE ANOTHER 5% ~7K RESISTOR IN BOM) - PER IBOOK (PG 30)
235/ CHANGED R21 TO +3V_SLEEP TO PREVENT LEAKAGE TO MAXBUS_SLEEP BEFORE LMU SETS OUTPUT AS OPEN-DRAIN (PG 23)
238/ CHANGED +14V_PBUS TO +PBUS SINCE THE VOLTAGE MAY CHANGE BACK AND FORTH (PG ALL)
248/ ADDED 1K PULL-DOWN TO FW_DS1, FW_SE, AND FW_SM INPUTS PER TI’S RECOMMENDATION (PG 28)249/ CHANGED DS1 (PIN 32) TO PULL-UP FOR A-ONLY OPERATION (PG 28) 250/ ADDED MORE FUNCTIONAL TEST POINTS PER WAYNE’S INPUT (PG 39)
253/ ADDED PULL-UP TO PMU_SLEEP_LED_L AND CHANGED R451 TO PULL-DOWN SLEEP_LED_H TO ENSURE STATES WHEN CHIPS TRISTATE OUTPUTS (PG 23)
255/ UPDATED DVI_HPD CIRCUIT PER HYDRA IMPLEMENTATION (PG 22)
210/ CHANGED R474 TO 49.9K, 1%, R475 TO 1.0K, 1%, AND R683 TO 10.7K, 1% (PG 30) LAST MINUTE BOM CHANGES FOR PROTO2-ENCLOSURE (9/25/02)
209/ CHANGED TO PROTO2 BOM OPTION - INTREPID REV 2.0, AND MARVELL 2.0 CHANGES208/ ADDED 2 JUMPERS FOR PMU_RESET_BUTTON_L AND PMU_NMI_BUTTON_L (PG 25)
260/ MIRRORED AIRPORT CONNECTOR BECAUSE CONNECTIONS ARE MIRRORED ON THE FLEX (PG 24)
RELEASED FOR PROTO 2-ENCLOSURE
207/ ADDED 0 OHM RESISTOR FOR POWER BUTTON - DEBUG (PG 25)
204/ CHANGED TO NEW SPIDEY CONNECTOR AND PINOUT (PG 23)
REV 3.0 - 09/20/02
205/ REMOVED P93 SUPPORT CIRCUIT (PG 25)
198/ NO STUFFED 4700PF FOR 14V PBUS GATE - C741 (PG 31)
203/ UPDATED L3 SYMBOLS TO REFLECT MISSING SA17 SIGNAL ON 4MBIT PARTS VS. 8MBIT PARTS (PG 8) 202/ COMBINED FIREWIRE FUSE INTO ONE TO LIMIT PORT POWER TO 22W@24V OR 13.5W@15V (PG 28)
206/ ADDED 0 OHM RESISTOR FOR 2.5V_MARVELL TO MEASURE CURRENT (PG 27)
201/ CHANGED VCORE STUFFING OPTION FOR 1GHZ PROCESSOR (PG 33) 200/ CHANGED BOOTROM APN FOR SHARP DIE-SHRINK PACAKGE (PG 10)
197/ STUFFED 20K FEEDBACK RESISTOR FOR MARVELL 88E1111 CRYSTAL (PG 27)
199/ NO STUFFED L4 AND L5, FIREWIRE COMMON MODE CHOKES (PG 28)
LAST MINUTE BOM CHANGES FOR PROTO2 (9/5/02)
RELEASED FOR PROTO 1RELEASED FOR PROTO 1
150/ CORRECTED PMU PART NUMBER (PG 28)
159/ UPDATED USB 2.0 SIGNAL CONSTRAINTS (PG 26)
REV 1.1 - 08/14/02
183/ ADDED 4.7NF CAP ON Q51 GATE (PG 31)
174/ ADDED Q11 ADAPTER DETECTION SCHEME (PG 29)
172/ CHANGED OPTICAL CONNECTOR PINOUT (PG 24) 171/ ADDED NEW QUAD-VCORE CONTROL CIRCUITRY (PG 33) 170/ UPDATED A FEW CONSTRAINTS
167/ DELETED USB POWER FET (PG 23)
185/ UPDATED MORE CONSTRAINTS 184/ ADDED EMI SHIELD FOR INVERTER CHGND (PG 4)
173/ ADDED PMU_LID_CLOSED_L SIGNAL TO LMU (PG 23)
REV 2.0 - 08/26/02
155/ ADDED USB 2.0 CONTROLLER (PG 26)
157/ ADDED INTREPID SSCG CHIP SUPPORT (PG 15) 158/ CONSOLIDATED BOMS
161/ ADDED +3V_SLEEP TO TUBA CONNECTOR (PG 25)
180/ SEPERATED PULL-UP FOR PCI_SERR_L AND PCI_PERR_L (PG 18,26) 181/ CHANGED SYSCLK_CPU, INT_PCI_FB_OUT, AND INT_AGP_FB_OUT SERIES RESISTOR VALUE (PG 9, 13)
186/ CHANGED STUFFING OPTION TO FORCE 3V/5V INTO FORCE CONTINUOUS MODE TO REDUCE INDUCTOR SINGING (PG 32)
190/ REMOVED C91 - 1.5V AGP BULK CAP BECAUSE THERE ARE 4 ON INTREPID SIDE ALREADY! (PG 20)
187/ CHANGED FW DVDD LDO TO 1.95V PER BILL’S RECOMMENDATION (PG 28) 189/ REMOVED C195 - 1.5V AGP(DOUBLED BYPASS), C24,C20 - 3VMAIN (DOUBLED BYPASS) FOR TESTPOINTS (PG 17)
169/ CONNECTED VGATE TO EXTINT10 BECAUSE NEED INTERRUPT CONTROL (PG 15)
176/ ADDED STUFFING OPTION FOR DS1 PIN ON FIREWIRE PHY (PG 28) 177/ CHANGED STUFFING OPTION TO RAISE PLL VOLTAGE TO 1.95V FOR FW (PG 28)
179/ DELETED C757 (0.22UF BYPASS CAP FOR PCI1510) TO EASE TESTPOINT CONSTRAINTS (PG 18)
182/ CHANGED C533, C539 TO 270PF AND CHANGED CONNECTIONS (PG 32)
165/ CHANGED CRYSTAL VOLTAGE DIVIDER FOR FIREWIRE PHY TO 50/100 (BILL’S RECOMMENDATION) (PG 28)164/ CHANGED FL1 TO NEW COMMON MODE CHOKES FOR FIREWIRE A (PG 28)
160/ CHANGED CPU CORE VOLTAGE TO 1.45V FAST/1.40V SLOW (PG 33)
153/ ADDED A FEW MORE COMPONENTS TO ALS CIRCUIT BASED ON THAI’S RECOMMENDATIONS (PG 23)
166/ ADDED 2N7002 TO PREVENT PMU_SLEEP_LED_L FROM PUMPING UP +3V_MAIN DURING SHUTDOWN (PG 23)
163/ DELETED ZT17 AND ZT2 BECAUSE THEY ARE NO LONGER NEEDED (PG 4)162/ MERGED MAXBUS_MAIN WITH MAXBUS_SLEEP BECAUSE INTREPID MAXBUS I/O CAN BE POWERED DOWN IN SLEEP (PG 16,17)
152/ REPINNED OUT J13 (HARD DRIVE) CONNECTOR FOR BETTER FLEX ROUTING (PG 24) 151/ DELETED 4 0805 BULK CAPS AND ADDED 20 0402 BYPASS CAPS ON DDR SODIMM CONNECTOR (PG 12)
168/ CHANGED 14PIN ZIF CONNECTORS AND PINOUT (PG 24,31)
175/ ADDED DEDICATED RC FILTERING FOR PORT0 TX 0 (PG 28)
178/ DELETED C741 (100UF INPUT CAP TO +3V_SLEEP) (PG 32)
149/ UPDATED SOME NETS FOR CONCEPT 14.2 COMPLIANCE (PG 30,36)
154/ REMOVED PROTO1 CONNECTOR OPTIONS (PG 1, 22, 26, 27)
156/ CHANGED TO SPIDEY 39PIN ZIF CONNECTOR AND PINOUT (PG 23)
REVISION HISTORY
BOM UPDATE FOR PRODUCTIONREV C (051-6469) - 06/05/03353/ CHANGED CPU P/N TO 337S2775 FOR THE SICOH PROCESSORS (PG 5,6)
BOM UPDATE FOR PRODUCTION
REV D (051-6469) - 07/22/03356/ CHANGED J21 TO NEW GOLD PLATE 80PIN CONNECTOR 516S0142 (PG 24)
BOM UPDATE FOR PRODUCTION
BOM UPDATE FOR PRODUCTIONREV E (051-6469) - 08/07/03357/ DISQUALIFIED AND REMOVED KEMET POLYMER CAPS FOR CPU_VCORE(PG 34)
CR-40
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OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 41 44
E051-6469
*** Signal Cross-Reference ***
--- for the entire design --
+1_0V_MARVELL 27D2 38B3
+1_5V_AGP 13C5 13D1 13D4 16D5 17C8 19A2 19A8
19C6 19D5 20D8 38C3
+1_5V_INTREPID_PLL 9D6 13D4 13D8 15D6 38D3
+1_5V_INTREPID_PLL1 15C3 38D3
+1_5V_INTREPID_PLL2 15D3 38D3
+1_5V_INTREPID_PLL3 15D3 38D3
+1_5V_INTREPID_PLL4 15D3 38D3
+1_5V_INTREPID_PLL5 13D3 38D3
+1_5V_INTREPID_PLL6 13D6 38D3
+1_5V_INTREPID_PLL7 9D5 38D3
+1_5V_INTREPID_PLL8 15D3 38C3
+1_5V_LDO 16B1 19A3 35D8 38D6
+1_5V_MAIN 38D6
+1_5V_SLEEP 38D6
+1_5V_SLEEP_VIN 35D8 38D6
+1_8V_MAIN 38D6 39A2
+1_8V_SLEEP 38D6
+1_95V_FW_DVDD 28C4 28C7 28D5 38A3
+1_95V_FW_DVDD_PORT1 28D6 38A3
+1_95V_FW_DVDD_RX0 28C5 38A3
+1_95V_FW_DVDD_TX0 28C5 38A3
+1_95V_FW_PLL400VDD 28D5 38A3
+1_95V_FW_PLL500VDD 28D5 38A3
+1_95V_FW_PLLVDD 28D5 28D7 38A3
+2_5V_CG_MAIN 15C6 38A3
+2_5V_GPU_FB 19A4 19A5 19B4 19B5 19C2 19D2 19D5
38C3
+2_5V_INTREPID 10A8 11D3 11D5 11D6 11D8 16D7 17B8
38D3
+2_5V_MAIN 38D6
+2_5V_MARVELL 27B8 27C4 38B3
+2_5V_MARVELL_AVDD 27C4 38B3
+2_5V_SLEEP 16D7 38D6
+2_8V_IFP_PLLVDD 20A2 20A4 20A5 38C3
+3V_CG_PLL_MAIN 15C6 38A3
+3V_DAC1VDD 21D4 38C3
+3V_DAC2VDD 21D7 38C3
+3V_FW 28A3 28D7 29D5 38B3
+3V_FW_AVDD 28C6 38A3
+3V_FW_AVDD_PORT0 28C6 38B3
+3V_FW_AVDD_PORT1 28C6 38B3
+3V_FW_AVDD_PORT2 28D6 38B3
+3V_FW_ESD 29B3 29D2 38B3
+3V_FW_ESD_ILIM 29D4 38B3
+3V_FW_UF 28D7 38B3
+3V_GPU 13D1 15C5 19A4 20A8 20B2 20B4 20C4
20D2 21B8 21C7 21C8 21D1 21D3 21D6
21D7 38C3
+3V_GPU_AVDD0 20B4 38C3
+3V_GPU_AVDD1 20B2 38C3
+3V_GPU_DVO 21B6 38C3
+3V_GPU_PLLVDD 21D6 38C3
+3V_GPU_SS 21A4 38C3
+3V_HALL_EFFECT 23C6 38B6 39C4
+3V_INTREPID_USB 15C3 38D3
+3V_LCD 22B4 38B6
+3V_LCD_SW 22A4 38B6
+3V_MAIN 38D6
+3V_NEC_VDD 26D7 38A3
+3V_PMU 38D6 39A2
+3V_PMU_AVCC 30B1 30B6 30D5 38C6
+3V_PMU_ESR 32A2 38C6
+3V_PMU_RESET 30B7 34A4
+3V_SI_AVCC 21D2 38B3
+3V_SI_PLLVCC 21D2 38B3
+3V_SI_VCC 21D2 38B3
+3V_SLEEP 38D6
+4_6V_BU 32A3 33B5 38C6
+4_85V_ESR 32A4 38C6
+4_85V_RAW 30B4 32A4 38C6
+5V_DDC_SLEEP 22D3 22D5 38B6 39A2
+5V_DDC_SLEEP_UF 22D6 38B6
+5V_HD_SLEEP 24D1 33A7 38C6
+5V_INV_SW 22B1 38B6 39D1
+5V_INV_UF_SW 22B2 38B6
+5V_MAIN 38D6
+5V_SLEEP 38D6
+5V_SOUND_SLEEP 25C5 25D6 38B6
+5V_TPAD_SLEEP 23C7 38B6 39C4
+12_8V_INV 22B1 38B6 39A2
+24V_PBUS 38D6 39B2
+ADAPTER 31D8 32B7 38D6
+ADAPTER_ILIM 32B6 38C6
+ADAPTER_OR_BATT 32A5 38C6
+ADAPTER_SENSE 31D5 38C6
+ADAPTER_SW 31D6 38C6
+BATT 38D6
+BATT_14V_FUSE 31D1 38C6
+BATT_24V_FUSE 31B1 31D2 38C6
+BATT_POS 31A4 38C6 39C3
+BATT_RSNS 31B2 38C6
+BATT_VSNS 31A4 38C6
+FW_FUSE 29D7 38B3
+FW_PWR_OR 28B8 28D8 29D5 38B3
+FW_PWR_PORTA 29C5 38B3
+FW_SW 29D5 38B3
+FW_VP0 29C2 38B3
+FW_VP1 29A3 38B3
+HD_LOGIC_SLEEP 24C2 38C6
+PBUS 38D6 39B2
+VCC_CBUS_SW 18B1 18B2 18D3 38C3
+VPP_CBUS_SW 18B1 18B2 18D2 38C3
1V20_REF 31C7 32C8 38D1
1V65_REF 31A5
1_5V_2_5V_OK 20C8 35C5 38B1
1_5V_BOOST 35C6 38C1
1_5V_BST 35C5 38C1
1_5V_DH 35C5 38C1
1_5V_DL 35B5 38C1
1_5V_FB 35B5 35B7 38C1
1_5V_ILIM 35C5 38C1
1_5V_LX 35B5 38C1
1_8V_SLEEP_PWREN_L 35A3
1_8V_SW 35A5 38A1
1_8V_VFB 35A5 38A1
2_5V_BOOST 35C4 38D1
2_5V_BST 35C4 38D1
2_5V_DH 35C4 38D1
2_5V_DL 35B4 38D1
2_5V_ILIM 35C5 38C1
2_5V_LX 35B4 38D1
2_5V_SLEEP_PWREN_L 35C2
2_8V_ADJ1 20A7
2_8V_BYP 20A8
2_34V_REF 30A4
3V_5V_OK 33B4 35D6
3V_BG 33C4
3V_BOOST 33C4
3V_BOOST_ESR 33D3
3V_ITH 33C4
3V_ITH_RC 33C3
3V_PMU_VTAP 32B3
3V_RSNS 33D2 38D1
3V_RUNSS 33C4
3V_SLEEP_PWREN_L 33A3
3V_SNSM 33C4 37A2
3V_SNSP 33C4 37A2
3V_SW 33C4 38D1
3V_TG 33D4
3V_VOSNS 33C4
5V_BG 33C5
5V_BOOST 33C5
5V_BOOST_ESR 33D6
5V_HD_PWREN 33A8
5V_ITH 33C5
5V_ITH_RC 33C6
5V_RSNS 33D7 38D1
5V_RUNSS 33C5
5V_SLEEP_PWREN 33A8
5V_SND_PWREN 25D8
5V_SNSM 33C5 37A2
5V_SNSP 33C5 37A2
5V_SW 33C5 38D1
5V_TG 33C5
5V_VOSNS 33C5
1625_BG 32C5
1625_BST 32C5
1625_BST_ESR 32C5
1625_COMP 31D2 32C6
1625_DIV 32C8
1625_ENABLE 32D7
1625_ENABLE_L 32D6
1625_EXTVCC 32D5 38D1
1625_FCB 32C6
1625_INTVCC 32C5 38D1
1625_RUNSS 32C6
1625_SGND 32B7 38D1
1625_TG 32C5
1625_VFB 32B5
1625_VIN 32C6 38D1
1625_VSW 32C4 38D1
1772_ACIN 31B5
1772_ACOK_L 31B5 31C4
1772_BST 31B4
1772_BST_ESR 31C3
1772_CCI 31B5
1772_CCS 31B5
1772_CCV 31B5
1772_CCV_RC 31B5
1772_CELLS 31B4
1772_CLS 31A4
1772_CSIN 31B4 37A2
1772_CSIP 31B4 37A2
1772_CSSN 31C5 37A2
1772_CSSP 31C5 37A2
1772_DCIN 31B5 38C6
1772_DHI 31B4
1772_DLO 31B4
1772_DLOV 31B4 38C6
1772_GND 31A5 38C6
1772_ICHG 31B5
1772_ICTL 31B5
1772_IINP 31B5
1772_LDO 31C4 38C6
1772_LX 31B4 38C6
1772_REF 31B5
1772_VCTL 31B5
1778_BG 20B7 38B1
1778_BST 20B7 38B1
1778_BST_RC 20C6 38B1
1778_FCB 20B7 38B1
1778_GND 20B6 20B8 38B1
1778_ION 20B7 38B1
1778_ITH 20B7 38B1
1778_ITH_RC 20B8 38B1
1778_SHDN_L 20B7
1778_SHDN_L_D3COLD 20D7
1778_TG 20B7 38B1
1778_VCC 20C7 38B1
1778_VFB 20B7 38B1
1778_VIN 20C7 38B1
1778_VRNG 20B7 38B1
3405_MODE 27D5
3405_VFB 27D4
3707_FCB 33C5
3707_FSET 33C5
3707_INTVCC 33D4 38D1
3707_SGND 33B5 38D1
3707_STBY 33C5
A29_CLS_ADJ 31A5
A29_CURRENT_ADJ 31C4
A29_DETECT 30A2 31A5 31C4
A29_DET_L 30A3
AC_DIV 31C8
AC_ENABLE_GATE 31D6
AC_ENABLE_L 31C6
AC_GTR_18V 31C4
AC_IN 27B8 29C7 30B3 31C5 31C7
AC_IN_FW_CNTL 29C7
AC_IN_L 31C2 31C6
AC_IN_L_RC 31C2
ADAPTER_DET 30A4 31D8 39C2
ADAPTER_I_REG 31D3
AGP_AD<31..0> 13B2 13C2 13D2 19C7 19D7 37D5
AGP_AD_STB<1..0> 13A2 13B2 19A7 19B7 37D5
AGP_AD_STB_L<1..0> 13A2 13B2 19A7 37D5
AGP_BUSY_L 13C4 13D2 19A7
AGP_CAL_PD 19A7
AGP_CAL_PU 19A7
AGP_CBE<3..0> 13B2 19B7 19C7 37D5
AGP_DEVSEL_L 13B2 13C2 19B7 37D5
AGP_FRAME_L 13B2 13C2 19B7 37D5
AGP_GNT_L 13C2 13D2 19B7 37D5
AGP_GPU_RESET_L 19B7
AGP_IRDY_L 13B2 13C2 19B7 37D5
AGP_NV_INT_L 15B5 19B7
AGP_NV_PIPE_L 19B7
AGP_NV_WBF_L 19B7
AGP_PAR 13B2 19B7 37D5
AGP_PIPE_L 13A2 13B2 19B8
AGP_RBF_L 13A2 13C2 19B7 37D5
AGP_REQ_L 13C2 13D2 19B7 37D5
AGP_SBA<7..0> 13B2 19A7 37D5
AGP_SB_STB 13B2 19A7 37D5
AGP_SB_STB_L 13A2 19A7 37D5
AGP_ST<2..0> 13A2 19B7
AGP_STOP_L 13B2 13C2 19B7 37D5
AGP_TRDY_L 13B2 13C2 19B7 37D5
AGP_WBF_L 13A4 13B2 19B8
AIRPORT_CLKRUN_L 24C6 39C1
AIRPORT_IDSEL 24C5 39B1
AIRPORT_PCI_GNT_L 13D7 24D5 39C4
AIRPORT_PCI_INT_L 15B5 15D7 24D5 39C4
AIRPORT_PCI_REQ_L 13A7 13D7 24D6 39D4
AIRPORT_PME_L_TP 24D5
AMP_CONTROL 25D5
BATTV_HIGH 31B7
BATTV_LOW 31B8
BATT_14PBUS_EN 31C1
BATT_14V_GATE 31C1
BATT_24PBUS_EN 31C2
BATT_24V_GATE 31C2
BATT_CLK 31A4 39C3
BATT_DATA 31A4 39C3
BATT_DIV 31A5
BATT_LOW 31A6
BATT_LOW_L 31B6
BATT_NEG 31A4 38C6 39C3
BBANG_HRESET_L 23A4 23C4 39C1
BBANG_JTAG_TCK 23B3 23C4
BBANG_TCK_EN 23B3
BCKFD_PROT_EN_L 31C6
BCKFD_PROT_GATE 31D6
BRIGHT_PWM 22A1 39A7
BRIGHT_PWM_UF 22A2
BT_USB_DM 15C1 24B2 37B2 39B6
BT_USB_DP 15C1 24B2 37B2 39B6
CAPSLOCK_LED 23A8
CAPSLOCK_LED_L 23B8 30C7
CBUS_ADDR<25..0> 18A4 18B1 18B2 18B4 18C1
CBUS_ADDR_16_UF 18B5
CBUS_BVD1_L 18B2 18C4
CBUS_BVD2_L 18B2 18C4
CBUS_CE1_L 18C1 18C4
CBUS_CE2_L 18B4 18C2
CBUS_DATA<15..0> 18A1 18A2 18A4 18C1 18C2
CBUS_DET_1_L 18C2 18C4 39B8
CBUS_DET_2_L 18A2 18C4 39B8
CBUS_INPACK_L 18B2 18B4
CBUS_INT_L 15B5 15B7 18A7
CBUS_IORD_L 18B2 18C4
CBUS_IOWR_L 18B2 18C4
CBUS_MFUNC1_PD 18A7
CBUS_MFUNC2_PD 18A7
CBUS_MFUNC3_PD 18A7
CBUS_MFUNC4_PD 18A7
CBUS_MFUNC5_PD 18A7
CBUS_MFUNC6_PD 18A7
CBUS_OE_L 18C1 18C4
CBUS_PCI_GNT_L 13D7 18A7
CBUS_PCI_IDSEL 18B7
CBUS_PCI_PERR_L 18B7 18D7
CBUS_PCI_REQ_L 13A7 13D7 18A7
CBUS_PCI_RESET_L 18A7
CBUS_PCI_SERR_L 18B7 18D7
CBUS_READY 18B1 18C4
CBUS_REG_L 18B2 18C4
CBUS_RESET_L 18B2 18C4
CBUS_SUSPEND_PU 18A7 18D7
CBUS_VCCD0_L 18C4
CBUS_VCCD1_L 18C4
CBUS_VPPD0 18C4
CBUS_VPPD1 18C5
CBUS_VS1 18B2 18C4
CBUS_VS2 18B2 18C4
CBUS_WAIT_L 18B2 18B4
CBUS_WE_L 18B1 18C4
CBUS_WP_L 18A1 18B4
CG_ADDRSEL 15B7
CG_CLKOUT 15B6
CG_FSEL 15B7 15C5
CG_LOCK 15B7
CG_RESET_L 15B7
CHARGE_DISABLE 31A7
CHARGE_LED_L 30C6 30D7 31D8 39D2
CHGND1 38A6
CHGND2 38A6
CHGND3 38A6
CHGND4 38A6
CHGND5 38A6
CHGND6 38A6
CLK10M_PMU_XIN 30B6
CLK10M_PMU_XOUT 30B6
CLK10M_PMU_XOUT_UF 30B7
CLK18M_INT_EXT 15A6 36B1
CLK18M_INT_XIN 15A5 36B1
CLK18M_INT_XOUT 15A5 36B1
CLK18M_XTAL_IN 15A5 36B1
CLK25M_ENET_XIN 27A7 36B1
CLK25M_ENET_XOUT 27A7 36B1
CLK25M_XTAL_IN 27A7
CLK27M_GPU_XIN 21B4 36B1
CLK27M_GPU_XOUT 21B4 36B1
CLK27M_XTAL_IN 21B4 36B1
CLK32K_PMU_XIN 30B3
CLK32K_PMU_XOUT 30B3
CLK32K_PMU_XOUT_UF 30B2
CLK33M_AIRPORT 13D8 24D5 36C1 39B1
CLK33M_AIRPORT_UF 13C7 36C1
CLK33M_CBUS 13D8 18A7 36C1
CLK33M_CBUS_UF 13C7 36C1
CLK33M_USB2 13C8 26B7 36C1
CLK33M_USB2_UF 13C7 36C1
CLK66M_AGP_15V_TP 13C4
CLK66M_GPU_AGP 13C8 19B7 36C1
CLK66M_GPU_AGP_UF 13C7 36C1
CLKENET_LINK_GBE_REF 14C5 27C8 36B1
CLKENET_LINK_GTX 14C5 36A1
CLKENET_LINK_RX 14D5 27C8 36B1
CLKENET_LINK_TX 14D5 27D8 36A1
CLKENET_PHY_GBE_REF 27C7 36B1
CLKENET_PHY_GTX 14C6 27C7 36A1
CLKENET_PHY_RX 27C7 36B1
CLKENET_PHY_TX 27D7 36B1
CLKFW_LINK_LCLK 14C3 36A1
CLKFW_LINK_PCLK 14C3 28C3 36A1
CLKFW_PHY_LCLK 14C2 28B7 36A1
CLKFW_PHY_PCLK 28B5 28C4 36A1
CLKLVDS_LN 20C2 22A4 37C2 39B7
CLKLVDS_LP 20C2 22A4 37C2 39B7
CLKLVDS_UN 20B2 22A4 37C2 39B7
CLKLVDS_UP 20B2 22A4 37C2 39A7
COMM_DTR_L 15C2 25D1 39B2
COMM_GPIO_L 15C2 25D2 39C2
COMM_RESET_L 15C5 25C3 39C4
COMM_RING_DET_L 15B5 15C7 25C4 30C6 39C4
COMM_RTS_L 15C2 25D1 39B2
COMM_RXD 15C2 25D1 39B2
COMM_SHUTDOWN 15C5 25C3 39C4
COMM_TRXC 15C2 25D2 39C2
COMM_TXD_L 15C2 25D2 39C2
COMP_DISABLE 22C2
COMP_ENABLE 22C1
COMP_RC 32C6
CPU_AACK_L 5A7 9B6 9C2 36D5
CPU_ADDR<31..0> 5B7 5C7 9B6 9C6 9D6 36D5
CPU_ARTRY_L 5A7 9B6 9D2 36D5
CPU_AVDD 5D4 38D3
CPU_BG_L 5C7 9C2 9D6 36D5
CPU_BR_L 5C7 9D2 9D6 36D5
CPU_BUS_VSEL 5C3 7B7
CPU_CHKSTP_OUT_L 5B3 5C2 39D8
CPU_CHKS_L 5B3 5D2
CPU_CI_L 5A7 9B6 36D5
CPU_CLKOUT_SPN 5C3
CPU_CLK_EN 9A6 30C4
CPU_DATA<63..0> 6A8 6B8 6C8 6D8 9A8 9B3 9B4 9B8 9C4
9C8 9D4 9D8 36D5
CPU_DBG_L 5C3 9A4 9C2 36D5
CPU_DRDY_L 5C2 9A4 9C2 36D5
CPU_DRDY_L_UF 5C4 36D5
CPU_DTI<2..0> 5C3 9A4 36D5
CPU_EDTI 5B2 5C3
CPU_EMODE0_L 5A3 7B5
CPU_EMODE1_L 5A3 5C2
CPU_GBL_L 5A7 9B6 36D5
CPU_HIT_L 5A7 9B6 9D2 36D5
CPU_HRESET_INV 7A5 7A7 7B5
CPU_HRESET_L 5B3 5C2 7A5 7A8 7B4 23A2 39C8
CPU_L1TSTCLK 5B2 5B3
CPU_L2TSTCLK 5B3 5C2
CPU_L3_VSEL 6C3 7A7
CPU_LSSD_MODE 5B3 5C2
CPU_MCP_L 5B3 5D2
CPU_PLL_CFG<3..0> 5C3 7D3
CPU_PLL_CFGEXT 5C3 7D3
CPU_PLL_FS00 7C3
CPU_PLL_FS01 7C3
CPU_PLL_FS10 7C4
CPU_PLL_STOP_BASE 7C7
CPU_PLL_STOP_OC 7C8 30B6
CPU_PMONIN_L 5B3 5C2
CPU_PULLDOWN 5A2 5A3 5C7
CPU_PULLUP 5A3 5C2
CPU_QACK_L 5B3 9B6 36D5
CPU_QREQ_L 5B3 9B6 9C2 36D5
CPU_SHD0_L 5A7 5D2
CPU_SHD1_L 5A7 5D2
CPU_SMI_L 5B3 5C2 30C4
CPU_SRESET_L 5B2 5B3 39C8
CPU_SRWX_L 5A3 5C2
CPU_TA_L 5B3 9A4 9D2 36D5
CPU_TBEN 5B3 5D2 9A6
CPU_TBST_L 5A7 9B6 36D5
CPU_TEA_L 5B3 9A4 9C2 36D5
CPU_TSIZ<2..0> 5A7 9B6 36D5
CPU_TS_L 5C7 9D2 9D6 36D5
CPU_TT<4..0> 5A7 9B6 36C5
CPU_VCORE_HI_OC 7B8 30D4 34C8 34D7
CPU_VCORE_PWR_SEQ 34D8
CPU_VCORE_SEQ 34D8
CPU_VCORE_SEQ_L 34D8
CPU_VCORE_SLEEP 5D3 5D8 34C2 34D2 38D3 39B2
CPU_VCORE_SNUB 34B3
CPU_WT_L 5A7 9B6 36C5
CSLOT_ADDR3_SPN 14B7
CSLOT_ADDR4_SPN 14B7
CSLOT_ADDR5_SPN 14B7
CSLOT_ADDR6_SPN 14B7
CSLOT_ADDR7_SPN 14B7
CSLOT_ADDR8_SPN 14B7
CSLOT_ADDR9_SPN 14B7
CSLOT_CE1_L_SPN 14C7
CSLOT_CE2_L_SPN 14C7
CSLOT_IORD_L_SPN 14C7
CSLOT_IOWAIT_L_PU 14C7
CSLOT_IOWR_L_SPN 14C7
CSLOT_OE_L_SPN 14C7
CSLOT_WE_L_SPN 14C7
CURRENT_THRESHOLD 31C4
CY25811_S0 21A4
CY25811_S1 21A4
DCDC_EN 20D6 29C7 32B7 33B5 34C8 39C1
DCDC_EN_L 20C8 33B6 35C7
DDC_CLK_ISO 22D4
DDR_VREF 12D1 12D3 12D5 12D6 12D8 38D3
DVI_DDC_CLK 22D4
DVI_DDC_CLK_UF 22C5 22D3 39C7
DVI_DDC_DATA 22C4
DVI_DDC_DATA_UF 22C5 39C7
DVI_HPD 22C4
DVI_HPD_DIV 22C3
DVI_HPD_UF 22C3 22C5 39C7
DVI_TRUN_ON_ILIM 22D2
DVI_TURN_ON 22D3
DVI_TURN_ON_BASE 22D2
EEPROM_ADDR 23D4
EEPROM_WP_PD 23D3
EIDE_ADDR<2..0> 14B7 24B8 37B5
EIDE_CS0_L 14B7 24B8 37B5
EIDE_CS1_L 14B7 24B8 37B5
EIDE_DATA<15..0> 14B7 14C7 24B8 24C8 24D8 37B5
EIDE_DMACK_L 14A7 24A8 37B5
EIDE_DMARQ 14A7 24B8 37B5
EIDE_INT 14A7 24A8 37B5
EIDE_IOCHRDY 14B7 24A8 37B5
EIDE_OPTICAL_ADDR<2..0> 24A5 24A6 24B7 37B5 39A4
EIDE_OPTICAL_CS0_L 24A5 24B7 37B5 39D4
EIDE_OPTICAL_CS1_L 24A6 24B7 37B5 39D4
EIDE_OPTICAL_DATA<15..0> 24A5 24A6 24B7 24C7 24D7
37B5 39B4 39C4
EIDE_OPTICAL_DMAACK_L 24A6 24A7 37A5 39A4
EIDE_OPTICAL_DMA_RQ 24A6 24B7 37A5 39A4
EIDE_OPTICAL_INT 24A5 24A7 37A5 39D4
EIDE_OPTICAL_IOCHRDY 24A5 24A7 37A5 39D4
EIDE_OPTICAL_RD_L 24A6 24A7 37B5 39A4
EIDE_OPTICAL_RST_L 24A7 24B5 37A5 39D4
EIDE_OPTICAL_WR_L 24A5 24A7 37A5 39D4
EIDE_RD_L 14A7 24A8 37B5
EIDE_RST_L 14B7 24A8 37B5
EIDE_WR_L 14A7 24A8 37B5
ENET_COL 14C5 27B7 37A5
ENET_COMA 27B7
ENET_CRS 14C5 27B7 37A5
ENET_CTAP_CHGND 27A1 38A6
ENET_ENERGY_DET 15B5 27B7
ENET_HSDACM 27A7
ENET_HSDACP 27A7
ENET_LINK_RXD<7..0> 14C5 27B7 27C7 37A5
ENET_LINK_TXD<7..0> 14A4 14B4 14D5 37A5
ENET_LINK_TX_EN 14D5 37A5
ENET_LINK_TX_ER 14D5 37A5
ENET_MDC 14C5 27B7 37A5
ENET_MDIO 14C5 27B7 37A5
ENET_PHY_TXD<7..0> 14A5 14B5 27C7 37A5
ENET_PHY_TX_EN 14D6 27C7 37A5
ENET_PHY_TX_ER 14D6 27C7 37A5
ENET_RSET 27A5
ENET_RST_L 27B7
ENET_RX_DV 14D5 27B7 37A5
ENET_RX_ER 14C5 27B7 37A5
ENET_VSSC 27A7
FAN1_GND 25B3 38B6 39B3
FAN1_PWM 25B3
FAN1_TACH 25B3 39B3
FAN2_GND 25A4 38B6 39B3
FAN2_PWM 25A4 25B3
FAN2_TACH 25A4 25B3 39B3
FB_4_85V_BU 32A5
FP_PWR_EN 20C4 22A6 22B3
FP_PWR_EN_L 22B3
FWB_TPB0 28A3
FWB_TPB1 28A4
FWPLL_BYP 28C8
FW_BIAS0 28A5
FW_BIAS1 28A5
FW_BMODE 28B7
FW_CORE_ADJ 28C7
FW_CORE_BYP 28C7
FW_CPS 28B7
FW_INPUT_PD 28A7
FW_LINK_CNTL<1..0> 14C3 28C3 37A5
FW_LINK_DATA<7..0> 14C3 14D3 28A8 28B8 37A5
FW_LINK_LREQ 14C3 37A5
FW_LKON 14C3 28B5
FW_OSC 28A4 36A1
FW_OSC_EN 28A3
FW_PC_PD 28B7
FW_PC_PU 28B7
FW_PHY_CNTL<1..0> 28B5 28C4 37A5
FW_PHY_DATA<7..0> 28A8 28B8 37A5
FW_PHY_LPS 14C3 28B7
FW_PHY_LREQ 14C2 28B7 37A5
FW_PHY_PD 15C5 28B7
FW_PHY_RESET_L 28A8
FW_PINT 14C3 28B5 37A5
FW_PLL_ADJ 28C7
FW_PORT1_SEL 28B7
FW_PWREN_L 29C6
FW_PWR_GATE 29D6
FW_R0 28A5
FW_R1 28A5
FW_TESTM 28A7
FW_TPA0N 28B1 29C4 37D2
FW_TPA0P 28B1 29C4 37D2
FW_TPA1N 28B1 29A4 37C2
FW_TPA1P 28B1 29A4 37C2
FW_TPB0N 28B5 29C4 37D2
FW_TPB0P 28B5 29C4 37D2
FW_TPB1N 28B1 29A4 37C2
FW_TPB1P 28B1 29A4 37C2
FW_TPB2_PD 28A5
FW_TPI0N 37C2
FW_TPI0P 37C2
FW_TPI1N 29A3 37C2 39D2
FW_TPI1P 29A3 37C2 39D2
FW_TPO0N 37C2
FW_TPO0P 37C2
FW_TPO0R 29C2 38A3 39A3
FW_TPO1N 29A3 37C2 39D2
FW_TPO1P 29A3 37C2 39D2
FW_VGND0 29C2 38A3
FW_VGND1 29A3 38A3
FW_VREG_PD 28A7
FW_XI 28A5 36A1
GAIN_SETTING2 23C7
GPU_AGP_VREF 19A7 19C5 38C3
GPU_B 21C5 22D8
GPU_BUFRST_TP 20B2
GPU_B_FILTR 22D8
GPU_C 21C6 22B8
GPU_CLK27M_OUT 21A4 21B3 36C1
GPU_CLK27M_UF 21B4 36C1
GPU_COMP 21C6 22A8
GPU_CRT2HSYNC_TP 21D6
GPU_CRT2VSYNC_TP 21D6
GPU_DACVREF1 21C5
GPU_DACVREF2 21C6
GPU_DVI_DDC_CLK 20C2 22D3
GPU_DVI_DDC_DATA 20C2 22C3
GPU_DVOD<11..0> 21A8 21B6 21B8 21C3 21C6 37D5
GPU_DVO_CLKIN 21C6 21C8
GPU_DVO_CLKN_TP 21C6
GPU_DVO_CLKP 21B3 21C6 36B1
GPU_DVO_DE 21C3 21C6
GPU_DVO_HSYNC 21A8 21C3 21C6 37C5
GPU_DVO_VREF 21C6 21C7
GPU_DVO_VSYNC 21C3 21C6 37C5
GPU_FBACAS_TP 21B6
GPU_FBACKE 19B4
GPU_FBCLK0 19B5 19C4 36B1
GPU_FBCLK0_L 19A5 19B4 36B1
GPU_FBCLK1 19A5 19B4 36B1
GPU_FBCLK1_L 19A5 19B4 36B1
GPU_FB_VREF 19B4 38C3
GPU_G 21C5 22D8
GPU_GPIO8 20C4
GPU_GPIO9 20C4
GPU_G_FILTR 22D8
GPU_HPD 20C4 22C3
GPU_HSYNC 21D5
GPU_I2C1SCL 20C2
GPU_I2C1SDA 20C2
GPU_IFP0RSET 20A4
GPU_IFP0VREF 20A4
GPU_IFP1RSET 20A2
GPU_IFP1VREF 20A2
GPU_MSTRAPSEL<3..0> 21B8 21C4
GPU_R 21C5 22D8
GPU_ROMA14_TP 19B4
GPU_ROMA15_TP 19B4
GPU_ROMCS_TP 19B4
GPU_RSET1 21C5
GPU_RSET2 21C6
GPU_R_FILTR 22D8
GPU_SSCLK_IN 21A3 21B4 36B1
GPU_SSCLK_S0 20C4 21A5
GPU_SSCLK_S1 20C4 21A5
GPU_SSCLK_UF 21A3 36C1
GPU_SUS_STAT_L_PU 20C4
GPU_THERMDA_TP 21C4
GPU_THERMDC_TP 21C4
GPU_TMDS_CLKN 20B2 21A1 21B2
GPU_TMDS_CLKP 20B2 21A1 21B2
GPU_TMDS_DN<2..0> 20B2 21A1 21B2
GPU_TMDS_DP<2..0> 20B2 21A1 21B2
GPU_TV_GND1 22B8 38B6
GPU_TV_GND2 22A8 38B6
GPU_VCORE 20C5 20D6 38C3 39B2
GPU_VCORE_CNTL_L 20B6 20C4
GPU_VCORE_CNTL_L_RC 20B6
GPU_VCORE_PWR_SEQ 20D8
GPU_VCORE_SEQ 20D8
GPU_VCORE_SEQ_L 20D8
GPU_VCORE_SW 20C6 38B1
GPU_VIPD0_TP 19C2
GPU_VIPD1_TP 19C2
GPU_VIPD2_ROMTYPE<1..1> 19C2 21A8
GPU_VIPD3_PCI_DEVID<2..2> 19C2 21A8
GPU_VIPD4_PCI_DEVID<0..0> 19C2 21A8
GPU_VIPD5_PCI_DEVID<1..1> 19C2 21A8
GPU_VIPD6_CRYSTAL<1..1> 19C2 21B8
GPU_VIPD7_TP 19C2
GPU_VIPHAD0_TP 19C2
GPU_VIPHAD1_TP 19C2
GPU_VIPHCLK_TP 19C2
GPU_VIPHTCL_TP 19C2
GPU_VSYNC 21D5
GPU_XOR_TESTMODE_ENABLE 20A4
GPU_Y 21C6 22B8
HD_ADDR<2..0> 24B3 24C1 24C2 24C3 37C5
HD_CS0_L 24C2 24C3 37B5
HD_CS1_L 24B3 24C1 37B5
HD_DATA<15..0> 24B3 24C1 24C2 24C3 24D1 24D2 24D3
37C5
HD_DIOR_L 24A3 24C2 37B5
HD_DIOW_L 24A3 24C1 37B5
HD_DMACK_L 24A3 24C2 37B5
HD_DMARQ 14C6 24C2 37B5
HD_INTRQ 14C6 24C1 37B5
HD_IOCHRDY 24A3 24C1 37B5
HD_RESET_L 24A3 24D2 37B5
HIGH_VCORE 20B5
HPD_4V_REF 22C3
HPD_BASE 22C1
HPD_ON 22C2
HPD_ON_RC 22C2
HPD_PWR_SNS_EN 20C4 22C3
HPD_PWR_SW 22C2
HP_CONTROL 25C5
IAC_FB 31D4
IAC_RC_COMP 31D4
INTREPID_ACS_REF 9A6
INT_AGPPVT 13D4
INT_AGP_FB_IN 13C4 36C1
INT_AGP_FB_OUT 13C4 36C1
INT_AGP_VREF 13B4 13D4 38C3
INT_AUDIO_TO_SND 15B2 25C6 39C6
INT_CPUFB_IN 9A6 9B6 36D1
INT_CPUFB_IN_NORM 9A4 36D1
INT_CPUFB_LONG 9A4 36D1
INT_CPUFB_OUT 9A6 36D1
INT_CPUFB_OUT_NORM 9A4 36D1
INT_CPUFB_OUT_SHORT 9A5 36D1
INT_DDRCLK2_N_TP 10B6
INT_DDRCLK2_P_TP 10B6
INT_DDRCLK5_N_TP 10B6
INT_DDRCLK5_P_TP 10B6
INT_ENET_RST_L 15B5 27B8
INT_EXTINT3_PU 15B5 15B7
INT_EXTINT8_PU 15B5 15C7
INT_EXTINT10_PU 15A7 15B5
INT_EXTINT11_PU 15A7 15B5
INT_EXTINT12_PU 15A7 15B5
INT_EXTINT13_PU 15B5 15B7
INT_EXTINT14_PU 15B5 15C7
INT_EXTINT16_PU 15A7 15B5
INT_GPIO1_PU 15C5 15C7 34C8
INT_GPIO9_PU 15A7 15B5
INT_GPIO12_PU 15B5 15B7
INT_GPIO15_PU 15B5 15B7
INT_I2C_CLK0 12A3 12A8 14C2 14C3 23D2 23D4 39B8
INT_I2C_CLK1 14C2 14C3 15B7 25B4 39B8
INT_I2C_CLK2 15A2 25C4 25C6 39C6
INT_I2C_DATA0 12A3 12A8 14C2 14C3 23D2 23D4 39B8
INT_I2C_DATA1 14B2 14C3 15B7 25B4 39B8
INT_I2C_DATA2 15A2 25C4 25C6 39C6
INT_JTAG_TEI 14C2 14C5
INT_MEM_REF_H 10B6 38C3
INT_MEM_VREF 10A7 10B6 38C3
INT_MOD_BITCLK_PD 15A2 15A7
INT_MOD_CLKOUT_PU 15A2 15B7
INT_MOD_DTI_PD 15A2 15A7
INT_MOD_DTO_PU 15A2 15B7
INT_MOD_SYNC_PD 15A2 15A7
INT_PCI_FB_IN 13C7 36C1
INT_PCI_FB_OUT 13C7 36C1
INT_PEND_PROC_INT 15A5 30C4
INT_PROC_SLEEP_REQ_L 15A5 30B4
INT_PU_RESET_L 14D3 25C4 25D4 30A2 30C4
INT_REF_CLK_IN 15A5 15B5 36C1
INT_REF_CLK_OUT 15A5 15B7 36C1
INT_RESET_L 10B3 14D3 30C7 30D4
INT_ROM_CS_L 13A6 13C7
INT_ROM_OE_L 13A6 13C7
INT_ROM_RW_L 13A6 13C7
INT_SND_CLKOUT 15A3
INT_SND_SCLK 15A3
INT_SND_SYNC 15B3
INT_SND_TO_AUDIO 15B3
INT_SUSPEND_ACK_L 9B6 30B6
INT_SUSPEND_REQ_L 9B6 30B6 30C7
INT_TST_MONIN_PD 14C2 14C5
INT_TST_MONOUT_TP 14C5
INT_TST_PLLEN_PD 14C5 14D2
INT_WATCHDOG_L 15A5 30C6
INV_ON_PWM 20C4 22A3
IO_RESET_L 18A7 19B8 23D6 26B8 27B8 30C6 30D7
JTAG_ASIC_TCK 14C5 14D2 27A5 39D8
JTAG_ASIC_TDI 14C5 14D2 39D8
JTAG_ASIC_TDO_TP 27A5 39D8
JTAG_ASIC_TMS 14C5 14D2 27A5 39D8
JTAG_ASIC_TRST_L 14C2 14C5 27A5 39D8
JTAG_CPU_TCK 5B2 5C3 23B2 39C8
JTAG_CPU_TDI 5B2 5C3 23D4 39C8
JTAG_CPU_TDO_TP 5C3 39C8
JTAG_CPU_TMS 5B2 5C3 23C4 39C8
JTAG_CPU_TRST_L 5A3 5B3 23D4 39C8
JTAG_ENET_TDI 14C5 14D2 27A5
JTAG_L3_SRAM2_TDI 8C3 8C6
JTAG_L3_TCK 8C3 8C6 8C7 39B8
JTAG_L3_TDI_TP 8C6 39C8
JTAG_L3_TDO_TP 8C3 39B8
JTAG_L3_TMS 8C3 8C6 39C8
KBD_CAPSLOCK_LED 23A7 39B4
KBD_COMMAND_L 23A5 23A7 30C6 39B4
KBD_CONTROL_L 23A5 23A7 30A8 30C6 39B4
KBD_FUNCTION_L 23A5 23A7 30B6 39B4
KBD_ID 23A7 23B5 30B6 39C4
KBD_LED1_OUT 23A5 23A7 38B6 39C2
KBD_LED2_OUT 23A5 23A7 38B6 39C2
KBD_LED_EN 23A5
KBD_LED_SET 23A5
KBD_NUMLOCK_LED 23B7 39C3
KBD_OPTION_L 23A5 23B7 30A8 30B6 39B4
KBD_SHIFT_L 23A5 23B7 30A8 30C6 39B4
KBD_X<9..0> 23A5 23B5 23B7 30C6 39A4 39B4 39D3
KBD_Y<7..0> 23B7 30C6 30D6 39C3 39D3
L3_ADDR<17..0> 6D6 8C3 8C6 8D3 8D6 36C5
L3_CLK<1..0> 6C3 8D1 8D4 36C1
L3_CLK_REF 8B7 8D1 8D4 38D3
L3_CNTL<1..0> 6C3 8C3 8C6 36C5
L3_DATA<63..0> 6A6 6B6 6C6 8C1 8C4 8D1 8D4 36C5
L3_DQPA<1..0> 8C1 8C4 8D7
L3_DQPB<1..0> 8C1 8C4 8D7
L3_DQPC<1..0> 8C1 8C4 8D7
L3_DQPD<1..0> 8C1 8C4 8D7
L3_ECHO_CLK<3..0> 6B3 8C3 8C6 36C1
L3_OVDD 6B1 6D3 8A2 8B5 8B7 8B8 8D1 8D4
38D3
L3_PULLDOWN<1..0> 8C3 8C6 8C7
L3_VREF 8B7 8C3 8C6 38D3
L3_ZQ<1..0> 8D2 8D5
LCD_DIGON_L 22A6
LCD_PWREN_L 22A5
LED_LINK10 27B5
LED_LINK100 27B5
LED_RX_SPN 27B5
LEFT_USB_DM 24B2 26B3 37A2 39D1
LEFT_USB_DP 24B2 26A3 37A2 39D1
LID_CLOSED_L 23A7 39C4
LM2594_IN 28D8 38B3
LT1962_1V5_ADJ 16B2
LT1962_1V5__BYP 16B2
LT1962_INT_ADJ 15D6
LT1962_INT_BYP 15D6
LT1962_L3_ADJ 6B2 39C1
LT1962_L3_BYP 6A2
LTC1625_ITH 31D3
LTC1778_SHDN 20C8
LTC1962_1V5_VIN 16B3 38A1
LTC1962_1V5_VOUT 16B2 38A1
LTC1962_INT_VIN 15D7 38A1
LTC1962_L3_VIN 6B3 38A1
LTC1962_L3_VOUT 6B2 38A1
LTC3405_SW 27D4 38B3
LTC3411_GND 35A5 38A1
LTC3411_ITH 35A5 38A1
LTC3411_ITH_RC 35A5 38A1
LTC3411_SHDN 35A6 38A1
LTC3411_SYNC 35A6 38A1
LTC3411_VCC 35A6 38B1
LTC3707_START_RC 33B6
LVDS_DDC_CLK 20C2 22B5 39A7
LVDS_DDC_DATA 20C2 22B5 39A7
LVDS_L0N 20C2 22B4 37C2 39C7
LVDS_L0P 20C2 22B4 37C2 39C7
LVDS_L1N 20C2 22B4 37C2 39C7
LVDS_L1P 20C2 22B4 37C2 39C7
LVDS_L2N 20C2 22B4 37C2 39C7
LVDS_L2P 20C2 22B4 37C2 39C7
LVDS_L3N_SPN 20C2
LVDS_L3P_SPN 20C2
LVDS_U0N 20C2 22A4 37C2 39B7
LVDS_U0P 20C2 22A4 37C2 39B7
LVDS_U1N 20C2 22A4 37C2 39B7
LVDS_U1P 20B2 22A4 37C2 39B7
LVDS_U2N 20B2 22A4 37B2 39B7
LVDS_U2P 20B2 22A4 37B2 39B7
LVDS_U3N_SPN 20B2
LVDS_U3P_SPN 20B2
MAIN_RESET_L 18A7 18D5 19B8 21C3 24D6 26B8 30D4
30D7 39C1
MAX1715_GND 35B5 35C5 38C1
MAX1715_ON_RC 35C7
MAX1715_REF 35B5 38C1
MAX1715_SKIP 35C4 38C1
MAX1715_TON 35C5 38C1
MAX1715_VCC 35D5 38C1
MAX1717_AB_SEL 34C6
MAX4172_OUT 31D4
MAXBUS_SLEEP 5A2 5D2 5D5 7A8 7D7 9B8 9C3 9C8 9D1
9D8 16D8 17D8 23B3 34D8 38D3
MDI0_PD 27B4
MDI1_PD 27B4
MDI2_PD 27B4
MDI3_PD 27B3
MDI_M<3..0> 27B5 37D2
MDI_P<3..0> 27B5 37D2
MEM_ADDR<12..0> 10A5 10B5 10D6 36A5
MEM_BA<1..0> 10A5 10C6 10D6 36A5
MEM_CAL_CLK 19B2
MEM_CAL_PD 19B2
MEM_CAL_PU 19B2
MEM_CAS_L 10A5 10C6 36A5
MEM_CKE<3..0> 10B6 10C5 36A5
MEM_CS_L<3..0> 10C5 10C6 36A5
MEM_DATA<63..0> 10B8 10C8 10D8 11B1 11B3 11B5 11B7
11C1 11C3 11C5 11C7 36A5 36B5 36C5
MEM_DQM<7..0> 10C6 11B1 11B3 11B5 11B7 11C1 11C3
11C5 11C7 36A5 36B5 36C5
MEM_DQS<7..0> 10C6 11B1 11B3 11B5 11B7 11C1 11C3
11C5 11C7 36A5 36B5 36C5
MEM_MUXSEL_H<1..0> 10B6 11A4 11A6 36A5
MEM_MUXSEL_L<1..0> 10B6 11A4 11A6 36A5
MEM_RAS_L 10A5 10C6 36A5
MEM_WE_L 10A5 10C6 36A5
MLB_ALS_GAIN_SW 23C4 23C8
MLB_ALS_OP_COMP 23D7
MLB_ALS_OP_IN 23D7
MLB_ALS_OUT 23C4 23D6
MLB_ALS_OUT_FB 23D7
MLB_PHOTODIODE 23D8
MODEM_USB_DM 15B1 25C3 37A2 39B6
MODEM_USB_DP 15B1 25C3 37A2 39B6
MPIC_CPU_INT_L 5B2 5B3 15B5
NEC_AMC_TP 26A5
NEC_AVDD 26D6 38A3
NEC_CRUN_L 26A7
NEC_IDSEL 26B7
NEC_IO_RESET_L 26B7
NEC_LEFT_USB_OVERCURRENT 24B2 26C1 39D1
NEC_LEFT_USB_PWREN 24B2 26B5 39D1
NEC_LEGC 26A7
NEC_MAIN_RESET_L 26A7 26B7
NEC_NANDTESTEN_TP 26A5
NEC_NANDTESTOUT_TP 26A4
NEC_NC1_TP 26B5
NEC_NC2_TP 26B5
NEC_OCI<5..1> 26B5 26C3
NEC_PCI_INTA_L 26A7 26B7
NEC_PCI_INTB_L 26A7 26B7
NEC_PCI_INTC_L 26A7 26B7
NEC_PCI_PERR_L 26B7 26C8
NEC_PCI_SERR_L 26B7 26C8
NEC_PME_L 26A7 26B7
NEC_PPON3_TP 26B5
NEC_PPON4_TP 26B5
NEC_PPON5_TP 26B5
NEC_RIGHT_USB_OVERCURRENT 26C1 32A7 39C1
NEC_RIGHT_USB_PWREN 26B5 32A7 39C1
NEC_RREF 26B5
NEC_SMI_L_TP 26A7
NEC_USB_DAM 26B4 26C3 37B2
NEC_USB_DAP 26A4 26C4 37B2
NEC_USB_DBM 26A4 26C3 37B2
NEC_USB_DBP 26A4 26C3 37B2
NEC_USB_RSDM1 26C5 37B2
NEC_USB_RSDM2 26C5 37B2
NEC_USB_RSDP1 26C5 37B2
NEC_USB_RSDP2 26C5 37B2
NEC_XT1 26D5 36B1
NEC_XT2 26D5 36B1
NEC_XT2_R 26D4
NUMLOCK_LED 23B8
NUMLOCK_LED_L 23B8 30C7
OVER_18V_ADJ 31C3
PCI1510_VR_EN_L 18C7
PCI_AD<31..0> 10B3 10C1 10C3 13C6 13D6 18B7 18C7
24B5 24B6 24C5 24C6 24D4 24D5 24D6
26B7 26C7 26C8 26D7 37C5 39A5 39A6
39B5 39B6 39C5 39D5
PCI_CBE<3..0> 13C7 18B7 24C5 24C6 26B7 37C5 39D4
PCI_DEVSEL_L 13B7 13C7 18A7 24C5 26B7 37C5 39A5
PCI_FRAME_L 13B7 13C7 18B7 24C5 26B7 37C5 39A5
PCI_IRDY_L 13B7 13C7 18B7 24C6 26B7 37C5 39A5
PCI_PAR 13C7 18B7 24C5 26B7 37C5 39D4
PCI_STOP_L 13A7 13C7 18B7 24C5 26B7 37C5 39A5
PCI_TRDY_L 13B7 13C7 18A7 24C5 26B7 37C5 39A5
PLL_STOP_L 7C7
PMU_ACK_L 15C2 30C4
PMU_AC_DET 30A4 30B4
PMU_AC_IN 30B4
PMU_BATT0_DET_L 30B4
PMU_BATT1_DET_L_PU 30B4 30D2
PMU_BATT_DET_L 30B3 30D2 31A4 39C3
PMU_BYTE 30B6 30C7
PMU_CAPSLOCK_LED_L 30C6
PMU_CHARGE_V 30C4 31B8
PMU_CHRG_BATT_0 30C4 31A8
PMU_CLK 15C2 30C4
PMU_CNVSS 30B6 30C7
PMU_CPU_HRESET_L 23A4 23C4 30C4
PMU_EPM 30D2 30D4
PMU_FROM_INT 15C2 30C4
PMU_I2C_CLK 30B4 30C2
PMU_I2C_DATA 30B4 30C2
PMU_INT_L 15B5 15B7 30B6
PMU_INT_NMI 15B5 15B7 30D4
PMU_KB_RESET_IN1 30A7
PMU_KB_RESET_IN2 30A7
PMU_KB_RESET_L 30A6 30B7 39B2
PMU_LID_CLOSED_L 23A8 23C4 30B2 30C4
PMU_NMI_BUTTON_L 25C2 30C2 30C4
PMU_NMI_L 30C2 30C4
PMU_NUMLOCK_LED_L 30C6
PMU_OOPS 30B2 30B4
PMU_PME_L 15B5 26B8 30B2 30C4
PMU_POWERUP_OK 30B4 30D2
PMU_POWER_UP_L 29C7 30C6 30D7 33B6
PMU_REQ_L 15B7 15C2 30C4
PMU_RESET_BUTTON_L 25B2 30C4 30D2
PMU_RESET_L 30B6
PMU_SLEEP_LED 23C4
PMU_SLEEP_LED_L 23C2 30C4
PMU_SMB_CLK 30B4 30C2 31A3
PMU_SMB_DATA 30B4 30C2 31A2
PMU_TO_INT 15C2 30C4
POWER_UP 29C7
POWER_VALID 30B2 30C4
PWR_BUTTON_L 23A7 25C2 39B2
RAM_ADDR<12..0> 10A4 10B4 12B3 12B5 12B6 12B8 36A5
RAM_BA<1..0> 10A4 12B3 12B5 12B6 12B8 36A5
RAM_CAS_L 10A4 12B5 12B6 36A5
RAM_CKE<3..0> 10A3 10C4 12B6 12B8 12C3 12C5 36A5
RAM_CS_L<3..0> 10C4 12B3 12B5 12B6 12B8 36A5
RAM_DATA_A<63..0> 11B2 11B4 11B6 11B8 11C1 11C2
11C3 11C4 11C5 11C6 11C7 11C8 11D1
11D3 12A6 12A8 12B6 12B8 12C6 12C8
12D6 12D8 36A5 36B5 36C5
RAM_DATA_B<63..0> 11C2 11C4 11C6 11C8 11D2 11D4
12A3 12A5 12B3 12B5 12C3 12C5 12D3
12D5 36A5 36B5 36C5
RAM_DQM_A<7..0> 11B2 11B4 11B6 11B8 11C1 11C3 11C5
11C7 12A6 12B6 12C6 12D6 36A5 36B5
36C5
RAM_DQM_B<7..0> 11C2 11C4 11C6 11C8 12A5 12B5 12C5
12D5 36A5 36B5 36C5
RAM_DQS_A<7..0> 11B2 11B4 11B6 11B8 11C1 11C3 11C5
11C7 12A8 12B8 12C8 12D8 36A5 36B5
36C5
RAM_DQS_B<7..0> 11C2 11C4 11C6 11C8 12A3 12B3 12C3
12D3 36A5 36B5 36C5
RAM_MUXSEL_H 11A3 11A5 11B1 11B3 36A5
RAM_MUXSEL_L 11A3 11A5 11B5 11B7 36A5
RAM_RAS_L 10A4 12B5 12B6 36A5
RAM_WE_L 10A4 12B3 12B8 36A5
RF_DISABLE_L_SPN 24D6 39C1
RIGHT_USB_DM 26A3 32A7 37A2 39D1
RIGHT_USB_DP 26A3 32A7 37A2 39D1
RJ45_C0_PD 27B2
RJ45_C1_PD 27B2
RJ45_C2_PD 27B2
RJ45_C3_PD 27B2
RJ45_DN<3..0> 27B2 37D2 39A3 39B3
RJ45_DP<3..0> 27B2 37D2 39A3 39B3
ROM_CS_L 10B3 13A5 24B6 39B1
ROM_OE_L 10B3 13A5 24C5 39B1
ROM_ONBOARD_CS_L 10B3 24C6 39B1
ROM_RW_L 10B3 13A5 24C6 39B1
ROM_WP_L 10B3
RUN_OR_AC 29C6
SI_DK<1..0> 21C3
SI_EDGE 21C3
SI_EXT_SWING_SET 21C1
SI_I2C_OFF 21C3
SI_TMDS_CLKN 21A2 21B3 21C1
SI_TMDS_CLKP 21A2 21B3 21C1
SI_TMDS_DN<2..0> 21A2 21B3 21C1
SI_TMDS_DP<2..0> 21A2 21B3 21C1
SLEEP 23C4 30B6 30D7 33A5 33A6 33B3 35B3
35D2
SLEEP_LED 23C1 25C7
SLEEP_LED_I 23D1
SLEEP_LED_L 23D1
SLEEP_LED_SW_L 23C2
SLEEP_LED_UF 23C1
SLEEP_LS5 25D8 33A3 33A8
SLEEP_LS5_EN_L 33A4
SLEEP_L_LS5 20D6 27A8 33A4 34C8 35D7
SLEEP_L_LS5_EN_L 33A5
SND_AGND 25C7 38B6
SND_AMP_MUTE 25C6
SND_AMP_MUTE_L 15C5 25D5 39C6
SND_CLKOUT 15A1 25C6 36B1 39D6
SND_HP_MUTE 25C6
SND_HP_MUTE_L 15C5 25C4 39C6
SND_HP_SENSE_L 15B5 25C6 39C6
SND_HW_RESET_L 15A7 15B5 25C7 39C6
SND_LIN_SENSE_L 15B5 25C7 39C6
SND_SCLK 15B1 25C6 36B1 39C6
SND_SYNC 15B1 25C6 39D6
SND_TO_AUDIO 15B1 25C6 39D6
SOFT_PWR_ON_L 22D1 23A8 30A8 30C6 30D7 34A4
ST7_ICP_SEL_PD 23A2 23D6
ST7_KBD_LED_OUT 23A4 23C4
ST7_OSC1 23D5
ST7_OSC2 23D5
ST7_PB6_PD 23B2 23C4
ST7_RESET_L 23D5
ST7_SENSOR4_SCK_PD 23B2 23D4
ST7_SENSOR4_SDA_PD 23B2 23D4
ST7_SENSOR5_SCK_PU 23B2 23D4
ST7_SENSOR5_SDA_PU 23B2 23D4
ST7_SLEEP_LED_H 23C2 23C4
ST7_XTAL_IN 23C5
STOP_AGP_L 13D2 13D4 19A7
SUTRO_ALS_GAIN_SW 23C4 24B2 39C2
SUTRO_ALS_OUT 23C4 24B2 39C2
SYSCLK_CPU 5C3 9A6 36D1
SYSCLK_CPU_UF 9A6 36D1
SYSCLK_DDRCLK_A0 10D4 12D8 36D1
SYSCLK_DDRCLK_A0_L 10D4 12D8 36D1
SYSCLK_DDRCLK_A0_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A0_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A1 10D4 12A6 36D1
SYSCLK_DDRCLK_A1_L 10D4 12A6 36D1
SYSCLK_DDRCLK_A1_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A1_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B0 10D4 12D3 36D1
SYSCLK_DDRCLK_B0_L 10C4 12D3 36C1
SYSCLK_DDRCLK_B0_L_UF 10B6 10C5 36D1
SYSCLK_DDRCLK_B0_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B1 10D4 12A5 36C1
SYSCLK_DDRCLK_B1_L 10D4 12A5 36C1
SYSCLK_DDRCLK_B1_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B1_UF 10B6 10D5 36D1
SYSCLK_LA_TP 9A6
SYSTEM_CLK_EN 15A5 15B7 15C7 30C4
THERM1_A_DM 25A6 25A7 37A2
THERM1_A_DP 25A6 25A7 37A2
THERM1_DM 25A5 25B4 25B5 37A2
THERM1_DP 25A5 25B4 25B5 37A2
THERM1_M_DM 25B6 25B7 37A2
THERM1_M_DP 25B6 25B7 37A2
THERM2_A_DM 25A6 25A7 37A2
THERM2_A_DP 25A6 25A7 37A2
THERM2_DM 25A5 25B4 25B5 37A2
THERM2_DP 25A5 25B4 25B5 37A2
THERM2_M_DM 25A7 25B6 37A2
THERM2_M_DP 25B6 25B7 37A2
THERM_L_OC 25B3 30B2 30B4
TMDS_CLKN 20A1 21B1 21B2 22C8 37B2
TMDS_CLKP 20A2 21B1 21B2 22C8 37B2
TMDS_CLK_CMF 20B1
TMDS_CONN_CLKN 22C7 37B2 39A8
TMDS_CONN_CLKP 22C7 37B2 39D7
TMDS_D0_CMF 20D1
TMDS_D1_CMF 20C1
TMDS_D2_CMF 20C1
TMDS_DN<2..0> 20B1 20C1 20D1 21B1 21B2 22D5 22D6
37B2 39A8 39B8
TMDS_DP<2..0> 20B2 20C2 20D2 21B1 21B2 22D5 22D6
37B2 39A8
TPAD_F_RXD 23A7 39C4
TPAD_F_TXD 23A7 39C4
TPAD_RXD 23A8 30C2 30C4
TPAD_TXD 23A8 30B2 30C4
TPS2211_SHDN_L_PU 18C4
TV_C 22B6 39D6
TV_COMP 22B6 39D6
TV_GND1 22B6 38B6 39A7
TV_GND2 22A6 38B6 39A7
TV_Y 22B6 39D6
UIDE_ADDR<2..0> 14D7 24B4 24C4 37C5
UIDE_CS0_L 14C7 24C4 37C5
UIDE_CS1_L 14C7 24B4 37C5
UIDE_DATA<15..0> 14D7 24B4 24C4 24D4 37C5
UIDE_DIOR_L 14C7 24A4 37C5
UIDE_DIOW_L 14C7 24A4 37C5
UIDE_DMACK_L 14C7 24A4 37C5
UIDE_DMARQ 14C7 37C5
UIDE_INTRQ 14C7 37C5
UIDE_IOCHRDY 14C7 24A4 37C5
UIDE_REF 14C7 38C3
UIDE_RST_L 14C7 24A4 37C5
USB2_PCI_GNT_L 13C7 26B7
USB2_PCI_INT_L 15B5 15C7 26A8
USB2_PCI_REQ_L 13A7 13D7 26B7
USB_D1M 15C1 26A5 26B4 39B6
USB_D1P 15C1 26A4 26A5 39B6
USB_D2M 15D1 26A4 26A5 39B6
USB_D2P 15D1 26A4 26A5 39B6
USB_DAM 15B2 15D2 26A5
USB_DAP 15B2 15D2 26A5
USB_DBM 15B2 15D2
USB_DBP 15B2 15D2
USB_DCM 15B2 15C2 26A5
USB_DCP 15B2 15C2 26A5
USB_DDM 15B2 15C2
USB_DDP 15B2 15C2
CR-41
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 42 44
E051-6469
USB_DEM 15B2 15C2 37B2
USB_DEP 15B2 15C2 37B2
USB_DFM 15B2 37B2
USB_DFP 15B2 37B2
USB_OC_AB_L 15B2 15C7
USB_OC_CD_L 15B2 15C7
USB_OC_EF_L 15B2 15C7
USB_PWREN_AB_L 15B2 15C7
USB_PWREN_CD_L 15B2 15C7
USB_PWREN_EF_L 15B2 15D7
VCORE_BOOST 34C4 38C1
VCORE_BST 34C5 38C1
VCORE_CC 34B6 38B1
VCORE_DH 34B5 38C1
VCORE_DL 34B5 38C1
VCORE_FAST<4..1> 34D2 34D3 34D5
VCORE_FB 34B5 38B1 39A2
VCORE_GND 34B5 38B1
VCORE_GNDA 34B6
VCORE_GNDDIV 34A5 34B5 38B1
VCORE_GNDDIV_TEST 34A4
VCORE_GNDSNS 34A1 34A5 38B1
VCORE_GNDSNS_TEST 34A4
VCORE_ILIM 34C6 38C1
VCORE_LX 34B5 38C1
VCORE_MUX_EN 34D5
VCORE_MUX_SEL 34D5
VCORE_REF 34B6 38C1
VCORE_SHDN_L 34C6
VCORE_SLOW<4..1> 34D6
VCORE_SNS 34A1 38B1
VCORE_TIME 34B4 38B1
VCORE_TON 34B6 38C1
VCORE_VCC 34C6 38C1
VCORE_VGATE 15B5 15B7 34B4 38B1
VCORE_VID<4..0> 34A3 34B8 34D4
VGA_B 22C6 22D7 39D7
VGA_G 22C5 22D7 39D7
VGA_HSYNC 21D4 22C6 39D7
VGA_R 22C5 22D7 39D7
VGA_VSYNC 21D4 22C5 39D7
VIPPCLK_PD 19C2
CR-42
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 43 44
E051-6469
*** Unit Cross-Reference ***
--- for the entire design --
BS1 PCB_STANDOFF 4D3
C1 CAP 34C2
C2 CAP 34D1
C3 CAP 34D2
C4 CAP 34C1
C5 CAP 34C1
C6 CAP 34D1
C7 CAP 34C1
C8 CAP 34D1
C9 CAP 5D4
C10 CAP 17C4
C11 CAP 17D8
C12 CAP 17C4
C13 CAP 19C5
C14 CAP 34C2
C15 CAP 35A6
C16 CAP 15A5
C17 CAP 17C3
C18 CAP 17B2
C19 CAP 17B3
C21 CAP 17C1
C22 CAP 17B2
C23 CAP 17C2
C24 CAP 21D3
C25 CAP 17B2
C26 CAP 17B3
C27 CAP 17B1
C28 CAP 19C5
C29 CAP 5D4
C30 CAP 5D6
C31 CAP 5D6
C32 CAP 34D1
C33 CAP 17C1
C34 CAP 17B1
C35 CAP 17C1
C36 CAP 17B1
C37 CAP 17B2
C38 CAP 17C2
C39 CAP 17C3
C40 CAP 17C3
C41 CAP 17B3
C42 CAP 17C3
C43 CAP 17B3
C44 CAP 19D6
C45 CAP 5D5
C46 CAP 17C3
C47 CAP 17C3
C48 CAP 17B1
C49 CAP 17C2
C50 CAP 20D5
C51 CAP 5D5
C52 CAP 17B3
C53 CAP 17B1
C54 CAP 17B3
C55 CAP 17C2
C56 CAP 17C3
C57 CAP 17B1
C58 CAP 17C3
C59 CAP 17B1
C60 CAP 17C1
C61 CAP 17B3
C62 CAP 17B3
C63 CAP 17C2
C64 CAP 17B2
C65 CAP 19C6
C66 CAP 19C4
C67 CAP 19D4
C68 CAP 20D4
C69 CAP 20D4
C70 CAP 20D4
C71 CAP 20D4
C72 CAP 19D4
C73 CAP 5D5
C74 CAP 5D6
C75 CAP 5D5
C76 CAP 5D5
C77 CAP 5C3
C78 CAP 17B3
C79 CAP 17C2
C80 CAP 19D4
C81 CAP 19D4
C82 CAP 20D4
C83 CAP 20D5
C84 CAP 19D3
C85 CAP 19D4
C86 CAP 35A7
C87 CAP 13D7
C88 CAP 15C3
C89 CAP 15C3
C90 CAP 24A4
C92 CAP 19D6
C93 CAP 19D3
C94 CAP 19D2
C95 CAP 5D5
C96 CAP 17D5
C97 CAP 17D6
C98 CAP 17B1
C99 CAP 15C2
C100 CAP 17B2
C101 CAP 17B2
C102 CAP 17B1
C103 CAP 17D4
C104 CAP 19D4
C105 CAP 19C4
C106 CAP 17C3
C107 CAP 17B1
C108 CAP 5D7
C109 CAP 5D7
C110 CAP 5D6
C111 CAP 5D5
C112 CAP 34C1
C113 CAP 17D6
C114 CAP 17D6
C115 CAP 17D5
C116 CAP 17B3
C117 CAP 17C1
C118 CAP 17B3
C119 CAP 17C1
C120 CAP 17B1
C121 CAP 17C2
C122 CAP 17B2
C123 CAP 17B1
C124 CAP 17D4
C125 CAP 19D5
C126 CAP 20D5
C127 CAP 20D5
C128 CAP 20D5
C129 CAP 15A5
C130 CAP 17B2
C131 CAP 17D2
C132 CAP 17C1
C133 CAP 17D3
C134 CAP 17B2
C135 CAP 17B3
C136 CAP 17D3
C137 CAP 15D5
C138 CAP 5D7
C139 CAP 5D7
C140 CAP 5D6
C141 CAP 5D7
C142 CAP 17D5
C143 CAP 17D2
C144 CAP 13D4
C145 CAP 17D2
C146 CAP 17D1
C147 CAP 17B2
C148 CAP 17C4
C149 CAP 19C6
C150 CAP 19D5
C151 CAP 20D5
C152 CAP 20D4
C153 CAP 5D8
C154 CAP 17D4
C155 CAP 17D7
C156 CAP 17D6
C157 CAP 17D7
C158 CAP 17D7
C159 CAP 17D7
C160 CAP 17D6
C161 CAP 17D2
C162 CAP 17D3
C163 CAP 17D3
C164 CAP 17D2
C165 CAP 17D2
C166 CAP 15D5
C167 CAP 17B3
C168 CAP 17C3
C169 CAP 17C2
C170 CAP 19D4
C171 CAP 6C2
C172 CAP 5D7
C173 CAP 5D6
C174 CAP 5D6
C175 CAP 17D2
C176 CAP 15C5
C177 CAP 17C1
C178 CAP 15D5
C179 CAP 6C3
C180 CAP 5D7
C181 CAP 17D8
C182 CAP 17C7
C183 CAP 17D7
C184 CAP 17D6
C185 CAP 17D1
C186 CAP 17C7
C187 CAP 17B3
C188 CAP 17D3
C189 CAP 17D3
C190 CAP 17D2
C191 CAP 17D1
C192 CAP 17D1
C193 CAP 17C5
C194 CAP 17C6
C196 CAP 19C5
C197 CAP 20D5
C198 CAP 20D5
C199 CAP 20D4
C200 CAP 5D7
C201 CAP 5D6
C202 CAP 5D6
C203 CAP 5D5
C204 CAP 5D8
C205 CAP 17D6
C206 CAP 17D2
C207 CAP 17C7
C208 CAP 17C6
C209 CAP 17C7
C210 CAP 17C8
C211 CAP 21D4
C212 CAP 20D5
C213 CAP 20D6
C214 CAP 35A2
C215 CAP 17D8
C216 CAP 17D6
C217 CAP 17D6
C218 CAP 17D7
C219 CAP 17D7
C220 CAP 17D5
C221 CAP 17D3
C222 CAP 17D3
C223 CAP 17D3
C224 CAP 10A7
C225 CAP 17D3
C226 CAP 13B4
C227 CAP 17B3
C228 CAP 17B7
C229 CAP 17C6
C230 CAP 17B7
C231 CAP 21D4
C232 CAP 21D4
C233 CAP 20D5
C234 CAP 20D5
C235 CAP 20D6
C236 CAP 6D2
C237 CAP 6D3
C238 CAP 5D5
C239 CAP 5D8
C240 CAP 17D7
C241 CAP 17D5
C242 CAP 17C2
C243 CAP 17D3
C244 CAP 17D3
C245 CAP 17D1
C246 CAP 17C7
C247 CAP 17B7
C248 CAP 17C6
C249 CAP 17C7
C250 CAP 21D4
C251 CAP 19D3
C252 CAP 20C1
C253 CAP 20C1
C254 CAP 19C4
C255 CAP 5D7
C256 CAP 35A2
C257 CAP 30A3
C258 CAP 17C1
C259 CAP 17D1
C260 CAP 17D1
C261 CAP 17D1
C262 CAP 17C8
C263 CAP 21C4
C264 CAP 19D5
C265 CAP 6D2
C266 CAP 6C3
C267 CAP 17D5
C268 CAP 17D5
C269 CAP 17D6
C270 CAP 17A6
C271 CAP 17A7
C272 CAP 17B6
C273 CAP 17B6
C274 CAP 17B7
C275 CAP 17A5
C276 CAP 17A5
C277 CAP 17B7
C278 CAP 17B3
C279 CAP 17C7
C280 CAP 17C5
C281 CAP 21B4
C282 CAP 19C4
C283 CAP 19D4
C284 CAP 20D4
C285 CAP 20D4
C286 CAP 20D6
C287 CAP 20D5
C288 CAP 19D4
C289 CAP 19D4
C290 CAP 6D3
C291 CAP 9D5
C292 CAP 17A5
C293 CAP 17B7
C294 CAP 19C4
C295 CAP 6C2
C296 CAP 6C3
C297 CAP 6D3
C298 CAP 17D6
C299 CAP 17D6
C300 CAP 17D5
C301 CAP 17D4
C302 CAP 17A7
C303 CAP 17B6
C304 CAP 17A7
C305 CAP 17A5
C306 CAP 17B5
C307 CAP 17A7
C308 CAP 17B6
C309 CAP 17C5
C310 CAP 17C5
C311 CAP 17C6
C312 CAP 21D6
C313 CAP 19C4
C314 CAP 19C4
C315 CAP 21D4
C316 CAP 21D5
C317 CAP 19D4
C318 CAP 19C4
C319 CAP 21D4
C320 CAP 17A6
C321 CAP 17A6
C322 CAP 17A5
C323 CAP 17A7
C324 CAP 21D7
C325 CAP 21D6
C326 CAP 17D8
C327 CAP 17D5
C328 CAP 17D7
C329 CAP 17C3
C330 CAP 17B6
C331 CAP 15D5
C332 CAP 17A6
C333 CAP 17C6
C334 CAP 17C7
C335 CAP 17C6
C336 CAP 17C8
C337 CAP 21B7
C338 CAP 21D5
C339 CAP 20B4
C340 CAP 20B4
C341 CAP 20A5
C342 CAP 20A6
C343 CAP 20A2
C344 CAP 21D5
C345 CAP 17B5
C346 CAP 17B5
C347 CAP 17B7
C348 CAP 17A6
C349 CAP 17A6
C350 CAP 17B6
C351 CAP 21B4
C352 CAP 21D7
C353 CAP 21C6
C354 CAP 20A5
C355 CAP 17C3
C356 CAP 17B5
C357 CAP 17C5
C358 CAP 17C6
C359 CAP 21D7
C360 CAP 20A6
C361 CAP 20A6
C362 CAP 20B2
C363 CAP 20B2
C364 CAP 17A6
C365 CAP 17B5
C366 CAP 17A7
C367 CAP 17A6
C368 CAP 17A6
C369 CAP 17A5
C370 CAP 17B6
C371 CAP 17B7
C372 CAP 17B5
C373 CAP 17C5
C374 CAP 17C8
C375 CAP 20A1
C376 CAP 20A1
C377 CAP 17C4
C378 CAP 17B2
C379 CAP 17A6
C380 CAP 17A5
C381 CAP 17A7
C382 CAP 17A7
C383 CAP 17A6
C384 CAP 17A7
C385 CAP 17B6
C386 CAP 17A7
C387 CAP 17A5
C388 CAP 17A5
C389 CAP 17B7
C390 CAP 20A7
C391 CAP 20B2
C392 CAP 17A6
C393 CAP 20B4
C394 CAP 21D6
C395 CAP 21D7
C396 CAP 35C1
C397 CAP 17B8
C398 CAP 17B8
C399 CAP 15D5
C400 CAP 20A8
C401 CAP 35D2
C402 CAP 17B8
C403 CAP 17B8
C404 CAP 15D6
C405 CAP 22B4
C406 CAP 20D1
C407 CAP 20D1
C408 CAP 20A8
C409 CAP 20B1
C410 CAP 20B1
C411 CAP 15D7
C412 CAP_P 34C4
C413 CAP_P 34C3
C414 CAP_P 34C3
C415 CAP_P 34C3
C416 CAP_P 34C3
C417 CAP_P 34C4
C418 CAP 22B2
C419 CAP_P 34C4
C420 CAP_P 34C4
C425 CAP 27B6
C426 CAP 27A4
C427 CAP 27D4
C428 CAP 27C5
C429 CAP 27A7
C430 CAP 27A8
C431 CAP 27A4
C432 CAP 20B8
C433 CAP 22B4
C434 CAP 27A4
C435 CAP 27C5
C436 CAP 34C4
C437 CAP 33A3
C438 CAP 27C4
C439 CAP 31D6
C440 CAP 34B6
C441 CAP 10D3
C442 CAP 20B8
C443 CAP 22A4
C444 CAP 32C5
C445 CAP 32C6
C446 CAP 32C6
C447 CAP 27C3
C448 CAP 18D3
C449 CAP 31D7
C450 CAP 25D4
C451 CAP 10D2
C452 CAP 27C5
C453 CAP 20C7
C454 CAP 33C6
C455 CAP 27C5
C456 CAP 27D3
C457 CAP 27C3
C458 CAP 25D4
C459 CAP 10D2
C460 CAP 12D1
C461 CAP 20B7
C462 CAP 22A5
C463 CAP 32C6
C464 CAP 27D3
C465 CAP 27A4
C466 CAP 27C4
C467 CAP 20C7
C468 CAP 33D7
C469 CAP 32D5
C470 CAP 23C4
C471 CAP 34C5
C472 CAP 31D3
C473 CAP 22A4
C474 CAP 27C2
C475 CAP 34C6
C476 CAP 35B5
C477 CAP 32C4
C478 CAP 32C6
C479 CAP 27C4
C480 CAP 25D3
C481 CAP 20B6
C482 CAP 20B5
C483 CAP 27C4
C484 CAP 27C4
C485 CAP 27C5
C486 CAP 27C4
C487 CAP 27C2
C488 CAP 34B4
C489 CAP 34B6
C490 CAP 31B4
C491 CAP 35C6
C492 CAP 33D7
C493 CAP 34B4
C494 CAP 23C4
C495 CAP 26D8
C496 CAP 26D8
C497 CAP 34B7
C498 CAP 12B2
C499 CAP 35C6
C500 CAP 33C5
C501 CAP 33B4
C502 CAP 32C4
C503 CAP 32C3
C504 CAP 32C7
C505 CAP 28A7
C506 CAP 28C4
C507 CAP 28C4
C508 CAP 28D6
C509 CAP 12D2
C510 CAP 20C8
C511 CAP 35C7
C512 CAP 33C5
C513 CAP 28D5
C514 CAP 28D6
C515 CAP 31B2
C516 CAP 26D8
C517 CAP 26D8
C518 CAP 32A3
C519 CAP 28C5
C520 CAP 35C3
C521 CAP 33C5
C522 CAP 32C3
C523 CAP 28B4
C524 CAP 31B2
C525 CAP 31B2
C526 CAP 31B2
C527 CAP 31B1
C528 CAP 33C6
C529 CAP 33D4
C530 CAP 32A4
C531 CAP 28D6
C532 CAP 31D4
C533 CAP 33C5
C534 CAP 31C5
C535 CAP 31C4
C536 CAP 35C3
C537 CAP 35C6
C538 CAP 35C2
C539 CAP 33C5
C540 CAP 32A2
C541 CAP 32C3
C542 CAP 28A4
C543 CAP 12B2
C544 CAP 35D5
C545 CAP 33C3
C546 CAP 28C6
C547 CAP 33C4
C548 CAP 32A5
C549 CAP 29C2
C550 CAP 31C5
C551 CAP 31C2
C552 CAP 12C2
C553 CAP 12C2
C554 CAP 35D4
C555 CAP 32C3
C556 CAP 28B3
C557 CAP 31B3
C558 CAP 33B5
C559 CAP 33C4
C560 CAP 33C4
C561 CAP 33C4
C562 CAP 32A4
C563 CAP 28A3
C564 CAP 31A6
C565 CAP 31B5
C566 CAP 31B1
C567 CAP 31B1
C568 CAP 31B2
C569 CAP 31B5
C570 CAP 31B5
C571 CAP 33A5
C572 CAP 32C4
C573 CAP 33C3
C574 CAP 32A5
C575 CAP 28C6
C576 CAP 28D5
C577 CAP 28C6
C578 CAP 28C6
C579 CAP 18D6
C580 CAP 31B5
C581 CAP 31B2
C582 CAP 31B1
C583 CAP 31B1
C584 CAP 28A4
C585 CAP 33B2
C586 CAP 32C3
C587 CAP 28C8
C588 CAP 28C8
C589 CAP 30D6
C590 CAP 28C7
C591 CAP 28C8
C592 CAP 30A7
C593 CAP 28C7
C594 CAP 22A3
C595 CAP 28C7
C596 CAP 33A7
C597 CAP 30B7
C598 CAP 30A6
C599 CAP 33B8
C600 CAP 23D3
C601 CAP 22A3
C602 CAP 23D6
C603 CAP 22C5
C604 CAP 22C5
C605 CAP 23D8
C606 CAP 23C7
C607 CAP 34D2
C608 CAP 22D7
C609 CAP 22D8
C610 CAP 35A4
C611 CAP 34D1
C612 CAP 34D1
C613 CAP 35A4
C614 CAP 34D1
C615 CAP 22C7
C616 CAP 22D7
C617 CAP 22C8
C618 CAP 22D7
C619 CAP 35A5
C620 CAP 34C1
C621 CAP 34D2
C622 CAP 34D1
C623 CAP_P 33A7
C624 CAP 34C1
C625 CAP 22D2
C626 CAP 33A8
C627 CAP 34D1
C628 CAP 33A8
C629 CAP 21A4
C630 CAP 8A4
C631 CAP 8A4
C632 CAP 22B7
C633 CAP 22D5
C634 CAP 21A4
C635 CAP 8A5
C636 CAP 8A6
C637 CAP 8A4
C638 CAP 8A3
C639 CAP 8A5
C640 CAP 8A3
C641 CAP 8A3
C642 CAP 8A2
C643 CAP 22B8
C644 CAP 8A4
C645 CAP 8A7
C646 CAP 8A3
C647 CAP 8A4
C648 CAP 8A7
C649 CAP 8A4
C650 CAP 8A4
C651 CAP 8A8
C652 CAP 8A3
C653 CAP 8A4
C654 CAP 8A8
C655 CAP 8A4
C656 CAP 22B7
C657 CAP 22C5
C658 CAP 20C5
C659 CAP 6A3
C660 CAP 8B7
C661 CAP 8A2
C662 CAP 8A7
C663 CAP 8A7
C664 CAP 8A7
C665 CAP 8A7
C666 CAP 8A7
C667 CAP 8A7
C668 CAP 25B4
C669 CAP 8A4
C670 CAP 8A3
C671 CAP 8A3
C672 CAP 8A3
C673 CAP 6B2
C674 CAP 8A4
C675 CAP 8A4
C676 CAP 22A7
C677 CAP 22A7
C678 CAP 22A8
C679 CAP 6B2
C680 CAP_P 20C5
C681 CAP_P 20C5
C682 CAP_P 20C5
C683 CAP 35D8
C684 CAP 8A1
C685 CAP 8B8
C686 CAP 8A6
C687 CAP 8A2
C688 CAP 22B7
C689 CAP 35D7
C690 CAP 22B8
C691 CAP 11D4
C692 CAP_P 34B1
C693 CAP_P 34B1
C694 CAP_P 34B2
C695 CAP_P 34B1
C696 CAP_P 34B1
C697 CAP_P 34B2
C698 CAP 11D4
C699 CAP 11D2
C700 CAP 11D2
C701 CAP 11D2
C702 CAP 27B5
C703 CAP 26D8
C704 CAP 35B8
C705 CAP 11D8
C706 CAP 11D6
C707 CAP 11D4
C708 CAP_P 35B7
C709 CAP 22B1
C710 CAP 27C5
C711 CAP 11D8
C712 CAP 11D6
C713 CAP 22B1
C714 CAP_P 32C2
C715 CAP_P 35B7
C716 CAP 11D7
C717 CAP 11D6
C718 CAP 27B4
C719 CAP 27B5
C720 CAP_P 33C8
C721 CAP 22A1
C722 CAP_P 32C2
C723 CAP 33D7
C724 CAP 33C8
C725 CAP 27A2
C726 CAP 27B4
C727 CAP 27B5
C728 CAP 20C5
C729 CAP 33D7
C730 CAP 26D8
C731 CAP 34B3
C732 CAP_P 32C3
C733 CAP 20C5
C734 CAP 25D3
C735 CAP 34B4
C736 CAP_P 32C2
C737 CAP 33D7
C738 CAP 29D6
C739 CAP 18D3
C740 CAP 29C2
C741 CAP 32C5
C742 CAP 18B3
C743 CAP 33D2
C744 CAP_P 35B1
C745 CAP 28D5
C746 CAP 29C2
C747 CAP_P 35B2
C748 CAP 18B3
C749 CAP 28C4
C750 CAP 33D2
C751 CAP 29C3
C752 CAP 32C4
C753 CAP_P 35B1
C754 CAP 18C7
C755 CAP 18D5
C756 CAP 18D5
C757 CAP 31D3
C758 CAP 28D6
C759 CAP_P 32C2
C760 CAP_P 32C2
C761 CAP 18D6
C762 CAP 18D6
C763 CAP 18D5
C764 CAP 18D5
C765 CAP_P 32C2
C766 CAP 33D2
C767 CAP 32C4
C768 CAP 31B4
C769 CAP 28C4
C770 CAP 29A3
C771 CAP 33D2
C772 CAP 29A3
C773 CAP 31B4
C774 CAP 31A5
C775 CAP 28D6
C776 CAP 35B2
C777 CAP 23C6
C778 CAP 23C6
C779 CAP 28D8
C780 CAP 33D2
C781 CAP 23C1
C782 CAP 31B4
C783 CAP_P 28D7
C784 CAP_P 32C2
C785 CAP_P 32C2
C786 CAP_P 32C2
C787 CAP_P 32C2
C788 CAP 23D4
C789 CAP 23D5
C790 CAP_P 33C1
C791 CAP 30D5
C792 CAP_P 33A7
C793 CAP 33C2
C794 CAP 30B2
C795 CAP_P 31B1
C796 CAP 30B3
C797 CAP 30D5
C798 CAP 30D6
C799 CAP 23B7
C800 CAP 23A7
C801 CAP 23A6
C802 CAP 23A7
C803 CAP 23C6
C804 CAP 12C2
C805 CAP 12C2
C806 CAP 12B2
C807 CAP 12A2
C808 CAP 12C2
C809 CAP 12C2
C810 CAP 12B2
C811 CAP 12A2
C812 CAP 12C2
C813 CAP 12C2
C814 CAP 12B2
C815 CAP 12A2
C816 CAP 12C1
C817 CAP 12C1
C818 CAP 12B1
C819 CAP 12A1
C820 CAP 12C1
C821 CAP 12C1
C822 CAP 12B1
C823 CAP 12A1
C824 CAP 26D8
C825 CAP 26D8
C826 CAP 26D8
C827 CAP 26D7
C828 CAP 26D7
C829 CAP 26D7
C830 CAP 26D6
C831 CAP 26D6
C832 CAP 26D6
C833 CAP 26D5
C834 CAP 26D4
C835 CAP 26C3
C836 CAP 26C2
C837 CAP 34D4
C838 CAP 31C3
C839 CAP 15C6
C840 CAP 15C6
C841 CAP 15C6
C842 CAP 15C6
C843 CAP 31D5
C844 CAP 21D3
C845 CAP 21D3
C846 CAP 21D2
C847 CAP 21D2
C848 CAP 21D2
C849 CAP 21D2
C850 CAP 21D2
C851 CAP 21D2
C852 CAP 21D1
C853 CAP 22C1
C854 CAP_P 34B2
C855 CAP 25A3
C856 CAP 25B2
C857 CAP 25D7
C858 CAP 25D7
C859 CAP 29B5
C860 CAP 29D4
C861 CAP 29D4
C862 CAP 29B3
C863 CAP 29D3
C864 CAP 29D2
C865 CAP 22B4
C866 CAP 25C6
C867 CAP 25C6
C1000 CAP 28C5
C1600 CAP 16B3
C1601 CAP 16B2
C1602 CAP 16B1
D1 DIODE 27B7
D2 DIODE_SCHOT 34C4
D3 DIODE_SCHOT 32C5
D4 DIODE 32C7
D5 DIODE 20C6
D6 DIODE_DUAL_6P 29D3
D7 DIODE_SCHOT 33D5
D8 DIODE_DUAL_6P 29D2
D9 DIODE_SCHOT 32B4
D10 DIODE 31C5
D11 DIODE 31C3
D12 DIODE_SCHOT 32A4
D13 DIODE_DUAL_6P 29B4
D14 DIODE_SCHOT 33D4
D15 DIODE_DUAL_6P 29B4
D16 DIODE 33B6
D17 DIODE_SCHOT 32B6
D18 DIODE_SCHOT 32A6
D19 DIODE_SCHOT 32A6
D20 DIODE_SCHOT 28D7
D21 DIODE_SCHOT 22D5
D22 DIODE_SCHOT 33C7
D23 DIODE_SCHOT 35B6
D24 DIODE_SCHOT 20C5
D25 DIODE 34B2
D26 DIODE_SCHOT 32C4
D27 DIODE_SCHOT_3P2 28D8
D28 DIODE 31D1
D29 DIODE_SCHOT 31B2
D30 DIODE 31D2
D31 DIODE_SCHOT 29D5
D32 DIODE_SCHOT 35B2
D33 DIODE_SCHOT 33C3
DP1 DPAK3P 34C7 34D7
DP2 DPAK3P 35C3 35D6 35D7
DP3 DPAK3P 31C1 31C2 31D3
DP4 DPAK3P 29C6 29D6
DP20 DPAK3P 20D7
DZ2 ZENER 29D3
F1 FUSE 22D6
F2 FUSE 29D7
F3 FUSE 29D5
F4 FUSE 31D1
F5 FUSE 31D1
G1 OSC 28A4
J1 CON_F1ST_S2MT_SM 15A6
J2 CON_3RTSM_125 25B2
J3 CON_F14RT_S2MT_SM 24B1
J4 CON_3RTSM_125 25A3
J5 CON_10STSM_5087 25D1
J6 CON_12 34A4
J7 CON_F30RT_S2MT_SM 22B3
J8 CON_4RT_WRIB 22B1
J9 CON_F16ST_D_SMA 25C3
J10 CON_M80ST_D4MT_SM 18C2
J11 CON_M50SM_5MM 24B5
J12 CON_F14RT_S2MT_SM 32B8
J13 CON_M50SM_5MM 24D1
J14 CON_F30ST_D_SM 25D6
J15 CON_F40RT_S2MT_SM 23C6
J16 CON_F30RT_T6MT_TH1 22D6
J17 CON_F5RT_MINIDIN_TH 22B6
J18 CON_RJ45_SHORT_4MT_TH 27C1
J19 CON_M8RT_S_SM 31D8
J20 CON_F200RT_DDRDIMM_SM1 12D7
J21 CON_F80ST_D4MT_SM 24D5
J22 CON_F9RT_S2MT_SMA 29C1
J23 CON_F200RT_DDRDIMM_SM2 12D4
J24 CON_F6RT_S4MT_TH1 29A2
J25 CON_M8RT_S_SM 31A4
L1 IND 15D3
L2 IND 22A4
L3 IND 28D6
L4 IND 21D3
L5 IND 21D3
L6 IND 31A3
L7 IND 31A3
L8 IND 31A3
L9 IND 31A3
L10 IND 22D7
L11 IND 22D8
L12 IND 22D7
L13 IND 22D8
L14 IND 35A4
L15 IND 22D7
L16 IND 22D8
L17 FILTER_4P 22C8
L18 IND 22D5
L19 IND 21A4
L20 IND 22B7
L21 IND 22B7
L22 IND 22A7
L23 IND 22A7
L24 IND 22B7
L25 IND 20C5
L26 IND 22B2
L27 IND 27C4
L28 IND 22B2
L29 IND 22B2
L30 IND 35B7
L31 IND_3P 34C2
L32 IND_3P 32C4
L33 IND_3P 33D7
L34 IND 29C4
L35 IND_3P 33D2
L36 IND 31B2
L37 IND 29C5
L38 IND 35B2
L39 IND 23C1
L40 IND 31A3
L41 IND 28D7
L42 IND 23A7
L43 IND 23A7
L44 IND 23A7
L45 IND 23C7
L46 IND 23A7
L47 IND 27D3
L48 IND 26D7
L49 IND 15C6
L50 IND 15C5
L51 FILTER_4P 29B3
L52 FILTER_4P 29A3
L53 IND 21D1
L54 IND 29D4
PD1 PHOTODIODE_2P 23D8
Q1 TRA_FDG6324L 22B2
Q2 TRA_2N7002 22A6
Q3 TRA_2N7002DW 33A3 33A4
Q4 TRA_2N7002DW 31C6 31C7
Q5 TRA_SI3443DV 22A5
Q6 TRA_2N3904 34D7
Q7 TRA_NDS9407 29D6
Q8 TRA_SI4435DY 31D6
Q9 TRA_FDG6324L 32D6
Q10 TRA_SI4435DY 31D5
Q11 TRA_2N3904 34D7
Q12 TRA_2N7002DW 20B5 20C7
Q13 TRA_2N7002 35C6
Q14 TRA_2N7002DW 31C2 31C5
Q15 TRA_2N7002DW 33B5
Q16 TRA_SI4435DY 31D2
Q17 TRA_2N7002DW 29C7 33A6
Q18 TRA_2N3906 23C1
Q19 TRA_2N7002DW 31B7 31B8
Q20 TRA_2N7002DW 23C2 23C3
Q21 TRA_SI3443DV 33B2
Q22 TRA_2N7002DW 31B6
Q23 TRA_2N7002DW 31A7
Q24 TRA_SI3443DV 33A7
Q25 TRA_2N3904 7C6
Q26 TRA_2N7002 7C7
Q27 TRA_SI3446DV 25B3
Q28 TRA_2N7002DW 7C7
Q29 TRA_2N7002DW 22C4 22D4
Q30 TRA_SI3446DV 25A3
Q31 TRA_2N3904 25B6
Q32 TRA_TP0610 22D3
Q33 TRA_2N7002DW 22C2
Q34 TRA_2N3904 22D1
Q35 TRA_SI3443DV 33A7
Q36 TRA_2N3904 22C1
Q37 TRA_SI3446DV 35D7
Q38 TRA_2N3904 25A6
Q39 TRA_IRF7811W 20C6
Q40 TRA_IRF7805 34C3
Q41 TRA_IRF7805 34C4
Q42 TRA_IRF7805 20C6
Q43 TRA_SI4888DY 33C6
Q44 TRA_IRF7822 34B3
Q45 TRA_IRF7822 34B4
Q46 TRA_IRF7822 34B3
Q47 TRA_IRF7811W 35B6
Q48 TRA_IRF7805 35C6
Q49 TRA_SI3443DV 25D7
Q50 TRA_IRF7805 32C4
Q51 TRA_IRF7811W 32C4
Q52 TRA_SI4888DY 33D6
Q53 TRA_2N3904 25A6
Q54 TRA_IRF7805 31B3
Q55 TRA_IRF7811W 31B3
Q56 TRA_2N3904 25B6
Q57 TRA_2N7002 30A3
Q58 TRA_IRF7811W 35B3
Q59 TRA_IRF7805 35C3
Q60 TRA_IRF7416 31D1
Q61 TRA_SI4888DY 33D3
Q62 TRA_SI4888DY 33C3
Q63 TRA_2N3906 23B8
Q64 TRA_2N3906 23B8
Q65 TRA_2N7002DW 27A7 27B7
Q66 TRA_2N7002DW 31A4 31C3
Q67 TRA_2N7002DW 25C5
Q68 TRA_2N7002DW 22C4 23C7
Q69 TRA_2N7002DW 25D5
Q70 TRA_TP0610 22C2
Q71 TRA_2N7002DW 29C6
Q2000 TRA_2N3904 20D7
Q2001 TRA_2N3904 20D7
Q3100 TRA_2N7002DW 31C3 31C4
R1 RES 23B3
R2 RES 15D8
R3 RES 24C4
R4 RES 15C1
R5 RES 5D4
R6 RES 7B6
R7 RES 15A6
R8 RES 15A3
R9 RES 24A7
R10 RES 24B8
R11 RES 24A8
R12 RES 5B1
R13 RES 5B1
R14 RES 7A6
R15 RES 14C3
R16 RES 24A3
R17 RES 24C2
R18 RES 24B8
R19 RES 5A2
R20 RES 23B3
R21 RES 23B3
R22 RES 19C6
R23 RES 5A2
R24 RES 5C1
R25 RES 15A6
R26 RES 14C7
R27 RES 14C7
R28 RES 19C6
R29 RES 19B2
R30 RES 19B2
R31 RES 19C2
R32 RES 5B1
R33 RES 23B3
R34 RES 24A4
R35 RES 19B4
R36 RES 24A1
R37 RES 5C1
R38 RES 5C1
R39 RES 5D1
R40 RES 35A6
R41 RES 24A3
R42 RES 24A7
R43 RES 24A2
R44 RES 5C1
R45 RES 15C2
R46 RES 24A3
R47 RES 24B3
R48 RES 24A7
R49 RES 13A5
R50 RES 5D6
R51 RES 5C3
R52 RES 15D2
R53 RES 24A8
R54 RES 13A5
R55 RES 5C1
R56 RES 5C1
R57 RES 35A6
R58 RES 15D1
R59 RES 15B2
R60 RES 15B1
R61 RES 14C7
R62 RES 24A3
R63 RES 24A3
R64 RES 24A8
R65 RES 5B1
R66 RES 5D1
R67 RES 35A6
R68 RES 15B6
R69 RES 24C1
R70 RES 15A2
R71 RES 13B5
R72 RES 19B6
R73 RES 5D1
R74 RES 5C1
R75 RES 35A6
R76 RES 15A8
R77 RES 13D7
R78 RES 15D8
R79 RES 15B1
R80 RES 15B1
R81 RES 24B7
R82 RES 19B5
R83 RES 19B6
R84 RES 5C1
R85 RES 9B8
R86 RES 9C8
R87 RES 9D7
R88 RES 14C5
R89 RES 15D4
R90 RES 5D1
R91 RES 5A1
R92 RES 9B2
R93 RES 9B2
R94 RES 9B8
R95 RES 9C7
R96 RES 9D8
R97 RES 9C8
R98 RES 9A6
R99 RES 19B8
R100 RES 9B2
R101 RES 9B7
R102 RES 9C8
R103 RES 9C7
R104 RES 9A6
R105 RES 14C3
R106 RES 13D3
R107 RES 13D8
R108 RES 9B1
R109 RES 9B7
CR-43
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AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 44 44
E051-6469
ZT116 HOLE_VIA 4A2
ZT115 HOLE_VIA 4A2
ZT114 HOLE_VIA 4A2
ZT112 HOLE_VIA 4A2
ZT111 HOLE_VIA 4A2
ZT110 HOLE_VIA 4A2
ZT109 HOLE_VIA 4B2
ZT108 HOLE_VIA 4B2
ZT107 HOLE_VIA 4B2
ZT106 HOLE_VIA 4B2
ZT105 HOLE_VIA 4B2
ZT104 HOLE_VIA 4B2
ZT103 HOLE_VIA 4B2
ZT102 HOLE_VIA 4B2
ZT101 HOLE_VIA 4B2
ZT100 HOLE_VIA 4A3
ZT76 HOLE_VIA 4A3
ZT75 HOLE_VIA 4A3
ZT74 HOLE_VIA 4A3
ZT73 HOLE_VIA 4A3
ZT72 HOLE_VIA 4A3
ZT71 HOLE_VIA 4B3
ZT70 HOLE_VIA 4B3
ZT69 HOLE_VIA 4B3
ZT68 HOLE_VIA 4B3
ZT67 HOLE_VIA 4B3
ZT66 HOLE_VIA 4B3
ZT65 HOLE_VIA 4B3
ZT64 HOLE_VIA 4B3
ZT63 HOLE_VIA 4B3
ZT62 HOLE_VIA 4A3
ZT61 HOLE_VIA 4A3
ZT60 HOLE_VIA 4A3
ZT59 HOLE_VIA 4A3
ZT58 HOLE_VIA 4A3
ZT57 HOLE_VIA 4A3
ZT56 HOLE_VIA 4B3
ZT55 HOLE_VIA 4B3
ZT54 HOLE_VIA 4B3
ZT53 HOLE_VIA 4B3
ZT52 HOLE_VIA 4B3
ZT51 HOLE_VIA 4B3
ZT50 HOLE_VIA 4B3
ZT49 HOLE_VIA 4B3
ZT48 HOLE_VIA 4B3
ZT47 HOLE_VIA 4A4
ZT46 HOLE_VIA 4A4
ZT45 HOLE_VIA 4A4
ZT44 HOLE_VIA 4A4
ZT43 HOLE_VIA 4A4
ZT42 HOLE_VIA 4A4
ZT41 HOLE_VIA 4B4
ZT40 HOLE_VIA 4B4
ZT39 HOLE_VIA 4B4
ZT38 HOLE_VIA 4B4
ZT37 HOLE_VIA 4B4
ZT36 HOLE_VIA 4B4
ZT35 HOLE_VIA 4B4
ZT34 HOLE_VIA 4B4
ZT33 HOLE_VIA 4B4
ZT32 HOLE_VIA 4A4
ZT31 HOLE_VIA 4A4
ZT30 HOLE_VIA 4A4
ZT29 HOLE_VIA 4A4
ZT28 HOLE_VIA 4A4
ZT27 HOLE_VIA 4A4
ZT26 HOLE_VIA 4B4
ZT25 HOLE_VIA 4B4
ZT24 HOLE_VIA 4B4
ZT23 HOLE_VIA 4B4
ZT22 HOLE_VIA 4B4
ZT21 HOLE_VIA 4B4
ZT20 HOLE_VIA 4B4
ZT19 HOLE_VIA 4B4
ZT18 HOLE_VIA 4B4
ZT14 MTGHOLE 4D3
ZT8 MTGHOLE 4C4
ZT7 MTGHOLE 4D4
ZT6 MTGHOLE 4D4
ZT5 MTGHOLE 4D4
ZT4 MTGHOLE 4C4
ZT3 MTGHOLE 4D4
ZT1 MTGHOLE 4D3
Y7 CRYSTAL 26D4
Y6 CRYSTAL_4PIN 30B3
Y5 CRYSTAL 30B7
Y4 CRYSTAL 23C6
Y3 CRYSTAL 27A7
Y2 CRYSTAL_4PIN 21B4
Y1 CRYSTAL 15A5
XW20 SHORT 31B3
XW18 SHORT 34C1
XW17 SHORT 25C7
XW15 SHORT 22A8
XW14 SHORT 22B8
XW11 SHORT 33B4
XW9 SHORT 34B4
XW8 SHORT 35B6
XW7 SHORT 34B4
XW6 SHORT 32B5
XW4 SHORT 20B7
XW2 SHORT 34B1
XW1 SHORT 35A4
U1600 VREG_LT1962 16B2
U56 CLK_GEN_CY28512 15B6
U55 SIL1162 21C2
U54 OPAMP_LMC7111 31D3
U53 COMPARATOR_LMC7211 30A3
U52 UPD720101_FBGA 26C6
U51 LTC3405 27D4
U50 MAX1916 23A5
U49 TRANSCEIVER_88E1111 27C6
U48 ADM1031 25B4
U47 VREG_LT1962 6B3
U46 CLK_GEN_CY25811 21A4
U45 COMPARATOR_LMC7211 22C2
16D4 16D7
U44 INTREPID 9D4 10D7 13D3 13D7 14D4 14D8 15C4
U43 MAP31_612P 19D1 19D3 19D6 20C3 21D5
U42 APOLLO483 5C5 6D5 6D7
U41 PI3B3257 34D4
U40 OPAMP_MAX4236EUTT 23D7
U39 M16C62 30D5
U38 MAX6804 30B7
U37 EEPROM_16KX8_M24128B 23D3
U36 FEPR_256KX8_ST72264_BGA 23D5
U35 COMPARATOR_LMC7211 31A6
U34 VREG_LT1962 28C8
U33 LTC1761 28D8
U32 7432 22A2 30A7 30A8
U31 VREG_LM2594 28D7
U30 MAX1772 31B5
U29 VREG_LP2951 32B5
U28 TSB81BA3 28B6
U27 LTC3707 33C4
U26 PCI1510GGU 18C5
U25 VREG_LP2951 32B3
U24 AMP_MAX4172 31D5
U23 MAX1715 35C4
U22 COMPARATOR_LMC7211 32C7
U21 MAX1717 34C5
U20 PWR_CNTRL_TPS2211 18D3
U19 LTC1778 20B7
U18 LTC1625 32C5
U17 FEPR_1MX8 10C2
U16 COMPARATOR_LMC7211 31C7
U14 CBTV4020 11C7
U13 CBTV4020 11C5
U12 CBTV4020 11C4
U11 CBTV4020 11C2
U10 VREG_LT1962 15D6
U9 TRA_SI3447DV 35C1
U8 LTC1761 20A7
U7 SRAM_DDR_128KX36 8D5
U6 SRAM_DDR_128KX36 8D2
U5 TRA_SI3447DV 35A2
U4 LTC3411 35A5
U3 SN74AUC1G08 23B3
U2 SN74AUC1G08 23A3
U1 SN74AUC1G04 7A7
T1 XFR_ENET_1000BT 27B3
SP6 SPKR_CLIP_P84 4C2
SP5 SPKR_CLIP_P84 4C2
SP4 SPKR_CLIP_P84 4C2
SP3 SPKR_CLIP_P84 4C2
SP2 SPKR_CLIP_P84 4C3
SP1 SPKR_CLIP_P84 4C3
SH1 SHLD_3P_EMI 4D2
RP59 RPAK4P 25C5 25C5 25D5 25D5
RP58 RPAK4P 21B1
RP57 RPAK4P 21B1
RP56 RPAK4P 21B3
RP55 RPAK4P 21B3
RP54 RPAK4P 26B3 26B4 26D2
RP53 RPAK10P2C 23B5
RP52 RPAK4P 30C8 30D8
RP51 RPAK4P 23B1 23C3 26C8
RP50 RPAK10P2C 23B5
RP49 RPAK4P 30C1 30C1 30D1
RP48 RPAK4P 23B1
RP47 RPAK4P 15B8 15C8
RP46 RPAK4P 8D8
RP45 RPAK4P 8D8
RP44 RPAK4P 24C7 24C8 24D7
RP43 RPAK4P 24C7 24C8 24D8
RP42 RPAK4P 15B8 15C8 15D1
RP41 RPAK4P 15C8
RP40 RPAK4P 15B8 15C1 15C2
RP39 RPAK4P 26A7
RP38 RPAK10P2C 18A8
RP37 RPAK4P 26B8
RP36 RPAK4P 28B8
RP35 RPAK4P 28A8
RP34 RPAK4P 10C4 10C4 10C5 10C5
RP33 RPAK4P 10C4 10C4 10C5 10C5
RP32 RPAK4P 10D4 10D4 10D5 10D5
RP31 RPAK4P 10D4 10D4 10D5 10D5
RP30 RPAK4P 10A4 10A5 10B4 10B5
RP29 RPAK4P 10A4 10B4 10B5
RP28 RPAK4P 15A8 15B8 15C8 15D8
RP27 RPAK4P 10A4 10A5 10A5
RP26 RPAK4P 10B4 10B5 10B5
RP25 RPAK4P 9C2 9C2 9D2 15A8
RP24 RPAK4P 9C2 9D2 9D2
RP23 RPAK4P 13B1 13C1
RP22 RPAK4P 9C2 9D2 9D2
RP21 RPAK4P 13B1 13C1
RP20 RPAK4P 13C1 13D1
RP19 RPAK4P 13A7 13B7
RP18 RPAK4P 13A7 13B7
RP17 RPAK4P 14C1 14D1
RP16 RPAK4P 14A4 14B4 14B5 14B5
RP15 RPAK4P 14B4 14B4 14B5 14B5
RP14 RPAK4P 24C7 24D7 24D8
RP13 RPAK4P 14C1
RP12 RPAK4P 24B7 24B8
RP11 RPAK4P 5B1 5D1
RP10 RPAK4P 24C7 24C8 24C8
RP9 RPAK4P 24D3
RP8 RPAK4P 15B2
RP7 RPAK4P 15A8 15C8 15D1
RP6 RPAK4P 15A8 15B8 15C8
RP5 RPAK4P 24B3 24C3
RP4 RPAK4P 24B3 24C3
RP3 RPAK4P 24B3 24C3
RP2 RPAK4P 24C3 24D3
RP1 RPAK4P 15A8 15B8
R2501 RES 25B1
R2500 RES 25C1
R2200 RES 22A3
R2004 RES 20D8
R2003 RES 20D7
R2002 RES 20D8
R2001 RES 20D7
R2000 RES 20C7
R1901 RES 19B4
R1900 RES 19B4
R1607 RES 35D8
R1606 RES 35D8
R1605 RES 19A3
R1603 RES 16B1
R1602 RES 16B2
R1601 RES 16B2
R1600 RES 16B3
R1402 RES 14D1
R1399 RES 13C8
R1350 RES 13C8
R1000 RES 28C5
R902 RES 30A4
R891 RES 15B5
R890 RES 15B6
R889 RES 15B7
R888 RES 15C7
R887 RES 15B7
R886 RES 15B7
R774 RES 18D4
R773 RES 10A2
R772 RES 10A3
R771 RES 10A3
R770 RES 10A3
R769 RES 34D3
R768 RES 34D3
R767 RES 34D3
R766 RES 34D4
R765 RES 16D6
R764 RES 16D6
R763 RES 18A7
R762 RES 29D5
R761 RES 25D8
R760 RES 21C7
R759 RES 15C7
R758 RES 15C7
R757 RES 21B3
R756 RES 22C1
R755 RES 22C1
R754 RES 22C2
R753 RES 23C3
R752 RES 21D1
R751 RES 21B2
R750 RES 21C2
R749 RES 21C2
R748 RES 21C3
R747 RES 31C3
R746 RES 31C3
R745 RES 31D4
R744 RES 31D4
R743 RES 31C4
R742 RES 31D4
R741 RES 26C8
R740 RES 34D5
R739 RES 34D5
R738 RES 34D6
R737 RES 34D6
R736 RES 34D6
R735 RES 34D6
R734 RES 34D6
R733 RES 34D6
R732 RES 34D6
R731 RES 34D6
R730 RES 34D6
R729 RES 26C2
R728 RES 26C2
R727 RES 34C8
R726 RES 26A4
R725 RES 26B4
R724 RES 26A4
R723 RES 26A4
R722 RES 26A4
R721 RES 26A4
R720 RES 26A4
R719 RES 26B4
R718 RES 26B3
R717 RES 26C4
R716 RES 26C4
R715 RES 26C4
R714 RES 26C4
R713 RES 26D4
R712 RES 26C5
R711 RES 26D7
R710 RES 26B7
R709 RES 26A7
R708 RES 23A4
R707 RES 27D3
R706 RES 27D3
R705 RES 27D4
R704 RES 27D5
R703 RES 27D5
R702 RES 23A7
R701 RES 30B1
R700 RES 30C1
R699 RES 30D1
R698 RES 30B1
R697 RES 30B1
R696 RES 30D1
R695 RES 30D8
R694 RES 34C8
R693 RES 23B5
R692 RES 23C5
R691 RES 23B7
R690 RES 23A4
R689 RES 30C8
R688 RES 30B3
R687 RES 30B2
R686 RES 30D5
R685 RES 31B3
R684 RES 18B7
R683 RES 31B5
R682 RES 31A6
R681 RES 31A5
R680 RES 31A6
R679 RES 31A5
R678 RES 31C4
R677 RES 31B2
R676 RES 18D7
R675 RES 18A7
R674 RES 28A3
R673 RES 28A4
R672 RES 28D5
R671 RES 22C3
R670 RES 18D8
R669 RES 18D8
R668 RES 29C3
R667 RES 26B4
R666 RES 26B4
R665 RES 31C6
R664 RES 24B6
R663 RES 31C6
R662 RES 18D8
R661 RES 18B4
R660 RES 31C1
R659 RES 28A7
R658 RES 24D4
R657 RES 31C1
R656 RES 29C7
R655 RES 29C6
R654 RES 29D7
R653 RES 29D6
R652 RES 34B2
R651 RES 33D7
R650 RES 28A6
R649 RES 6B1
R648 RES 19A4
R647 RES 19A4
R646 RES 8B8
R645 RES 8B8
R644 RES 6A2
R643 RES 25A5
R642 RES 25B5
R641 RES 8C8
R640 RES 6B1
R639 RES 6B2
R638 RES 25A5
R637 RES 25B5
R636 RES 8B7
R635 RES 19A3
R634 RES 19A2
R633 RES 21C8
R632 RES 21C8
R631 RES 21C8
R630 RES 25A5
R629 RES 25B5
R628 RES 8B7
R627 RES 6B3
R626 RES 25B5
R625 RES 8C8
R624 RES 8C8
R623 RES 21A4
R622 RES 25A5
R620 RES 21A3
R619 RES 21A4
R618 RES 22C6
R617 RES 8D1
R616 RES 8D4
R615 RES 21A4
R614 RES 21A4
R613 RES 21A5
R612 RES 33A8
R611 RES 22C2
R610 RES 22C1
R609 RES 6B4
R608 RES 23A4
R607 RES 22C4
R606 RES 5D2
R605 RES 21C4
R604 RES 22D2
R603 RES 22D2
R602 RES 5D2
R601 RES 19C8
R600 RES 22D2
R599 RES 15C4
R598 RES 22C3
R597 RES 9B1
R596 RES 9A7
R595 RES 9B7
R594 RES 22C3
R593 RES 22D3
R592 RES 25A3
R591 RES 9B1
R590 RES 9B2
R589 RES 9A6
R588 RES 9B7
R587 RES 9C6
R586 RES 9C7
R585 RES 22D4
R584 RES 22D4
R583 RES 9B2
R582 RES 9A7
R581 RES 9A7
R580 RES 9B6
R579 RES 9B7
R578 RES 9C7
R577 RES 22C3
R576 RES 22D3
R575 RES 22D5
R574 RES 9B1
R573 RES 9A7
R572 RES 9B7
R571 RES 9C7
R570 RES 22D5
R569 RES 25A4
R568 RES 9B2
R567 RES 9A7
R566 RES 9B8
R565 RES 9D7
R564 RES 22C4
R563 RES 22C4
R562 RES 9B2
R561 RES 9B2
R560 RES 9A8
R559 RES 9B7
R558 RES 9C8
R557 RES 9D8
R556 RES 9A8
R555 RES 9B8
R554 RES 9C7
R553 RES 35A6
R552 RES 35A6
R551 RES 35A4
R550 RES 15A5
R549 RES 14C1
R548 RES 14D5
R547 RES 14D1
R546 RES 35A4
R545 RES 35A5
R544 RES 14C1
R543 RES 14D5
R542 RES 25B3
R541 RES 7C7
R540 RES 15A5
R539 RES 25B3
R538 RES 7C7
R537 RES 23D6
R536 RES 7C7
R535 RES 7C8
R534 RES 23D7
R533 RES 23C7
R532 RES 15C2
R531 RES 23D7
R530 RES 23D8
R529 RES 7A6
R528 RES 7A6
R527 RES 7D7
R526 RES 7C7
R525 RES 7C7
R524 RES 7C6
R523 RES 7D5
R522 RES 7C5
R521 RES 7C5
R520 RES 7C5
R519 RES 7B4
R518 RES 5D1
R517 RES 7C4
R516 RES 7C4
R515 RES 7C5
R514 RES 7D5
R513 RES 7D6
R512 RES 7C6
R511 RES 7C6
R510 RES 7C6
R509 RES 7A6
R508 RES 7D4
R507 RES 7C4
R506 RES 7C4
R505 RES 7C4
R504 RES 15C1
R503 RES 24A3
R502 RES 24A4
R501 RES 23C7
R500 RES 22C5
R499 RES 24D2
R498 RES 24D2
R497 RES 30B1
R496 RES 30B1
R495 RES 23D3
R494 RES 33A8
R493 RES 23D3
R492 RES 30C7
R491 RES 30B7
R490 RES 30C8
R489 RES 30B7
R488 RES 31B7
R487 RES 31A5
R486 RES 31A7
R485 RES 28C7
R484 RES 28C7
R483 RES 28C8
R482 RES 28C7
R481 RES 30D8
R480 RES 30D1
R479 RES 30B3
R478 RES 30D8
R477 RES 30D1
R476 RES 31B7
R475 RES 31B6
R474 RES 31B7
R473 RES 31D8
R472 RES 28B6
R471 RES 28A4
R470 RES 23D1
R469 RES 23D1
R468 RES 23C1
R467 RES 31B8
R466 RES 31B7
R465 RES 31B4
R464 RES 31B7
R463 RES 28C7
R462 RES 28C5
R461 RES 28D5
R460 RES 28C7
R459 RES 23D5
R458 RES 31B4
R457 RES 31B7
R456 RES 28B8
R455 RES 31B6
R454 RES 32A4
R453 RES 33C2
R452 RES 33B2
R451 RES 23C2
R450 RES 30D8
R449 RES 30C6
R448 RES 30C6
R447 RES 30C1
R446 RES 30C1
R445 RES 30A4
R444 RES 30B3
R443 RES 30B1
R442 RES 30D1
R441 RES 31B2
R440 RES 28A4
R439 RES 33C2
R438 RES 27A5
R437 RES 33B6
R436 RES 30B1
R435 RES 31B5
R434 RES 29A3
R433 RES 28A2
R432 RES 28A3
R431 RES 33B6
R430 RES 30A4
R429 RES 28A2
R428 RES 32A4
R427 RES 33D4
R426 RES 33C4
R425 RES 28B3
R424 RES 33D2
R423 RES 33C3
R422 RES 31C2
R421 RES 31B2
R420 RES 28B4
R419 RES 28B3
R418 RES 32B6
R417 RES 33C3
R416 RES 33B5
R415 RES 31C2
R414 RES 31D5
R413 RES 31C4
R412 RES 31B6
R411 RES 28A3
R410 RES 28B3
R409 RES 28C7
R408 RES 35C5
R407 RES 31C2
R406 RES 31C5
R405 RES 28B4
R404 RES 28C3
R403 RES 28C3
R402 RES 32A4
R401 RES 33C4
R400 RES 33C5
R399 RES 35D5
R398 RES 35C4
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R366 RES 28C7
R365 RES 28A7
R364 RES 28B7
R363 RES 32C7
R362 RES 24B5
R361 RES 24A6
R360 RES 33D5
R359 RES 12D2
R358 RES 34B5
R357 RES 32C7
R356 RES 32C7
R355 RES 35B7
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R353 RES 35C5
R352 RES 35B5
R351 RES 35D5
R350 RES 35B4
R349 RES 35D4
R348 RES 35C5
R347 RES 20C7
R346 RES 34C5
R345 RES 27B2
R344 RES 27A7
R343 RES 27A6
R342 RES 27A7
R341 RES 32D6
R340 RES 20C7
R339 RES 20C6
R338 RES 34D8
R337 RES 34B4
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R335 RES 32C6
R334 RES 24B5
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R332 RES 31A5
R331 RES 27D7
R330 RES 34D7
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R328 RES 27B2
R327 RES 27B4
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R325 RES 25D3
R324 RES 30A3
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R322 RES 32C6
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R320 RES 22A6
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R318 RES 34B6
R317 RES 34C6
R316 RES 31C7
R315 RES 27B4
R314 RES 32C6
R313 RES 22A6
R312 RES 10C3
R311 RES 27B7
R310 RES 34B6
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R305 RES 27B4
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R303 RES 33C7
R302 RES 33A4
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R297 RES 27B4
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R294 RES 33A4
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R292 RES 31D7
R291 RES 31D7
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R289 RES 27B4
R288 RES 27C7
R287 RES 27B8
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R285 RES 32C3
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R283 RES 20C8
R282 RES 20B8
R281 RES 20C6
R280 RES 10B3
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R278 RES 27C7
R277 RES 20B8
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R275 RES 20B5
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R272 RES 22B4
R271 RES 20B8
R270 RES 30A3
R269 RES 30A4
R268 RES 10C3
R267 RES 22B4
R266 RES 30A4
R265 RES 29D6
R263 RES 27B7
R262 RES 23D6
R261 RES 25C1
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R259 RES 27C3
R258 RES 34D5
R257 RES 34D5
R256 RES 22B2
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R253 RES 27A7
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R251 RES 34D5
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R249 RES 34D5
R248 RES 34D5
R247 RES 34B7
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R244 RES 19A4
R243 RES 21A7
R242 RES 15D7
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R238 RES 21B7
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R231 RES 35D2
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R229 RES 20A4
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R227 RES 20D2
R226 RES 15D6
R225 RES 15D6
R224 RES 21A6
R223 RES 21A6
R222 RES 21B6
R221 RES 21A6
R220 RES 20A7
R219 RES 20B4
R218 RES 20D2
R217 RES 20B2
R216 RES 20A1
R215 RES 20A1
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R213 RES 21B7
R212 RES 21A8
R211 RES 21B7
R210 RES 21B7
R209 RES 21A7
R208 RES 21A6
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R206 RES 20A4
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R204 RES 21C7
R203 RES 21C7
R202 RES 11A6
R201 RES 20A2
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R158 RES 20C1
R157 RES 20C1
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R155 RES 19B8
R154 RES 10A6
R153 RES 10A7
R152 RES 9A6
R151 RES 9A4
R150 RES 20B4
R149 RES 21C4
R148 RES 13B1
R147 RES 13B1
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R143 RES 35B3
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R135 RES 13B5
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R133 RES 9D6
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R130 RES 9B2
R129 RES 9B1
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R127 RES 21D4
R126 RES 13C8
R125 RES 13A1
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R123 RES 15D4
R122 RES 9A5
R121 RES 9D7
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R116 RES 9B2
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