Computer Architecture

Lecture 9

by

Engineer A. Lecturer Aymen Hasan AlAwady

10/2/2014

University of Kufa - Information Technology Research and Development Center

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1. I/O Interfacing with 8085

• 8085 MPU separates memory from I/O, via software, ex: instructions like IN and, OUT for I/O interfacing and STA and LDA for memory.

• When these instructions decoded by the processor it generates appropriate control signals IO/M.

• MEMR and MEWR are control signals for Memory-mapped I/O and IOR and IOW for Peripheral Mapped I/O 2

2. IN Instruction.

• IN instruction reads (copy) data from input devices like switches, keyboards and A/D data convertor.

• IN instruction is a two byte instruction with hexadecimal opcode DB, the second byte is the port address of an input device.

• This instruction reads the data from the input device and places it in the accumulator.

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8085 keyboard

2. IN Instruction. Cont..

2065 DB IN 84H 2066 84

•In First Machine cycle M1 (Opcode Fetch), MPU places the 16-bit memory address from (PC) on the address bus.

• At T1 20H is placed on A15-A8 and 65H is placed on AD7-AD0. ALE goes high, IO/M goes low indicates memory related operations. ALE separate AD7-AD0.

•At T2 MPU sends RD control signal which is combined with IO/M to generate MEMR signal and processor fetches the instruction code DB using data bus.

•M2 (Memory Read), 8085 places next address 2066H on address bus and get device address 84H.

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MemoryAddress

MachineCode

Instruction

2. IN Instruction. Cont..•M3 (I/O Read), 8085 place device address 84H on low and

high address bus both and asserts RD signal. IO/M goes high to indicate IO operation.

•At T2 data from input port are paced on data bus and transferred to accumulator.

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A15-A8

AD7-AD0

3. OUT Instruction.• OUT instruction sends the contents of the

accumulator to an output device such as an LED display.

• Out instruction is tow byte with the hexadecimal opcode D3 and the second byte is the port address of an output device.

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LED display

3. OUT Instruction. Cont..

2050 D3 OUT 01H 2051 01 •In M1(Opcode Fetch), microprocessor places the 16-bit

memory address from the program counter (PC) on the address bus. At T1 20H is placed on A15-A8 and 50H is placed on AD7-AD0. ALE goes high, IO/M goes low indicates memory related operations.

•At T2 microprocessor sends RD control signal which is combined with IO/M to generate MEMR signal and processor fetches the instruction code D3 using data bus.

•M2 (memory Read), 8085 places next address 2051H on address bus and get device address 01H.

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MemoryAddress

MachineCode Instruction

3. OUT Instruction. Cont..

• M3 (I/O write), 8085 place device address 01H on low and high address bus both. IO/M goes high to indicate I/O operation.

• At T2 accumulator contents are placed on data bus followed by control signal WR.

• If we connect data bus to latch we can catch the information and display on LEDs and Printer.

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4. Memory Mapped I/O

• For example LDA 8000H instruction, the accumulator receives data from input device rather than Memory.

Execution of Memory Related data Transfer Instruction 2050 STA 8000H (Opcode of STA is 32 h),

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4. Memory Mapped I/O. Cont..• In STA instruction and Memory Mapped I/O, we use

output device instead of memory register, the accumulator content will be transferred to the output device.

• In Memory Mapped I/O, the control signal MEMR and MEMW should be connected to I/O device instead of IOR and IOW.

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End of lecture 9