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Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation 1 1

Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

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Page 1: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

Computer Architecture

Lecture3

by

Engineering A. Lecturer Aymen Hasan AlAwady

04/11/2013

University of Kufa - Informatics Center for Research and Rehabilitation

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Page 2: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

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Page 3: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

MICROPROCESSOR 8085

Ramesh S. Goankar, “Microprocessor Architecture, Programming and Applications with 8085”, 5thEdition, Prentice Hall

Please email your name and faculty name to [email protected] to create an email list.

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Page 4: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

8085 Microprocessor Architecture & Memory InterfacingObjectives:•Recognize the functions of various pins of the 8085 microprocessor. •Explain the bus timings in fetching an instruction from memory.•Explain how to demultiplex the AD7-AD0 bus a latch.•Draw a logic schematic to generate four control signals, using the 8085 IO/M, RD, and WR signals: (1 MEMR), (2) MEMW, (3) IOR, and (4) IOW. Explain the functions of these control signals.

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Page 5: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

8085 Microprocessor Architecture & Memory InterfacingObjectives:•List the various internal units that make up the 8085 arch., and explain their functions.•Draw the block diagram of an 8085-based microcomputer.•List the steps performed by 8085 microprocessor , and identify the content of buses when an instruction is executed.•Analyze a memory interfacing circuit .•List additional signals found in such specially designed devices. 5

Page 6: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1. MicroprocessorsDifferences between:

•Microcomputer –a computer with a microprocessor as its CPU. Includes memory, I/O etc.

•Microprocessor –silicon chip which includes ALU, register circuits & control circuits

•Microcontroller –silicon chip which includes microprocessor, memory & I/O in a single package.

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Page 7: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.2 Microprocessors

What is a Microprocessor?

• The word comes from the combination micro and processor.

• Processor means a device that processes numbers, specifically binary numbers, 0’s and 1’s.

• To process means to manipulate and it means to perform certain operations on the numbers that depend on the microprocessor’s design.

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Page 8: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.3 Microprocessors

Micro history.

•In the late 1960’s, processors were built using discrete elements. These devices performed the required operation, but were too large and too slow.

•In the early 1970’s the microchip was invented. All of the components that made up the processor were now placed on a single piece of silicon. •The size became several thousand times smaller and the speed became several hundred times faster. The “Micro”Processor was born.

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Page 9: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

8085Microprocessor

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Page 10: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.4 8085Microprocessor Unit

•The microprocessor unit (MPU) is a device or group of devices (as a unit) that can communicate with peripherals , provide timing signals, direct data flow, and perform computing task as specified by instruction in memory.

• MPU has an address bus, data bus and control signals and would require only a power supply and crystal to be functional.

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Page 11: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.4.1 8085Microprocessor Unit

8085 limitations:1.The low order of address bus is multiplexed (time-shared) with data bus. So, the buses need to demultiplexed. AD0-AD72.To interface memory and I/O in 8085, some control signals need to be generated. (Intel has some memory and I/O devices that don’t require that).

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Page 12: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.4.1 8085 Microprocessor Architecture

•8-bit general purpose•Capable of addressing 64 k of memory•Has 40 pins•Requires +5 v power supply•Can operate with 3 MHz clock•8085 upward compatible

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Page 13: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

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Page 14: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

14Signals and I/O Pins

Page 15: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

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Page 16: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.4.1 8085 Microprocessor Architecture

System Bus –wires connecting memory & I/O to microprocessor

Address Bus (A15 – A8)•Unidirectional

•Identifying peripheral or memory location

Address & Data Bus (AD7-AD0)•Bidirectional•Transferring data and Identifying peripheral or memory location (address)•Serve a dual purpose

Control Bus •Synchronization signals•Timing signals•Control signal

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Page 17: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

The Address and Data Bus Systems

• The address bus has 8 signal lines A8 – A15 which are unidirectional.

• The other 8 address bits are multiplexed (time shared) with the 8 data bits.• So, the bits AD0 – AD7 are bi-directional and serve as A0 –

A7 and D0 – D7 at the same time.

• During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.

• In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.

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Page 18: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

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ALE used to demultiplex address/data bus

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Page 19: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.5 Control & Status Signals1. This group of signals include two control signals (RD and WR). (Read or write the data on data bus for the memory or I/O).2. Three status signals (IO/M, S1 and S0), to identify the nature of the operation.•When IO/M is high it indicates IO operation and when it is low it indicates memory operation. It is combined with RD and WR•S1 and S0 is similar to IO/M to generate various operation in small systems

3. Special signal (ALE) to indicate the begging of the operation. Use latch separate A0-A7 from AD0-AD7 when it is high at the begin of machine cycle.

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Page 20: Computer Architecture Lecture3 by Engineering A. Lecturer Aymen Hasan AlAwady 04/11/2013 University of Kufa - Informatics Center for Research and Rehabilitation

1.6 8085 Machine cycle status and control

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