8/9/2019 CMOS Logic Family

1/6

CMOS Logic family

A complementary MOSFET (CMOS) is obtained by connecting a P-channel and N-

channel MOSFET in series with drains tied together and the output is taken at the common

drain. Input is applied at the common gate formed by connecting the tow gates together. In a

CMOS, P-channel and N-channel enhancement MOS devices are fabricated on the same chip

which means its fabrication more complicated and reduces the packing density. But because

of negligibly small powder consumption, CMOS is ideally suited for battery operated system.

Its speed is limited by substrate capacitances. To reduce the effect of these substrate

capacitances the latest technology known as silicon on sapphire (SOS) is used in

microprocessor fabrication which employs an insulating substance(sapphire). CMOS has

become the most popular in MSI and LSI area and is the only possible logic for the

fabrication of VLSI devices.

A CMOS switch.

CMOS inverter

The basic CMOS logic circuit is the invertor shown in the CMOS switch. For the

circuit is an invertor shown in the CMOS switch. For the circuit the logic levels are 0V (logic

0) and Vcc (logic 1). When V1=Vcc, T1 turns ON and T2 turns OFF. Therefore V0~0V, and

since the transistor are connected in series the current I0 is very small. In either logic state, T1

or T2 is off and the quiescent power dissipation which is the product of the OFF leakage

current and Vcc is very low. More complex function can be realized by combinations of

invertors.

CMOS NAND and NOR Gates

A 2-input CMOS NAND gate is shown. In the NAND gate the PMOS loads are

connected in series,where ad the PMOS loads are connected in parallel. On the other hand,

The CMOS NOR gates is obtained by connecting the NMOS drivers in parallel and PMOSloads in series.

8/9/2019 CMOS Logic Family

2/6

8/9/2019 CMOS Logic Family

3/6

Operations of CMOS NAND gate

Inputs State of MOS devices Output

A B T1 T2 T3 T4 Y

0 0 OFF OFF ON ON Vcc

0 Vcc ON OFF ON OFF VccVcc 0 OFF ON OFF ON Vcc

Vcc Vcc ON OFF OFF ON 0

CMOS transmission gate

A CMOS transmission gate controlled by gate voltages c and c` is shown above.

Assume c=1, if A-V(1) then T1, is off and T2 conducts in the ohmic region because there is

no voltage applied at the drain. Therefore T2 behaves as a small resistance connecting the

output to the input and B=A=V (1). Similarly, if A=v(0) the T2 is off and T1 conducts

connecting the output to the input and B=A=V (0). This means the signal is transmitted from

A to B when C=1.

In similar manner it can be shown that if c=0, transmission is not possible. In this gate

the control c is binary; whereas the input at A may be either digital or analog. [The

instantaneous value must be between v (0) and V (1)]

Noise Margin

Noise margin of CMOS logic is considerably higher than that of TTL and ICs. CMOS

devices have wide supply voltage. Vcc typically it is .45 Vcc

8/9/2019 CMOS Logic Family

4/6

Unconnected inputs

The unconnected CMOS ICs input behave in a way similar to MOS devices.

Therefore the unused inputs must be connected to either the supply voltage terminal or one of

the used inputs provided that the fan out of the signal source is not exceeded. This is highly

unlinked for CMOS circuit because of their high fan out. Some CMOS ICs have zener diodes

connected at the input for protection against high input voltages.

54C00/74C00 CMOS devices

These are two commonly used CMOS series ICs. These are the 4000 series and

54c/74c series. These are the 4000 series and 54c/74c series. 54c/74c CMOS series is PIN for

PIN function for function equivalent to then 54/74 TTL family and has therefore become very

popular. The temperature range for 54 c series is 55 C to 125 degree Celsius and for 74c

series is 40 to 55 degree Celsius. It has a wide supply voltage range, 3V to 15V. A person can

take full advantage of his knowledge of his knowledge of the 54/74 TTL series for the

effective use of 54C/74C series.

Transistor Transistor Logic (TTL)

Because of its speed limitation, DTL has become outdated and is completely replaced

by another logic family referred to as transistor-transistor logic (TTL). TTL family is so

called because of its dependence on transistor alone to perform basic logic operation. It is the

most popular logic family. It is also the most widely used bipolar digital IC family. The TTL

uses transistor operating in the saturated mode. The basic TTL logic circuit is the NAND

gate. Good speed, low manufacturing in SSI and MSI are its merits. Tight Vcc tolerance,

relative high power consumption, moderate parking density, generation of noise spikes and

susceptibility to power transients are its demerits.

TTL NAND gate

8/9/2019 CMOS Logic Family

5/6

In multiple emitter input transistor each emitter act like a diode. Therefore A and

resistor R1 act like a 2-input AND gate. The rest of the circuit inverts the signal so that the

overall circuit act like a 2-input NAND gate. The output transistor (Q3 and Q4) form a totem

pole connection (one NPN in series with another) this kind of output stage is typical of most

TTL devices. With a totem-pole output state, either the upper or lower transistor is ON. Whena3 is on the output is high; when Q4 is ON, the output is low.

The input voltages A and B are either low (ideally grounded) or high (ideally +5v). If

A or B is low, the base of Q1 is pulled down to approximately .7 V. This reduces the base

voltage of Q2 to almost zero. Therefore Q2 is cut off. With Q2 open ,Q4 goes into cutoff and

the Q3 base is pulled high. Since Q3 act as an emitter follower, the output pulled up to a high

voltage.

On the other hand when A and B are both high voltages the emitter diodes of Q1 stops

conducting and the collector diode goes into forward condition. This forces Q2 base goes

high. It turns Q4 goes into saturation, preceding a low output.

Without diode D1 in the circuit Q3 will conduct slightly when the output is low. To

prevent this, the diode is inserted; its voltage drop keeps the base-emitter diode of Q3

reverse-biased in the way only Q4 conducts when the output is low.

Unconnected Inputs

If any inputs of a TTL gate if left disconnected (open or floating) the correspondingE-B junction of T1 will not be forward biased. Hence it acts exactly in the same way as if a

logical 1 is applied to the input. Therefore in TTL ICs all connected inputs are treated as

logical 1s. However, the unused inputs should either be connected to some. Use input or

returned to Vcc through a resistor.

Clamping diodes

Clamping diodes are connected only used in all TTL gates to suppress the ringing

causes from the last voltage transition found in TTL. These diodes shown in figure clamp thenegative undershoot at approximately .7V.

8/9/2019 CMOS Logic Family

6/6

5400/7400 TTL series

TTL 5400/7400 series is the most popular and commonly used series of digital

ICs.7400 devices are used for commercial application whereas the 5400 devices are using for

military application. The only differences in these two series are in the temperature and the

power supply range. The temperature range is 0 to 70 degree Celsius for the 7400 series and -

55 to 125 degree Celsius for the 5400 series. The supply voltage range is 5 with tolerance of

.25V for the 7400 series and 5 with a tolerance .5V for 5400 series.

Reference

CMOS logic family:

Modern digital electronics:-R P Jain

TTL Logic:

Basic electronics and communications :- Nikhil C R