Blackfin SPI Compatible Interface Design and implementation details on the way to a valid SPI-LCD interface driver

Blackfin SPI Compatible Interface

Design and implementation details on the way to a valid

SPI-LCD interface driver

04/18/23 SPI Initialization , Copyright M. Smith, ECE, University of Calgary, Canada

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To be tackled today

What is SPI? What is the SPI “master slave”

relationship? How do you send commands from the

Blackfin to a LCD device? What commands are necessary to

control the LCD device -- HD44780?


3 /26

Master / Slave conceptSlave Select (Chip Select)

Master sends out active low chip select signal SS1, then slave 1 responds

Master sends out active low chip select signal SS2, then slave 2 responds


4 /26

Master / Slave conceptMaster to Slave data movement Master sends out

information to slave on MOSI wire

Slave receives information from the master on MOSI wire

Information (bits) is clocked by SCLK signal. • 1-bit, 1 clock tick

MOSI --MASTER OUT – SLAVE IN


5 /26

Master / Slave conceptSlave to Master data movement Master receives

information from slave on MISO wire

Slave sends information to the master on MISO wire

Information (bits) is clocked by SCLK signal. • 1-bit, 1 clock tick

MISO --MASTER IN – SLAVE OUT


6 /26

Lab. 5 concept – Using an SPI interface to an LCD screen

Blackfin Processor

LCD SCREEN SWITCHES (LOGIC LAB)

SLAVE INPUT INTERFACE SLAVE OUTPUT INTERFACE

MOSI MISO

SLAVE SELECTPF5 used (PF0 to PF7)

DATACONTROL

SPICLOCK

LOADSlave toLCD


7 /26

Managed to obtain a general concept of how to make things happen to the LCD screen

How do we make the LCD screen respond to control requests?• Clear screen, move cursor, next line etc

How do we make the LCD screen respond to data requests?• Display letter a, b, C, 1, 2, (, ?, h etc

How do we get Blackfin SPI interface to send the LCD screen those commands?

How to we initialize the Blackfin SPI interface so all the above things work?


8 /26

Is this a possible solution?Writing “Hello” to the LCD

ClearDisplay( );UseFixedTimeASM( );

CursorIncrease( ); UseFixedTimeASM( );DisplayOn( );

Use FixedTimeASM( );WriteLetter(‘H’); UseFixedTimeASM( );CursorMove( ); UseFixedTimeASM( );WriteLetter(‘e’); etc.

General concept is there,The exact details will have to

wait a while

QUESTION!What happens if you send a CursorMove( ) command

and wait too long?

Do you get two cursor moves?If so – how do you stop that

from happening?


9 /26

Where does Blackfin fit in? ClearDisplay( );

This means that the following bits must be sent RS = 0, R/W = 0, DB7=DB6=DB5….DB1 = 0, DB0 = 1; from Blackfin SPI interface to LCD

Possible solution -- Let us send out the ushort value 0x0001 from the Blackfin and arrange the wires from the interface to go to the LCD connections correctly• Top 8 bits of ushort value – LCD control• Bottom 8 bits of ushort value – LCD data

Page 10-17 -- SPI Transmit Data Buffer Register SPI_TDBR – 16-bit read/write register. • Data loaded into this data register is automatically transmitted over the

SPI interface if the SPI interface is enabled for transmission.


10 /26

Questions still unanswered How do we configure the SPI interface inside the

Blackfin? How do we activate the chip-select line – PF5? Does activating the PF5 line as SPI output control mean

we have to change all the SetupPF8to11ASM( ) and other routines?

When do we activate the chip-select line, and how long for?

How do we know when LCD is ready for next character – do we poll a bit and wait till ready, or can it be done in the background?

How do we stop multiple commands from being accidentally sent to LCD? -- cursor move etc


11 /26

Blackfin interface details

More slave side

Blackfin side


12 /26

Concept

We write 16-bits (0xFF0A) in SPI_TDBR Hardware transfers this to SHIFT register

• SPI_TDBR now empty For next 16 ticks of SPI clock

• Hardware sends out 1 bit from shift register over MOSI line to SLAVE each clock tick – speeds up to 25 MHz per bit

• Hardware receives 1 bit over MISO line from the SLAVE and puts into shift register each clock tick – speeds up to 25 MHz per bit

Hardware transfers shift register value (from slave) into SPI_RDBR (receive DBR)• SPI_RDBR is now FULL

This transmission over a serial line (16-bits 1 at a time) is much slower than other internal Blackfin operation• Must be handled via interrupt control

0x F F 0 A


13 /26

This is NOT a possible solution!ClearDisplayASM( )

Initialize the SPI interface in main( ) P0 SPI_TDBR – SPI transmit data buffer register

R0 = 0x0001; // LCD instruction [P0] = R0; Not correct – TDBR is 16-bit R0 = some_value; Call UseFixedTimeASM;


14 /26

A more likely solutionStill a work in progress !!!!!!

volatile bool transmit_empty;

volatile ushort transmit_value;

EX_INTERRUPT_HANDLER(SPI_ISR) {SPI_TDBR transmit_value;

transmit_empty = true; Clear the interrupt signal so don’t re-enter ISR}

ClearScreenASM( ) {while (transmit_empty = = false) /* wait for any old signal */ ;transmit_empty = false;

transmit_value 0x0001; // Store the clear screen commandActivateInterrupt( );

}


15 /26

A better solutionStill a work in progress !!!!!!

ClearScreenASM( ) {while (transmit_empty = = false) /* wait for any old signal */ ;transmit_empty = false;

transmit_value 0x0001; // Store the clear screen commandActivateInterrupt( );

}

WriteLetterASM(char letter) {while (transmit_empty = = false) /* wait for any old signal */ ;transmit_empty = false;transmit_value 0x200 | letter; ActivateInterrupt( );Call CursorMoveASM; // Get ready for next

}

Change to C++ programs as no longer taking directly to the hardware

ClearScreen( ) { TransmitSPIvalueASM(0x0001); }WriteLetter(char letter) {TransmitSPIvalueASM(0x0200 | letter); Call CursorMoveASM}

CursorMove ( ) { TransmitSPIvalueASM( 0x????); } etc


16 /26

SPI_registers -- Hardware Chap. 10

SPI_BAUD• Maximum serial clock rate is ¼ of the system clock

rate• SCK freq = Peripheral clock frequency / 2 *

SPI_BAUD SPI_FLG (Not SPI_FLAG)

• FLS5 bit – activates PF5 as slave select line• FLG5 bit -- control value of PF5 line

• when FLG5 bit is low, PF5 output is low, • when FLG5 bit is high, PF5 output is high,

• Can now answer question – do we need to change our other PF programs to handle SPI interface? NO!!


17 /26


18 /26

SPI-registers -- more SPI_STAT – SPI Status register

• Has some read only bits• Has some “write 1 to clear” sticky bits which are set

when error condition occurs• Need to write 1 to clear these bits during SPI Setup

SPI_TDBR – transmit data buffer register• Value written to this register is transmitted over SPI

interface• Writing to this register clears the SPI transmit interrupt

signal• One of the question about SPI_ISR function is

answered by this information


19 /26

Status register informationRO and W1C bits


20 /26


21 /26

SPI_CTL registerValues needed during setup TIMOD – transfer initiation mode

• 01 – Start transfer with write to SPI_TDBR. Interrupt when SPI_TDBR is empty.• Timing issues possible here – get an interrupt after SPI_TDBR is empty the first time

PSSE – Slave Select Enable• 0 – Disable – setting this as 1 makes this Blackfin a slave device. There might be

circumstances where you want one Blackfin as master, and another as a slave – but this is not one of them.

SIZE = 1 (16 bits) LSBF – Last significant bit first

• 0 as we want MSBF first as that is the way the interface has been designed MSTR – master

• 1 as we want Blackfin to be master, not slave SPE – SPI Enable

• 1 – but we might not want to do this during set-up WOM – Write open drain master

• 0 – Normal – because this was the way the interface was designed EMISO – Enable MISO to allow slave to talk to master

• 0 – Not in this part of the lab GM – Get more data

• 0 – when SPI_RDBR (receive buffer) is full – discard new incoming data – don’t really care at the moment


22 /26

SPI_CTL registerThings we still don’t understand

SZ – send zeros (or last word) when SPI_TDBR is empty • causes what to happen?

CPOL – clock polarity• Means what?

CPHA – Clock Phase• Means what?• When CPHA = 1, the core

activates the desired slave by clearing one of the SPI flag bits – what we need to happen

MURPHY’S RULE – any bit whose function is not obvious will be the key of whether you get the interface to work or not


23 /26

Now at the stage where we can do some experimenting with the hardware

We know that the following pins are “key” to the operation of the interface. • Place scope probes on these lines

MOSI – this will show the data being transmitted from the SPI interface

PF5 – chip select line• When this is pulled low, then the slave will accept any

data being transmitted, otherwise data is ignored• When this goes – low to high – then the serial data

transmitted to the slave is “latched” (converted into a parallel signal that is then sent to LCD as a data or a command request.


24 /26

SPI-Tests – InitializationSet_SPIregisters_ASM(ulong BAUD_SCALE)

#define BAUD_SCALE 0x8000 // Make system slow so we can scope the data transfersTEST(SET_SPI_Registers, ConfigureSPIregisters) {

if (test_level < 1) {puts("\tIGNORED LEVEL 1 TEST ***** SET_SPI_Registers");return;

} __SaveAndResetUserReg();

WatchDataClass<unsigned short> spi_reg(4, pSPI_BAUD, pSPI_CTL, pSPI_FLG, pSPI_STAT);

WATCH_MEMORY_RANGE(spi_reg, (Set_SPIregisters_ASM(BAUD_SCALE)), READ_CHECK | WRITE_CHECK);

// Warning – many of the SPI_STAT bits are W1C – write 1 to clear – DON”T write 0’s

USHORTS_EQUAL(spi_reg.getFinalValue(0), BAUD_SCALE); USHORTS_EQUAL((spi_reg.getStartValue(1) | 0x01 | SPE | MSTR | CPOL | CPHA | SIZE),

spi_reg.getFinalValue(1)); USHORTS_EQUAL((spi_reg.getStartValue(2) | FLS5), spi_reg.getFinalValue(2)); USHORTS_EQUAL(spi_reg.getStartValue(3), 1); // Reset value is 1

CHECK(spi_reg.getReadsWrites() == 5);

__RestoreUserReg();}


25 /26

SPI Tests – use of the interface

EX_INTERRUPT_HANDLER(spi_ISR);TEST(WriteSPIValue, ConfigureSPIregisters) {

if (test_level < 2) {puts("\tIGNORED LEVEL 2 TEST ***** WriteSPIValue");return;

} __SaveAndResetUserReg();

Set_SPIregisters_ASM(0x800); Set_SIC_IMASK_ASM(0x2000);

WriteSPI(0x0A); // Connect SPI interface to LED’s on logic station WriteSPI(0xFF05); // Values should be there WriteSPI(0x0F0F); // Look at values on MOSI line with scope __RestoreUserReg(); // Values should be there}


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Information taken from Analog Devices On-line Manuals with permission http://www.analog.com/processors/resources/technicalLibrary/manuals/

Information furnished by Analog Devices is believed to be accurate and reliable. However, Analog Devices assumes no responsibility for its use or for any infringement of any patent other rights of any third party which may result from its use. No license is granted by implication or otherwise under any patent or patent right of Analog Devices. Copyright Analog Devices, Inc. All rights reserved.

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Blackfin SPI Compatible Interface Design and implementation details on the way to a valid SPI-LCD interface driver