Basic Circuit.docx 0

8/10/2019 Basic Circuit.docx 0

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D1

S1

D2

S2

S3

D3

S4

D4

PMDC Motor

Vin

c1.

OPTOCOUPLER

1The function of Optocoupler is to isolate

the control circuit from power circuit.PWM

signal from the FPGA is not directly fed to

the power circuit in order to protect the

PWM signal it is essential to provideisolation circuit etween power circuit and

control circuit or else the high power

components may damage the low power

PWM circuit components. The !"1#$

consist of a high emitting diode and a one%

chip photo &'. This unit is ()lead *&P

pac+age.

2. , GATE DRIVER (IR2110)

A &G-T drive circuit is designed to connect the gate direct ! to a "o tage #$% with no

intervening resistance other than the impedance of the drive circuit switch. Gate driver


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acts as a high&'o er #$ er %tage etween the PWM output of the control device and

gates of the primary power switching &G-T.

The gate drive re uirements for a power MO/F0T or &G-T utili ed as a high side switch

2drain connected to the high voltage rail3 as shown in Figure3 driven in full enhancement3

i.e.3 lowest voltage drop across its terminals3 can e summari ed as follows4

Gate voltage must e 15%167 higher than the drain voltage. -eing a high side

switch3 such gate voltage would have to e higher than the rail voltage3 which is

fre uently the highest voltage availa le in the system.

The gate voltage must e controlla le from the logic3 which is normally

referenced to ground. Thus3 the control signals have to e level%shifted to the

source of the high side power device3 which3 in most applications3 swings

etween the two rails.

The power a sor ed y the gate drive circuitry should not significantly affect the

overall efficiency.

A T!'ica * oc+ Diagra,

The loc+ diagram of the &8,115 will e used to illustrate the typical structure of most

MG*s. &t comprises a drive circuit for a ground referenced power transistor3 another for a

high side one3 level translators and input logic circuitry.


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-ig$re. * oc+ Diagra, o the IR2110

In'$t ogic

-oth channels are controlled y TT9:'MO/ compati le inputs. The transition thresholds

are different from device to device. /ome MG*s3 2&8,11; and &8,16;< have the

transition threshold proportional to the logic supply 7** 2# to ,57< and /chmitt trigger

uffers with hysteresis e ual to 15= of 7** to accept inputs with long rise time. Other MG*s 2&8,15;3 &8,1,;3 &8,1#;< have a fi;ed transition from logic 5 to logic 1 etween

1.6 to , 7. /ome MG*s can drive only one high%side power device. Others can drive one

high%side and one low%side power device. Others can drive a full three%phase ridge. &t

goes without saying that any high%side driver can also drive a low side device. Those

MG*s with two gate drive channel can have dual3 hence independent3 input commands

or a single input command with complementary drive and predetermined dead time.

Those application that re uire a minimum deadtime should use MG*s with independent

drive and relay on a few passive components to uild a deadtime. The propagate on

delay etween input command and gate drive output is appro;imately the same for oth

channels at turn%on 21,5ns< as well as turn%off 2>6ns< with a temperature dependence

characteri ed in the data sheet. The shutdown function is internally latched y logic 1


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signal and activates the turn off of oth power devices. The first input command after the

removal of the shutdown signal clears the latch and activates its channel. This latched

shutdown lends itself to a simple implementation of a cycle% y%cycle current control3 as

e;emplified in /ection 1,. The signals from the input logic are coupled to the individual

channels through high noise immunity level translators. This allows the ground reference

of the logic supply 27// on pin 1#< to swing y ?67 with respect to the power ground

2'OM


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rails. f an isolated supply is connected etween this pin and 7 / 3 the high side channel will

switch the output 2C O< etween the positive of this supply and its ground in accordance

with the input command. One significant feature of MO/%gated transistors is their

capacitive input characteristic3 i.e.3 the fact that they are turned on y supplying a charge

to the gate rather than a continuous current. &f the high side channel is driving one such

device3 the isolated supply can e replaced y a capacitor3 as shown in Figure.

& the gate charge for the high side MO/F0T is provided y the ootstrap capacitor3 which

is charged y the 167 supply through the ootstrap diode during the time when the

device is off 2assuming that 7 / swings to ground during that time3 as it does in most

applications


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9di:dt induced voltage transient. /ection 6 gives directions on how to limit this negative

voltage transient.

. PO ER CIRCUIT

The Power circuit consists of single legs MO/F0T circuit 2Calf-ridge


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O$t'$t c$rrent a"e or, o t o $adrant cho''er

Characteri%tic% c$r"e o t o $adrant cho''er

where duty ratio d ETon:T TE Ton Toff


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3. PEED E4 OR

Motor speed is measured y optical encoder sensor. Optical encoder output is converted

to analog signal using 8D161 fre uency to voltage converter.

Motor speed is sensed from the following methods.

1. Optical 0ncoder

,. Huadrature 0ncoder Pulse

#. 8esolver This proIect used for optical encoder sensors.

OPTICAL Encoder

A circular windows around the circular dis+ mounted on the motor shaft such that it

rotates with the shaft. A 90* is mounted on the one side of the dis+ and a phototransistor

is mounted on the other side of the dis+3 opposite to the 90*3 the following figure%shows

the speed sensor


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O'tica Encoder 'eed en%or

*uring rotation when circular window come across the 90*3 the light passes to the

phototransistor. As a result3 phototransistor conducts and produces low output at its

collector. 0ach time when light passes through window to the phototransistor3 it conducts

and output goes low3 otherwise phototransistor is off and output is high. As dis+ rotates

the train of pulses are generated. The num er of pulses in one rotation e uals the num er

of circular windows on the dis+. Therefore y counting num er of pulses we can decide

the position of the shaft as well as num er of rotations performed y the shaft. -y

counting the num er of rotations in specific time we can also calculate the speed of

rotation. 'ounting the num er of pulses in specific time3 these pulses convert fre uency

to voltage y using fre uency to voltage converter.

5. -RE6UE4C7 TO VOLTAGE CO4VERTER (-8V)

Optical encoder output is fre uency format3 this format of signal is not directly feed to

&, ' A*' 2P'F(>c61


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0ach of the loc+s is descri ed in more detail elow4

Transformer % steps down high voltage A' mains to low voltage A'.

8ectifier % converts A' to *'3 ut the *' output is varying.

/moothing % smoothes the *' from varying greatly to a small ripple.

8egulator % eliminates ripple y setting *' output to a fi;ed voltage .

Tran% or,er

Transformers convert A' electricity from one voltage to another with little loss of power.

Transformers wor+ only with A' and this is one of the reasons why mains electricity is

A'.

-ig$re. Tran% or,er and Circ$it

%!,#o

/tep%up transformers increase voltage3 step%down transformers reduce voltage. Most

power supplies use a step%down transformer to reduce the dangerously high mains

voltage 2,#57 in @J< to a safer low voltage.

The input coil is called the 'ri,ar! and the output coil is called the %econdar! . There is

no electrical connection etween the two coilsK instead they are lin+ed y an alternatingmagnetic field created in the soft%iron core of the transformer. The two lines in the middle

of the circuit sym ol represent the core.

Transformers waste very little power so the power out is 2almost< e ual to the power in.

"ote that as voltage is stepped down current is stepped up.


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The ratio of the num er of turns on each coil3 called the t$rn9% ratio 3 determines the ratio

of the voltages. A step%down transformer has a large num er of turns on its primary

2input< coil3 which is connected to the high voltage mains supply3 and a small num er of

turns on its secondary 2output< coil to give a low output voltage.

Turns ratio =Vp

=Np

and Power out = power in

Vs Ns Vs Is = Vp Ip

7p E primary 2input< voltage

"p E num er of turns on primary coil

&p E primary 2input< current

7s E secondary 2output< voltage

"s E num er of turns on secondary coil&s E secondary 2output< current

*ridge recti ier

A ridge rectifier can e made using four individual diodes3 ut it is also availa le in

special pac+ages containing the four diodes re uired. &t is called a full%wave

rectifier ecause it uses all the A' wave 2 oth positive and negative sections


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Figure: Bridge rectifier Output: full-wave varying DC

,oothing

/moothing is performed y a large value electrolytic capacitor connected across the *'

supply to act as a reservoir3 supplying current to the output when the varying *' voltage

from the rectifier is falling. The diagram shows the unsmoothed varying *' 2dotted line7 A' and

another is 1(%5%1(7. Transformer secondary output is connected to regulator through full

ridge rectifier and filtering capacitor. *iode is used for convert the A' voltage to *'

voltage with A' ripplesK capacitor is used for remove the A' ripples. 8egulator output is

regulating the *' output voltage.

Transformer


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Primary 7oltage E ,#57 A'

/econdary 7oltage E 5%>7 A' and 1(%5%1(7 A'

8egulator

&' % $(56 and $(1, E Positive 7oltage 8egulator 2 6v and 1,7


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CIRCUIT DIAGRA:


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-ig$re. (a) Circ$it Diagra, o P:DC :otor 'eed contro


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19/31

-ig$re. (#) Circ$it Diagra, o P:DC :otor 'eed contro


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D1

S1

D2

S2

S3

D3

S4

D4

PMDC Motor

Vin

30Vdc

-ig$re. (c) Circ$it Diagra, o P:DC :otor 'eed contro

CO4CLU IO4

The FPGA -ased *' Motor /peed 'ontrol @sing PWM Techni ue was done and the output

was verified /uccessfully.


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DATA /EET

1. >41 ? = OPTOCOUPLER

The !"1#$ consist of a high emitting diode and a one chip photo &'. This unit is ()lead*&P pac+age.

9/TT9 : TT9 compati le4 67 /upply @ltra high speed4 15M-d Guaranteed performance over temperature4 5Q' to $5Q' Cigh isolation voltage 4 ,6557rms min. @9 recogni ed 4 @916$$3 file no. 0!$#D>

Pin Detai %

1 4 ".'. , 4 Anode# 4 'athode D 4 ".'.6 4 G"* ! 4 Output2Open collector

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Basic Circuit.docx 0