Articulo Indu Es-84

National Conference On Electrical Sciences -2012 (NCES-12) ISBN: 978-93-81583-72-2

Department Of EEE, Annamacharya Institute Of Technology & Sciences, Rajampet 243

Abstract— This paper deals with simulation and implementation of LCL-T buck converter. This converter has capable for operating from high input voltages and it also had capable for reducing the capacitive snubbing switching losses and eliminates capacitor discharge turn on losses by providing zero voltage turn-on. Open loop and closed loop models are developed and they are simulated. The digital simulation is done by using MATLAB/Simpowersystems tool and the simulation results are presented here.

Index Terms— Digital simulation, LCL-T buck

converter, High input voltage.

I. INTRODUCTION

Generally a LC parameters buck convertertopology and its variations exhibit satisfactory performance in majority of applications where output voltage is lesser than input voltage. The performance of buck converter can be improved by implementing a buck converter with multiple switches and/or extra inductor parameters.

In conventional full-bridge converters, the four switches must sustain the input voltage when they are “off.” In applications using high values of input voltage, such as railway traction, that voltage can be larger than the safe operating voltage of power transistors that the designer would like to use, if it would be possible. A straightforward way to meet the requirements is to use transistors with sufficiently high breakdown voltage, with the disadvantages of higher cost and higher “on” resistance than would be the case if the transistors could be rated for operation at (for example) half of that voltage. In a previous approach [1], each switch was realized as two transistors in series, with voltage-balancing components that would cause the two transistors to share the voltage equally. Then each transistor would sustain only half of input voltage.

This approach worked well, but the equipment cost had to include the cost of eight power transistors for the full-bridge, and the voltage-balancing components. In the new approach proposed here, shown in Fig. 3, the two legs of the full bridge (each leg containing the usual two switches in series) are connected in series across the supply voltage. The node at which the two legs are joined is held at half of the input voltage, by bypass/filter capacitors that are connected to each of the two input rails. This topology can be operated with

a) Capacitive turn-off snubbing to reduce turn-off switching power losses.b) Resonant transitions that provide zero-voltage turn-on to eliminate turn-on switching power losses.

Fig 1. Conventional full-bridge converter

The genesis of the new converter can be presented following a sequence of modifications in the connection of the components First, a capacitor is added in series with the transformer, as shown in

A Novel Soft Switching LCL-T Buck DC–DC Converter System

G.Dilli Babu1, A Mallikarjuna Prasad2, D.Subbarayudu3 and S.Sivanagaraju4



Fig. 2. Full-bridge converter with capacitor in series with transformer primary

The structure of the proposed converter as defined. Substituting input voltage sources by two input capacitors, the final configuration of the proposed structure is obtained, as presented in Fig. 3.

Fig. 3. Power circuit of the proposed converter. II. . CIRCUIT AND PRINCIPLE OF OPERATION

A. Circuit Description

Fig.3 shows the power-stage circuit. The upper leg comprises and; the lower leg comprises, and. The example design that was built and tested (Section VI) used metal oxide semiconductor field effect transistor (MOSFET) switches. In each MOSFET switch, the internal substrate diode conducts inverse- polarity current and clamps the switch reverse voltage atAbout 1 V. (If bipolar junction transistors are used, external anti-parallel diodes should be added.) The MOSFET internal CONC

capacitances are used as,

1- C4

The input capacitors C

providing capacitive turn-off snubbing. In some applications (but not in the example in Section VI), the internal capacitances can be supplemented

with external capacitors that should be connected across the switches with as low wiring inductance as possible.

in1and Cin2 bypass the input voltage and generate a bypassed dc mid-point voltage of Vin/2. As the switches go through their cycle of switching, to be discussed below, each switch has Vin/2 applied across it while it is “off.” Cs is a dc-blocking capacitor that blocks the dc voltage of from being applied to the series combination of Lr and TRF. In this application, Csis large enough to act as only a dc voltage source, to prevent dc current from flowing through Lr and TRF . If a resonant load network is used, can be the series-connected resonance capacitor. The stored energy in Lr charges and discharges the snubbing capacitors C1- C4 during a conduction gap that is provided between turning-off one of a pair of switches and turning-on the other switch of the pair. That action brings the switch voltage to zero before the switch is turned-on. Lr comprises the sum of an external inductor and the internal primary-side leakage inductance of the transformer. The transformer provides galvanic isolation and voltage transformation, between the source and the load Ro.DR1 and DR2 rectify the rectangular-wave output of the transformer, Lo and Co

B. Principle of Operation:

and filter-out the ripple in the rectified output.

To simplify the explanation and the analysis of circuit operation, the following assumptions are made:.1) All components are ideal.2) The ripple in the dc voltage across the series capacitor s and the input capacitors Cin1and Cin2

3) A current sink I

is negligibly small.

o

4) The analysis is based on the circuit reflected to the primary side of the transformer, where L

replaces the output filter and load.

Tr represents the Mutual inductance in the transformer’s T equivalent circuit and the leakage inductance is absorbed into Lr5) The output rectifier is replaced by four rectifier diodes. Fig. 4 shows the resulting equivalent circuit, referred to the primary side of the transformer. The six subsections of the figure show the six successive

.

Fig 4: Operation stages of power converter.



The power transfer and the output/input voltage ratio are controlled by the duty ratio (D) of the switches S1 and S3; the switches S2 and S4 operate as the complements of S1 and S3

1) Stage 1 [Fig. 4(a)]: Power Transfer During this stage, power is transferred from the input Source to the load through switches S

, respectively. The six sequential circuit states are described as follows.

1, Dr1, Dr4, And S4.The voltage stored on the series capacitor (Vcs) is Vin/2 and the voltage applied across Lm is (Vin – Vcs

2) Stage 2 [Fig. 4(b)]: Commutation of Switch S1Atthe instant t

).

1, switch S1 is turned off at zero voltage, capacitor C1 begins to charge, and C2 begins to discharge linearly with time, with a constant current. This stage finishes when Vc1 (t) = Vin/2 and Vc2

3). Stage 3 [Fig. 4(c)]: Free-Wheeling Stage(t) = 0

The voltage across C2 becomes zero and diode D2 begins to conduct. During this stage,the resonant inductor current (iLr) is approximately constant. The circuit operates in a free-wheeling mode, with current flowing from, +Vin through, Cin1, D2 and Lr, through the Parallel combination of Lm and the rectifiers (reflected to the primary side), and through Cs and S4 . Because free-wheeling current flows through both polarities of the

rectifier, the output voltage is zero. In this stage switch S2

4) Stage 4 [Fig. 4(d)]: Commutation of Switchmust be gated on.

At the instant t3, the switch S4 is turned off at zero voltage and the capacitor C4 begins to charge while the capacitor C3 begins to discharge in a resonant way. This Stage finishes when Vc4 (t) = Vin/2 and

Vc3(t) = 0



5) Stage 5 [Fig. 4(e)]: Discharge of Resonant Inductor Energy When the voltage Vc3 becomes zero, the diode D3 begins to conduct and the current through Lr begins to decrease linearly with a voltage -Vcsapplied to its terminals. During this stage, the switch S3

6) Stage 6 [Fig. 4(f)]: Charge of Resonant InductorEnergy In Stage 6, the resonant inductor current becomes negative and switches S

must be gated on.

2-S3 begin to conduct at zero voltage And zero current. When the current through Lr reaches the value –I0

In the discharge and charge of resonant inductor energy (stages 5 and 6), a reduction in the duty ratio occurs, because during these stages a gate signal is applied to the switch, but the free-wheeling in the output rectifiers maintains zero voltage across the power transformer.

/n, the free-wheeling in the output rectifier is finished and power is transferred from the series capacitor to the load.

III. ANALYSIS

A. Output CharacteristicAt first, temporarily neglecting the reduction of duty ratio caused by the conduction gap that allows the zero-voltage turn-on, the average voltage at the load is (VO)

-1.

WhereVin V

input voltageCS

N transformer turns ratioseries capacitor voltage

)

The voltage on the dc-blocking (VCS) capacitor is

----(2).Then, the output voltage is

---(3).

But the output voltage is controlled by an effective duty ratio that is smaller than the nominal duty ratio

----(4). Where ed by the conduction gap. That reduction can be calculated by determining the duration of Stages 5

and 6 (discussed in Section III). The current in Lrwill be considered to be constant during the free-wheeling stage, and the current in Lm is neglected. Then, the current Lr in during Stages 5 and 6 is

--- (5).

At time t6.

. --- (6)

This occurs two times in the period T Then the total reduction of duty ratio during the period is

------ (7)

. ------- (8)

Therefore the reduction in the duty ratio is proportional Lr to and the load current. Subtracting the correction (8) from the first- approximation duty ratio in (3), we obtain, for the output voltage

-- (9)

However, the output voltage calculated by (9) is obtained considering ideal components. A more-accurate value of output voltage can be calculated from (10), that includes the rectifier diode’s Forward-conduction threshold voltage VF and the parasitic series resistance through which flows: the transformer, rectifier diode,filter inductor, and wiring.

B. Turn-On and Turn-Off Switching

Turn-off: The commutation process of the proposed converter is similar to the classical ZVS PWM full-bridge converter. The turn-off losses are reduced by the action of the snubber capacitors that are in parallel with the switches. When a switch is turned-off, the switch current flows through the commutation capacitor, charging this capacitor. Thus, the capacitor voltage, which is also the switch voltage, rises progressively until it reaches the voltage. Therefore, the crossing of the voltage and current in the switch is reduced and the turn-off losses are minimized.

Turn-on: The converter uses zero-voltage turn-on to eliminate the turn-on switching losses. The zero-



voltage turn-on of the switches is particularly important for converters operating at high dc input voltage, because the power dissipated in switching at nonzero voltage goes as the square of the dc input voltage.

The active switches are turned on while the anti-parallel diodes are conducting, so the switches turn-on at essentially zero voltage and almost zero current. But turn-on losses occurs if the turn-off snubber capacitors are not fully discharged. Switches S1and S3 turn-off in the power-transfer stage (stage 1 in Section III), and the output current referred to the primary accomplishes the charge and discharge of the snubber capacitors (linearly with time). The large stored energy of the ripple-filter inductor L0 is available for this purpose so, as a practical matter,S2and S4 will always be turned-on at zero. But switches S2 and S4 turn-off in the free-wheeling stage (stage 3 of Section III), during which the transformer is short circuited by the output rectifier. Thus, only the energy stored in the circuit inductance Lr (that includes the transformer primary- side leakage inductance) is available to charge and discharge the snubber capacitors, in a resonant way. The minimum current that maintains zero-voltage turn-on for S1 or S3 is

Where C is the snubber capacitor .

A larger value of Lr decreases the primary-side current needed to obtain zero-voltage turn- on off S1 and S3, but the inductance of the resonant inductor Lr is limited by the Maximum allowed reduction of duty ratio [see (8)]. Section V gives a design example that includes the effect of that reduction of duty ratio.

IV. SIMULATION REULTS

Four switch LCL-T buck dc-dc converter is shown in fig.no:4.the input dc voltage is rectified into high switching AC frequencies using Four switches LCL-T buck inverter.

Switching pulses are given to S1&S4,S2&S3 are shown in fig.no:5&6 and also their input voltages, output voltage &output current are shown in fig. No: 6&7.the dc output voltage is variation at 600V.the variation of output with decrease input is shown in fig. No:15

Fig. 5.. Simulation of the proposed converter.

Fig. 6. Driving pulses of S1 &S

2

Fig7. Driving pulses of S3 & S4

Fig.8Inputvoltage



Fig.9 output voltage &output current

The input voltage is applied along with step disturbance shown in fig.no:10.this open loop system

responses along with input voltage shown in waveformsfig.no:11&12.as due to increase in the input voltage a step rise is the output disturbance appears.

Fig.10. Open loop system

Fig.11. Input Voltage

Fig.12 Output voltage with disturbance

The closed loop system circuit model is shown in fig .no:13.the closed loop system its output response is feedback and it is sensed, compared with an input reference voltage. The error can be through a PI controller. The output of PI controller refers with pulse width to maintain the output constant and their responses shown in fig.no:13&14.it can be observe that the output voltage remains constant due to closed loop action of the system.

Fig.13. Closed loop model of two inductor boostconverter circuit

Fig.13 Input Voltage

Fig.14. Output voltage with disturbance



Fig. 15. Output voltage as function of output current. V. CONCLUSION

Open loop &closed loop controlled four switch LCL-T buck dc-dc converter system is simulated using MATLAB/Simulink and the results are presented. The closed loop system acquires constant voltage. This four switch LCL-T power circuit topology is well suited to its economical realization.

REFERENCES

[1] J. R. Pinheiro and I. Barbi, “The three-level ZVS-PWM DC-to-DC converter,”IEEE Trans. Power Electron., vol. 8, pp. 486–492, Oct. 1993.[2] L. Balogh, R. Redl, and N. O. Sokal, “A novel soft-switching full-bridgeDC-DC converter: analysis, design considerations, and experimental resultsat 1.5 kW, 100 kHz,” IEEE Trans. Power Electron., vol. 6, pp.408–418, July 1991.[3] R. Redl and L. Balogh, “Soft-switching full-bridge dc/dc converting,”U.S. Patent 5 198 969, Mar. 30, 1993.[4] I. Barbi, R. Gules, R. Redl, and N. O. Sokal, “Dc/Dc converter forhigh input voltage: four switches with peak voltage of Vin/2, capacitiveturn-off snubbing and zero-voltage turn-on,” in Proc. IEEE PowerElectronics Specialists Conf. (PESC), 1998, pp. 1–7.[5] T. F.Wu and J. C. Hung, “A PDM controlled series resonant multi-levelconverter applied for x-ray generators,” in Proc. IEEE Power ElectronicsSpecialsists Conf. (PESC), 1999.[6] E. S. Kim,Y. B. Byun,Y. H. Kim, andY. G. Hong, “A three level ZVZCSphase-shifted Dc/Dc converter using a tapped inductor and a snubber capacitor,”in Proc. IEEE Applied Power Electronics Conf. (APEC), 2001.[7] E. S. Kim, Y. B. Byun, T. G. Koo, K. Y. Joe, and Y. H. Kim, “An improvedthree level ZVZCS Dc/Dc converter using a tapped inductor and asnubber capacitor,” in Proc. Power Conversion Conf. (PCC’02), Osaka,Japan, 2002, pp. 115–121.[8] F. Canales, P. M. Barbosa, and F. Lee, “A zero voltage and zero currentswitching three-level dc/dc converter,” in Proc. IEEE Applied PowerElectronics Conf. (APEC), 2000, pp. 314–320.

AUTHORS

G.Dilli Babu was born in 1984. He received Diploma in EEE from S.B.T.E.T., Hyderabad in the year 2003. He graduated from ANNAUNIVERSITY., Chennai in the year 2006. Presently he is perusing

his M.Tech with Power Electronics and Electrical Drives Specialization in St.Johns college of Engineering and technology yemiggnur Kurnool. A.P., India. He is working in the area of PMSM. His area of interest is machines, power electronics and Power Semiconductor Drives. Cell: +919963378172 Email: [email protected]

A.MALLIKARJUNA PRASAD has obtained his B.E from MADRAS University in the year 2001. He has obtained his M.E from Sathyabama University in the year 2004. He has 9 years of teaching experience. Presently he is a research scholar in JNTU, KAKINADA. He is working in the area

of high power density dc-dc converters.

Dr. D. SubbaRayudu received B.E degree in Electrical Engineering from S.V.University, Tirupati, India in1960, M.Sc (Engg) degree from Madras University in1962 and Ph.D degree from Indian Institute of Technology, Madras, India in 1977. He is working asprofessor in the Department of

Electrical and Electronics Engineering, G. Pulla Reddy Engineering College, Kurnool, India. His research interests include Power Electronic Converters.

Dr.S.Sivanagaraju received his Masters Degree in 2000 from IIT, Kharagpur and did his Ph.D from J.N.T. University in2004. He is currently working as associate professor in the department ofElectrical Engineering J.N.T.U.College of Engg, Kakinada, Andhra Pradesh,

India. He had received two national awards (Pandit Madan Mohan Malaviya memorial prize award and Best paper prize award) from the institution of engineers (India) for the year 2003-04. He is referee for IEE Proceedings-Generation Transmission and Distribution and Internationaljournal of Emerging Electrical Power System. He has 40 publications in National and International journals and conferences to his credit. His areas of interest are in Distribution Automation, Genetic Algorithm application todistribution systems and Power Electronics.

Documents

Articulo Indu Es-84