ANALYTICAL SOI MOSFET MODEL VALID FOR

GRADED-CHANNEL DEVICES

Benjamín Iñíguez1 , Marcelo Antonio Pavanello2,3, João AntonioMartino3 and Denis Flandre4

3Escola Tècnica Superior d`EngenyeriaUniversitat Rovira I Virgili, Tarragona, Spain

2Center for Semiconductor ComponentsState University of Campinas, Campinas, Brazil

3Laboratório de Sistemas IntegráveisEscola Politécnica da Universidade de São Paulo

4Laboratoire de MicroéletroniqueUniversité Catholique de Louvain, Louvain-la-Neuve, Belgium

Outline:Outline:

• Introduction

• Analytical Model Formulation

• Results and Discussion

• Fabrication Process and Experimental Results

• Conclusion

The advantages of Fully-depleted SOI nMOSFETs overPartially-Depleted (PD) and bulk MOSFETs are well known

1) Lower subthreshold ideality factor2) Reduced short-channel effects3) Better analog performance4) Better microwave performance (gain, speed and cutofffrequency)5) Lower 1/f and thermal noise

As a consequence, FD SOI MOSFET is a very goodcandidate for low-power and low-noise microwavecircuits

Introduction - 1

However, Fully-Depleted SOI nMOSFETs suffer from someParasitic Bipolar Effects due to the Floating Body

Premature Drain Breakdown Parasitic Bipolar Transistor Action: Emitter – Source Base – Body (floating) Collector – Drain

Some of the proposed solutions:

� Bandgap Engineering (Ge implanted) [M. Yoshimi et al., IEDM 94, p. 429]

� Source-Body Contact [IEDM 94, p. 657]

� Asymmetric Channel Profile using tilt implantation [B. Cheng et al.,

IEEE Int. SOI Conference, p. 113, 1998]

Introduction - 2

⇒ THE GRADED-CHANNEL (GC) SOI nMOSFET

N+

LLD

L

PolyField

Oxide

FieldOxide

Substrate

naturaldopingNA

Buried Oxide

N+

Source Drain

Introduction - 3

� FD SOI CMOS technology fully compatible processing

� One photolitographic step is used to adjust the threshold voltage ionicimplantation position

� This photolithographic step is the same used to mask the p-type transistor NO additional photolithographic step has to be included in the CMOS processing.

� The effective channel length is about L-LLD

Introduction - 4

Reported results indicate:Reported results indicate:

Increase in the breakdown voltage

Tremendous reduction in the drain output conductance

Increase in the transconductance

The Graded-Channel SOI MOSFET is a great candidateThe Graded-Channel SOI MOSFET is a great candidatefor analog circuits resulting in improved amplifiers andfor analog circuits resulting in improved amplifiers and

current mirrorscurrent mirrors

Our goal: Development of a continuos model for GCtransistor to allow reliable simulation of analog

circuits

Introduction - 5

y directionLyHD yLD

log(NA)

NAF, HD

NAF, LD

Schematic doping profile along channel

( )

−−=

4-

2HD

HD,AFA10 2

yyexpNN

In the interval yHD≤y ≤ yLD

Introduction - 6

Based on physical principles, an analytical FD SOI MOSFET model was developed by B. Iñiguez et al.

For a conventional fully-depleted SOI nMOSFET:

−

φµ−=

dy

dQv

dy

dQWI nf

Tsf

nfDS

There is a linear relation between the surface potential, φsf,and the inversion charge density, Qnf:

−−−=

oxf

bFBfGFoxfnf C2

QVVCQ

φ−

+−− SF

oxb

bFBbGB

oxf

bb nC2

QVV

C

C

Introduction - 7

An explicit and unified expression for Qnf is used in the IDS equation(proposed by Iñiguez et al): .

NTToxfnf SnvCQ −= ( )

−−−

+T

FiGF

NTT

oxf0

v n

ynVVthVexp

S v n

CQ

1log( )

−−+

NTT

FGF

S v n

ynVVthVexp

This model is continuous, valid from weak to strongThis model is continuous, valid from weak to stronginversion regimesinversion regimes

Integrating the inversion charges along channel results:

( )[ S,nfD,nfTDS QQvL

WI −µ=

−−

oxf

2S,nf

2D,nf

Cn 2

QQ

Qnf,D and Qnf,S are the inversion charge densities at the drain and source,respectively

Introduction - 8

1- Short-channel effects includedDIBL and charge sharingVelocity saturationChannel length modulation

2- Complete charge model3- Scalability down to 0.16 µm4- Temperature dependencies included. Model validated upto 300 oC :5-Macro-model developed to extend the model to themicrowave range. Accuracy demonstrated up to 40 GHz..

These physical principles allow to develop a complete CAD model and to adapt it to many conditions

Analytical Model Formulation - 1

For long-channel transistors, the transition region into the channelFor long-channel transistors, the transition region into the channel(from (from yyHDHD≤≤y y ≤≤ yyLDLD) can be considered negligible:) can be considered negligible:

With this assumption, there will be two explicit equations for theinversion charges in the low doped (Qnf, LD) and conventionally

doped (Qnf, HD) parts of the channel

NTToxfLD,nf SnvCQ −=( )

−−−

+T

LD,FiGF

NTT

oxfLD,0

v n

ynVVthVexp

S v n

CQ

1log( )

−−+

NTT

LD,FGF

S v n

ynVVthVexp

( )

−−−

+T

HD,FiGF

NTT

oxfHD,0

v n

ynVVthVexp

S v n

CQ

1logNTToxfHD,nf SnvCQ −=( )

−−+

NTT

HD,FGF

S v n

ynVVthVexp

V(y) is the potential variation along channel

Analytical Model Formulation - 2

Integrating the inversion charges along channel results:

−µ−= ∫

− LDLL

0

HD,nfT

oxf

HD nf,HD,nfHDDS dy

dQv

dy Cn

dQ QWI

−µ−= ∫

−

L

LL

LD,nfT

oxf

LD nf,LD,nfLD

LD

dy

dQv

dy Cn

dQ QW

( )[0LDLL HD,nfHD,nfT

LD

HDDS QQv

LL

WI −

−µ

=−

−− −

oxf

2HD,nf

2HD,nf

Cn 2

QQ0LDLL

( )[LDLLL LD,nfLD,nfT

LD

LDDS QQv

L

WI

−−

µ=

−− −

oxf

2LD,nf

2LD,nf

Cn 2

QQLDLLL

The GC SOI The GC SOI nMOSFET nMOSFET is therefore interpreted as ais therefore interpreted as aseries association of two conventional transistors, eachseries association of two conventional transistors, each

one representing a part of the channel regionone representing a part of the channel region

Results and Discussion - 1

Comparison between MEDICI numerical two-dimensionalComparison between MEDICI numerical two-dimensionalsimulations and model equations solutionsimulations and model equations solution

toxf=30 nm, tSi=80 nm, toxb=400 nm, Qox1/q=Qox2/q=5 x 1010 cm-2,NAF, HD=1017 cm-3 and NAF, LD=1015 cm-3. L=10 µm

Device characteristics:

Results and Discussion - 2

0.0 0.5 1.0 1.5 2.0 2.5 3.00.0

0.2

0.4

0.6

0.8

1.0

1.2

LLD/L=0.50

VDS =0.1 V

LLD/L=0.25

MEDICI Model

I DS

[A/ µ

m]

VGF [V]

Gate characteristics in the linear regime

Results and Discussion - 3

0.5 1.0 1.5 2.0 2.5 3.010-12

10-11

10-10

10-9

10-8

10-7

10-6

10-5

LLD/L=0.50

LLD/L=0.25

VDS=0.1 V

MEDICI Model

I DS

[A/ µ

m]

VGF [V]

Gate characteristics in linear regime

Results and Discussion - 4

Drain characteristics

0.0 0.5 1.0 1.5 2.0 2.5 3.00.00

0.05

0.10

0.15

0.20

0.25

LLD/L=0.25

LLD/L=0.5

VGT=200 mV

MEDICI Model

I DS

[A/ µ

m]

VDS [V]

Excellent agreement between the model and MEDICI simulationsExcellent agreement between the model and MEDICI simulations

The increase of IThe increase of IDSDS with L with LLDLD/L (/L (LLeffeff reduction) is greatly modeledreduction) is greatly modeled

Experimental Results - 1

Drain characteristics - L = 4µm

0 1 2 30

20

40

60

80

100

FD SOI

LLD/L=0.25

LLD/L=0.37

LLD/L=0.50

VGT=500 mV

Experimental Model

I DS

[ µA

]

VDS [V]The tremendous increase in the Early voltage is adequatelyThe tremendous increase in the Early voltage is adequately

reproduced by the modelreproduced by the model

Experimental Results - 2

Gate characteristics in saturation - L = 2µm

0.0 0.5 1.0 1.5 2.0

10-11

10-10

10-9

10-8

10-7

10-6

10-5

10-4

10-3

LLD/L=0.51

LLD/L=0.25

VDS=1.5 V

Model Experimental

I DS

[A]

VGF [V]

10-11 10-10 10-9 10-8 10-7 10-6 10-5 10-40

10

20

30

40

VDS=1.5 V

model experimental

g m/I

DS

[V-1

]

IDS/(W/Leff) [A]

Experimental Results - 3

Transconductance over drain current vs scaled drain currentL = 2µm

Conclusion - 1

Our unified FD SOI MOSFET model has been adapted toOur unified FD SOI MOSFET model has been adapted tolong-channel Graded-Channel SOI long-channel Graded-Channel SOI nMOSFET nMOSFET based on abased on a

series association of transistors to represent the channel dopingseries association of transistors to represent the channel dopingprofileprofile

The validity of the proposed model has been verified by bothThe validity of the proposed model has been verified by bothnumerical simulations and experimental resultsnumerical simulations and experimental results

An excellent agreement has been found in both casesAn excellent agreement has been found in both cases

AcknowledgementsAcknowledgements

Brazilian Federal Agency CNPq for the financial support

UCL Microelectronics Laboratory Staff for the device processing