An accurate CV-CC Non- isolated Buck BatteryCharger Using Primary side PWM Controller

Baiju PayyappillyPower Systems GroupISRO Satellite Centre

Bangalore-560017, INDIAEmail: bbp@isac.gov.in

Vinod JohnDepartment of Electrical Engineering

Indian Institute of ScienceBangalore-560012, INDIA

Email: vjohn@ee.iisc.ernet.in

Abstract—Primary side flyback PWM controllers are availablewith large number of protection features such as over currentprotection, over/ under input voltage protection, over output volt-age protection etc., and designs using such controllers can be costeffective. They are designed for flyback dc-dc converters for lowpower CV-CC applications like LED lighting and mobile/ PDAbattery chargers. Using this type of controllers for a Buck typeCV-CC battery charger, which can be designed for higher powerlevels is a low cost option. It offers accurate CV-CC controlfunction with a stable change over between constant current andconstant voltage regimes. It is shown that the resulting design canfully utilize the protection features, which increases safety andreliability. This paper presents the design of a 14V, 7W CV-CCbattery charger using such an integrated controller and explainsthe modifications required for the flyback controller to work asa buck CV-CC charger.

I. INTRODUCTION

High accuracy constant current/ constant voltage (CC-CV)battery chargers are necessary for characterization and mod-eling of batteries. Especially the Li-ion batteries, which arethe popular ones presently, demands very accurate current andvoltage settings due to the nature of its electro chemistry. Alsothey are very sensitive to over charge, which can result in firehazards.

To efficiently charge a Li-ion battery, the popular methodused is CC-CV technique. There are three distinct phases for aCC-CV controller. Constant current phase, change over phasefrom CC to CV and constant voltage phase. Smooth and safechange over from CC to CV is critical to the charger [2].

Many techniques have been proposed to implement this twoloop control. Jung et al. [3] uses a p-n-p transistor to switchbetween the two control loops, Tsai et al. [4] switch betweentwo separate low drop out regulators (LDO) to implement theloop change over, and Liu et al. [5] uses Field ProgrammableGate Arrays (FPGA) and micro controllers for the same changeover. Chen et al. [2] uses a diode for transition between twohigh gain linear feedback loops (voltage and current loops),and controls a single MOS device to achieve CV-CC charging.However, this being a linear regulator, there is always powerloss in the series device while charging.

This work was supported by the Dept. of Science and Technology, Govt.of India under project “facility for design, development and demonstration ofadvanced batteries and ultra-capacitors”.

Many PWM controllers are available today for primary sidefeedback control of flyback dc-dc converter at low cost andhaving low power consumption. One such controller, R7710[1]is designed to regulate the output voltage or current accurately,by sensing an auxiliary output voltage and primary current.

A buck non-isolated power converter is controlled usingthe above mentioned controller, so that the design can beextended to high power levels. The proposed design providesthe advantages of, accurate current regulation for the entire dcinput voltage range for the design, smooth and stable transitionfrom CC to CV and utilizes a small 6 pin package controller.

II. DESIGN OF THE BUCK CHARGER

Circuit implementation of the proposed CV-CC chargeris shown the schematic diagram in Fig. 1. The six pin chipU1 is the primary side controller. The start-up power forthe controller is provided by the series regulator, which isidentified in Fig. 1. This series regulator provides 18V tothe controller. The auxiliary flyback converter is formed byMosfetM1, flyback inductorTx1, diodeD7 and associatedcomponents. The output of the flyback converter is OR’ed withthe start-up regulator output.

MosfetsM2 and M3, inductorL1 and CapacitorC5 consti-tute the non-isolated buck converter, whose output is regulatedby the feedback to the controller. A PNP transistorQ2 isused for multiplexing the output voltage feedback from buckconverter and secondary voltage from flyback inductor to thepin-4 of the controller(U1). Multiplexing is controlled using thegate drive signal from pin-1 of the controller, which also drivesthe flyback switch(M1) as well as buck switches(M2,M3).

A resistive current sensor (RS) is used as shown in theschematic in Fig. 1, to provide current feedback to the con-troller. The resistive dividers R14 and R15 provides a meansfor fine tuning the limiting current.

A. Sensing of Input and Output Voltages

The sensing of input voltage, output voltage and compen-sation for cable drop in output line are achieved through thesingle pin (pin-4,voltage sense pin) of the controller.

To retain the utilization of the features in the controller, onehas to have a flyback converter which provides an auxiliaryoutput. Hence the design has to have an embedded flybackpart. For the main power flow to the battery, the buck stage is

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proposed in addition to the auxiliary flyback stage. The gatedrive signal is used for driving the power switch (MOSFET)of the buck stage, in addition to the driving of flyback switch.The feed back loop for regulation of voltage and current isfrom this buck stage.

Hence, the overall design has a single controller, whichdrives a buck stage and an auxiliary flyback stage simultane-ously. Output voltage or current is regulated for the buck stagealone and flyback output is in open loop. The flyback outputis sensed for implementing input over voltage or under voltageprotection as well as it powers the controller when the nominaldc input voltage is above 40V.

The output feedback voltage sense pin (pin-4) of the con-troller has multiple functions. It serves functions of outputvoltage sense and input voltage sense. The output voltagesense is done during the OFF time of switch gate drive. Whilethe input voltage sense is done during the ON time of gatedrive pulse. This is achieved by sensing the auxiliary flybacksecondary voltage during ON period of the gate drive pulse,and sourcing a current (Iclamp) from the pin-4 to clamp thisnegative voltage to zero. The internally sourced current, Iclampneeded for clamping is a measure of input voltage.

To facilitate for the multiple function of the voltage sensepin, it needs to be connected to the buck stage output voltagesense, during the OFF time of the gate drive signal, andconnected to flyback auxiliary output sense, during the ONtime. This is achieved by de-multiplexing this pin using a PNPtransistor (Q2), diode (D5) and driving the transistor from gatedrive signal, as shown in Fig. 2(a). During the ON time PNP

transistor Q2 is OFF and hence the pin4, get connected toVAUX sense line. This is a negative voltage proportional tothe negative Vin of the flyback converter, when the flybacktransistor M1 is ON. The internal current source clamps thisvoltage to zero and thus senses the input voltage. During OFFtime as Q2 is ON, the pin4 gets connected to buck outputvoltage sense line, and during this time VAUX is positive andis blocked by by D5. The sensed voltage is used for decidingthe duty cycle of the gate drive pulse.

B. Input Over Voltage Limit

The Iclamp sourced from the Pin-4 of the con-troller (Fig. 2(a)) during ON time is proportional to Vin andhas a maximum limiting value of 1.5 mA. Beyond this limitthe controller is shut downed.

RFB2 is selected to get Iclamp of 1.5mA at the maximuminput voltage. Now, the resistor value for RFB1 is selected toset the buck sense voltage=2.5V, during the constant voltageregime. This is set for an output voltage of 14.2V.

RFB2 =VIN(max)

1.5

NAUXNP

(1)

14.2× RFB1

RFB1 +RFB2= 2.5 (2)

C. Input Under Voltage Limit

The nominal working supply voltage range of the controlleris 16V to 27.5V. The start up series regulator is set at 18V andpowers the controller from the DC bus.The start up regulator

VAUX

Vout

Vv

Iclamp

Pin-4Q2

flybackinductor

D5RFB2sR6g RFB1sR7g

R12

R13

controller

Vsense

Pin-1

gateBdrive

D7

(a)

+

-

controller

voltageerror

to PWMflip-flop

currentsensor

Pin-6CS

R14R15

(b) (c)

Fig. 2. Voltage and current sensing required to obtain CV-CC characteristic in buck charger (a) Multiplexing at voltage sense pin (b) Scaling of current sensoroutput (c) CC-CV characteristic of buck charger

output and VAUX are ORed. Whenever VAUX ≥ 18V , thecontroller gets powered from VAUX . With reduction in VIN ,VAUX increases as,

VAUX =NAUXNP

× D

1−D× VIN (3)

where D is the duty cycle of switch. D is decided bythe VIN , as the buck output (VOUT ) is regulated. WheneverVAUX ≥ 27.5V , controller shuts down the PWM.

With this design feature, input under voltage limit can beset by selecting the NAUX

NPturns ratio to make VAUX = 27.5V

at the minimum input voltage expected (VIN(min)).

NAUXNP

=27.5

VIN(min)× (1−Dmax)

Dmax(4)

Where, Dmax is the duty cycle at VIN(min).

D. Current Sensing

The buck stage output need to be in CV-CC mode. Forthis output current for buck stage to be sensed and fed tothe controller. In this work, a resistive current sensor is usedas shown in Fig. 1. The controller design is for a low sideresistive current sensor in the primary side of flyback converter.Hence the location of the sensing resistor is chosen, so thatthe current through the sense resistor is same as that flowsthrough transistor M2, which resembles the flyback primaryside current.

The current proportional voltage fed to the current sensepin of the controller , need to be confined to a value, whichis less than 1.7V. For this, as well as to have a provision toadjust the constant current(CC) limit, the output of sensor isscaled using R15 and R14 combination as shown in Fig. 2(b).By varying R15, the CC limit can be set.

The controller samples the current proportionalvoltage(VCS), at the end of the ON period of transistorM2.There is an internally set limit on the product of OFF timeof M2 and the sampled current proportional voltage value,which is ≈ 7.5µV.s.

The scaling of the sensor output is done such that, forthe intended limiting ranges of output current, the product ofscaled current sensor output (VCS) and OFF time of the switchM2 (tOFF ) give ≈ 7.5µV.s.

The output current in a buck converter working in theboundary of continuous mode is given by,

Io = IM2−pk ×tOFFT× 0.5 (5)

··· Io ∝ (IM2−pk × tOFF ) (6)

··· Io ∝ (VCS × tOFF ) (7)

Where,Io = output currentIM2−pk = Buck switch (M2) current.

This has the effect of constant charge flow (current × time)for each cycle, and amounts to constant current flow as pe-riod (T) is fixed. This implementation is helpful in maintainingaccurate constant current, for all duty cycle conditions. TheCV-CC control characteristic of the controller is shown inFig. 2(c). The figure shows plot of output voltage versus peakof sensed current at pin-6 of the controller. The values of R15

and R14 are selected to give the required IM2−limit.

IM2−limit =7.5

RS .(R15

R14+R15).toff

(8)

where, RS is the current sense resistor value in Ω and Toff (inµs) is the OFF time of the transistor M2

E. Snubber Design

The PWM controller used has a burst frequency control,which results in spreading of the switching noise spectrum tomeet the EMI/EMC standards.

Apart from EMI improvement, snubber is necessary inprimary and secondary sides of flyback auxiliary output, toprevent,

• Avalanche break down of the MOSFET (M1)

L1

C5 RL

iL

vC+-

Iout

VoutIL

+-

cc

cv

VL

(a)

Fig. 3. Equivalent circuit to model the transient response

• Noise due to voltage ringing after diode reverse re-covery

1) Secondary Snubber: R-C Snubber across the auxiliaryoutput diode D9 (Fig. 1) is used to avoid the voltage ringing atswitch OFF instant, due to parasitic resonance of stored energyin leakage inductance of the flyback converter.

The ringing frequency (fr) is around 2MHz and assuminga leakage inductance (Ll) in the range of 50 -100 µH, thesnubber resistor R can be chosen as equal to the characteristicimpedance of the resonant circuit[6]. Snubber Capacitor C ischosen such that, its impedance is equal to R at the resonantfrequency fr. For the selected values of snubber resistor andcapacitor (150Ω and 330pF respectively), the snubber dissipa-tion is ≈28 mW, at an input voltage of 50V.

2) Primary Snubber: The primary snubber used is aseries combination of a zener diode and a diode across theprimary winding (Fig. 1). The power rating of the zener diodeis arrived at based on the maximum stored energy in theflyback inductor, that has to be dissipated in each cycle. Thepower consumption from the flyback output is very less (onlyfor the sense resistors and for the controller supply). So forcalculation of zener power rating, it is assumed that the entireenergy stored in primary is dissipated in the zener. The voltagerating is decided based on the drain to source maximumvoltage (VDS−max) rating of the MOSFET used in flybackstage. Assuming a worst case scenario, where the entireenergy stored in primary inductance (Lp), is getting dissipatedin the zener diode, the dissipation in zener can be computed as,

Wz−max =1

2× Lp × I2

p × fs (9)

Where,Wz−max = Zener Dissipation in WattsIp =Peak Primary current in Ampsfs = Switching frequency in Hz.

With a peak current (Ip) per cycle of 200mA, the dissipa-tion can be 2W. Hence 5W zener is selected, The zener voltageselected is 36V.

F. Buck stage

The power flow stage, which is a buck topology non-isolated converter, is designed for a maximum ripple currentrange of 1A peak to peak and input voltage range of 30V to60V. The frequency of operation is optimized for reduction inpower loss, so that the volume of the design is at its minimum.

TABLE I. COMPONENTS IN BUCK CONVERTER

240µH (Ferrite toroidal core)Inductor Core loss for 1A ripple : 406mW

Copper Loss for 6A: 2.976W

MOSFET IRF 840(500V, 8Amp)

Filter Capacitor 470µ F

Current sensor Resistive 1Ω

TABLE II. ESTIMATE OF DISSIPATION IN COMPONENTS

Inductor and Ohmic 270mW

Buck MOSFET(M2) 280mW

Buck MOSFET(M3) 45mW

Flyback MOFET(M1) 285mW

Current sensor 26mW

Load on flyback stage 850mW

The rise in switching loss with frequency, and hyperbolicreduction of inductor losses[7] (for ≈ 24C temperature rise ininductor and 1A peak to peak ripple current) at the same time,are considered to arrive at the optimum switching frequency.This is found to be around 40kHz. The designed elements forthe buck stage are listed in Table 1.

III. EXPERIMENTAL RESULTS

The circuit schematic of the implementation is as shownin Fig. 1. The buck power stage was set for a constant currentlevel of 300mA, and constant voltage level of 13V. Thecharacteristics is measured using a 50Ω rheostat as load,instead of battery. The input DC bus was provided by Agilentmake DC power supply. The DC bus capacitor used is 470µF.The output filter capacitor for buck stage also was of samevalue.

The drain voltage of flyback MOSFET (M1) and senseddrain current of buck MOSFET ( M2), at pin-6 of con-troller (U1) are shown in Fig. 4(a) and Fig. 4(b) along with thedrive signal from the controller.

The losses in the implementation are contributed from theload on auxiliary flyback output, losses in flyback and buckconverter switches and buck stage inductor. An estimationof various component losses for a CC limit of 300mA andCV limit of 13V are tabulated in Table 2. From this datathe estimated efficiency when the charger is operating at theboundary of CC and CV regimes, is 68.9%.

The measured overall efficiency of the buck charger fora nominal input voltage of 42V and output load currentof 300mA at 13V output voltage is 64%. The efficiencycalculation does not include the losses in the isolated gatedrive circuit, which was powered from a stand alone powersupply.

A. Transient Response

The transient behavior of the design for a sudden changein load current, where it changes over from CV mode to CCmode and vice versa are shown in Fig. 5. Equivalent circuitof the system during the transients is shown in Fig. 3. Thebehavior for a CV to CC transient is a first order one. But, the

Vgs

Vds

(a)

Vgs

Id

(b)

Fig. 4. Experimental waveforms (a) Gate to source voltage (Vgs) and drain voltage (Vds) of M1 (b) Gate to source voltage (Vgs) and sensed drain current (Id)of M2

Iout

Vout

(a) CV to CC transient with low CV load current of280mA

Iout

Vout

(b) CC to CV transient with low CV load current of280mA

Iout

Vout

(c) CV to CC transient with high CV load current of400mA

Iout

Vout

(d) CC to CV transient with high CV load current of400mA

Fig. 5. Transient responses for transition between CC and CV modes (Iout: 200mA/Div)

CC to CV transient results in a second order response of theform,

Vout(s)

Vδ(s)=

ω2n

s2 + 2ζωns+ ω2n

(10)

where, ωn = 1√L1.C5

is the resonant frequency of output

side in radians/s. and ζ =√

L1

C5. 12.RL

is the damping factor.Vδ is the impulse voltage function representing the additionalenergy to be dissipated for achieving the steady state. Sincethe damping factor depends on the output current during CVmode, the CC to CV response depends on the CV mode loadcurrent. The response in Fig. 5(b) is for 280mA load currentand that in Fig. 5(d) is for 400mA load current.

The implementation was tested for CC-CV charging of a

three series cell battery, made using LG make 2.5 Ah, Li-ioncells. The CC limit was set for 300mA and CV limit at 12.4V.The battery voltage and current waveforms during the chargingis shown in Fig. 6. The photograph of the test set-up is shownin Fig. 7.

IV. CONCLUSION

The design and implementation of non-isolated buck typeaccurate CC-CV Li-ion battery charger having strong protec-tion features like input and output over voltage/ under voltageprotection, output short circuit protection and thermal shutdown is carried out in this work. The design is carried outusing a flyback primary side PWM controller.

(a) (b)

Fig. 6. Experimental waveforms during CV-CC charging of Li-ion battery (a) Battery terminal voltage (b) Battery charging current

CONTROLLER

GATE DRIVE CARD

BATTERY

DATALOGGER

BUCKCAPACITOR

DC BUSCAPACITOR

BUCK INDUCTOR

FLYBACK INDUCTOR

BUCK SWITCH

(a)

Fig. 7. Photograph of the test set-up

Modifications needed to implement a buck CV-CC batterycharger utilizing flyback primary side controller is explained.

The design provides a smooth transition between constantcurrent and constant voltage control loops and accurate con-stant current regime.

The prototype is tested for a constant current level of300mA, and constant voltage level of 12.2V, to charge aBattery pack of three series connected LG make Li-ion 2.5Ahcells. It can be upgraded to higher power levels.

REFERENCES

[1] www.richpower-ic.com[2] Min Chen and Gabriel A Rincon Mora, “Accurate, Compact, and Power

Efficient Li-Ion Battery Charger Circuit”, IEEE Tran. Circuits andSystems-II, vol.53, no.11, Nov.2006.

[3] S .Jung, Y. Woo, N. Kim and G. Cho,“Analog-digital switching mixedmode low ripple-high efficiency Li-Ion battery charger”,in Proce. Ind.Appl. Conf, 2001, vol.4, pp.2473-2477.

[4] C.Tsai, C.Lin, Y. Hwang, W.Lee and T.Lee,“A multi mode LDO-basedLi-Ion battery charger in 0.35µm CMOS technology”, in Proce. IEEEAsia-Pacific Conf. Circuits Syst., 2004, pp.49-52.

[5] Y.Liu, J.Li, and J.Teng,“An FPGA based lithium-ion battery chargersystem”, in Proce. IEEE Region 10 Conf., 2004, pp.435-438.

[6] Ray Ridley, “Flyback Converter Snubber Design”,Switching Power Mag-azine, 2005.

[7] Gregry Sizikov, Avinoam Kolodny, Eby G. Fridman and Zelikson M,“Ef-ficiency optimization of integrated DC-DC buck converters”,in Proce.IEEE International Conf. on Electronics, Circuits and Systems (ICECS),2010, pp.1208-1211.