A Systolic-Array Architecture for First-Order 3-D

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    Systolic array architecture enables real-time

    implementation of 3-D IIR filters

    Speed ->radio-frequency (RF) frame-rates

    suitable building block for 3-D IIR digital filters

    having beam- and cone-shaped pass bands

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    This architecture is based on a differential-form

    transfer function

    low circuit complexity compared with the direct-

    form architecture

    A 3-D look-ahead (LA) form of the transfer

    function is proposed for maximizing the speed of

    the implementation

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    It is a pipe network arrangement of processing

    units called cells

    It is a specialized form of parallel computing

    A systolic array is composed of matrix-like rows

    of data processing units (DPU)

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    Systolic architecture can map high-level

    computation into hardware structures.

    Systolic system is easy to implement becauseof its regularity and easy to reconfigure.

    Speed of operation increases due to parallel

    processing.

    Used in real time operations

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    3D filters

    Produce a 3D array of numbers when given a

    3D input array considering a 3D linear system, the

    output can be expressed as

    Y(n1,n2,n3)=h(n1,n2,n3)*x(n1.n2,n3)

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    Are categorized as recursive and non-recursive

    filters

    Recursive filters (Infinite Impulse Response (IIR))

    the output is a weighted average of presentand past inputs as well as past outputs

    Non-recursive filters (Finite Impulse response

    (FIR)) output is a weighted average of present and

    past inputs

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    Systolic-array architectures for implementing 3-D

    frequency- planar filters used as building blocks

    for second-order and higher order

    3-D IIR beam filter-banks

    3-D IIR cone filter-banks.

    They are used for filtering the 3-D ultrabroadband

    spatio-temporal signals that are received at smart

    antenna arrays.

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    Normal 3-D IIR filter implementations, having a

    throughput of one-sample per clock cycle

    (OSPCC)

    Systolic array based 3-D IIR filter having the muchhigher throughput of one frame per clock cycle

    (OFPCC)

    FRAME N1N2 set of data samples obtained at

    each time sample

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    PPCM is a three-input-three-output circuit capable

    of computing the 3-D filter difference-equations

    Each PPCM essentially implements in real time

    for a particular spatial location

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    Speed of operation increases

    Less noisy

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    3-D FIR and IIR filters used for the processing of

    reconstructed 3-D images and in medical imaging

    applications.

    3-D broadband sensor-array-based beam formers

    video signal processing

    communication and navigation fields

    Radar applications

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    [1] H. L. P. Arjuna Madanayake, Len T. Bruton,A

    Systolic-Array Architecture for First-Order 3-D

    IIR Frequency-Planar Filters IEEE Transactions

    On Circuits And Systems, Vol. 55, No. 6, July2008.

    [2] S. V. Hum, H. L. P. A. Madanayake, and L. T.

    Bruton ,UWB Beamforming Using 2-D Beam

    Digital Filters IEEE Transactions On AntennasAnd Propagation, Vol. 57, No. 3, March 2009

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    [3] T. K. Gunaratne and L. T. Bruton, "Beamforming

    of broadband-bandpass plane waves using

    polyphase 2D FIR trapezoidal filters", in the IEEE

    Transactions on Circuits and Systems -I, RegularPapers, vol. 55, no. 3, April 2008, pp. 838 - 850.

    [4] H. L. P. Arjuna Madanayake, Leonard T. Bruton,

    " A Speed-optimized Systolic Array Processor

    Architecture For Spatio-temporal 2-D IIRBroadband Beam Filters ", IEEE Transactions On

    Circuits And Systemsi:Vol. 55, No. 7, August

    2008

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    [5]L. T. Bruton, A 3-D polyphase-DFT cone filter

    bank for broad band plane wave filtering, in Proc.

    IEEE Int. Symp. Circuits Syst., Vancouver, 2004,

    vol. 3, pp. 181184.

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