9thInternationalConferenceon HighPerformanceComputing · 9thInternationalConferenceon HighPerformanceComputing December 18-21, 2002 Bangalore, India. ... and talk setting. For details,

A D V A N C E P R O G R A M

9th International Conference onHigh Performance Computing

www.hipc.org

December 18-21, 2002Bangalore, India

A C K N O W L E D G M E N T S

THE ORGANIZING COMMITTEE OF HiPC 2002 GRATEFULLY ACKNOWLEDGES THE SUPPORT AND PARTICIPATION OF THE FOLLOWING ORGANIZATIONS:

S P O N S O R S

Hewlett Packard (India) Pvt. LimitedIBM (India) LimitedIndian Institute of Information Technology, BangaloreInfineon Technologies India Pvt. LimitedInfosys Technologies Limited, IndiaIntel Innovation in EducationLarsen and Toubro Infotech LimitedSatyam Computer Services LimitedTata Consultancy ServicesTexas Instruments India

S U P P O RT I N G O R G A N I Z AT I O N S

Indian Institutes of TechnologySoftware Technology Parks of IndiaTata Institute of Fundamental Research (TIFR), India

For information on sponsorshipopportunities, please contact:Naveen TOgilvy Public Relations WorldwideMahalaxmi Chambers, 29 MG RoadBangalore, Karnataka, IndiaEmail: [email protected]: +91-80-559-9312Fax: +91-80-558-4520

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9 t h I n t e r n a t i o n a l C o n f e r e n c e o n H i g h P e r f o r m a n c e C o m p u t i n g

C O N F E R E N C E O R G A N I Z AT I O N 2

S C H E D U L E 4

OV E RV I E W 5

KEYNOTES & TECHNICAL SESSIONS 6THURSDAY, DECEMBER 19 6

Opening RemarksKeynote AddressesTechnical SessionsPoster/Presentation SessionConference Banquet

FRIDAY, DECEMBER 20 8Keynote AddressTechnical SessionsIndustrial Track SessionConference Banquet

SATURDAY, DECEMBER 21 1 0Keynote AddressesInvited Sessions

WORKSHOPS & TUTORIALS 1 1WEDNESDAY, DECEMBER 18 1 1

WorkshopsTutorials

L O CA L I N F O R M AT I O N 1 7

CONFERENCE SITE

Taj Residency

Due to large number of activities on December 18, some tutorials willbe held at an alternate location. Check the HiPC website for locationinformation.

(details on inside back cover)

T A B L E O F C O N T E N T S

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A d v a n c e P r o g r a m

G E N E R A L C O - C H A I R SViktor K. PrasannaUniversity of Southern California

Uday ShuklaIBM Global Services India Pvt. Limited

V I C E G E N E R A L C H A I RDavid A. BaderUniversity of New Mexico

P RO G R A M C H A I RSartaj SahniUniversity of Florida

P RO G R A M V I C E - C H A I R SAlgorithmsOscar IbarraUniversity of California, Santa Barbara

ApplicationsVipin KumarAHPCRC-University of Minnesota

ArchitectureMichel CosnardINRIA, France

Communication NetworksMani SrivastavaUniversity of California, Los Angeles

Systems SoftwareFrancis LauHong Kong University

P RO G R A M C O M M I T T E EALGORITHMSCevdet Aykanat, Bilkent UniversityYookun Cho, Seoul National UniversityOmer Egecioglu, University of California,

Santa BarbaraTsan-sheng Hsu, Academia SinicaMyung Kim, Ewha Womans UniversityKoji Nakano, Japan Advanced Institute of

Science and TechnologySandeep Sen, Indian Institute of Technology,

DelhiBhabani Sinha, Indian Statistical InstituteMeera Sitharam, University of FloridaHal Sudborough, University of Texas at DallasAlbert Zomaya, University of Western Australia

APPLICATIONSRupak Biswas, NASA Ames Research CenterAmitava Datta, University of Western AustraliaTimothy Davis, University of FloridaRatan Ghosh, Indian Institute of Technology,

KanpurAnshul Gupta, IBM T. J. Watson Research

Center

Hillol Kargupta, University of Maryland at Baltimore County

Piyush Mehrotra, NASA Ames Research CenterRaju Namburu, Army Research Laboratory,

MarylandD. K. Panda, Ohio State UniversitySrinivasan Parthasarathy, Ohio State UniversityP. Sadayappan, Ohio State UniversityVivek Sarin, Texas A&M UniversityJon Weissman, University of Minnesota

ARCHITECTUREMakoto Amamiya, Kyushu UniversityFranck Cappello, Paris-Sud XI UniversityKemal Ebcioglu, IBM T. J. Watson Research

CenterMichael Frank, University of FloridaTony Hey, Engineering & Physical Sciences

Research CouncilNectarios Koziris, National Technical

University of AthensDavid Nassimi, New Jersey Institute of

TechnologySiva Ram Murthy, Indian Institute of

Technology, MadrasMateo Valero, Universidad Politecnica de

CatalunyaXiaodong Zhang, National Science Foundation

COMMUNICATION NETWORKSPrathima Agrawal, Telcordia TechnologiesB.R. Badrinath, Rutgers UniversitySajal Das, University of Texas at ArlingtonRamesh Govindan, ICSI/ACIRI BerkeleySumi Helal, University of FloridaAbhay Karandikar, Indian Institute of

Technology, BombaySteve Olariu, Old Dominion UniversityMichael Palis, Rutgers University at CamdenParmesh Ramanathan, University of

Wisconsin, MadisonRamesh Rao, University of California,

San DiegoKrishna Sivalingam, Washington State

University

SYSTEMS SOFTWAREIshfaq Ahmad, Hong Kong University of

Science and TechnologyHamid Arabnia, University of GeorgiaJiannong Cao, Hong Kong Polytechnic

UniversityElizier Dekel, IBM Research Laboratory, HaifaR. Govindarajan, Indian Institute of ScienceWeijia Jia, City University of Hong KongRajib Mall, Indian Institute of Technology,

KharagpurKihong Park, Purdue UniversityKrithi Ramamritham, Indian Institute of

Technology, BombayYu-chee Tseng, National Chiao Tung UniversityCheng-zhong Xu, Wayne State University

K E Y N OT E C H A I RCauligi S. RaghavendraUniversity of Southern California

P O S T E R / P R E S E N TAT I O NC O - C H A I R SPaul RoeQueensland University of Technology

Rajkumar BuyyaThe University of Melbourne

T U TO R I A L S C H A I RSrinivas AluruIowa State University

WO R K S H O P S C H A I RC. P. RavikumarTexas Instruments India

S C H O L A R S H I P S C H A I RDheeraj SanghiIndian Institute of Technology, Kanpur

AWA R D S C H A I RArvindMIT

F I NA N C E C O - C H A I R SA. K. P. NambiarSoftware Technology Park, Bangalore

Ajay GuptaWestern Michigan University

P U B L I C I T Y C H A I RManish ParasharRutgers, The State University of New Jersey

P U B L I CAT I O N S C H A I RJose Nelson AmaralUniversity of Alberta

L O CA L A R R A N G E M E N T SC H A I RRajendra K. BeraIBM Global Services India Pvt. Limited

I N D U S T RY L I A I S O N C H A I RSudheendra HangalSun Microsystems

O R G A N I Z A T I O N

S T E E R I N G C H A I RViktor K. PrasannaUniversity of Southern California

S T E E R I N G C O M M I T T E EJose Duato, Universidad Politecnica de

ValenciaViktor K. Prasanna, University of Southern

California, ChairN. Radhakrishnan, US Army Research LabSartaj Sahni, University of FloridaAssaf Schuster, Technion-Israel Institute of

Technology

NAT I O NA L A DV I S O RY C O M M I T T E ER.K. Bagga, DRDL, Hyderabad N. Balakrishnan, Supercomputer Education

and Research Centre, Indian Institute of Science

Ashok Desai, Silicon Graphics Systems (India) Pvt. Limited

Kiran Deshpande, Mahindra British Telecom Limited

H.K. Kaura, Bhabha Atomic Research Centre Hans H. Krafka, Siemens Communication

Software LimitedAshish Mahadwar, PlanetAsia Limited Susanta Misra, Motorola India Electronics

Limited Som Mittal, Digital Equipment (India) LimitedB.V. Naidu, Software Technology Park,

Bangalore N.R. Narayana Murthy, Infosys Technologies

Limited S.V. Raghavan, Indian Institute of Technology,

Chennai V. Rajaraman, Jawaharlal Nehru Centre for

Advanced Scientific Research S. Ramadorai, Tata Consultancy Services,

Mumbai K. Ramani, Future Software Pvt. Limited S. Ramani, Hewlett-Packard Labs IndiaKarthik Ramarao, Hewlett-Packard (India)

Pvt. Limited Kalyan Rao, Satyam Computer Services LimitedS.B. Rao, Indian Statistical InstituteH. Ravindra, Cirrus Logic Uday Shukla, IBM Global Services India Pvt.

LtdU.N. Sinha, National Aerospace Laboratories

WO R K S H O P O R G A N I Z E R SWorkshop on Bioinformatics andComputational Biology

CO-CHAIRSSrinivas AluruIowa State University

M. VidyasagarTata Consultancy Services

Workshop on Soft Computing

CHAIRSuthikshn KumarLarsen and Toubro Infotech Limited

Trusted Internet Workshop

CO-CHAIRSG. ManimaranIowa State University

C. Siva Ram MurthyIndian Institute of Technology, Madras

Workshop on Cutting Edge Computing

CO-CHAIRSUday S. ShuklaIBM Global Services India Pvt. Limited

Rajendra K. BeraIBM Global Services India Pvt. Limited

Workshop on Storage Area Networks

CO-CHAIRSV. SridharSatyam Computer Services Limited

C. P. RavikumarTexas Instruments India

S. H. SrinivasanSatyam Computer Services Limited

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BreakBreak

Break

Break

Breakfast

Lunch

Lunch

4


Keynote Address

TutorialsI - V

WorkshopsI - IV

Parallel TechnicalSessions I & II

W E D N E S D A Y T H U R S D A Y F R I D A Y S A T U R D A Y

Opening Remarks

Keynote Address

Parallel TechnicalSessions III & IV

Poster Session

ConferenceBanquet and

Cultural Program

TutorialsVI - X

WorkshopsI - III

(cont’d)

&

WorkshopV

8:30 am

7:30 am

9:00 am

10:00 am

11:00 am

noon

1:00 pm

2:00 pm

3:00 pm

4:00 pm

5:00 pm

6:00 pm

7:00 pm

8:00 pm

9:00 pm

10:00 pm

Conference registrationfee includes breakfast,

lunch, and refreshments onDecember 18, 19, 20, and 21.It also includes the banquets

on December 19 and 20.

Registration desk will be openfrom 7:30 am to 6:00 pmon Wednesday and from8:00 am to 4:00 pm on

Thursday, Friday,and Saturday.

S C H E D U L E

Break

Break

Lunch

Keynote Address

Parallel TechnicalSessions V & VI

Parallel TechnicalSessions VII & VIII

Parallel TechnicalSessions IX & X

IndustrialTrack

Session

ConferenceBanquet

Lunch

Keynote Address

InvitedSession I

Keynote Address

InvitedSession II

Break

Break

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K E Y N OT E S P E A K E R SImrich ChlamtacUniversity of Texas at Dallas"Protocols for Bandwidth Management in ThirdGeneration Optical Networks"

Patrick LysaghtXilinx Research Labs"Beyond FPGAs, Field Programmable Systems"

B. Vincent McKoyCalifornia Institute of Technology"Parallel Computations of Electron-MoleculeCollisions in Processing Plasmas"

N. RadhakrishnanComputational and Information SciencesDirectorate, Army Research Labs, USA"Computational Science andEngineering -- Past, Present, and Future"

Priya VashishtaUniversity of Southern California"Collaboratory for Info-Bio-Nano Simulations"

C O N T R I B U T E D PA P E R SThere will be 57 contributed papers from 12countries, chosen from 145 papers submittedin response to the call for papers. Contributedpapers will be presented in 10 sessions.

I N V I T E D PA P E R SLeading researchers will share their visionsfor biocomputation and embedded systemsthrough invited papers to be presented in twoplenary sessions.

BiocomputationOrganizerVijay KumarUniversity of Pennsylvania

Embedded SystemsOrganizerViktor K. PrasannaUniversity of Southern California

WO R K S H O P SWorkshop on Bioinformatics andComputational Biology

Workshop on Soft Computing

Trusted Internet Workshop

Workshop on Cutting Edge Computing

Workshop on Storage Area Networks

P O S T E R / P R E S E N TAT I O N S E S S I O N A plenary poster/presentation sessionemphasizing novel applications of high perfor-mance computing will be held on Thursday,19 December. It will offer a brief presentationtime for each poster followed by a walk-upand talk setting.

For details, contact:Paul RoeQueensland University of Technology Email: [email protected]

Rajkumar BuyyaThe University of MelbourneEmail: [email protected]

T U TO R I A L SComputational Methods in BioinformaticsSharmila S. Mande and M. VidyasagarTata Consultancy Services

Writing Parallel Programs with OpenMPTimothy G. MattsonIntel Corporation

Data Stream Mining in Mobile and DistributedEnvironmentsHillol KarguptaUniversity of Maryland Baltimore County

The Early 21st Century Processor ArchitectureLandscapeSriram VajapeyamIndependent Consultant

Wireless Sensor Network ProtocolsKrishna M. SivalingamWashington State University

Wireless Networking using IEEE 802.11 andBluetooth: Technology and Research ChallengesPravin BhagwatIndian Institute of Technology, Kanpur and

Winlab, Rutgers UniversityRajeev ShoreyIBM India Research Laboratory and Indian

Institute of Technology, New Delhi

Quantum ComputingRajendra K. BeraIBM Global Services India Pvt. Limited

Design for High Reliability, Availability andServiceabilityDhiraj K. PradhanUniversity of Bristol

Data Grid Management Systems: TowardsKnowledge Grid Networks Arcot Rajasekar and Arun JagatheesanSan Diego Supercomputer CenterUniversity of California, San Diego

Opportunities and Challenges in PervasiveComputingRaju PandeyUniversity of California, Davis

O V E R V I E W

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I NAU G U R AT I O Nby

V. Kulakarni, IASDepartment of Information

Technology & BiotechnologyGovt. of Karnataka

Guest of HonorS. Sadagopan

Indian Institute of InformationTechnology, Bangalore

O P E N I N G R E M A R K SViktor K. Prasanna

Uday ShuklaSartaj Sahni

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K E Y N OT E A D D R E S S"Collaboratory for Info-Bio-Nano Simulations"

Priya VashishtaUniversity of Southern California

Priya Vashishta is the Director of HighPerformance Computing Center at theUniversity of Southern California. He is aprofessor in the Departments of MaterialsScience & Engineering and Computer Science,and Physics and Biomedical Engineering. Priorto joining USC, during 1990-2002, he wasCray Research Professor of ComputationalSciences and the founding director of theConcurrent Computing Laboratory forMaterials Simulations at the Louisiana StateUniversity. From 1972-1990, he was at theArgonne National Laboratory as a SeniorScientist and the Director of the Solid StateSciences Division.

His research includes developing multiscalesimulation approach that combines electronicstructure, molecular dynamics, and finite-element methods. Visualization tools are also being designed to analyze simulations in immersive and interactive virtual environ-ments. These large-scale multimillion atomsimulations have been executed with highlyefficient, portable and scalable, multi-resolution algorithms.

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S E S S I O N IAlgorithms I

Chair: Bhabani SinhaIndian Statistical Institute

2-D Wavelet Transform Enhancement on General-Purpose Microprocessors: Memory Hierarchy andSIMD Parallelism ExploitationD. Chaver, C. Tenllado, L. Piñuel, M. Prieto,and F. Tirado, Universidad Complutense

A General Data Layout for Distributed Consistencyin Data Parallel ApplicationsRoxana Diaconescu, Norwegian University ofScience and Technology

A Parallel DFA Minimization AlgorithmAmbuj Tewari, Utkarsh Srivastava, and P. Gupta, Indian Institute of Technology,Kanpur

Accelerating the CKY Parsing using FPGAsJacir L. Bordim, Yasuaki Ito, and Koji Nakano,Japan Advanced Institute of Science andTechnology

Duplication based Scheduling Algorithm forInterconnection Constrained Distributed Memory MachinesSavina Bansal, Padam Kumar, and KuldipSingh, Indian Institute of Technology, Roorkee

Evaluating Arithmetic Expressions using TreeContraction: A Fast and Scalable ParallelImplementation for Symmetric Multiprocessors(SMPS)David A. Bader, Sukanya Sreshta, and Nina R.Weisse-Bernstein, University of New Mexico

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S E S S I O N I IArchitecture I

Chair: Michel CosnardINRIA, France

Dead-block Elimination in Cache: A Mechanism toReduce I-Cache Power Consumption in HighPerformance MicroprocessorsMohan G. Kabadi, Natarajan Kannan,Palanidaran Chidambaram, Suriya Narayanan,M. Subramanian, and Ranjani Parthasarathi,Anna University

Exploiting Web Document Structure to ImproveStorage Management in Proxy CachesAbdolreza Abhari, Sivarama Dandamudi, andShikharesh Majumdar, Carleton University

High Performance Multiprocessor ArchitectureDesign Methodology for Application-SpecificEmbedded SystemsSyed Saif Abrar, Phillips Semiconductors,Bangalore

LLM: A Low Latency Messaging Infrastructure forLinux ClustersR. K. Shyamasundar, Basant Rajan, Manish Prasad, and Amit Jain, TataInstitute of Fundamental Research

Low-Power High-Performance Adaptive ComputingArchitectures for Multimedia ProcessingRama Sangireddy and Arun K. Somani, Iowa State University

T H U R S D A Y , D E C . 1 9 K E Y N OT E S & T E C H N I CA L S E S S I O N S

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K E Y N OT E A D D R E S S"Beyond FPGAs, Field Programmable Systems"

Patrick LysaghtXilinx Research Labs

Patrick Lysaght is a Senior Director in XilinxResearch Labs where he leads research intoemerging design technologies. Previously, heworked in research, development, marketing,technical support, sales and education inScotland, for such organizations as theInstitute for Systems Level Integration,the University of Strathclyde and HewlettPackard. Patrick holds BSc and MSc degreesin electronics. He has published forty techni-cal papers relating to dynamically reconfig-urable logic. He is a chairman of the steeringcommittee for FPL, the world’s largest fieldprogrammable logic conference.

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S E S S I O N I I ISystems Software IChair: Rajib Mall

Indian Institute of Technology, Kharagpur

CORBA-as-Needed: A Technique to ConstructHigh Performance CORBA ApplicationsHui Dai, Shivakant Mishra, University ofColorado and Matti A. Hiltunen, AT&TResearch Labs

Automatic Search for Performance Problems inParallel and Distributed Programs by usingMulti-Experiment AnalysisThomas Fahringer and Clovis Seragiotto Jr.,University of Vienna

An Adaptive Value-based Scheduler and itsRT-Linux ImplementationS. Swaminathan and G. Manimaran,Iowa State University

Effective Selection of Partition Sizes for MoldableScheduling of Parallel JobsSrividya Srinivasan, Vijay Subramani,Rajkumar Kettimuthu, Praveen Holenarsipur, and P. Sadayappan,Ohio State University

Runtime Support for Multigrain and MultiparadigmParallelismPanagiotis E. Hadjidoukas, Eleftherios D.Polychronopoulos, and Theodore S.Papatheodorou, University of Patras

A Fully Compliant OpenMP Implementation onSoftware Distributed Shared MemorySung-Woo Lee, Sven Karlsson, and MatsBrorsson, Royal Institute of Technology

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S E S S I O N I VNetworks

Chair: Abhay KarandikarIndian Institute of Technology, Mumbai

A Fast Connection-Time Redirection Mechanism forInternet Application ScalabilityMichael Haungs, Raju Pandey, Earl Barr,University of California, Davis, and J. FritzBarnes, Vanderbilt University

Algorithms for Switch-Scheduling in the MultimediaRouter for LANsIndrani Paul, Sudhakar Yalamanchili, GeorgiaInstitute of Technology, and Jose Duato,Universite Politecnia de Valencia

An Efficient Resource Sharing Scheme forDependable Real-Time Communication inMultihop NetworksG. Ranjith and C. Siva Ram Murthy, IndianInstitute of Technology, Chennai

Improving Web Server Performance by NetworkAware Data Buffering and CachingSourav Sen and Y. Narahari, Indian Instituteof Science

Wraps Scheduling and its Efficient Implementationon Network ProcessorsXiaotong Zhuang and Jian Liu, GeorgiaInstitute of Technology

Performance Comparison of Pipelined Hash Joins onWorkstation ClustersKenji Imasaki, Hong Nguyen, and Sivarama P.Dandamudi, Carleton University

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P O S T E R / P R E S E N TAT I O NS E S S I O N

This session will emphasize novel applicationsof high performance computing. It will offera brief presentation time for each posterfollowed by a walk-up and talk setting.For submission details, contact:

Co-Chairs:Paul RoeEmail: [email protected]

Rajkumar BuyyaEmail: [email protected]

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C O N F E R E N C E B A N Q U E TA N D

C U LT U R A L P RO G R A M

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K E Y N OT E S & T E C H N I CA L S E S S I O N ST H U R S D A Y , D E C . 1 9

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K E Y N OT E A D D R E S S"Computational Science and

Engineering – Past, Present, and Future"N. Radhakrishnan

Computational and Information SciencesDirectorate, Army Research Labs, USA

Dr. N. Radhakrishnan joined the ArmyResearch Laboratory (ARL) in June 1999 as aSenior Executive Service (SES) member, as theDirector of Computational and InformationSciences Directorate. The Directorate doesresearch in Battlefield Communications,Data Fusion and Knowledge Management,Computational Science and Engineering, andBattlespace Environment and AtmosphericScience. Dr. Radha is also responsible forrunning a DOD High Performance ComputingCenter specializing in state-of-the-art scalableand vector computing hardware, scientificvisualization, etc., and collaboration withresearchers and academia in a number ofapplication areas such as CFD, CSM, andCCM. He also funds the Army HighPerformance Computing Research Center(AHPCRC) currently located at the Universityof Minnesota. Dr. Radha is also the ChiefInformation Officer (CIO) for ARL and inthis capacity is responsible for providing theInformation Technology infrastructure for ARL.

Prior to taking the current position withARL, Dr. Radha was the first Director of theInformation Technology Laboratory (ITL) atthe U.S. Army Corps of Engineers WaterwaysExperiment Station (WES). He was responsiblefor running one of the DoD High PerformanceComputing Centers, the Corps of EngineersRegional Processing Center, the DODTri-Services CADD/GIS Technology Center,the Corps of Engineers Software EngineeringCenter, and the Design Guidance Update Center.

Dr. Radha earned his bachelor's degree inengineering from Madras University, Madras,India, and his master's in engineering from theIndian Institute of Technology in Bombay. Heearned his doctorate in engineering from theUniversity of Texas at Austin.

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S E S S I O N VAlgorithms II

Chair: Rajendra BeraIBM Global Services India Pvt. Limited

Iterative Algorithms on Heterogeneous NetworkComputing: Parallel Polynomial Root ExtractingRaphael Couturier, Philippe Canalda, andFrancois Spies, The University Franche-Comte

Optimal Tree-based Multicast in Wormhole-Routed NetworksJianping Song, Zifeng Hou, and Yadong Qu,Wireless Communication Technology Lab,Beijing

Parallel Algorithms for Identification of BasisPolygons in an ImageArijit Laha, National Institute of Managementand Bhabani P. Sinha, Indian Statistical Institute

Range Image Segmentation on a ClusterM. E. Bock, Purdue University and C. Guerra,Padova University and Purdue University

Detection of Orthogonal Interval RelationsPunit Chandra and Ajay Kshemkalyani,University of Illinois at Chicago

An Efficient Parallel Algorithm for ComputingBicompatible Elimination Ordering (BCO) ofProper Interval GraphsB. S. Panda, University of Hyderabad andSajal K. Das, University of Texas at Arlington

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S E S S I O N V IMobile Computing and Databases

Chair: Nalini VenkatasubramanianUniversity of California, Irvine

Router Handoff: An Approach for Preemptive RouteRepair in Mobile Adhoc NetworksAbhilash P., Srinath Perur, and Sridhar Iyer,Indian Institute of Technology, Bombay

A Two-Dimensional Random Walk based MobilityModel for Location TrackingS. Mukhopadhyaya and K. Mukhopadhyaya,Indian Statistical Institute

Data Placement in Intermittently AvailableEnvironmentsYun Huang and Nalini Venkatasubramanian,University of California, Irvine

RT-MUPAC: Multi-Power Architecture for VoiceCellular NetworksK. Jayanth Kumar, B. S. Manoj, and C. SivaRam Murthy, Indian Institute of Technology,Chennai

Asynchronous Transaction Processing for Updatesby Client: With Elimination of Wait-for StateSubhash Bhalla, University of Aizu

Active File Systems for Data Mining andMultimediaS H Srinivasan and Pranay Singh, SatyamComputer Services

F R I D A Y , D E C . 2 0 K E Y N OT E S & T E C H N I CA L S E S S I O N S

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S E S S I O N V I IApplications

Chair: Shahrouz AliabadiClark Atlanta University

Simulating DNA ComputingSanjeev Baskiyar, Auburn University

Parallel Syntenic AlignmentsNatsuhiko Futamura, Srinivas Aluru, andXiaoqiu Huang, Iowa State University

XS-Systems: Extended S-Systems and AlgebraicDifferential Automata for Modeling CellularBehaviorMarco Antoniotti, Courant, New YorkUniversity, Alberto Policriti, Universita` di Udine, Nadia Ugel, Courant, New YorkUniversity, and Bud Mishra, Courant,New York University and Watson School

A High Performance Scheme for EEG Compressionusing a Multichannel ModelD. Gopikrishna and A. Makur, Indian Instituteof Science

Scalability and Performance of Multi-ThreadedAlgorithms for International Fare Construction onHigh-Performance MachinesKrishnan Saranathan, Chandra N. Sekharan,Raj Sivakumar, United Airlines, and ZiaTaherbhai, Loyola University of Chicago

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S E S S I O N V I I ISystems Software II

Chair: P. SadayappanOhio State University

A Resource Brokerage Infrastructure forComputational GridsAhmed Al-Theneyan, Old DominionUniversity, Piyush Mehrotra, NASA AmesResearch Center, and Mohammad Zubair,Old Dominion University

On Improving Thread Migration: Safety andPerformanceHai Jiang and Vipin Chaudhary, Wayne StateUniversity

Improved Preprocessing Methods for ModuloScheduling AlgorithmsD. V. Ravindra and Y. N. Srikant, IndianInstitute of Science

Dynamic Path Profile Aided Recompilation in aJava Just-in-Time CompilerR. Vinodh Kumar, Cisco Systems, Bangalore,B. Lakshmi Narayanan, Anna University,Chennai, and R. Govindarajan, IndianInstitute of Science

Exploiting Data Value Prediction in Compiler Based Thread FormationAnasua Bhowmik and Manoj Franklin,University of Maryland

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S E S S I O N I XScientific Computation

Chair: R. K. ShyamasundarTata Institute of Fundamental Research

High Performance Computing of Fluid-StructureInteractions in Hydrodynamics Applications usingUnstructured Meshes with more than one BillionElementsS. Aliabadi, A. Johnson, J. Abedi, and B.Zellars, Clark Atlanta University

Parallel Computers in Solving Elliptic Problems onNon-Smooth Domains by Spectral Element MethodsP. Dutt and B.V. Rathish Kumar, IndianInstitute of Technology, Kanpur

Fast Stable Solver for Sequentially Semi-SeparableLinear Systems of EquationsS. Chandrasekaran, P. Dewilde, M. Gu, T.Pals, and A. J. van der Veen, University ofCalifornia, Santa Barbara

Dynamic Network Information Collection forDistributed Scientific Application AdaptationDevdatta Kulkarni and Masha Sosonkina,University of Minnesota, Duluth

Adaptive Runtime Management of SAMRApplicationsSumir Chandra, Shweta Sinha, ManishParashar, Rutgers University, Yeliang Zhang,Jingmei Yang, and Salim Hariri, University ofArizona

Mobile Agents - The Right Vehicle for DistributedSequential ComputingLei Pan, Lubomir F. Bic, and Michael B.Dillencourt, University of California, Irvine

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S E S S I O N XArchitecture II

Chair: Siva Ram MurthyIndian Institute of Technology, Chennai

Using Dataflow based Context for AccurateBranch PredictionRenju Thomas and Manoj Franklin,University of Maryland

Rehashable BTB: An Adaptive Branch Target Bufferto Improve the Target Predictability of Java CodeTao Li, Ravi Bhargava, and Lizy Kurian John,University of Texas, Austin

Return-Address Prediction in SpeculativeMultithreaded EnvironmentsMohamed Zahran and Manoj Franklin,University of Maryland

HLSPOWER: Hybrid Statistical Modeling of theSuperscalar Power-Performance Design SpaceRavishankar Rao, University of California,Davis, Mark H. Oskin, University ofWashington , and Frederic T. Chong,University of California, Davis

Efficient Decomposition Techniques for FPGAsSeok-Bum Ko and Jien-Chung, University ofRhode Island

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I N D U S T R I A L T R AC KS E S S I O N

(TBD)

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C O N F E R E N C E B A N Q U E T

BA N Q U E T S P E E C H"Research in France in Computer Science and HPC"

Michel CosnardUniversité de Nice and

INRIA Sophia Antipolis, France

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K E Y N OT E A D D R E S S"Protocols for Bandwidth Management in Third

Generation Optical Networks"Imrich Chlamtac

University of Texas at Dallas

Imrich Chlamtac is the Distinguished Chair inTelecommunications at the University of Texasat Dallas. Dr. Chlamtac also holds the titles ofthe Sackler Professor at Tel Aviv University,Israel and The Bruno Kessler HonoraryProfessor at the University of Trento, Italy andUniversity Professorship, Hungary. He is aFellow of the IEEE and ACM societies, thewinner of the 2001 ACM Sigmobile and theIEEE ComSoc TCPC 2002 annual awards andrecipient of multiple best paper awards andwas Fulbright Scholar and IEEE DistinguishedLecturer. Dr. Chlamtac published close to threehundred articles on networking, and is the co-author of Local Area Networks, and Mobileand Wireless Networks Protocols and Services(John Wiley & Sons). Dr. Chlamtac serves asthe Editor in Chief of the ACM/URSI/KluwerWireless Networks (WINET), and MONETjournals and the SPIE/Kluwer OpticalNetworks (ONM) Magazine.

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I N V I T E D S E S S I O N IEmbedded Systems

Chair: Viktor K. PrasannaUniversity of Southern California

Memory Architecture Exploration for EmbeddedSystemsNikil Dutt, University of California, Irvine

Structured Composition Techniques for EmbeddedSystemsRajesh K. Gupta, University of California, San Diego

Low Power Distributed Embedded Systems:Dynamic Voltage Scaling and SynthesisJiong Luo and Niraj K. Jha, PrincetonUniversity

The Customization Landscape for EmbeddedSystemsSudhakar Yalamanchili, Proceler Inc. and Georgia Institute of Technology

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K E Y N OT E A D D R E S S"Parallel Computations of Electron-Molecule

Collisions in Processing Plasmas"B. Vincent Mckoy

California Institute of Technology

Vincent McKoy is Professor of TheoreticalChemistry at the California Institute ofTechnology where he has been a member ofthe faculty since 1964. He obtained his Ph.D.in Chemistry from Yale University in 1964.His research interests include theoretical andcomputational methods for studies of colli-sions of low-energy electrons in gases. A keyfeature of this effort has been the developmentof highly scalable strategies and algorithmswhich make it possible to exploit large parallelsystems in such studies. These advances haveenabled extensive applications to gases ofinterest in low-temperature plasmas that arewidely used in the semiconductor industry.

He is a Fellow of the American PhysicalSociety and is listed in Who’s Who in Americaand in American Men of Science. He has beena Fellow of the Alfred P. Sloan and GuggenheimMemorial Foundations and received theGovernor-General’s (of Canada) Medal forAcademic Excellence (1960).

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I N V I T E D S E S S I O N I IBiocomputation

Chair: Vijay KumarUniversity of Pennsylvania

Computing Challenges in Systems BiologySrikantha Kumar, Defense Advanced ResearchProjects Agency, USA

Visual Programming for Modeling and Simulationof Regulatory NetworksRajeev Alur, Calin Belta, Franjo Ivancic, VijayKumar, Harvey Rubin, Jonathan Schug, andOleg Sokolsky, University of Pennsylvania andJonathan Webb, BBN

Framework for Open Source Software Developmentfor Organ Simulation in the Digital HumanM. Cenk Cavusoglu, Tolga Goktekin, S.Shankar Sastry, University of California,Berkeley and Frank Tendick, University ofCalifornia, San Francisco

Reachability Analysis of Delta-Notch LateralInhibition Using Predicate AbstractionInseok Hwang, Hamsa Balakrishnan, RonojoyGhosh and Claire Tomlin, Stanford University

A Symbolic Approach to Modeling CellularBehaviorBhubaneswar Mishra, Courant Institute, NewYork University

S A T U R D A Y , D E C . 2 1 K E Y N OT E S & T E C H N I CA L S E S S I O N S

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WO R K S H O P IWorkshop on Bioinformatics and

Computational Biology

Discovery of biomolecular sequences and theirrelation to the functioning of organisms havecreated a number of challenging problems forcomputer scientists, and led to the emerginginterdisciplinary field of bioinformatics andcomputational biology. The field holds immensepotential for aiding in future discoveries such asthe design of proteins for efficient administeringof drugs and personalized medicine.

The goal of this workshop is to provide aforum for researchers and practitioners todiscuss recent research and developments inbioinformatics and computational biology.The workshop will include contributed papersand invited talks.

Topics of interest include but are not limited to:• Bioinformatic Databases• Computational Genomics• Computational Proteomics• DNA Assembly, Clustering, and Mapping• Gene Expression and Microarrays• Gene Identification and Annotation• Molecular Evolution• Molecular Sequence Analysis• Protein Structure

For further information contact the organizers.

Important DatesSeptember 30, 2002:

Workshop papers due

October 31, 2002:Author notification

November 29, 2002:Final papers due

ORGANIZERSSrinivas AluruIowa State UniversityEmail: [email protected]

M. VidyasagarTata Consultancy ServicesEmail: [email protected]

For more information visithttp://vulcan.ee.iastate.edu/~aluru/bcb2002/

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WO R K S H O P I IWorkshop on Soft Computing

Soft computing is a collection of techniques,whose goal is to exploit tolerance for impreci-sion, uncertainty and partial truth to achievetractability, robustness and low solution cost.The Soft Computing term has been coined toinclude topics from Fuzzy Logic, NeuralNetworks and Genetic Algorithms. This fieldof Soft Computing is seeing a flurry of activitywith a plethora of successful applications.

There have been several conferences organized,journals/magazines dedicated to this field. Inthe last few years, several successful commercial/industrial/defense/finance applications ofsoft computing techniques have emerged. TheWorkshop on Soft Computing is a step towardssharing the research results and new directionsin the application and convergence of the areasof Fuzzy Logic, Neural Networks, EvolutionaryComputing and Rough Sets. We intend to pro-vide a platform for Soft Computing researchersfor discussion and presentation of their work.In addition to paper presentations, we plan tohave an industry-academia inter-action, postersessions, tutorials on Soft Computing topicsand exhibitions of soft computing productsby industry.

There will be invited talks by leading researchersin the field.

Topics of interest include but are not limitedto theory/applications of: • Fuzzy Logic and Fuzzy Systems• Neural Networks• Neuro-Fuzzy Systems• Genetic Algorithm


Important DatesOctober 02, 2002:

Workshop papers dueNovember 01, 2002:

Author notificationNovember 30, 2002:

Final papers due

ORGANIZERSuthikshn KumarLarsen and Toubro Infotech LimitedEmail: [email protected]

For more information visithttp://wosco0.tripod.com/cfp1.html

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WO R K S H O P I I ITrusted Internet Workshop

In recent years, there has been a tremendouspush from business and user communitiesfor next generation applications demandingQuality of Service (QoS), reliability, andsecurity guarantees. The goal of TrustedInternet workshop is to provide a forum forresearchers and practitioners to present anddiscuss their work and exchange ideas in theareas of Internet QoS, Internet Reliability,and Internet Security. To achieve this goal,this workshop solicits original, previouslyunpublished research contributions on(but not restricted to) the following subjectcategories of Trusted Internet:

• MPLS Networks• DiffServ Networks• Virtual Private Networks• Content Distribution, Media Servers• QoS Scheduling, Routing, Multicasting• IP over WDM• Optical Protection/Restoration• Domain Name Server (DNS) Protection• Denial of Service (DoS)• Secure Internet Protocols• WORMS• Prototype Implementations and Studies• Deployment Issues and Analysis





Final papers due

ORGANIZERSG. ManimaranIowa State UniversityEmail: [email protected]

C. Siva Ram MurthyIndian Institute of Technology, MadrasEmail: [email protected]

For more information visithttp://vulcan.ee.iastate.edu/~gmani/tiw/

W E D N E S D A Y , D E C . 1 8 WO R K S H O P S & T U TO R I A L S

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WO R K S H O P I VWorkshop on Cutting Edge Computing

This workshop will feature invited presentationsfrom experts in such areas as QuantumComputing, Supercomputing/Deep Computing,Datamining of Scientific Data, etc. The goalis to bring to the attention of researchersand practitioners, recent R&D advances incomputing technologies that are expected todominate the future of computing.

Topics of interest include but are not limited to:• Supercomputing/Deep Computing

Grid Computing• Quantum Computing• Advanced Algorithms• Datamining of Scientific Data• Compiler Optimization


ORGANIZERSUday S. ShuklaIBM Global Services India Pvt. LimitedEmail: [email protected]

Rajendra K. BeraIBM Global Services India Pvt. LimitedEmail: [email protected]

For more information visithttp://www.hipc.org/hipc2002/

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WO R K S H O P VWorkshop on Storage Area Networks

In conventional computing systems, serversand storage devices inhabit the same box andcommunicate through a local bus. In StorageArea Networks (SAN) servers and storagedeices can be geographically separate and theinterconnection is through a high-speed net-work. SANs offer several advantages suchas server-free backups, ease of management,resource sharing, etc. The goal of the work-shop is to bring beginners, practitioners, andresearchers together and to provide a glimpseof research, implementation, and deploymentissues.

Topics of interest include but are not limited to:• SAN Architectures• SAN Management• Storage Virtualization• Security• Storage over FC, IP, and Ethernet• Standards





Final papers due

ORGANIZERSV. SridharSatyam Computer Services Ltd.Email: [email protected]

C. P. RavikumarTexas Instruments IndiaEmail: [email protected]

S. H. SrinivasanSatyam Computer Services Ltd.Email: [email protected]

For more information visithttp://satyamus.satyam.com/members/hipc/hipcworkshop.htm

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T U TO R I A L IComputational Methods in BioinformaticsSharmila S. Mande and M. Vidyasagar

Tata Consultancy Services

Audience: The tutorial is intended as aintroduction to Bioinformatics to studentsand professionals with an IT background.

Course Description: Technological advances inlife sciences have been generating an immenseamount of data. Computational methods havebeen applied to decipher useful informationcontained therein. The synergy betweencomputer science and life science thus has ledto the birth of Bioinformatics. In this tutorial,we will cover the following topics: 1) Basicmolecular biology – Cellular organization,structure of the cell, chromosomes, genes,DNA, RNA, proteins, DNA Replication, tran-scription, translation, challenges in biology, 2)Sequence analysis – Local and global similaritysearches, pairwise and multiple sequence align-ments, 3) Genome annotation and analysis –ORF prediction algorithms for prokaryotesand eukaryotes, pattern identification, RNAstructure prediction, 4) Protein structure –Primary, secondary, tertiary and quaternarystructures, domains and motifs, secondarystructure prediction methods, transmembraneprediction, various 3D modelling methods,and 5) Comparative genome analysis – Wholegenome alignment, gene function identification.

Lecturers: Dr. Sharmila Mande heads theBioinformatics Division at the AdvancedTechnology Centre of TCS. Her researchinterests are in comparative genomics, proteinstructure and protein-protein interactionsShe received her Ph. D. from Indian Instituteof Science, Bangalore in 1991.

Dr. M. Vidyasagar is an Executive VicePresident of TCS and heads the AdvancedTechnology Center in Hyderabad. His currentresearch interests are statistical learning theoryand the application of machine learningapproaches to various problems in computa-tional Biology. He received his Ph. D. fromUniversity of Wisconsin, Madison in 1969.He is the author of nine books and 130 journalarticles, and has received several awards inrecognition of his research.


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T U TO R I A L I IWriting Parallel Programs with OpenMP

Timothy G. MattsonIntel Corporation

Audience: This course will be of value toprogrammers (C, C++ or Fortran) interestedin learning about OpenMP. Experience withparallel programming is not required.

Course Description: The OpenMP ApplicationProgramming Interface (API) defines compilerdirectives and library routines that make itrelatively easy to create programs for sharedmemory computers. It first appeared in 1997and has become the de facto standard forprogramming shared memory computers. Inthis tutorial, we will provide a comprehensiveoverview of OpenMP. The OpenMP specifica-tions are simple enough that in half a day wewill be able to cover the entire API. We willstart with basic concepts in programmingshared memory computers and then moveonto the basic constructs in OpenMP. Thiswill include thread creation, assigning workto threads, managing data within the programand finally synchronization of threads. Thefocus of the tutorial is using OpenMP to writereal applications. Therefore, we will demon-strate the OpenMP constructs using excerptsfrom real applications. We will use theseapplications to explain how to use the basicOpenMP constructs, but also how to usethem effectively to maximize performance and robustness.

Lecturer: Dr. Mattson joined Intel in 1993 towork on a wide range of parallel computingissues. He was a senior scientist on the ASCITeraflop computer project. Later, he helpedwrite the OpenMP API for shared memoryprogramming. He continues to play a key rolewith OpenMP and is currently serving as theCEO of the OpenMP Architecture ReviewBoard. His most recent projects focus onparallel and distributed computing. He helpedfound the Open Cluster Group: an industry/national-laboratory collaboration dedicated tomaking clusters more appropriate for main-stream technical computing. The first projectfrom this group is OSCAR: a robust and easyto use software stack for cluster computing.Prior to joining Intel, Dr. Mattson held anumber of industrial and academic positionswith a focus on scientific computing on highperformance computers. He holds a Ph.D.(U.C. Santa Cruz, 1985) for his work onquantum scattering theory.

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T U TO R I A L I I IData Stream Mining in Mobile and

Distributed EnvironmentsHillol Kargupta

University of Maryland Baltimore County

Audience: This tutorial will introduce atten-dees to issues involved in mobile and distrib-uted data stream mining. It will assume thatthe audience has introductory knowledge ofdata mining, but no knowledge of data streammining in a ubiquitous environment.

Course Description: This tutorial will presentan overview of the state-of-the-art technologyfor ubiquitous data-stream mining (UDM) inmobile and distributed environments. Accessingand analyzing time critical data streams froma ubiquitous computing device offer manychallenges. It requires a new breed of datamining algorithms that can handle continuousstream of data. In addition, UDM techniquesshould pay attention to the cost due to com-munication, computation, security, power con-sumption, and other factors. The tutorial willcover the following material: 1) Ubiquitousdata mining: Introduction and motivation,2) Accessing data streams in ubiquitousenvironments, 3) Data mining in a ubiquitousenvironment: An overview, 4) Cost of UDM:Systems, communication, power, securityissues, 5) Data stream mining algorithms fromsingle and multiple sources, 6) Communicationlanguages for UDM applications, 7) Human-computer interaction issues, 8) Applications:Case studies, and 9) Future possibilities.

Lecturer: Dr. Kargupta is an AssistantProfessor in the Department of ComputerScience and Electrical Engineering, Universityof Maryland Baltimore County. He is also acofounder of Agnik (http://www.agnik.com),a company specializing on ubiquitous dataintelligence. He received his Ph.D. in ComputerScience from University of Illinois at Urbana-Champaign in 1996. His research interestsinclude mobile and distributed data miningand computation in gene expression.

Dr. Kargupta won the National ScienceFoundation (NSF) CAREER award in 2001for his research on ubiquitous and distributeddata mining. His research is also funded byseveral other grants from NSF, NASA, TRWResearch Foundation, and Others. He wonthe 1997 Los Alamos Award for OutstandingTechnical Achievement. His dissertationearned him the 1996 SIAM (Society forIndustrial and Applied Mathematics) annual

best student paper prize. He has publishedmore than sixty peer-reviewed articles in jour-nals, conferences, and books. He is the prima-ry editor of a book entitled "Advances inDistributed and Parallel Knowledge Discovery",AAAI/MIT Press. He is an Associate Editorof the IEEE Transactions on System, Man,and Cybernetics, Part B. He has been in theOrganizing Committee of the 2001, 2002,and 2003 SIAM International Data MiningConference. He is a member of the programcommittee for the 2001 ACM SIGKDDconference and the 2002 IEEE InternationalConference on Data Mining, 2002 HiPCConference, and 2002 CIKM among others.He organized numerous workshops, offeredseveral tutorials, and edited journal specialissues. More information about him can befound at http://www.cs.umbc.edu/~hillol.

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T U TO R I A L I VThe Early 21st-Century Processor

Architecture LandscapeSriram Vajapeyam

Independent Consultant

Audience: Any one interested in a quick butcomprehensive overview of the current processorlandscape and having (a) basic background incomputer architecture and organization, and(b) some exposure to advanced processorarchitecture. The tutorial should be usefulto a variety of people in the field, includingdecision makers, technical managers,practicing engineers, research studentsand faculty members.

Course Description: Processors today populatea variety of markets and application domains:the traditional high-end servers, desktop andmobile computers; embedded computers,especially DSPs, network processors, etc.Traditionally, the advanced micro-architecturalfeatures used in processors, within the vonNeumann model framework, have trickleddown from supercomputers to workstationsto PCs. While this trend continues today withembedded processors, DSPs, etc., these newerdomains also incorporate processor featuresand technologies specially suited for just theirapplications.

In this tutorial, we will provide a quickoverview of this increasingly complex processorarchitecture landscape. We first identify andclassify several basic processor micro-architec-tural techniques in the contexts of a typicalgeneral-purpose super-scalar processor model


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and a vector processor model. Extensive spec-ulative processing, multi-threading, modularand hierarchically decoupled instruction issue,and dynamic code optimization are some ofthe more important trends in traditional high-performance CPUs. Next, we will contrast thegeneral-purpose workload's characteristicswith those of the DSP and network processingdomains. This will serve as a springboard forlooking at the processors (micro-architectures)of those domains. For example, vector-styleprocessing is an important feature in DSPprocessors. Throughout, we will highlightexample features from commercial processorsof the respective domains.

Finally, we will touch upon the exciting less-traditional aspects of the current processorlandscape. Dynamic cross-platform binarytranslation (and code optimization) is break-ing the traditional binary compatibility lock ingeneral-purpose and high-end computing. Thenewer computing domains employ importanttechnologies such as configurable/reusable IPcores, reconfigurable fabrics, system-on-chip,special-purpose co-processors, (automated)processor customization and specialization,etc. We will provide a quick glimpse of severalof these technologies.

Overall, the tutorial attendee will get a bird'seye view of significant architectural and tech-nological trends in processors for the differentcomputing domains.

Lecturer: Sriram Vajapeyam is currently anindependent consultant in computer architec-ture and systems. He holds a Ph.D. (1991)and an M.S. in Computer Science from theUniversity of Wisconsin-Madison, and aB.Tech. in Electrical Engineering from IIT-Madras. Vajapeyam worked for a year at CrayResearch ('91-'92) after his Ph.D., and hasdone a 6-month sabbatical at Analog DevicesIndia, a 3-month Visiting Professorship at IntelMicroprocessor Research Labs, and 8+ yearsin a faculty position in India. He has held sev-eral short-term visiting positions including atMIT, Univ. of Wisconsin, Cray Research, Univ.of Southern California (LA), and ACRI France.He has taught half a dozen tutorials at the topinternational computer architecture conferences(ISCA and ASPLOS) and written a guest-editorial on processors for IEEE Computer.Vajapeyam's research and professional interestsare in computer architecture and systems.

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T U TO R I A L VWireless Sensor Network Protocols

Krishna M. SivalingamWashington State University

Audience: The tutorial is intended for practicingengineers in the networking and communica-tions area. It is also very suitable for beginninggraduate students with interests in wirelesscommunication, networking, and mobilecomputing. Prior exposure to fundamentalsof networking and wireless communication isa plus though not essential.

Course Description: Tremendous technologicaladvances have been made in the developmentof low-cost sensor devices equipped with wire-less network interfaces. The sensors monitorvarious types of information such as tempera-ture, pressure, chemicals, etc. and/or transmitvoice and video data. The design of large-scale sensor networks interconnecting severalhundred to a few thousand sensor nodeshas attracted recent research attention. Suchsensor networks may be used for applicationsspanning several domains including military,medical, industrial, and home networks. Thepurpose of the tutorial is to present a compre-hensive introduction to wireless sensor net-works - basic concepts, challenges, recentresearch, and further possibilities. The topicscovered will be based on fundamental con-cepts and up-to-date material in the literature,as listed below: 1) Introduction to wirelesssensor networks and evolution of protocolsfor sensor networks, 2) Multiple AccessProtocols, 3) Routing Protocols, 4) Energy-efficient protocol design, 5) Data querying,dissemination and fusion, 6) Security, 7)Testbeds and application scenarios, and 8)Summary: Future directions and unsolvedproblems in this research area.

Lecturer: Dr. Krishna Sivalingam received hisPh.D. and M.S. degrees in Computer Sciencefrom State University of New York at Buffaloin 1994 and 1990 respectively; and the B.E.degree in Computer Science and Engineeringin 1988 from Anna University, Madras, India.He is currently an Associate Professor in theSchool of Electrical Engineering and ComputerScience, at Washington State University,Pullman, where he was an Assistant Professorfrom 1997 to 2000. Earlier, he was anAssistant Professor at University of NorthCarolina Greensboro from 1994 until 1997.His research interests include wireless networks,optical wavelength division multiplexed net-works, and performance evaluation. He has

served as a Guest Co-Editor for a special issueof the IEEE Journal on Selected Areas inCommunications on optical WDM networks.He is co-recipient of the Best Paper Award atthe IEEE International Conference on Networks2000 held in Singapore. He has published anedited book on optical WDM networks in2000. He holds three patents in wirelessnetworks and has published several researcharticles including more than twenty journalpublications. He will be serving as GeneralCo-Chair for SPIE Opticomm 2003 conference;and has served as Technical Program Co-Chairof SPIE/IEEE/ACM OptiComm conference atBoston, MA in July 2002, and as WorkshopCo-Chair for Workshop on Wireless SensorNetworks and Applications (WSNA) to beheld in conjunction with ACM MobiCom2002 at Atlanta, GA in September 2002.

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T U TO R I A L V IWireless Networking using IEEE 802.11 and

Bluetooth: Technology and Research ChallengesPravin Bhagwat

Indian Institute of Technology,Kanpur and Winlab, Rutgers University

Rajeev ShoreyIBM India Research Lab. and

Indian Institute of Technology, New Delhi

Audience: This tutorial is intended forresearchers and practitioners who wantto track new developments in short rangewireless communication, but who don't havetime or patience to read all specifications.Computer professionals who want to developbetter understanding of technology trends andidentify new market opportunities in the areaof wireless networking will also benefit fromthis tutorial. Basic understanding of layerednetwork architecture is expected. No back-ground in analog radio, signal processing,or wireless communication is required.

Course Description: The promise of unteth-ered computing in the workplace is becominga reality. IEEE 802.11b, the 11 Mbps wirelessLAN standard, has finally arrived, and earlymarket response has been positive. As theWLAN market takes off, Bluetooth, anotheremerging standard for short-range wirelessnetworking, is also gathering force. Severalvendors have demonstrated Bluetooth prod-ucts, including cordless headsets, PCMCIAcards, and LAN access points. Both standardsare competing for the same airwaves, butare they also chasing the same market? WillBluetooth and 802.11b complement each


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other, or will one technology eventuallydisplace the other?This tutorial will explain the key designaspects of IEEE 802.11 and Bluetooth stan-dards and illustrate how technology innova-tion and market forces are shaping their evo-lution. We will begin with some basic concepts(RF, signal processing) and technology trends(low cost, low power, small form factor). Wewill then give an overview of 802.11b and theBluetooth 1.1 specifications. This will be fol-lowed by a brief discussion of Wireless PANsand the IEEE 802.15.1 standard. The finalpart will be devoted to future directions andopen research issues in Wireless LANs andWireless PANs.

Lecturers: Pravin Bhagwat is an entrepreneurand a well-known researcher in the area ofwireless and mobile networking. Currently, heis directing a large-scale 802.11 deploymentproject in India and also working as a visitingprofessor in the computer science department,IIT Kanpur. He was the principal architect atReefEdge, Inc., a wireless networking infra-structure and software company based in NJ.He played an active role in the standardizationof Bluetooth PAN profile and also served as thechair of the Internet Engineering Task ForceBOF on IP over Bluetooth. Prior to working forReefEdge, he worked as technology consultantin the Networking Research group at AT&TLabs-Research, and as a member of researchstaff at IBM Thomas J. Watson ResearchCenter. He is the chief architect of BlueSky,an indoor wireless networking system forpalmtop computers, and the co-inventor ofTCP splicing, a technique for building fastapplication layer proxies. He received hisPh.D. in computer science from the Universityof Maryland, College Park.

Rajeev Shorey received the Bachelor ofEngineering (B.E) degree in Computer Sciencefrom the department of Computer Scienceand Automation, Indian Institute of Science,Bangalore, India in 1987. He received the M.Sand Ph. D degrees in Electrical CommunicationEngineering from the Indian Institute of Science,Bangalore, India, in 1990 and 1995 respectively.From December 1995 to February 1998, hewas with Silicon Automation Systems (nowSasken), Bangalore, India where he workedin the performance modeling and analysis ofCDMA networks. Since March 1998, he isa Research Staff Member in the IBM IndiaResearch Laboratory, Indian Institute ofTechnology, New Delhi, India. His researchinterests include wireless networks, Internetprotocols, performance modeling and analysisof wireline and wireless networks. Dr. Shorey

is in the technical program committee of severalinternational conferences in networking, namely,IEEE Infocom 2002, IEEE Infocom 2003,IEEE ICC 2003, and IEEE Globecom 2002.He is an adjunct faculty in the department ofComputer Science and Engineering, IndianInstitute of Technology, New Delhi and is asenior member of IEEE.

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T U TO R I A L V I IQuantum ComputingRajendra K. Bera

IBM Global Services India Pvt. Limited

Audience: This tutorial is intended foreducators, graduate students and researchersinterested in pursuing quantum computing.

Course Description: Quantum computing isone of the fascinating technologies in develop-ment today. Although the technology has along way to go before it matures and can beused to build computers for regular use, therehave been some spectacular successes in termsof research results, both in hardware and inalgorithm development. This tutorial willdescribe some of the recent advances made inquantum computing to a nonspecialist audi-ence. The tutorial will cover the basic conceptsof quantum mechanics (state vector and super-position of states, entanglement, decoherence,measurement, etc.) as applicable to quantumcomputing, quantum computers and basicoperations on such computers, and quantumalgorithms (Shor’s factorization algorithm, andGrover’s list search algorithm). Prior knowledgeof quantum mechanics is not necessary.

Lecturer: Rajendra K. Bera received his B.Tech., M. Tech., and Ph. D. degrees in aero-space engineering from the Indian Institute ofTechnology, Kanpur. He was a researcher forover 20 years at the National AerospaceLaboratory, Bangalore, India; a visiting assis-tant professor of aerospace, mechanical, andnuclear engineering at the University ofOklahoma, USA (1979-80); and a visiting fac-ulty of aerospace engineering at the IndianInstitute of Technology, Kanpur, India (1988).He is a Fellow of the Institution of Engineers(India) and a member of the New YorkAcademy of Sciences. He has published morethan 30 research papers in refereed journalsand has more than a dozen IBM US patentsthat are pending. Currently, he heads theR&D Group (Exports) of IBM GlobalServices India.

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T U TO R I A L V I I IDesign for High Reliability,

Availability and ServiceabilityDhiraj K. Pradhan

University of Bristol

Audience: Engineers and Researchers

Course Description: This tutorial discusses thefactors that cause system failure (hardwarefault, noise, software bugs, etc.) and then pre-sents the wide range of techniques, both hard-ware and software, that have been developedto protect the system from these threats. Alsodiscussed are design techniques to enhancefault tolerance in multiprocessor distributedsystems. This part concludes with a discussionof models for evaluating the effectiveness ofthese techniques in terms of reliability andavailability improvements versus the hard-ware, software, and/or performance overhead.

Lecturer: Dhiraj K. Pradhan is currently aChair Professor in the Department ofComputer Science at the University Bristol(U.K.). Recently, he was a Professor in theElectrical & Computer Engineering Departmentof Oregon State University, in Corvallis.Previously, Dr. Pradhan held the COE EndowedChair Professorship in Computer Science atTexas A&M University, in College Station, aswell as serving as Visiting Professor at StanfordUniversity, in California. Before that, ProfessorPradhan was Professor/Coordinator of ComputerEngineering at the University of Massachusetts,in Amherst, along with other positions.

Dr. Pradhan's contributions include twopatents, serving as co-author/editor of severalbooks, including Fault-Tolerance Computing:Theory & Techniques, Vol. I & II (Prentice-Hall, '86), Fault-Tolerant ComputerSystems Design (Prentice-Hall, '98), ICManufacturability: The Art of Process andDesign Integration (IEEE Press, '99). Prof.Pradhan's honors include the '96 IEEETransactions on Computer-Aided Design BestPaper Award; Fellow, ACM; HumboldtDistinguished Senior Scientist Award/Germany; '97-'98 Fulbright-Flad Chair inComputer Science.


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T U TO R I A L I XData Grid Management Systems: Towards

Knowledge Grid Networks Arcot Rajasekar and Arun Jagatheesan

San Diego Supercomputer CenterUniversity of California, San Diego

Audience: Since the tutorial covers basics,open research issues and demonstrationsessions, a wide variety of people fall into thecategory of "intended audience". Based onsimilar experiences before at NPACI (NationalPartnership for Advanced ComputingInfrastructure), the following people would bebenefited: Beginners, Students: The introducto-ry sections will provide valuable informationon Data Grids, Computational Grids andprojects using these technologies. Researchers:Investigators who already are in HPC will beupdated on new challenges and methodologyin data management. System Developers:Information about data grid requirements andcomponents will showcase future developmentchallenges. Commercial Companies: The casestudies would provide solutions to similarproblems in the commercial world.

Course Description: Data grids handle large-scale, distributed, heterogeneous collections ofdata shared among virtual organizations. Thistutorial provides insight into opportunities,components and case studies of data grids andexplores their usage in high performance andlarge scale computing environments. Startingwith challenges in data handling, the tutorialwill also provide an overview of the data gridtechnology, design philosophy, best practicesand services for the next generation commercialand scientific applications. It will introduce the burgeoning field of data grid managementsystems (DGMS), and illustrate real-life grids(GriPhyN, NVO, BIRN, etc.) and grid compo-nents (Storage Resource Broker, Grid Portal,etc.). If possible, a hands-on session to use and"feel" a working data grid system will be provided. The course outline is as follows:1) Introduction to Data Grids (What?),2) Requirement for Data Grids (Why?),3) Data Grid Components (How?), 4) CaseStudies (Where?), 5) SRB Demo/Hands On(Can I?), 6) Other Technologies (What else?),7) Data Grid Management Systems,8) Knowledge Grid Network (What next?),and 9) Uncharted Waters (New challenges?).

Lecturers: Dr. Arcot Rajasekar is the Directorof the Data Grid Technologies Group at theSan Diego Supercomputer Center at UCSD.His research interests include data grids, digi-

tal library systems, persistent archives and dis-tributed data collection & metadata manage-ment. He is a key architect of the SDSCStorage Resource Broker, an intelligent datagrid integrating distributed data archives, filerepositories and digital collections. Dr. Rajasekarreceived his PhD from the University of Mary-land and has more than 50 publications inartificial intelligence, databases and data gridsystems. His email address is [email protected].

Arun Jagatheesan is a Visiting Scholar at theSan Diego Supercomputer Center and a mem-ber of the High Energy Physics Group at theUniversity of Florida. His current researchinterests include Internet Computing, DataGrid Management, Semantic Web andWorkflow Systems. He is involved in researchand development of GriPhyN (Grid PhysicsNetwork), SRB Web Services and Data GridManagement Systems at SDSC. Jagatheesanreceived his M.S in Computer Science fromthe University of Florida. His email address [email protected].

2 : 0 0 p m - 6 : 0 0 p m

T U TO R I A L XOpportunities and Challenges in

Pervasive ComputingRaju Pandey

University of California, Davis

Audience: This tutorial is meant for coreComputer Science researchers, educators andstudents, and applied computational sciencesresearchers (including engineers, environmen-tal scientists, agriculture experts, and otherapplication developers) who are interested inunderstanding the opportunities and challengesthat pervasive computing environments offer.

Course Description: There is increasing inter-est in the next generation of distributed sys-tems that include a large number of embeddedsensors, actuators and MEMS devices. Suchsystems, called variously as pervasive, ubiqui-tous, or networks of embedded systems inliterature, include heterogeneous collectionsof devices that are embedded in their physicalenvironment and that interact with the environ-ment, gather information, perform localcomputations, and communicate with otherdevices and hosts. Pervasive systems allowstight integration of the physical world witha computing system infrastructure, therebypermitting better information sensing, access,and control. The primary goal of this tutorialis to provide a comprehensive overview of thepervasive computing area to both Computer

Science researchers and application developercommunity. For Computer Science researchers,this tutorial will address how characteristics ofpervasive environments (such as resource con-straints, connectivity and configuration, scala-bility, fault tolerance and security concerns)require novel solutions for many traditionaldistributed systems problems. For applicationdevelopers, this tutorial will illustrate how thisexciting technology can be used to build novelapplications in agriculture, environmental sci-ences, engineering, medicine, disaster recoveryand response, and smart computing environ-ments. The tutorial is divided into four seg-ments. First, it will discuss the computational,communication and sensor characteristics ofthe various devices currently available. Second,it will describe the networking techniques forconstructing a communication infrastructureamong ubiquitous devices. The tutorial willdiscuss several classes of sensor network rout-ing algorithms, and their applicability withindifferent application domains. Third, the tuto-rial will highlight the operating system, mid-dleware, and programming language supportneeded for integrating a large number ofdevices into a secure, fault tolerant and adap-tive distributed computing environment.Finally, the tutorial will discuss the issues inbuilding and deploying new classes of applica-tions within a pervasive computing environment.

Lecturer: Raju Pandey is an AssociateProfessor in the Department of ComputerSciences at University of California, Davis.He received his B. Tech degree in ComputerScience and Engineering from the IndianInstitute of Technology, Kharagpur in 1984,an M.S. in Computer Science from Universityof Massachusetts, Amherst, and a Ph. D. inComputer Science from the University of Texasat Austin in 1995. His research interests areprimarily in distributed systems, operatingsystems, networking, and pervasive computing.Dr. Pandey is a member of ACM and a memberof IEEE-CS.

W E D N E S D A Y , D E C . 1 8

L O C A L I N F O R M A T I O N

Conference SiteDecember 18, 19, 20, and 21

Taj Residency41/3, Mahatma Gandhi RoadBangalore - 560 001Karnataka, IndiaE-mail : [email protected]

Tel: +91-80-558-4444Fax: +91-80-558-4748

Due to large number of activities on December18, some tutorials will be held at an alternatelocation. Check the HiPC website for locationinformation.

About BangaloreBangalore, a bustling metropolis, is the fifthlargest city in India and the capital of thestate of Karnataka. It is the main center ofthe Information Technology industry in India;almost every Indian and multi- national ITcompany has a presence here. Bangalore ishome to the Indian Institute of Science (IISc),a premier research institute, and many otheraerospace and high technology industriesincluding the Centre for Development ofAdvanced Computing. Karnataka is home ofmany ancient Indian architectural marvels,wildlife sanctuaries, rain forests (the WesternGhats), pristine beaches, and rich and hoarycultural traditions.

Sightseeing TourThere will be a local sightseeing tour followingthe conference. Tentative schedule: December 22,7:00 am - 6:00 pm.

Please check the HiPC website for details.

Travel Checklist

Visa:All non-Indian-citizens are required to have anIndian visa to enter the country. Please allowyourself sufficient time (say 2-3 weeks) toprocure an appropriate visa from your nearestIndian consulate. Please check the conferencewebsite for information about Indian consulates.

Flight Reservations:Flights to India tend to fill up well ahead ofthe December holiday season. We recommendthat you make your flight reservations about3-4 months in advance.

Vaccinations (shots):Many first-time travelers to India prefer to getpreventive vaccinations.

Foreign Exchange:While international credit cards are widelyaccepted in commercial establishments inIndia, several places rely on cash transactionsin the local currency (Indian Rupee). Wesuggest that you carry some Indian currencywhen entering India or buy Indian currencyat the airport when you arrive. The currentexchange rate is about Rs. 48/- per US dollar.Once in India, you can buy additional Indiancurrency from local branches of Citibank,Thomas Cook, etc. However, it is typicallydifficult to convert Indian currency backinto foreign currency because of exchangeregulations.

Hotel Reservations:Please make your hotel reservations aheadof time so that you get your choice of accom-modation. Check the conference website forinformation about accommodations. You mayalso find attractive rates on the web.

Time and WeatherThe Indian Standard Time (IST) is 5 1/2 hoursahead of the Greenwich Mean Time(GMT)and is 13 1/2 hours ahead of the U. S. PacificStandard Time(PST). In December/January theweather is mildly tropical with temperaturesaveraging about 21˚ Celsius (approx. 70˚Fahrenheit) during the day and about 16˚Celsius (approx. 60˚ Fahrenheit) during thenight.

Sunrise – 6:06 am (approx.)Sunset – 5:28 pm (approx.)

For detailed local information, visit the HiPCwebsite at http://www.hipc.org/hipc2002.Check out the local info and accommodationsections.

Airport to Hotel TransportationThe airport is 6 kms (approx 3.5 miles) fromTaj Residency. The taxi fare can vary.One way prepaid taxi fare is approximatelyRs. 250 plus tip. You can book a taxi atthe prepaid taxi counter of KSTDC whichoperates round the clock for passengersarriving by domestic and international flights.The counter is situated in Terminal II immedi-ately after the baggage claim area.

17


RECYCLED PAPER

PRINTED IN U.S.A.PRINTED ON RECYCLED PAPER WITH SOY INK.

Co-sponsored by:

European Association for Theoretical Computer ScienceIFIP Working Group on Concurrent Systems

IEEE Computer SocietyTechnical Committee on Parallel Processing

ACM SIGARCH

High Performance Computing 2002University of Southern California, EEB 200C

Los Angeles, CA 90089-2562, USA

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9thInternationalConferenceon HighPerformanceComputing · 9thInternationalConferenceon HighPerformanceComputing December 18-21, 2002 Bangalore, India. ... and talk setting. For details,