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7/30/2019 25 Course Review
1/12
2010 Xilinx, Inc. All Rights ReservedThis material exempt per Depart ment of Commerce license excepti on TSU
Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
What is the MHS file?
What does the PlatGen tool do?
What tool is used to place executable code in an FPGA block
RAM?
25- 2 Course Review
7/30/2019 25 Course Review
2/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What is the MHS file? The MHS file is the Microprocessor Hardware Specification; it specifies
processors, hardware peripherals, bus connections, and address spaces for
the hardware
What does the PlatGen tool do? PlatGen takes the MHS file and creates the system and peripheral netlists,
HDL wrapper files, BMM file, etc.
What tool is used to place executable code in an FPGA blockRAM?
The BitInit tool will take the BMM file and create the proper initialization forthe block RAM that is assigned to the executable memory space
25- 3 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
How can you add or change hardware configuration settings oncethe hardware system is build?
What does the LibGen tool do?
What is the difference between system.bit and download.bit files?
25- 4 Course Review
7/30/2019 25 Course Review
3/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
How can you add or change hardware configuration settings oncethe hardware system is build? Select an IP instance in the System Assembly View panel, right click on it,
and select Configure IP
Select available tabs and appropriate options and make changes to theparameters
Alternately, you can modify MHS f ile with correct Parameter name andvalue
What does the LibGen tool do? Read MSS file and generate libraries
What is the difference between system.bit and download.bit files? The system.bit file contains only hardware description whereas
download.bit file contains both hardware description as well as executablesoftware
25- 5 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
What is FSL?
How many FSL channels are supported by MicroBlaze?
How FSL can improve performance?
25- 6 Course Review
7/30/2019 25 Course Review
4/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What is FSL? FSL is a dedicated simplex link with a FIFO interface
How many FSL channels are supported by MicroBlaze? 16
How FSL can improve performance? Since FSL is a dedicated link with a f ixed latency
Bus arbitration does not exist
FSL is useful for hardware acceleration
25- 7 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
What are some of the advantages of using ISEand XPS integration?
What are some of the advantages of using Xflow
and XPS integration?
25- 8 Course Review
7/30/2019 25 Course Review
5/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What are some of the advantages of using ISEand XPS integration? Add additional logic to the FPGA design
Synthesize the design by utilizing ISE-supported synthesis tools
Control the FPGA implementation flow by using ISE
What are some of the advantages of using Xflowand XPS integration? One GUI to perform all design work
Simple push-button flow
25- 9 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check What is the process for creating a peripheral of custom IP in XPS?
If you are using a third-party synthesis tool to compile your IP,what files are required to integrate that IP into XPS?
25- 10 Course Review
7/30/2019 25 Course Review
6/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What is the process for creating a peripheral of custom IP in XPS? Start the Create and Import Wizard tool from XPS
Select the Create templates for a new peripheral option
Identify the destination directory location
Select the bus interface
Select functionality and any interrupts
Define any software registers and address ranges
Add additional signals which the peripheral may be using
Generate the files
Add user logic in user_logic.vhd
If you are using a third-party synthesis tool to compile your IP,what files are required to integrate that IP into XPS? MPD and BBD files
25- 11 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check What GNU GCC option is used to specify that debugging
information should be placed in the executable?
What objdump option is used to display header information?
What libraries are created when LibGen is run?
25- 12 Course Review
7/30/2019 25 Course Review
7/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What GNU GCC option is used to specify that debugginginformation should be placed in the executable?
-g
What objdump option is used to display header information?
-h
What libraries are created when LibGen is run?
code, include, lib, and libsrc
25- 13 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check What is included in a BSP?
What are some of the differences between a Level 0 and a Level 1driver?
25- 14 Course Review
7/30/2019 25 Course Review
8/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What is included in a BSP? IP drivers
Processor functions
Library functions
What are some of the differences between a Level 0 and a Level 1driver? Size
Functionality
Ease of use
25- 15 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check List libraries supported and their functionality
How many interrupt pins are present on MicroBlaze?
25- 16 Course Review
7/30/2019 25 Course Review
9/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
List libraries supported and their functionality Fatfs provides file support functions
MFS provides memory file system support functions
lwip provides networking support functions including handling of multipleconnections
Flash provides read/write/erase types of functions for Intel parallel flashdevices so user can program flash memory during run-time
Isf provides functions for in-system and serial flash devices
How many interrupt pins are present on MicroBlaze? One
25- 17 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
When do you need to use a linker script?
What does a linker script do?
List some MicroBlaze processor address spacerestrictions
25- 18 Course Review
7/30/2019 25 Course Review
10/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
When do you need to use a linker script? When you have software developed in multiple source files and the
compiled object code needs to be placed in different memory structures or
in nonstandard configurations
What does a linker script do? The linker script controls the placement of the object code, data, stack, and
heap in specific memory locations
List some MicroBlaze processor address spacerestrictions
If you are not using xmdstub, ensure that crt0 is loaded in memory at 0 Must have writable memory from 0x00000000 to 0x0000004F
25- 19 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check
What does .sdata2 section contain?
What does .sdata section contain?
What does .sbss section contain?
25- 20 Course Review
7/30/2019 25 Course Review
11/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What does .sdata2 section contain? Small read-only data
What does .sdata section contain?
Small read-write data
What does .sbss section contain?
Small un-initialized data
25- 21 Course Review
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Knowledge Check What tool is used to connect the GNU Debugger to the hardware
target?
Into what parts of the design do debuggers provide visibility?
Course Review25-22
7/30/2019 25 Course Review
12/12
2010 Xilinx, Inc. All Rights Reserved For Academic Use Only
Answers
What tool is used to connect the GNU Debugger to the hardwaretarget?
XMD
Into what parts of the design do debuggers provide visibility? Registers
Memory
Stack
Variables
Expressions
Course Review25-23