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© Bart Nauwelaers 2004 18/04/23 p. 1
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Overview of Leuven Modeling and Design Activities
B. Nauwelaers & D. Schreurs
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Co-operation between Stellenbosch and Leuven
Fits in the framework of the project BIL02-35 bilateral co-opertion agreement between Flanders and South-Africa
"Development of advanced CAD tools for accurate linear and non-linear RF modelling of 0.1 m CMOS
devices"
Idea: Stimulate co-operation between two 'countries' (SA – Flanders)
Partners: University of Stellenbosch (Cornell Van Niekerk) K.U.Leuven (B. Nauwelaers, D. Schreurs) IMEC (S. Decoutere)
Time frame: 2003-2004
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Modelling activities at K.U.Leuven, ESAT-TELEMIC
Devices and circuits: Passive components (Si, high-Q, III-V, MEMS) Interconnects and packaging (on-chip interconnects, BGA, PSGA,
NQFP, …) Active devices (FET, HEMT, bipolar, Si, III-V) Circuits… design
! Many of the activities in close co-operation with different divisions of IMEC
Antennas Propagation
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Outline
Passives in RF-circuits Modeling Si-passives Modeling MCM-passives Modeling package interconnects
Active RF-circuits Modeling with equivalent circuits Modeling with state-space models
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de co up lin g
filte ring
em itte r de ge ne ra tio n
tun ed lo ad
im pe da nce m a tch in g
Passives in RF-circuits
Functions in RF circuits :
C
C1
2
C
C
1
C 23
R F in
b ia sne tw ork
V c c
Vc cV b b
C 1
C 2
RER
E
50
50 Cc
Pin
Vc c
Vb b
LN A VCO
PA filter
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Modeling Si-passives: integrated inductors
Compromise simplicity-accuracy : two-section model
Shield simplifies model
extracted
modeled
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Physics-based:No fitting factorsDefined even for inductors with incomplete inner/outer turn
Insight into contribution of different physical mechanisms Closed-form for a given number of turns High accuracy Good scalability
Modeling Si-passives: integrated inductors
ser selfL L M M
)12(3
)1()123()(
i
ii
Nn
NNnswd
l
nd
l
nd
nd
l
nd
lnn
twn
llL
441
441ln)1(47.02.0
)(ln
2
22
0
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Modeling Si-passives
Silicon is a bad material!
ed d y c u rren ts
d isp la c em e n t cu rre n ts
p+
G N D
G N D
p ro x im ity e ffec t
sk in e ffec t
sk in e ffec t
ra d ia tio n
co u p lin g th ro u g h o x id e
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Modeling Si-passives: integrated resistors with shielding
oxide (PMD)
oxide (fie ld)
oxide (IMD)
n+ n+
salic idessa lic ides
1 1'
S inkS ink
G ND G ND
(Bi)CMOS implementation : novelty of the shield
contacts poly-m etal
S ignalOUT
oxide
contacts S ink-m eta l
S ignalI N
po ly
1 '1
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Modeling Si-passives: integrated resistors with shielding
Reduced dissipative losses for metal interconnects= extreme case of resistor
1.0
1.5
2.0
2.5
3.0
108 109 1010
Dissipative losses [dB/mm]
no shieldshield
f [Hz]
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Modeling MCM-passives
BCB-capacitors (series and shunt-to-ground) Ta2O5-capacitors (series and shunt-to-ground)
CPW transmission lines on 3 metal levels TaN-resistors: single and meandered Spiral inductors Vias between metal layers Discontinuities: bridges, T-junctions, X-junctions
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Modeling MCM-passives: spiral inductors
Layout Multi-turn circular Coplanar fashion: signal and ground-plane on the same metal level Inner-to-outer connection using top metal layer
Inductor range 600 pH - 80 nH optimized for high Q
wider lines, larger slots and slot-to-ground optimized for low cost (small size)
smaller lines and slots Higher order model used
implementation: table based model 2 sections
valid up to higher frequencies beyond short to open resonance
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Modeling MCM-passives: model library
Design synchronisation
ComponentLibrary
Parameterizedcomponents
HP-ADS
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Modeling MCM-passives: TaN-resistor
RESseriescmp1Lres=30 umWres=40 umwidth=77 umslot=20 umRsheet=25 OhmModels="GG=117,width=77"
Intrinsic resistor
1 2 3 4 5
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Modeling MCM-passives: power divider example
Measured versus simulated results,
MCM-D design library
3 T-junctions, 15 bends, 18 CPW-sections, 1 resistor
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LNA - 5.25 GHz (ISM band) applications
Gain of chip = 7.39 dB
Gain after Packaging = 5.58 dB
Gain
dB
____ Before Packaging ____ After Packaging
Modeling package-interconnects: why?
PCB
Package Substrate
DieMould Compound
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PCB
Package Substrate
Die
2-port measurement using the MCM-on-Package-on-MCM method
PCB and Die fabricated using IMEC’s MCM-D thin-film technology
“Package Interconnect”
Modeling package-interconnects: why/how?
Micro BGA (Ball Grid Array) PSGA (Polymer Stud Grid Array) NQFP (No-lead Quad Flat Pack)
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Arun C – MCP/MaRS, 28 May 2004, IMEC
|Sijmeas-Sijmodel|
Signal Path
Ground
|Sijmeas-Sijmodel|
Modeling package-interconnects: … then model it (PSGA)!
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Arun C – MCP/MaRS, 28 May 2004, IMEC
Return Loss dB
Insertion Loss dB
On-chip compensation using a lumped capacitor
On-package compensation using an open stub
On-PCB compensation using an inductive feed line
Hybrid Compensation
Modeling package-interconnects:… and use the model for compensation
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Arun C – MCP/MaRS, 28 May 2004, IMEC
10 source resistance and 50 load resistance
50 ps rise time step input
10 source resistance and 2 pF load capacitance
50 ps rise time step input
Severe Signal Integrity (SI) problem for unterminated package interconnects
Modeling package-interconnects:… and for time-domain predictions
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Outline
Passives in RF-circuits Modeling Si-passives Modeling MCM-passives Modeling package interconnects
Active RF-circuits Modeling with equivalent circuits Modeling with state-space models
Mo
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Pad and transmission line parasitic effects
Modeling transistors: equivalent circuit – intrinsic, extrinsic and pads
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Substrate Effects
Base distributed nature
Modeling transistors: equivalent circuit - intrinsic part
Has been done for: GaAs FET GaAs HEMT, PHEMT InP HEMTs Si MOSFET Si BJT …
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Analytical direct extraction Optimizer-based data fitting
Modeling transistors: equivalent circuit extraction or optimization
Substrate Effects
Base distributed nature
Extract the model parameters by solving analytical expressions
Simple Can lead to frequency-dependent
elements
Determine the model parameters by finding a set of parameters that minimize some error function
Higher accuracy More calculation time
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Modeling transistors: equivalent circuit extraction or optimization Works well!
Lin-models are basis for non-linear models through integration!
See also C. Van Niekerk in afternoon talk!
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For a two-port:
collect D.U.T. data in time-domain format (LSNA meas.) find number of independent variables find functional relationships f1(.) and f2(.) by training ANN implement in circuit simulator evaluate accuracy at
device level circuit level
See also talk 3 (Hany Taher on LDMOS)
1 1 1 2 1 2 1 2 1 2
2 2 1 2 1 2 1 2 1 2
( ), ( ), ( ), ( ), ( ), ( ), , ( ), ( ),
( ), ( ), ( ), ( ), ( ), ( ), , ( ), ( ),
I t f V t V t V t V t V t V t I t I t
I t f V t V t V t V t V t V t I t I t
Modeling transistors: state-space model
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Modeling transistors: state-space model verified at circuit level
topology: feedback CPW lay-out one thin-film MHEMT frequency dependent feedback
loop RFB trade-off between gain,
bandwidth and reflection
S21: 9 dB ( 0.5 dB) BW: 1–13 GHz note: low total gm (70 mS) of
100 m transistor2 4 6 8 10 12 140 16
6
8
10
12
4
14
Frequency [GHz]
S21 [dB
]
Vds = 1 V; Vgs = -0.4 V
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Modeling transistors: state-space model verified at circuit level
small-signal gain & P1dB
Small-signal gain
9.5 dB
10 dB
Measurement
Simulation
P1dB
-4.5 dBm
-4.9 dBm
Vds = 1 V; Vgs = -0.4 V; frequency = 1 GHz
15
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Gate current Drain currentVds = 1 V; Vgs = -0.4 V; frequency = 1 GHz Vds = 1 V; Vgs = -0.4 V; frequency = 1 GHz
Modeling transistors: state-space model verified at circuit level
large-signal amplifier simulation/measurement
Pin = -23 dBm; -11 dBm; -1 dBm
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Conclusions
ESAT-TELEMIC is a component and device modeler... and a circuit modeler?
Passive models: Based on physical insight Based on some calculations Based on some simulations Based on measurements and extraction/optimization
Active models: Used to be based on physical insight Also black box models Even more based on measurements
Both for passive and active: Always a balance between complexity, accuracy, efficiency while
constructing the model, while using the model Frequency as well as time domain is important
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The end
Thanks for your kind attention!
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Modeling MCM-passives
MCM-concept: package = embedding substrate of the passives integrate passives omit external components as much as possible
Advantage to single-chip allows various components in different technologies to be integrated
Requirements … integrated passives design library
Substrate
CPW-line Feedthrough
Metal Hood
Flippedchip Bonded
chip
BCB dielectric
CHIP
CPW-line Feedthrough
CHIP
Integratedpassive e.g. aspiral inductor
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Modeling MCM-passives
R
LC
BC B
C HIP
G la ss
TaN-resistor model Spiral inductor model
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--- Row1
--- Row2
--- Row3
--- Row4
5-Row BGA
--- Row5
Return Loss dB
Insertion Loss dB
Better
Better
Modeling package-interconnects: first measure it (BGA)
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Modeling transistors: state-space modeling applied to…
Thin-film MHEMT