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Analog design
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pageCMOS Analog Design 1
MOS-AK/Baltimore, 2009
CMOS ANALOG DESIGN USING ALL-REGION MOSFET MODELING
Márcio Cherem Schneider and Carlos Galup-Montoro
●Compact MOSFET model
● Circuit examples:
MOSFET sizing in amplifiers
Self-biased current reference
Federal University of Santa Catarina, Brazil
page
COMPACT MOSFET MODEL
� For constant VG, it follows that
( )I ox G FB s BQ C V V Qφ′ ′ ′= − − − −
( )I ox s B ox b s ox sdQ C d dQ C C d nC dφ φ φ′ ′ ′ ′ ′ ′= − = + =
( )1 ( )b G
G
ox
C Vn n V
C
′= + =
′
Charge sheet approximation of the inversion charge
Definitions:
oxide capacitance per unit area surface potential
inversion charge per unit area flat-band potential
bulk charge per unit area gate-to-bulk voltage
oxC′
BQ′
sφ
FBV
GV
IQ′
pageCMOS Analog Design 3
MOS-AK/Baltimore, 2009
UNIFIED CHARGE CONTROL MODEL (UCCM)-1
n+ n+
p
VSVG VD
1 tC I
ox I
dV dQnC Q
φ ′= −
′ ′
( )
ox b ox
G
C C nC
n n V
′ ′ ′+ =
=
Ii
t
QC
φ
′′ = −
I ox sdQ nC dφ′ ′=
t
kT
qφ =
S C DV V V≤ ≤
s i
C i ox b
d C
dV C C C
φ ′=
′ ′ ′+ +
1
1
I
ox t
Q
nC φ
′− <
′�
�
WI
SI
pageCMOS Analog Design 4
MOS-AK/Baltimore, 2009
1 tC I
ox I
dV dQnC Q
φ ′= −
′ ′ Integrating between V
C and VP
yields UCCM
lnIP I IP C t
ox IP
Q Q QV V
nC Qφ
′ ′ ′−− = +
′ ′
UNIFIED CHARGE CONTROL MODEL (UCCM)-2
IP ox t
II
ox t
Q nC
nC
φ
φ
′ ′= −
′′ =
′−
Thermal charge
Normalized inversion charge density
( 1 ln )P C t I I
V V q qφ ′ ′− = − +Normalized UCCM
pageCMOS Analog Design 5
MOS-AK/Baltimore, 2009
CHARGE-SHEET MODEL (CSM)
I ox sdQ nC dφ′ ′=
( )2 2
2
IS IDD t IS ID
ox
Q QWI Q Q
L nC
µφ
′ ′−′ ′= − −
′
s ID I t
d dQI WQ W
dy dy
φµ µ φ
′′= − +
drift diffusion drift diffusion
2
2
tS ox
I C n Sφ
µ ′=Normalization (specific) current
2
2
tSH ox
I C nφ
µ ′=Sheet (or square) normalization
current
WS
L=
D F R S f r SH f rI I I I i i SI i i = − = − = −
page
WEAK, MODERATE, STRONG INVERSION
CMOS Analog Design 6
MOS-AK/Baltimore, 2009
D F R S f rI I I I i i = − = −
( ) ( ) ( ) ( ) ( )2
2 1 1f r IS D IS D IS D f r
i q q q i′ ′ ′= + ⇒ = + −
WI MI SI
1 100fi< <1fi < 100 fi<
0.4 9Iq′< < 9 Iq′<0.4Iq′ <
pageCMOS Analog Design 7
MOS-AK/Baltimore, 2009
Long-channel MOSFET ),(),( DGSGRFD VVIVVIIII −=−=
IF: forward current IR: reverse current
IF=
IR=
FORWARD AND REVERSE CURRENTS
(Forward) Saturation
D F R FI I I I= − ≅
Triode
D F RI I I= −
Triode for VDS→0
; F R D F R FI I I I I I≅ = − <<
pageCMOS Analog Design 8
MOS-AK/Baltimore, 2009
Common-source characteristics
( )1 2 ln 1 1P S t f fV V i iφ − = + − + + −
UNIFIED I-V RELATIONSHIP (UICM)
since
D S f r S f
f r
I I i i I i
i i
= − ≅
>>
1,00E-09
1,00E-08
1,00E-07
1,00E-06
1,00E-05
1,00E-04
1,00E-03
0,00E+00 5,00E-01 1,00E+00 1,50E+00 2,00E+00 2,50E+00 3,00E+00 3,50E+00 4,00E+00 4,50E+00
10-3
10-6
10-9
VS = 0 V
3.0
2.5
2.0
1.5
0.5 1.0
0 1 2 3 4 VG (V)
ID (A) VD = VG
WI
MI
SI
VD
ID
VGVS
pageCMOS Analog Design 9
MOS-AK/Baltimore, 2009
Pinch-off voltage and slope factor as functions of VG [0.18 µm CMOS technology].
VP[V]
PINCH-OFF VOLTAGE AND SLOPE FACTOR
0G TP
V VV
n
−≅
( )0 1 3 2 ln 1 3 1P SV V − = = + − + + − if=3 at pinch-off
pageCMOS Analog Design 10
MOS-AK/Baltimore, 2009
( )21 1
f S
ms S IS f
S t
di IWg I Q i
dV Lµ
φ′= − = − = + −
BmbDmdSmsGmgD VgVgVgVgI ∆+∆+∆−∆=∆
Calculation of gms
TRANSCONDUCTANCES
0mg ms md mb
g g g g− + + =
D F R S f rI I I I i i = − = −
( ) ( ) ( )2
2
( 1 ln )
f r IS D IS D
P C t I I
i q q
V V q qφ
′ ′= +
′ ′− = − +
pageCMOS Analog Design 11
MOS-AK/Baltimore, 2009
Transconductance
-to-current ratio11
2
)()(
)(
++=
rfRF
tdms
iI
g φ 1≅
( )
2
f ri≅
WI (if <1)
SI (if >>1)
TRANSCONDUCTANCE-TO-CURRENT RATIO
n
ggg mdms
mg
−=
msmg
gg
n=
in saturation:
10-4 10-2 100 102 104if
tox
= 28 nm (IS
= 26 nA)
model
102
101
100
gms/IF
tox
= 5.5 nm (IS
= 111 nA)
1
10
100
1,00E-04 1,00E-03 1,00E-02 1,00E-01 1,00E+00 1,00E+01 1,00E+02 1,00E+03 1,00E+04
Seqüência1
Seqüência2
Seqüência3
pageCMOS Analog Design 12
MOS-AK/Baltimore, 2009
for
mo i
L
b
gv v
j Cω
ω ω
≅ −
>>
COMMON-SOURCE STAGE
GBW
pageCMOS Analog Design 13
MOS-AK/Baltimore, 2009
EXAMPLE: GBW = 10 MHz, CL = 10 pF
= 80·10-6 A/V2, n = 1.35
W/L IDsi (µµµµA)1 ID (µµµµA)2
∞∞∞∞ 0 22
500 6.6 28.6
100 33.2 55.2
50 66.4 88.4
10 332 354
oxCµ ′
2 628 A/Vm L
g GBW Cπ µ= ⋅ ⋅ =
1 Strong inversion model
2 Accurate all-region MOSFET model
pageCMOS Analog Design 14
MOS-AK/Baltimore, 2009
ALL-REGION MOSFET MODEL
6 31.35 628 10 .26 10 22 µWI m tI ng Aφ − −= = ⋅ ⋅ ⋅ =
( )1
2 /
mD WI Dsi m t
ox t
gI I I ng
C W Lφ
µ φ
= + = +
′
( )( )
/1
/
thD WI
W LI I
W L
= +
( ) ( )/ 2m ox tth
g W L Cµ φ′=
D WI DsiI I I= +
pageCMOS Analog Design 15
MOS-AK/Baltimore, 2009
ASPECT RATIO VS. CURRENT EXCESS
( )( )
/1
/
thD WI
W LI I
W L
= +
pageCMOS Analog Design 16
MOS-AK/Baltimore, 2009
SELF-CASCODE MOSFET (SCM)
Sat.
Triode
I2=NIx
2
1 2 2
1
11 1f f f
Si i i
S Nα
= + + =
2
2 2
2
1 11 1 ln
1 1
fXf f
t f
iVi i
i
αα
φ
+ − = + − + + + −
2 2
1 1 2( ) ( 1)
S f x
S f f x
I i NI
I i i N I
=
− = +
Applying UICM to both M1 & M2
pageCMOS Analog Design 17
MOS-AK/Baltimore, 2009
V-I CHARACTERISTICS OF SCM
2
2 2
2
1 11 1 ln
1 1
ln
fXf f
t f
X t
iVi i
i
V
αα
φ
φ α
+ − = + − + + + −
=In WI:
Sat.
Triode
2
1
11 1
S
S Nα
= + +
I2=NIx
pageCMOS Analog Design 18
MOS-AK/Baltimore, 2009
VOLTAGE FOLLOWING (NMOS)
CURRENT MIRROR (PMOS)1
9ln( )
ref S tV V JKφ= +
1 B. Gilbert, AICSP vol. 38, pp. 83-101, Feb. 2004
In WI:
pageCMOS Analog Design 19
MOS-AK/Baltimore, 2009
SELF-BIASED CURRENT SOURCE
(SBCS)
VFCM
pageCMOS Analog Design 20
MOS-AK/Baltimore, 2009
VFCM
DESIGN OF A SBCS
2
1
11 1 1 1 1 3
S
S Nα
= + + = + + =
1 30 11 30 1 10 ln 2.93
1 10 1
X
t
V
φ
+ −= + − + + = + −
M1 &M2 in MI: if2 = 10 S2= S1, N = 1
2
2 2
2
1 11 1 ln
1 1
fXf f
t f
iVi i
i
αα
φ
+ − = + − + + + −
Let us choose
M3 &M4 in WI: if3(4) <<1
2.93ln 18.7X
t
Veα α
φ≅ ⇒ = ≅
4 4
3 3
118.7 1 1 8.85
1
S S
S S
= + + ⇒ =
Output current: Iref=10 nA
ISHn-channel≅100 nA, I
SHp-channel≅40 nA
=1
=10 nA
2 2 2 2 110 nA 1 nA 0.01
S f SI i I S S= → = → = =
Let us choose if3=0.187 →→→→ [ ]4 3 4 3/ 1 2 / 0.01
f fi i S S= + = 4 4 4 4
10 nA 1 A 10S f S
I i I Sµ= → = → =
4
3 1.138.85
SS = =
pageCMOS Analog Design 21
MOS-AK/Baltimore, 2009
DESIGN OF A SBCS - Summary
S if ir
M1 0.01 30 10
M2 0.01 10 0
M3 1.13 0.187 0.01
M4 10 0.01 0
M8, M8(a) 1 0. 1 0
M9, M9(a) 1 0. 1 0
MP (all) 2.5 0.1 0
410S =
VFCM
=1
=10 nA
21 0.0S =
2.93X t
V φ= 2.93X t
V φ=
31.13S =1
1 0.0S =
pageCMOS Analog Design 22
MOS-AK/Baltimore, 2009
SBCS: IOUT vs. VDD AT CONSTANT TEMPERATURE1
1E. M. Camacho-Galeano et al. pp 2230-2233, ISCAS 2008
pageCMOS Analog Design 23
MOS-AK/Baltimore, 2009
REFERENCE
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