The RF Front-End Control Interface (RFFE) was developed to offer a common method for controlling RF front-end devices such as Power Amplifiers, Low-Noise Amplifiers (LNA), filters, switches, power management modules, antenna tuners and sensors that can be controlled using RFFE.
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1. Overview of MIPI RFFE By Dennis McCarty
2.
Overview of Arasan Chip Systems
RFFE Architecture
Core Features
Deliverables
Arasan Advantages
Arasan RFFE 3. Arasan Overview
A Total IP Solution offers everything you need to implement
standards
RTL
Analog Mixed Signal IP
Verification IP
Portable Software Drivers/Stacks
Protocol Test & Analyzers
HDKs
Technology Consulting
4. RFFE Background
MIPI
Mobile Industry Processor Interface
RFFE
Radio Frequency Front End specification
Addresses control needs of mobile devices using complex,
multiple transceiver systems
5. RFFE Overview
Two-wire, serial interface
Clock and Bi-directional data
A control standard for radio front-end components
including
power amplifiers, low-noise amplifiers, switches, sensors &
antenna tuners
Single master / multiple slave (current spec)
Multiple master /multiple slave (future rev)
6. RFFE vs. DigiRF
RFFE and DigiRF are very different
DigiRF specifies the interface between the baseband and RF
ICs
DigiRF offers a very high speed interface for carrying digital
RF IQ data and control information
DigiRF provides only a point-to-point configuration. Requires
multiple instantiations for complex configurations
7. RFFE supports point-to-multipoint connectivity for control of
the RF front-end RFFE is a dedicated, front-end control interface
for RF RFFE Attributes 8. RF (802.11) RFFE Architecture 9. Core
Features
Bus clock 26 MHz
Master supports up to 15 Slave devices
Slave - a simple design of ~500 gates
Low-overhead communication
Packet-based protocol
10. RFFE Compliance
Current to1.0 MIPI (rev. July 2010)
Will comply with 2.0, supporting multiple control channels, on
release
Arasan 1.0 core available June 2011
Only announced product in the market
11. Deliverables
RMM (Reuse Methodology Manual) compliant Verilog
Configurable Behavioral models
Verification Suite & Test Cases
Documentation and Design Support
User Guide & Test Plans
24/7 phone and email support
Optional on-site support
12.
Total Solution Features
Analog and Digital cores, with no gaskets or wrappers for
efficient, low-gate design
