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JETGI 3
Memoryo Is a storage device.
o Stores the data in the form of bits.
o A flip – flop or a latch is a basic element of memory.
o A group of flip – flops is called a register.
o A group of registers constitutes a memory.Ms. Ruchi Srivastava
JETGI 4
Memoryo The number of registers in a memory chip
determines the size of memory.
o The number of flip – flops in each register of a memory chip, determines the capacity of the memory.
o For example, a memory chip of 24 KB means – • There are 24 x 1024 registers in the memory chip, with• Each register having a capacity of storing 1 – byte of
data.
Ms. Ruchi Srivastava
JETGI 6
MemoryRegister 3Register 2Register 1Register 0
Output Buffer
Input Buffer
2 to
4
Deco
derA1
A2 00
01
10
11
I 7 I 6 I5 I4 I3 I2 I1 I0
O7 O6 O5 O4 O3 O2 O1 O0
WR
RD
Ms. Ruchi Srivastava
JETGI 7
Memory MapThe entire address ranges of all the memory chips in a microprocessor system, is called the Memory Map.
The memory map of a microprocessor system, depends on the number of address lines.
It is given as R = 2N
Where R – is address range And N – is number of address lines
Ms. Ruchi Srivastava
JETGI 8
Memory MapIn an 8085 – microprocessor, there are 16 address lines.
Therefore
It has a memory map of2 16
Or 65,536Or 64 K
Ranging from 0000H to FFFFHMs. Ruchi Srivastava
JETGI 9
Input & OutputDevices
Input and output devices are the means through which the MPU communicates with the outside world.
There are two methods by which I/O devices can be identified:
o I/Os with 8-bit addresses – Peripheral Mapped I/Oo I/Os with 16-bit addresses – Memory Mapped I/O
Ms. Ruchi Srivastava
JETGI 10
Logic Devices for Interfacing
1. Tri – State Deviceso The tri – state devices have three states:
• Logic 1• Logic 0• High Impedance
o It has a third line, called Enable; other than input and output lines.
• When this line is activated, the tri – state device works as an ordinary logic device.
• When this line is activated, the tri – state device goes into the high impedance state.
Ms. Ruchi Srivastava
JETGI 11
Logic Devices for Interfacing
2. Buffero The buffer is a logic circuit that amplifies the current
or power. o It has one input and one output lines.o It is used to increase the driving capability of a logic
circuit.o Examples of buffers:
1. 74LS244 – It is a one directional, tri – state octal buffer.
It is also called a line driver or line receiver.It is commonly used as a driver for the address bus.
Ms. Ruchi Srivastava
JETGI 12
Logic Devices for Interfacing
2. 74LS245 – It is a bi directional, tri – state octal buffer.
It is also called an octal bus transceiver.It is commonly used as a driver for the data bus.
3. Decoder o It is a logic circuit that decodes each combination of
signals present at its input; and o Responds by activating a single line at its output.o A decoder has N input lines and 2N output lines.o It is used for interfacing memory and I/O peripherals.
Ms. Ruchi Srivastava
JETGI 13
Logic Devices for Interfacing
4. Encoder o The encoders are logic circuits that provide an
appropriate code for each of the input signals.o For having a code of N – bits at output, It may have 2N
input signals.o It is used for encoding data coming from input devices,
such as key – board.
5. D Flip – Flopo It is a device that stores one bit of data.o It is also called a latch.o It is used for interfacing output devices.
Ms. Ruchi Srivastava
JETGI 14
Example of an 8085 based Computer
8085MPU
A0
A7 A8
A15
D7
D0 Control
High Order Address BusLow Order Address Bus
EPROM
R/WMemor
y
Input Output
RD RD WR EN EN
Data Bus
IOWIOR
MEMWMEMR
Ms. Ruchi Srivastava
JETGI 16
The 8085 MPU - ALU
It consists of –
• Arithmetic & Logic Circuit
• Accumulator
• Flag Register
• Temporary Register
Ms. Ruchi Srivastava
JETGI 17
The 8085 MPU - ALU
Arithmetic & Logic Circuit performs the required arithmetic or logical operation, according to instruction code.
Accumulator is an 8 – bit register.• It stores, one of the data, on which
arithmetic/logic operation is to be performed; and
• The result of the operation performed.
Ms. Ruchi Srivastava
JETGI 18
The 8085 MPU - ALU
The temporary register holds another data, during an arithmetic/logic operation.
The flag also, is an 8 – bit register.• Out of its 8 bits, only 5 bits are used.• These five bits are set or reset, according to the result of an
arithmetic/logic operation.• These five bits are named as
1. Carry (CY)2. Parity (P)3. Auxiliary Carry (AC) 4. Zero (Z)5. Sign (S)
Ms. Ruchi Srivastava
JETGI 19
The 8085 MPU - ALU
Following is shown the position of these bits in the flag register:
Carry Flag (CY) – Bit position – D0 It is set, if an arithmetic operation results in carry or borrow; Otherwise it is reset.
S Z AC P CY
Ms. Ruchi Srivastava
JETGI 20
The 8085 MPU - ALU
Parity Flag (CY) – Bit position – D2 It is set, if the result of an arithmetic operation has even number of 1s.Otherwise it is reset.
Auxiliary Carry Flag (AC) – Bit position – D4 It is set, when, in an arithmetic operation, carry is generated on bit D3 and passed on to bit D4.
Otherwise it is reset.Ms. Ruchi Srivastava
JETGI 21
The 8085 MPU - ALU
Zero Flag (Z) – Bit position – D6 It is set, if an ALU operation results in zero;Otherwise it is reset.
Sign Flag (S) – Bit position – D7 It is set, if bit D7 of the result of an ALU operation results is ‘1’;Otherwise it is reset.
Ms. Ruchi Srivastava
JETGI 22
The 8085 MPU – Register Array
It consists of –
• General Purpose Registers
• Special Purpose Registers
• Temporary Registers
Ms. Ruchi Srivastava
JETGI 23
The 8085 MPU – Register Array
General Purpose Registers: There are six general purpose registers - B, C, D, E, H, L. All these are 8 – bit registers.
Special Purpose Registers: There are two special purpose registers – Program Counter (PC) and Stack Pointer
(SP). Both these are 16 – bit registers. The Program Counter holds the address of the next instruction, to be fetched, and The Stack Pointer holds the address of the top of the stack.
Temporary registers: There are two temporary registers – W and Z. Both of these are 8 – bit registers. These are used to hold 8 – bit data during the execution of some instructions. These are internal registers and not available to the programmer.
Ms. Ruchi Srivastava
JETGI 24
The 8085 MPU – Instruction Decoder & Instruction Register
The Instruction Decoder and the Instruction Register, are actually part of ALU.
The instruction decoder is the circuit, that decodes the instruction that has been fetched from the memory; and establishes the sequence of events to follow.
The instruction register holds the instruction code, after it has been fetched from the memory.
Like, temporary registers, the instruction register also, is internal to the processor, and can not be accessed through any instruction, by the user.
Ms. Ruchi Srivastava
JETGI 25
The 8085 MPU – Timing and Control Unit
This unit synchronizes all the microprocessor operations with the clock,
And
Generates the control signals, necessary, for communication between the microprocessor and peripherals/memory.
Ms. Ruchi Srivastava
JETGI 26
Memory InterfacingTo connect a memory chip with the microprocessor, following are the requirements –
o A chip select logic on the memory chipo Read and Write control signalso Input and output bufferso A decoder or a set of decoderso Address lineso Data lines
Ms. Ruchi Srivastava
JETGI 27
Memory Interfacing
o The 8085 places the 16 – bit address on the address bus.
o The higher order of the address bus goes to a latch.
o The microprocessor issues the ALE signal, that enables the latch.
Ms. Ruchi Srivastava
JETGI 28
Memory Interfacing
o With the activation of latch, the higher order address, at its input, come at its output; and the bus becomes free to carry data.
o The higher order address from latch’s output and the lower order address from the lower order address bus, goes to the input of a decoder.
Ms. Ruchi Srivastava
JETGI 29
Memory Interfacing
o For each of the 216 input combinations, decoder possesses one output line.
o All these lines are connected to one memory register.
o For a particular combination one output line is activated.
Ms. Ruchi Srivastava
JETGI 30
Memory Interfacing
o This output line selects one particular memory register.
o Now the microprocessor issues a ‘0’ at IO/ , to enable the memory chip.
o Then after, the microprocessor issues or signal, according to the instruction.
M
RD WR
Ms. Ruchi Srivastava