8085 Microprocessor:Architecture & Support Components

Contents Pin diagram of 80858085 OperationsArchitecture of 80858085 Communication with Memory

Pinout Diagram of 8085A 40-pin ICSix groups of signalsAddress BusData BusControl and Status pinsPower Supply & frequency signalsExternally initiated SignalsSerial I/O ports

Logic Pinout of 8085Data BusAddress BusControl & StatusControl & StatusExternally initiated signalsSerial I/O portsPower Supply & frequency

8085 OperationsMicroprocessor Initiated OperationsInternal OperationsPeripheral/Externally Initiated Operations

Microprocessor Initiated OperationsMemory ReadMemory WriteI/O ReadI/O Write

Internal OperationsStore 8-bit data Perform Arithmetic and Logic OperationsTest for conditionsSequence the execution of instructionsStore/Retrieve data from stack during execution

Peripheral/Externally Initiated OperationsResetInterruptReadyHold

Architecture of 8085Power Supply a +5V DC power supplyMaximum clock frequency of 3MHz8-bit general purpose microprocessor16-bit Address BusCapable of addressing 64K of memory

Architecture of 8085

Architecture 0f 8085 ContALUTiming and Control UnitGeneral Purpose RegistersProgram Status wordProgram CounterStack PointerInstruction Register and Decoder

Interrupt ControlSerial I/O ControlAddress BusData Bus

Architecture 0f 8085 ContArithmetic Logic Unit (ALU)8085 has 8-bit ALUPerforms arithmetic & Logic operations on dataTiming & Control UnitGenerates timing and control signals General Purpose Registers8-bit registers (B,C,D,E,H,L)16-bit register pairs (BC, DE, HL,PSW)

Architecture 0f 8085 ContProgram Status Word (PSW)Accumulator and Flag Register can be combined as a register pair called PSW Instruction Register and DecoderInstruction fetched from memory is stored in Instruction register (8-bit register)Decoder decodes the instruction and directs the Timing & Control Unit accordingly

Architecture 0f 8085 ContInterrupt Control8085 has 5 interrupt signalsINTR general purpose interruptRST 5.5Restart InterruptsRST 6.5RST 7.5TRAP non-maskable interruptThe interrupts listed above are in increasing order of priority

Architecture 0f 8085 ContSerial I/O Control8085 has two signals for serial communicationSID Serial Input DataSOD Serial Output Data

Architecture 0f 8085 ContAddress BusUsed to address memory & I/O devices8085 has a 16-bit address busLower-order AddressHigher-order AddressData BusUsed to transfer instructions and data8085 has a 8-bit data busData Bus

A15A14A13A12A11A10A9A8AD7AD6AD5AD4AD3AD2AD1AD0

8085 Communication with MemoryInvolves the following three stepsIdentify the memory location (with address)Generate Timing & Control signalsData transfer takes place

Example: Memory Read Operation123

123

Timing Diagram

Demultiplexing Address/Data Bus8085 identifies a memory location with its 16 address lines, (AD0 to AD7) & (A8 to A15) 8085 performs data transfer using its data lines, AD0 to AD7Lower order address bus & Data bus are multiplexed on same lines i.e. AD0 to AD7.Demultiplexing refers to separating Address & Data signals for read/write operations

Need for Demultiplexing8085MemoryA8-A1520HAD0-AD705HRD4FH2005H

The 16-bit address of the memory location must be applied to the memory chip for the whole duration of the memory read/write operation.Lower-order address needs to be saved before microprocessor uses it for data transferNeed for Demultiplexing

8085 Interfacing with Memory chips8085MemoryInterfaceMemoryChipAddressDataControlAddressDataControl

8085 Interfacing with Memory chips8085MemoryInterfaceMemoryChipAD0-AD7ControlA0 A7Data74LS373A8-A15A8-A15ALE

8085 Interfacing with Memory chips8085MemoryInterfaceProgramMemoryAD0-AD7IO/MA0 A7Data74LS373A8-A15A8-A15ALERDRDCS

Memory Mapping8085 has 16-bit Address BusThe complete address space is thus given by the range of addresses 0000H FFFFHThe range of addresses allocated to a memory device is known as its memory map

Memory map: 64K memory deviceAddress lines required: 16 (A0 A15)Memory map: 0000H - FFFFHMemory map: 32K memory deviceAddress lines required: 15 (A0 A14)Memory map: depends on how address line A15 is connected

Memory device is selected only if IO/M = 0 & A15 = 0

So the memory map isA11 to A00. 0 0= 0000HA11 to A01. 111= 7FFFHto

0000

A15A14A13A12

0111

A15A14A13A12

Interfacing I/O devices with 8085Peripheral-mapped I/O&Memory-mapped I/O

Interfacing I/O devices with 80858085I/O InterfaceI/O DevicesMemory InterfaceMemory DevicesSystem Bus

Techniques for I/O InterfacingMemory-mapped I/OPeripheral-mapped I/O

Memory-mapped I/O8085 uses its 16-bit address bus to identify a memory locationMemory address space: 0000H to FFFFH8085 needs to identify I/O devices alsoI/O devices can be interfaced using addresses from memory space8085 treats such an I/O device as a memory locationThis is called Memory-mapped I/O

Peripheral-mapped I/O8085 has a separate 8-bit addressing scheme for I/O devicesI/O address space: 00H to FFHThis is called Peripheral-mapped I/O or I/O-mapped I/O

8085 Communication with I/O devicesInvolves the following three stepsIdentify the I/O device (with address)Generate Timing & Control signalsData transfer takes place8085 communicates with a I/O device only if there is a Program Instruction to do so

1.Identify the I/O device (with address)Memory-mapped I/O (16-bit address)Peripheral-mapped I/O (8-bit address)

2.Generate Timing & Control SignalsMemory-mapped I/OReading Input: IO/M = 0, RD = 0Write to Output: IO/M = 0, WR = 0Peripheral-mapped I/OReading Input: IO/M = 1, RD = 0Write to Output: IO/M = 1, WR = 0

3. Data transfer takes place

8085 Communication with I/O devicesInvolves the following three stepsIdentify the I/O device (with address)Generate Timing & Control signalsData transfer takes place8085 communicates with a I/O device only if there is a Program Instruction to do so

Peripheral I/O InstructionsIN InstructionInputs data from input device into the accumulator It is a 2-byte instructionFormat: IN 8-bit port addressExample: IN 01H

OUT InstructionOutputs the contents of accumulator to an output deviceIt is a 2-byte instructionFormat: OUT 8-bit port addressExample: OUT 02H

----------Example Program----------WAP to read a number from input port (port address 01H) and display it on ASCII display connected to output port (port address 02H)IN 01H;reads data value 03H (example)into ;accumulator, A = 03HMVI B, 30H;loads register B with 30HADD B;A = 33H, ASCII code for 3OUT 02H;display 3 on ASCII display

Memory-mapped I/O InstructionsI/O devices are identified by 16-bit addresses8085 communicates with an I/O device as if it were one of the memory locationsMemory related instructions are usedFor e.g. LDA, STALDA 8000HLoads A with data read from input device with 16-bit address 8000HSTA 8001HStores (Outputs) contents of A to output device with 16-bit address 8001H

----------Example Program----------WAP to read a number from input port (port address 8000H) and display it on ASCII display connected to output port (port address 8001H)LDA 8000H;reads data value 03H (example)into ;accumulator, A = 03HMVI B, 30H;loads register B with 30HADD B;A = 33H, ASCII code for 3STA 8001H;display 3 on ASCII display

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