IC Design ofPower Management Circuits (III)

Wing-Hung KiIntegrated Power Electronics Laboratory

ECE Dept., HKUSTClear Water Bay, Hong Kong

www.ee.ust.hk/~eeki

International Symposium on Integrated CircuitsSingapore, Dec. 14, 2009

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Part III

Switching Converters:Stability and Compensation

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Stability and Compensation

Nyquist criteriaSystem loop gainPhase margin vs transient responseType I, II, III compensatorsCompensation for voltage mode controlCompensation for current mode control

Content

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Consider the feedback system:

Feedback Systems

F(s)in

G(s)

out

Note that F(s) and G(s) are ratios of polynomials in s, that is,

= F

F

n (s)F(s)

d (s)= G

G

n (s)G(s)

d (s)

The closed loop transfer function is

= = =+ +

out F(s) F(s)H(s)

in 1 F(s)G(s) 1 T(s)

and the loop gain is

= =n(s)

T(s) F(s)G(s)d(s)

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Stability Criteria

Local stability: all poles of T(s) (= all roots of d(s)) are in LHP

System stability:∗

all poles of H(s) are in LHP⇒

all zeros of (1+T(s)) are in LHP⇒

all roots of (n(s)+d(s)) are in LHP

If all functional blocks satisfy local stability, the Nyquist criterion for system stability is:

∗

Nyquist plot of 1+T(s) does not encircle (0,0)⇒

Nyquist plot of T(s) does not encircle (-1,0)

If all functional blocks satisfies local stability, the Bode plot criteria for system stability is:

phase margin φm >0o and gain margin GM>0dB

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1st Order Loop Gain Function

=+

o

1

TT(s)

s1p

+ω = 0ω = +∞

1−1

oTRe

Im

unit circle

oT / 2

o-45

−∞

0

−0

ωUGF

oT

ωUGF

| T |

/ A

ω

ω

− o90

1p

− o45

1p

Nyquist Plot

Bode Plots

stable

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2nd Order Loop Gain Function

=⎛ ⎞⎛ ⎞

+ +⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

o

1 2

TT(s)

s s1 1p p

−1 oTRe

Im

0

ωUGF

oT

ωUGF

| T |

/ A

ω

ω

− o90

2p

− o180φm

1p

φm

Nyquist Plot

Bode Plots

stable

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3rd Order Loop Gain Function

=⎛ ⎞⎛ ⎞ ⎛ ⎞

+ + +⎜ ⎟⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠ ⎝ ⎠

o

1 2 3

TT(s)

s s s1 1 1p p p

−1 oTRe

Im

0

ωUGF

oT

ωUGF

| T |

/ A

ω

ω

− o90

2p

− o180φ <m 0

1p

φm

Nyquist Plot

Bode Plots

unstable(encirclement

of -1)

3p

− o270

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Observations on Loop Gain Function

• 1st order systems are unconditional stable.

• 2nd order systems are stable, but a high damping factor would cause large overshoot and excessive ringing before settling to the steady state.

• For 3rd order systems, if the 3rd pole p3 is less than 10X of the unity gain frequency ωUGF , the system is unstable.

Hence, for a stable system, the loop gain function could be approximated by a 2nd order loop gain function with the 2nd pole p2 usually larger than ωUGF to achieve small overshoot.

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Loop Gain Function and Transient Response

The transient response of a feedback system is given by

where L-1(⋅) is the inverse Laplace transform of (⋅).

The exact transient response is affected by F(s), however, if only T(s) is considered, we may consider the modified feedback system:

− − ⎛ ⎞⎛ ⎞= × ×⎜ ⎟ ⎜ ⎟+⎝ ⎠ ⎝ ⎠1 1

o1 1 F(s)v (s) H(s)s s 1 T(s)

L = L

F(s)in

G(s)

out T(s)in '

1

out '

=+F(s)

H(s)1 T(s)

=+T(s)

H'(s)1 T(s)

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For a loop gain function approximated by a 2-pole function:

= ≈⎛ ⎞⎛ ⎞ ⎛ ⎞

+ + +⎜ ⎟⎜ ⎟ ⎜ ⎟ω⎝ ⎠⎝ ⎠ ⎝ ⎠

o

1 2 UGF 2

T 1T(s)

s s s s1 1 1p p p

ωUGF

The closed loop function (with unity gain feedback) is

2p

− o90

− o180φm

= =+

+ +ω ω

2

UGF UGF 2

T(s) 1H'(s)

1 T(s) s s1p

| T |

/ T

=+ +

ω ω

2

2o o

1H'(s)

1 s s1Q

Write H'(s) in standard 2nd order form:

ω = ωo UGF 2p

ω= UGF

2

Qp

Compensator Considerations

1p

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Relationship between p2 /ωUGF and φm

ω2

UGF

p ω=UGF

2

1p k

π−

−24Q 1e−φω

1 2m

UGF

p=tan

k Q overshoot phase margin

1

≈2.73 3

=3 1.73

1 0.163 o45

o70

o60

o30=1 / 3 0.577

≈0.605 0.6 0.01

0.76 0.064

1.316 0.275

Note that φm =60o gives an overshoot of 6.4%, and the 1% settling time (tset ) would be very long. By setting p2 =3ωUGF , then φm =70o, and the overshoot is only 1%.

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Type I Compensator (0Z1P)

1R1C

inV

= − = −out

in 1 1

V 1A(s)

V sC R

outVrefV

ω =UGF1 1

1C R

− o180

− o90

| A |

/ A

The simplest Type I compensator is an integrator with ωUGF = 1/C1 R1.

Assume Aop (s) is first order with ωt >> 1/C1 R1 :

= ≈+ ω ω

opop

1 t

A 1A (s)1 s / s /

⇒ ≈+ ω1 1 t

1A(s)sC R (1 s / )

ωt

ω

ω

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Type I compensator can be implemented using transconductance amplifier (OTA). OTA has a very high output resistance ro and cannot drive resistive loads.

mg

or oC

inVoutV

refV

= − = −+

out m o

in o o

V g rA(s)

V 1 sC r

Type I Compensator (0Z1P)

m og r o o1 / C r

ω = mUGF

o

gC

| A |

/ A

Using OTA may save one IC pin.

ω

ω

− o90

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1R1C

inVoutV

refV

+= −

+ +out 2 2

in 1 2 1 1 2 2

V 1 sC RV s(C C )R [1 s(C || C )R ]

2R2C

+≈ <<

+2 2

1 22 1 1 2

(1 sC R )A(s) (C C )

sC R (1 sC R )

Type II Compensator (1Z2P)

1 2

1C R2 2

1C R

2 11 /C R

ω =UGF

1 11 / C R

| A |

/ A

o90 phaseboosting

Type II compensator consists of a pole-zero pair with ωz <ωp , and a maximum phase boosting of 90o is possible.

ω

ω

− o90

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mg

or

2C

inVoutV

refV2R

+= − = −

+ +out m o 2 2

in 2 o 2

V g r (1 sC R )A(s)

V 1 sC (r R )

+≈

+m o 2 2

2 o

g r (1 sC R )A(s)

(1 sC r )

Type II Compensator (1Z1P)

m og r

2 2

1C R

2 o

1C r

Type II compensator can also be implemented using OTA.

ω = mUGF

2

gC

| A |

/ A

ω

ω

− o90

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1R

1C

inVoutV

refV

+ + += −

+ + +out 2 2 3 1 3

in 1 2 1 1 2 2 3 3

V (1 sC R )[1 sC (R R )]V s(C C )R (1 sC || C R )(1 sC R )

2R2C

3R3C

Type III Compensator (2Z3P)

+ +≈

+ +2 2 3 1

2 1 1 2 3 3

1 2 1 3

(1 sC R )(1 sC R )A(s)

sC R (1 sC R )(1 sC R )

(C <<C , R >>R )

1 2

1C R

2 2

1C R

2 1

1C R

3 3

1C R

o180boosting

− o90

| A |

/ A

ω

=UGF

1 3

1C R

3 1

1C R

Type III compensator consists of two pole-zero pairs, and phase boosting of 180o is possible to compensate for complex poles.

ω

ω

+ o90

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PWM Voltage Mode Control

S

RQ

Q

refVA(s)

EACMP

gV

oV

ckramp

L

CLR

1R

2R

obVav

av

PM

NM

A regulated switching converter consists of the power stage and the feedback circuit.

For a buck converter, if an on-chip charge pump is not available, then the NMOS power switch is replaced by a PMOS power switch.

avramp

ck

Q

Q

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Loop Gains of Voltage Mode CCM Converters

The system loop gain is T(s) = A(s)×H(s), where A(s) is the frequency response of the EA (compensator). Loop gains of voltage mode PWM CCM converters with trailing-edge modulation are compiled. Parasitic resistances except ESR are excluded [Ki 98].

+= ×

+ +

o esr

2m

L

bV 1 sCRT(s) A(s) .

sLDV 1 s LCR

Buck:

Boost:

Buck-boost:

−= ×

+ +

2o L

2m

2 2L

bV [1 sL / (D ' R )]T(s) A(s) .

D ' V sL s LC1D' R D'

−= ×

+ +

2o L

2m

2 2L

b | V | [1 sDL / (D ' R )]T(s) A(s) .

DD' V sL s LC1D' R D '

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Voltage Mode Compensation (1)

Example: Consider a buck converter with the following parameters:

Vdd =4.2V, Vo =1.8V (D=0.429), Vm =0.5V, b=0.667L=2μH, C=3.3μF, RL =1.8Ω

(Io =1A), Resr =100mΩ, fs =1MHz

The system loop gain is given by

× + × × += ⋅ =

+ + + +ω ω

2 2

2 2o o

5.6 [1 s /(3M)] A(s) 5.6 [1 s /(3M)]T(s) A(s)

1 s s 1 s s1 12.3 390k Q(390k)

The system loop gain consists of a pair of complex poles, and one strategy is to use dominant pole compensation.

For a buck converter, the complex pole frequency ωo /2π

is 10 to 30 times lower than the switching frequency fs .

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Voltage Mode Compensation (2)

60

40

20

0dB

=+1330

A(s)1 s /10

⇒5.6 15dB390k

3M1M 10M100k10k1k10010

80

0.1 1

− o90

− o180

=1330 62.5dB

− o270

/H(s)/ A(s)

o0 ω

ω

× +=

+ +2

2

5.6 (1 s /3M)H(s)

1 s s12.3 390k (390k)

Dominant pole compensation

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Voltage Mode Compensation (3)

60

40

20

0dB

× +=

⎛ ⎞+ + +⎜ ⎟

⎝ ⎠

2

2

7500 (1 s /3M)T(s)

1 s s(1 s /10) 12.3 390k 390k

390k

3M

1M 10M100k10k1k10010

80

0.1 1

− o90

− o180

=7500 77.5dB

− o270

/H(s)

/ T(s)

φ =mo90

ω=

UGF75k

o0 ω

ω

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Stability inferred from Line and Load Transients

Measuring loop gain could be difficult, and for some circuits, and especially integrated circuits, due to loading effect and that loop- breaking points may not be accessible, stability is inferred by simulating or measuring the line transient and/or load transient.

If the circuit is stable and has adequate phase margin, line and load transients will show first order responses.

If the circuit is stable but has a phase margin less than 70o, line and load transients will show minor ringing.

If the circuit is unstable, line and load transient will show serious ringing/oscillation.

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Current Mode PWM with Compensation Ramp

In practice, the output of EA (Va ) should not be tempered, and a compensation ramp of +mc is added to m1 instead.

S

RQ

Q

refVA(s)

EACMP

ddV

oV

ck

L

CLR

1R

2R

obVav

i

i /N

fNR

PM

NM

V2I

ramp from OSCav

DT

1 c f(m m )R+ 2 c f(m m )R− −

bvbv

compensationramp

ddV

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Loop Gain of Current Mode Buck Converter (1)

The loop gain of a current-mode CCM buck converter with trailing- edge modulation is shown below. Others can be found in [Ki 98].

Buck:( )× +

= ×⎛ ⎞ ⎛ ⎞−

+ + + +⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

esrf 1

2 1

L 1 1 L

1 1b 1 sCRCR n D' T

T(s) A(s)(n D ' D)T1 1 1 1 1s s

CR n D' T n D' T C R L

The two poles are in general real.

−= + > ⇒ >c 2

1 c 11

m m 2 Dwith n 1 , m nm 2 2D'

<L2Land R

D ' T

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Loop Gain of Current Mode Buck Converter (2)

If the poles are real and far apart, the denominator could be simplified.

Buck: + ω= ×

⎛ ⎞⎛ ⎞+ +⎜ ⎟⎜ ⎟ω ω⎝ ⎠⎝ ⎠

L a z

f

a t1

R ||R 1 s /T(s) A(s) b. .

R s s1 1

= = +−

ca 1

1 1

mLR n 1

(n D ' D)T m

For two real poles that are farther apart, pole-zero compensation could be used to extend the bandwidth.

ω = ω = ω =z a t1c L a 1

1 1 1 CR C(R ||R ) n D ' T

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Example: Consider a current mode buck converter with the same parameters as those of the voltage mode converter for comparison.

Vdd = 4.2V, Vo = 1.8V (D = 0.429), b = 0.667, fs = 1MHz, Rf = 1ΩL = 2μH, C = 3.3μF, RL = 1.8Ω

(Io =1A), Resr = 100mΩ, mc = m2

+= ×

⎛ ⎞⎛ ⎞+ +⎜ ⎟⎜ ⎟⎝ ⎠ ⎝ ⎠

0.8(1 s /3M)T(s) A(s)s s1 1

290k 880k

Current Mode Compensation (1)

⇒

n1 =1.75, 1/n1 D’T ≈

1/1μ

The system loop gain is given by

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We may assume the poles are far apart and use the simplified equation, and we have

+= ×

⎛ ⎞⎛ ⎞+ +⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

0.8(1 s /3M)T(s) A(s)s s1 1

250k 1M

Current Mode Compensation (2)

n1 =1.75, Ra =3.5Ω, ωz =3M rad/s, ωa =250k rad/s, ωt1 =1M rad/s

The system loop gain is then given by

Instead of a pair of complex poles as in voltage mode control, two separate poles are obtained, and both dominant-pole compensation and pole-zero compensation could be employed.

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Current Mode Compensation (3)

60

40

20

0dB

=+10000

A(s)(1 s /10)

⇒ −0.8 2dB250k

1M 10M100k

10k1k10010

H(s)

1

− o90

− o180

/H(s)

o0 ω

ω

−20

1M

3M

80Dominant pole compensation

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Current Mode Compensation (4)

60

40

20

0dB250k

1M 10M100k10k1k100101

− o90

− o180/ T(s)

o0 ω

ω

−20

1M

80

ω=

UGF80k

⇒8000 78dB

φ=

mo70

× +=

+ + +8000 (1 s /3M)

T(s)(1 s /10)(1 s /250k)(1 s /1M)

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Pole-zero cancellation

− o90/H(s)

o0 ω

/ A(s)

1M 10M100k10k1k100101ω

60

40

20

0dB

250k 3M

H(s)−20

+=

+(1 s /250k)

A(s)(s /375k)(1 s /3M)

375k

Current Mode Compensation (5)

− o180

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Bandwidth increased by 4 times to 300k rad/s

1M 10M100k10k1k100101

− o90

− o180

o0 ω

ω

60

=+

1T(s)

(s / 300k)(1 s /1M)40

20

0dBω =UGF 300k

φ=

mo70

/ T(s)

Current Mode Compensation (6)

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References: Switching Converter Compensation

[Brown 01] M. Brown, Power Supply Cookbook, EDN, 2001.

[Ki 98] W. H. Ki, "Signal flow graph in loop gain analysis of DC-DC PWM CCM switching converters," IEEE Trans. on Circ. and Syst. 1, pp.644-655, June 1998.

[Ma 03a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode", IEEE J. of Solid-State Circ., pp.89-100, Jan. 2003.

[Ma 03b] D. Ma, W. H. Ki and C. Y. Tsui, "A pseudo-CCM / DCM SIMO switching converter with freewheel switching," IEEE J. of Solid-State Circ., pp.1007- 1014, June 2003.

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SUPPLEMENTS

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Voltage Mode Converters: Loop Gain Function

In discussing fast-transient converters, one important parameter is the loop bandwidth.

The loop gain function of the buck converter with voltage mode control operating in CCM ignoring ESR is given by [Ki 98]

T(s) o

2m

L

bV 1A(s) .sLDV 1 s LCR

= ×+ +

The resonance frequency ωo and the pole-Q are

oω1LC

= Q CRL

=

The converter enters DCM at

L(BCM)R 2LD'T

= ⇒ BCMQo

2 1D ' T

=ω

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For voltage mode buck, the ripple voltage is given by

If ΔVo /Vo =0.01 and D=0.5, then the complex pole pair is at

Δ o

o

VV 2

s

D ' 18 LCf

=

To have adequate gain margin GM, say, 6dB, the unity gain bandwidth fUGF has to be reduced by 10×2=20 times:

oω s0.4f=

Voltage Mode Converters: Bandwidth Limitation

andBCMQ

o

2 1 10D ' T

= =ω

ofo sf

2 16ω

= ≈π

⇒

If fs =1MHz, then fUGF is at around fs /320 = 3.125kHz.

UGFf s s1 f f20 16 320

= × =

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VM Buck: Loop Gain Function with Rδ

The unity gain frequency fUGF of fs /320 is too low. Fortunately (or unfortunately), the converter inevitably has parasitic resistors such as RESR , Rℓ

(inductor series resistor), Rs (switch resistance) and Rd (diode resistance), and the loop gain function is [Ki 98]

T(s)

δ

≈ ×⎛ ⎞

+ + +⎜ ⎟⎝ ⎠

o

2m

L

bV 1A(s) .DV L1 s CR s LC

Rwhere

Rδ ESR s dR R DR D'R≈ + + +

This Rδ

is at least 200mΩ, thus reducing QBCM to around 3. With GM to be 6dB, fUGF is reduced by 3×2=6 times, and

If fs =1MHz, then fUGF is at around fs /100 = 10kHz.

UGFf s s1 f f6 16 100

= × ≈

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ωsωUGF

ω

ω

− o90

− o270

− o180

o0

|T|

/T

0dB

20dB

40dB

60dB

ωo

φm

− o45 / dec

o-180 ×Q/dec

=GM 6dB

oT

VM Buck: Dominant Pole Compensation

-20dB/dec

-60dB/dec

100X

ωp (dominant pole)

Ki 39

Current Mode Converters: Loop Gain Function

The loop gain function of the buck converter with current mode control operating in CCM ignoring ESR is given by [Ki 98]

T(s)

In general, the two poles are real, as discussed next.

−= + > ⇒ >c 2

1 c 11

m m 2 Dn 1 , m nm 2 2D'

f 1

2 1

L 1 1 L

1 1A(s)bCR n D' T

(n D ' D)T1 1 1 1 1s sCR n D' T n D' T C R L

×=

⎛ ⎞ ⎛ ⎞−+ + + +⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠

L(BCM)R 2LD'T

=

with

and

Ki 40

To compute the upper limit of fUGF w.r.t. fs , we simplify the current mode case as follows. Let D=0.5 and choose n1 =2 such that sub-harmonic oscillation could be suppressed even for D=0.667. The loop gain function at heavy load is

Current Mode Converters: Bandwidth Limitation

T(s) ≈+ +

L

f L

R 1A(s)bR (1 sCR )(1 sT)

At RL(BCM) =2L/D’T,

BCMT (s) ≈+ +

L(BCM)

f

R 1A(s)bR (1 s8T)(1 sT)

Pole-zero cancellation at ω1 =1/CRL should be done at the highest load current Iomax (smallest load resistance). To achieve φm of 70o, fUGF should be 3 times lower than f2 , and fUGF ≈

fs /20. Hence, a current mode converter could have a unity gain frequency 5 times higher than its voltage mode counterpart.