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Subject Name Code Credit Hours Digital Electronics and Logic Design DEL-244 3 Digital Electronics and Logic Design Logic Gates

Chap iii-Logic Gates

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Page 1: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Digital Electronics and Logic DesignLogic Gates

Page 2: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Logic Gates

• A logic gate is an electronic circuit/device which makes the logical decisions. To arrive at this decisions, the most common logic gates used are OR, AND, NOT, NAND, and NOR gates. The NAND and NOR gates are called universal gates. The exclusive-OR gate is another logic gate which can be constructed using AND, OR and NOT gate.

• Logic gates have one or more inputs and only one output. The output is active only for certain input combinations. Logic gates are the building blocks of any digital circuit. Logic gates are also called switches.

2

Page 3: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

3

Basic logic gates• Not

• And

• Or

• Nand

• Nor

• Xor

xx

xy

xy xy

xyz

zx+yx

yxy

x+y+z

z

xy

xy

x+yxy

xÅyxy

Page 4: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Digital Electronics and Logic Design

Logic Gates

Page 5: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

AND FunctionOutput Y is TRUE if inputs A AND B are TRUE, else it is FALSE.

Logic Symbol

Text Description

Truth Table

Boolean Expression

ANDA

BY

INPUTS OUTPUT

A B Y 0 0 0 0 1 0 1 0 0 1 1 1

AND Gate Truth Table

Y = A x B = A • B = AB

AND Symbol

Page 6: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

OR FunctionOutput Y is TRUE if input A OR B is TRUE, else it is FALSE.

Logic Symbol

Text Description

Truth Table

Boolean Expression Y = A + B

OR Symbol

A

BYOR

INPUTS OUTPUT

A B Y 0 0 0 0 1 1 1 0 1 1 1 1

OR Gate Truth Table

Page 7: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NOT Function (inverter)Output Y is TRUE if input A is FALSE, else it is FALSE. Y is the inverse of A.

Logic Symbol

Text Description

Truth Table

Boolean Expression

INPUT OUTPUT

A Y 0 1 1 0

NOT Gate Truth Table

A YNOT

NOT Bar

Y = AY = A’

Alternative Notation

Y = !A

Page 8: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NAND FunctionOutput Y is FALSE if inputs A AND B are TRUE, else it is TRUE.

Logic Symbol

Text Description

Truth Table

Boolean Expression

A

BYNAND

A bubble is an inverterThis is an AND Gate with an inverted output

Y = A x B = AB

INPUTS OUTPUT

A B Y 0 0 1 0 1 1 1 0 1 1 1 0

NAND Gate Truth Table

Page 9: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NOR FunctionOutput Y is FALSE if input A OR B is TRUE, else it is TRUE.

Logic Symbol

Text Description

Truth Table

Boolean Expression Y = A + B

A

BYNOR

A bubble is an inverter.This is an OR Gate with its output inverted.

INPUTS OUTPUT

A B Y 0 0 1 0 1 0 1 0 0 1 1 0

NOR Gate Truth Table

Page 10: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

10

Page 11: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

OR

A

Y

NOT

ANDB

CAND

2# of Inputs = # of Combinations

2 3 = 8

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

Page 12: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

OR

A

Y

NOT

ANDB

CAND

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0

0

0

0

10

0

0

Page 13: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0

OR

A

Y

NOT

ANDB

CAND

0

0

1

0

11

1

1

Page 14: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010

OR

A

Y

NOT

ANDB

CAND

0

1

0

0

10

0

0

Page 15: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010

0

OR

A

Y

NOT

ANDB

CAND

0

1

1

0

11

1

1

Page 16: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0101

0

OR

A

Y

NOT

ANDB

CAND

1

0

0

0

00

0

0

Page 17: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

01010

0

OR

A

Y

NOT

ANDB

CAND

1

0

1

0

00

0

0

Page 18: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010100

0

OR

A

Y

NOT

ANDB

CAND

1

1

0

1

00

1

1

Page 19: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Circuit-to-Truth Table Example

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0101001

0

OR

A

Y

NOT

ANDB

CAND

1

1

1

1

00

1

1

Page 20: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NAND Gate – Special Application

INPUTS OUTPUT

A B Y0 0 10 1 11 0 11 1 0

A

BYNAND

TNANDS

S T

00

1

0 1

1 0

Equivalent To An Inverter Gate

Page 21: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NOR Gate - Special Application

S T

00

1

0 1

1 0

Equivalent To An Inverter Gate

TS NOR

A

BYNOR

INPUTS OUTPUT

A B Y0 0 10 1 01 0 01 1 0

Page 22: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Boolean logic

22

Page 23: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 23

Chapter 3 Objectives

• Understand the relationship between Boolean logic and digital computer circuits.

• Learn how to design simple logic circuits.

• Understand how digital circuits work together to form complex computer systems.

Page 24: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 24

3.2 Boolean Algebra

Page 25: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3Boolean Functions to Logic Circuits• Any Boolean expression can be converted to a logic

circuit made up of AND, OR and NOT gates.step 1: add parentheses to expression to fully define order

of operations - A+(B×(C ))step 2: create gate for “last” operation in expression

gate’s output is value of expressiongate’s inputs are expressions combined by

operation

A A+B×C(B×(C))

step 3: repeat for sub-expressions and continue until done Number of simple gates needed to implement expression equals number of operations in

expression.– so, simpler equivalent expression yields less expensive circuit– Boolean algebra provides rules for simplifying expressions

Page 26: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Basic Identities of Boolean Algebra 1. X + 0 = X 3. X + 1 = 1 5. X + X = X 7. X + X ’ = 1 9. (X ’)’ = X10. X + Y = Y + X12. X+(Y+Z ) = (X+Y )+Z

14. X(Y+Z ) = X×Y + X×Z

16. (X + Y ) = X ×Y

2. X×1 = X 4. X×0 = 0 6. X×X = X 8. X×X ’ = 0

11. X×Y = Y×X13. X×(Y×Z ) = (X×Y )×Z15. X+(Y×Z ) = (X+Y )×(X+Z )17. (X×Y)’ = X +Y

commutative

associative

distributive

DeMorgan’s

Identities define intrinsic properties of Boolean algebra. Useful in simplifying Boolean expressions

Page 27: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Verifying Identities Using Truth Tables

• Can verify any logical equation with small number of variables using truth tables.

• Break large expressions into parts, as needed.

X+(Y×Z ) = (X+Y )×(X+Z )Y×Z

00010001

XYZ000001010011100101110111

X+(Y×Z )00011111

X+Y00111111

X+Z01011111

(X+Y )×(X+Z )00011111

(X + Y ) = X ×Y XY00011011

X ×Y 1000

(X + Y )1000

Page 28: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

DeMorgan’s Law

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Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3DeMorgan’s Laws for n Variables• We can extend DeMorgan’s laws to 3 variables by

applying the laws for two variables.(X + Y + Z ) = (X + (Y + Z )) - by associative law

= X ×(Y + Z )- by DeMorgan’s law

= X ×(Y ×Z ) - by DeMorgan’s law

= X ×Y ×Z - by associative law

(X×Y×Z) = (X×(Y×Z )) - by associative law

= X + (Y×Z ) - by DeMorgan’s law

= X + (Y + Z ) - by DeMorgan’s law

= X + Y + Z - by associative law

• Generalization to n variables.–(X1 + X2 + × × × + Xn) = X 1×X 2 × × × X n

–(X1×X2 × × × Xn) = X 1 + X 2 + × × × + X n

Page 30: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3Simplification of Boolean Expressions

F=X YZ +X YZ +XZ

Y

Z

X

Y

Z

X

Y

Z

X

F=X Y(Z +Z )+XZ

by identity 14

F=X Y×1+XZ =X Y +XZ by identity 2

by identity 7

Page 31: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

The Duality Principle• The dual of a Boolean expression is obtained by

interchanging all ANDs and ORs, and all 0s and 1s.– example: the dual of A+(B×C )+0 is A×(B+C )×1

• The duality principle states that if E1 and E2 are Boolean expressions then

E1= E2 dual (E1)=dual (E2)

where dual(E) is the dual of E. For example,A+(B×C )+0 = (B ×C )+D A×(B+C )×1 = (B +C )×D

Consequently, the pairs of identities (1,2), (3,4), (5,6), (7,8), (10,11), (12,13), (14,15) and (16,17) all follow from each other through the duality principle.

Page 32: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

32

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Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3Sum of Products Form• Minterm: If a product term (AND) of a function of ‘n’

variables, contain all the variables in complemented form or uncomplemented form, then it is called a “minterm” or “standard product”.

Sum of product method:• The four possible ways to AND two input signals that are in

complemented and• uncomplemented from. These outputs are called

fundamental products. The following table lists• each fundamental product next to the input conditions

producing a high input for instance, AB is • high when A and B are low. AB is high when A is high and so

on.• • A B FUNDAMENTAL PRODUCT• 0 0 A’ B’• 0 1 A’ B• 1 0 A B’• 1 1 A B

Page 34: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Product of Sums Form• The product of sums is the second standard form for

Boolean expressions.product-of-sums-expression = s-term × s-term ... × s-term

s-term = literal + literal + ××× + literal

Example. (X +Y +Z )(X +Z )(X +Y )(X +Y +Z )

• A maxterm is a sum term that contains every variable, in complemented or uncomplemented form.Example. in exp. above, X +Y +Z is a maxterm, but X +Z is not

• A product of maxterms expression is a product of sums expression in which every term is a maxtermExample. (X +Y +Z )(X +Y+Z )(X+Y+Z )(X+Y+Z ) is product of maxterms

expression that is equivalent to expression above

Page 35: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

take the whole compliment, since POS is a dual to the SOP form, In the following we apply de-morgan's laws which are : (a+b)' = a' b' ; (ab)' = a' + b' (A’CD + E’F + BCD)' = (A'CD + E'F)' * (BCD)' = (A'CD)' * (E'F)' * (BCD)' = ((A')' + C' + D' ) * ( (E')' + F' ) * (B' + C' + D') = (A + C' + D' ) * ( E + F') * (B' + C' + D')

which is the product of sums, that is POS form!

Page 36: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

NAND and NOR Gates(Universal Gates)

• In certain technologies (including CMOS), a NAND (NOR) gate is simpler & faster than an AND (OR) gate.

• Consequently circuits are often constructed using NANDs and NORs directly, instead of ANDs and ORs.

• Alternative gate representations makes this easier.

XY (X×Y)NAND Gate (X+Y)X

YNOR Gate

= =

==

Page 37: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3Exclusive Or and Odd Function

• The odd function on n variables is 1 when an odd number of its variables are 1.– odd(X,Y,Z ) = XY Z + X Y Z + X Y Z + X Y Z = X Y Z– similarly for 4 or more variables

• Parity checking circuits use the odd function to provide a simple integrity check to verify correctness of data.– any erroneous single bit change will alter value of odd

function, allowing detection of the change

EXOR gate Alternative Implementation

A

B

The EXOR function is defined by AB = AB + AB.

AAB +AB

B

Page 38: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 38

3.3 Logic Gates• NAND and NOR are known as

universal gates because they are inexpensive to manufacture and any Boolean function can be constructed using only NAND or only NOR gates.

• Gates can have multiple inputs and more than one output.A second output can be provided for

the complement of the operation.We’ll see more of this later.

Page 39: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 39

3.4 Digital Components• Combinations of gates implement Boolean functions.

• The circuit below implements the function:

• This is an example of a combinational logic circuit.• Combinational logic circuits produce a specified output

(almost) at the instant when input values are applied.Later we’ll explore circuits where this is not the case.

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Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 40

3.5 Combinational Circuits

• As we see, the sum can be found using the XOR operation and the carry using the AND operation.

• Combinational logic circuits give us many useful devices.

• One of the simplest is the half adder, which finds the sum of two bits.

• We can gain some insight as to the construction of a half adder by looking at its truth table, shown at the right.

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Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 41

3.5 Combinational Circuits

• We can change our half adder into to a full adder by including gates for processing the carry bit.

• The truth table for a full adder is shown at the right.

FULL ADDERHALF ADDER

Page 42: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 42

3.5 Combinational Circuits• Just as we combined half adders to make a full adder,

full adders can connected in series.

• The carry bit “ripples” from one adder to the next; hence, this configuration is called a ripple-carry adder.

74LS283

This is a 4-bit adder that you can program as part of your Project.

Page 43: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 43

3.5 Combinational Circuits• Decoders are another important type of combinational circuit.• Among other things, they are useful in selecting a memory location based on

a binary value placed on the address lines of a memory bus.• Address decoders with n inputs can select any of 2n locations.

• This is what a 2-to-4 decoder looks like on the inside.

If x = 0 and y = 1, which output line is enabled?

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Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 44

3.6 Sequential Circuits• Another modification of the SR flip-flop is the D flip-flop, shown below with its

characteristic table.

• The output of the flip-flop remains the same during subsequent clock pulses. The output changes only when the value of D changes.

• The D flip-flop is the fundamental circuit of computer memory. D flip-flops are usually illustrated using the

block diagram shown here.

The previous state doesn’t matter. Totally dependent on state of D

Page 45: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 45

Appendix - 3.2 Boolean Algebra

• Boolean algebra is a mathematical system for the manipulation of variables that can have one of two values.– In formal logic, these values are “true” and “false.”– In digital systems, these values are “on” and “off,” 1 and 0, or

“high” and “low.”

• Boolean expressions are created by performing operations on Boolean variables.– Common Boolean operators include AND, OR, and NOT.

Page 46: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 46

3.2 Boolean Algebra

• A Boolean operator can be completely described using a truth table.

• The truth table for the Boolean operators AND and OR are shown at the right.

• The AND operator is also known as a Boolean product. The OR operator is the Boolean sum.

Page 47: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 47

3.2 Boolean Algebra

• The truth table for the Boolean NOT operator is shown at the right.

• The NOT operation is most often designated by an overbar. It is sometimes indicated by a prime mark ( ‘ ) or an “elbow” ().

Page 48: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 48

3.2 Boolean Algebra

• A Boolean function has:• At least one Boolean variable, • At least one Boolean operator, and • At least one input from the set {0,1}.

• It produces an output that is also a member of the set {0,1}.

Now you know why the binary numbering system is so handy in digital systems.

Page 49: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 49

3.2 Boolean Algebra

• The truth table for the Boolean function:

is shown at the right.

• To make evaluation of the Boolean function easier, the truth table contains extra (shaded) columns to hold evaluations of subparts of the function.

Page 50: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 50

3.2 Boolean Algebra

• As with common arithmetic, Boolean operations have rules of precedence.

• The NOT operator has highest priority, followed by AND and then OR.

• This is how we chose the (shaded) function subparts in our table.

Page 51: Chap iii-Logic Gates

Subject Name Code Credit HoursDigital Electronics and Logic Design DEL-244 3

Chapter 3: Digital Logic 51

• Computers are implementations of Boolean logic.• Boolean functions are completely described by truth

tables.• Logic gates are small circuits that implement Boolean

operators. • The basic gates are AND, OR, and NOT.

– The XOR gate is very useful in parity checkers and adders.

• The “universal gates” are NOR, and NAND.

Chapter 3 Conclusion