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IJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 08, 2014 | ISSN (online): 2321-0613
All rights reserved by www.ijsrd.com 242
Analysis of Multilevel Inverter Using Bipolar and Unipolar Switching
Schemes with Induction Motor Laxmi Kant Patel
1 Sudhir Phulambrikar
2 Sanjeev Gupta
3
1PG Student
2Head of Department
3Associate Professor
1,2,3Department of Electrical & Electronics Engineering
1,2,3SATI, Vidisha, Madhya Pradesh
Abstract— Cascaded H-bridge Multilevel Inverter (MLI) is
most efficient topology for medium and high voltage DC-
AC conversion, having less output harmonics and less
commutation losses. Disadvantages are their complexity,
more number of power devices, passive components and a
complex control circuitry. Here a Cascaded Hybrid
Multilevel Inverter is used to produce a three phase 9-level
output voltages. Now a day inverter is also know as a DC-
AC converter, is one of the most popular part of electrical
device. This proposed inverter widely used in industries
application such as speed control of induction motor. This
thesis focus on three phase 9-level bipolar and unipolar
switching inverter with characteristics like output voltage
boosting ability and also we discus about the bipolar and
unipolar switching scheme along with capacitor voltage
control. The modified topology uses Cascaded H-bridge
(CHB) with bidirectional and unidirectional switches
producing boost up output voltage. Here a hybrid Pulse
Width Modulation (PWM) technique is applied to control
the power devices. This modulation technique uses a sine
wave and a repeating wave, these waves are combined and a
complete reference wave is generated. There is comparative
study between CHB and modified topology between number
of power devices used and Total Harmonic Distortions
(THD). THD of modified topology is reduced and analyzed
by FFT window. The results are observed by
MATLAB/SIMULINK software.
Keywords: Asymmetric Multilevel Inverter, level shifted
PWM, Total Harmonic Distortion (THD), IGBT, MATLAB,
Induction Motor
I. INTRODUCTION
Power electronic converters specially dc/ac PWM inverters
have been extending their range of use in industry
because they provide reduced energy consumption,
better system efficiency, improved quality of product, good
maintenance, and so on.
For a medium voltage grid, it is troublesome to
connect only one power semiconductor switches
immediately [1, 2, and 3].
As a result a multilevel power converter anatomical
structure has been introduced as an alternative in high
power and medium voltage situations such as
laminators, Manufacturing, Conveyor belts, Pumps, Fans,
Blowers, Compressors, and so on. As a cost effective
solution, Multilevel converter achieves high Power ratings,
and also ables the use of low power application in
renewable energy sources such as Wind, Fuel cells and
Photovoltaic which can be easily interfaced to a
multilevel converter system for a high power application.
The multilevel Inverter system may be unipolar switched or
bipolar switched [9]. Unipolar switched inverters have the
advantage of higher efficiency due to reduced switching loss
[10], and low iron loss of inductor in output filter.
Moreover, it generates less EMI, but it has been shown
theoretically, that distortion of their output current can be
significant, especially at low power level. On the other hand
at the same current levels bipolar switched inverters results
in reduced low frequency harmonice, especially when power
output is low[9, 10].
II. WORKING AND ANALYSIS
The working topology of three phase nine level can be
comprehended with the help of its working states. For the
structure shown in Fig.1. The three circuits are in parallel
Vab, Vbc, and Vca each one has separate dc source. Switch
pairs (Sj, Gj, Tj) {j= 1, 2, 3, 4…12} are main and
complimentary. Therefore switching states of independent
switches S1, S2, S3…S12 would synthesize 12 working
states. All the working states are illustrated in Fig.1. There
are one zero states and eight non-zero states. With all these
operating states, the load is fed with nine levels induction
motor drive. It can be observed that twelve switches conduct
simultaneously to obtain a given voltage level. For example,
to synthesize[11], Vo (t) = 4V DC switches S1, S2, S5, S6,
S9 and S10 for positive conduct mode similarly same as Vo
(t) = -4V DC switches for negative conduction mode while
rest of the switches block. It is also important to mention
here that for all the positive voltage levels and a zero level
(states 1 to 5) switch S2 always conduct while for all the
negative voltage levels (states 6 to 10), switch S2 always
conduct. Therefore, it is possible to operate these two
switches at fundamental frequency to obtain all nine levels.
This is important because as discussed later of all the
switches S2 and G2 bear maximum voltage stress of 4V DC
each.
Analysis of Multilevel Inverter Using Bipolar and Unipolar Switching Schemes with Induction Motor
(IJSRD/Vol. 2/Issue 08/2014/045)
All rights reserved by www.ijsrd.com 243
Fig. 1: Three Phase nine level inverter with three
asymmetric voltage source.
Table 1: Modes And Switching States.
One more thing if we don’t have reverse power
flow in circuit, replacing IGBT (Sb-Sbn_1) switches by
diodes. For a resistive load both current & voltage are in
same phase, so no reverse power flowing but in case of RL
load output current lags voltage and having chances to
reverse power flowing ,in such case IGBT replaced by
diodes[13].
III. SWITCHING SCHEME
Fig. 2: Simulation of bipolar switching.
Fig. 3: Simulation of unipolar switching.
Fig. 4: Reference and carrier waveform of three phase nine
level bipolar switch inverter.
Fig. 5: Reference and carrier waveform of three phase nine
level unipolar switch inverter.
Analysis of Multilevel Inverter Using Bipolar and Unipolar Switching Schemes with Induction Motor
(IJSRD/Vol. 2/Issue 08/2014/045)
All rights reserved by www.ijsrd.com 244
In this section, a switching procedure is developed
so that the topology can be modulated with the multi carrier
sine pulse width modulation (PWM). The scheme is so
designed that the switches with least voltage stresses (i.e
switches S1 and G1’) commutate with carrier frequency
while switches with highest voltage stresses (i.e. switches
S2 and G2’) commutate with the fundamental frequency [7,
8]. Switches S4 and G4’ operates at an intermediate
switching frequency which is greater than the fundamental
frequency but much lesser than the carrier frequency. In the
proposed scheme, the absolute value function of the
reference wave (a sinusoidal waveform of 50 Hz frequency)
is constantly compared with four carrier waveforms (which
all are triangular waveforms with frequency 3 kHz) which
are placed in contiguous bands as shown in Fig.2.
Comparison of each carrier with the reference gives ‘1’
when the reference is greater than the carrier and ‘0’
otherwise. The four output waveforms so obtained (one each
for four carriers Signals) are added together to obtain a so-
called ‘aggregated signal S (t)’. For the waveforms of Fig.2,
the aggregated signal is shown in Fig.3. It can be noted that
this signal would have same number of levels as expected in
one half cycle of the output voltage of inverter. Also, each
cycle of S (t) acquires the shape of one half cycle of the
expected waveform at the inverter output.
IV. MODULATION STRATEGY
There are different types of modulation techniques used in
MLI for generating gate pulses. In proposed MLI we are
using Phase disposition pulse width modulation scheme, in
which multi carrier waves have in phase [6]. PWM
technique used in MLI because it better control the output
voltage , regulate the output voltage and control the
harmonics presented in the output voltage. We know that for
N –level output N-1 carrier waves are used. All carrier
signal having same frequency [10].
Two parameters, which is used in PWM scheme
with related to harmonics known as Modulation index &
Frequency modulation ratio. Modulation index is defined as
the ratio of amplitude of reference signal to carrier signal.
MI= Aref /(N-1)Acarr
Where N is no.of voltage level
Vo max= MI.Vdc (MI<1)
If Modulation index reduces, harmonic components
gets increased so modulation index having maximum value
(MI=1) as possible to overcome this problem.
Another parameter Frequency modulation ratio is
defined as ratio of frequency of carrier signal to reference
signal. Harmonic components presents in output voltage as
function of Mf,
Mf = fcarr/fref
A reference sine wave is compared with multi
carrier waves with relational operator. In proposed 9 level
MLI, 8 carrier generators are used and compare it with 1
reference sine wave finding different comparable pulses are
combined by an adder and then it would again comparing
with different constant values (0-8), after this obtaining
various pulses we grouping different pulses with X-OR
logic gates for selecting exact controlling signal to switches
.The gate control circuit is heart of any multi-level inverter.
V. SIMULATION RESULT
Figs. 6-9 shows the phase voltage, load current, motor
speed, torque, stator current, rotor current & THD of a
nine-level inverter. Table.2 represents THD at different
modulation index. By comparing the nine level bipolar and
unipolar switch inverter we can say that the distortion of
bipolar nine level switch inverter voltage is less. The current
waveforms are closed to sinusoidal. The speed and torque
ripples are very less as compared to unipolar nine level
switch inverter. Dynamic response is also better [13],
which can be observed from the speed and torque
waveforms Fig.7 (a, c). represents the harmonic spectrum
analysis of a nine level inverter. In this case, the Total
Harmonic Distortion is 1.72% and 2.21% of bipolar and
unipolar for modulation Index 1.The THD for different
modulations are given in Table -2
(a)
(b)
Fig. 6: Simulation results of 3-phase Cascaded-H bridge 9-
level inverter induction motor drive (a) output voltage (b)
load current.
(a)
(b)
Analysis of Multilevel Inverter Using Bipolar and Unipolar Switching Schemes with Induction Motor
(IJSRD/Vol. 2/Issue 08/2014/045)
All rights reserved by www.ijsrd.com 245
(c)
(d)
Fig. 7: Simulation results of 3-phase Cascaded-H bridge 9-
level inverter induction motor drive (a) rotor speed (b) rotor
current (c) torque (d) stator current.
(a)
(b)
Fig. 8: FFT Analysis of 3-phase Cascaded-H bridge 9-Level
bipolar switch Inverter (a) THD for output voltage (b) THD
for load current.
(a)
(b)
Fig. 9: FFT Analysis of 3-phase Cascaded-H Bridge 9-
Level unipolar switch Inverter (a) THD for output voltage
(b) THD for load current.
VI. CONCLUSION
This thesis has provided a brief summary of multilevel
inverter circuit topologies (9 -level) and their analysis.
From the simulation results it is clear that in bipolar
nine level switch inverter not only THD is less but also
voltage and current value is greater for the unipolar nine
level switch inverter. Hence bipolar switching scheme for
multilevel inverter is better than unipolar switching
schemes.
Table 2: Voltage and Current Harmonics of Sinusoidal
PWM Inverter.
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