The Use of Real-Time Simulation Technologies: Applications to electric Drive,
Power Electronic and Grid Systems.
Federal University of Juiz de ForaDecember 9, 2009
Christian Dufour, Ph.D. Senior Simulation Specialist, Power Systems and Drives
Market Development Manager, Brazil
Lecture Plan
2
Considerations About Real-Time Simulation
Real-Time Simulators and Model-Based Design
Hardware Components of a Real Time Simulator
Test Automation and Sequencer
Solver Components of a Real Time Simulator
Conclusions
Using RT-LAB to Run Real Time Simulations
Interesting Test Cases run on multi-core RT-LAB
3
Considerations about real-time simulations
About the importance of simulation
Let’s consider the design of an aircraft.
Cost Billions$ to design and manufacture.
Can we wait until the first flight test to verify it actually fly?
Consider now a large power grid
Again, it can cost $billions to design
Can we wait until commissioning to make sure it is stable and robust?
Classic facility for power grid simulation
Hydro-Quebec’s Network Simulation Center Motivation: Quebec power network is special:
power generation is very far away from city. Many long lines. Requires a lot of active compensation.
Focus: Real-time electrical network simulation. Needed to design new 765-kV line and specify the equipment (insulation co-ordination)
using statistical technique Needed to test REAL controllers for an unstable network The real-network is not available (7 years to built) Cannot disconnect the real power grid for test purpose!!!
Technical Challenges: High bandwidth, Large I/O count Complex model requiring massively-parallel hybrid computing
Real-Time Simulation : Introduction
Free Running Simulation
Faster than real-time
Slower than real-time
Time
Computationf(t) Time
tn-1 tn
f(tn+1)
tn+1
f(tn)
Time
Computationf(t)
tn-1 tn
f(tn+1)
tn+1
f(tn) Time
6
Real-Time Simulation : Introduction
Real-Time Simulation
Data PostingTimeClock
Computationf(t) Time
tn-1 tn
f(tn+1)
tn+1
f(tn)
7
Sine equa none conditions for real-time algorithms
Non-iterative
Fixed –step (disqualify Spice-type or Saber simulation algorithm for example)
Main Purpose of Real-Time Simulation
It is sometimes difficult to test a power systems device in its working environment or in real life condition.
Solution: One can connect a real network device (ex: a FACTS controller) to a simulated power grid
Other common applications: statistical testing, correlation testing 8
Actuators
Sensors
MODEL OF POWER GRID
Evolution of Real-Time Simulator Technology
9
1960 1970 1980 1990 2000
Digital COTSSimulators
Digital COTSSimulators
COTSSim-On-Chip
COTSSim-On-Chip
Digital CustomSimulators
Digital CustomSimulators
AnalogSimulators
AnalogSimulators
Model Based Design
Hybrid (Analog/Digital)Simulators
Hybrid (Analog/Digital)Simulators
197530000 square feet Hybrid Simulator
RT-LAB
2009: 1 cabinet, 3 PC with 24 core in total
For 350 3-ph buses32 to 64 cores would be required to simulate the detailed HQ networks
10
What is Model-Based Design?
Model-Based Design is a methodology of design based on simulation models! Obviously! It is so common these days.
Power grid designers were the first to use this approach philosophy, but 15 years ago and before, analog or hybrid simulator where used since computers were not fast enough
But It was not always the case for other industries like automobile and power electronic:
Before the advent of powerful computers and simulation tools, people used To write specifications on paper and use this to work with
subcontractors
Directly implement prototype on hardware
Directly integrate modules into an analog test bench of simplified or complete system before integrating the real hardware and software
Model Design (Simulink Block
Diagram)
Generate Software from
Model
Upload Software to RT Platform
Test
Correct Design Iteratively
About the concept of Model-Based Design (simplified)
11
Model Based Design (MBD) & Hardware-In-the-Loop (HIL)
ValidateModel
Off-line simulation
ValidateModel
Off-line simulation
Virtual PrototypeHIL, RT simulation
3D visualization
Virtual PrototypeHIL, RT simulation
3D visualization
Control PrototypeHIL, RT simulation,
Physical Components
Control PrototypeHIL, RT simulation,
Physical Components
DesignDesign
ImplementationProduction Code
Physical Components
ImplementationProduction Code
Physical Components
Lab Testingwith actual controller
Lab Testingwith actual controller
Integration & TestIn-system commiss-ioning & calibration
Integration & TestIn-system commiss-ioning & calibration
DeploymentProduction
DeploymentProduction
MaintenanceMaintenance
Design & Implem
entation Inte
grat
ion
& Tes
ting
12
This implementation is made by the software team
This implementation is made by the control team
This implementation is made by the integration team
Models becomes the method to passInformation across teams
Advantages of Model-Based Design
Advantages: Making Design Tradeoffs Early Reducing Development Cycle Reducing Testing Cost Better and More Tests
Challenges: Requires expertise and effort Needs specialized tools Model fidelity Model management
Model Based Design
Traditional Design Method
13
Requirem
entsD
esign & B
uild
Release to Test
Release to Field
14
Real-time simulation components
Application
Real-TimePlatform
Processing
Communication
Inputs/Outputs
Solvers
Models
15
Main components of a power system real-time simulator
The 2 most critical components of a real-time power system simulators are:
The hardware platform the capable to do these iteration fast enough
Running a real-time Operating System With sufficient I/O capability
Simulation solvers capable to iterate the equations of the power system with
Accuracy Stability
16
Main components of a power system real-time simulator
Other components Automatic test sequencer
Because you want to run many tests automatically
17
Hardware component of real-time simulator
18
Hardware of a real-time power system simulator
Two main approaches remains today Custom Digital Simulator
++ Optimized for power system problems
-- Cost more, difficult to upgrade, less open, custom RTOS
--- Not able to keep pace with new processing and communication technologies (3 to 5 years lagging behind the latest processors)
Modern commercial-Off-The-Shelf Digital Simulator++ Lower cost driven by mass market requirements: mainly the game
industry that continuously requires faster CPUs, easy to upgrade
++ Flexibility: can connect any PCI card
++ Openness: Standard Operating system and can be easily interface to 3rd party software
++ Compatible with the latest processors very quickly as they become available.
RT-LAB eMEGAsim Simulator Hardware Architecture
19
HILBox PC1HILBox PC1
PC
I E
XP
RE
SS
PC
I E
XP
RE
SS
CPUCPU
SimulinkModel
SimulinkModel
Single-, Dual-, or
Quad-Core
Single-, Dual-, or
Quad-Core
RT-LAB eMEGAsim Simulator Hardware Architecture
2020
CPUCPU
Sh.Mem.Sh.Mem.
SimulinkModel
SimulinkModel
Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based
Multi-core Processors Shared-Memory Multi-CPU board
PC
I
P
CI
HILBox PC1HILBox PC1
PC
I E
XP
RE
SS
PC
I E
XP
RE
SS
CPUCPU
SimulinkModel
SimulinkModel
Single-, Dual-, or
Quad-Core
Single-, Dual-, or
Quad-Core
RT-LAB eMEGAsim Simulator Hardware Architecture
2121
CPUCPU
Sh.Mem.Sh.Mem.
SimulinkModel
SimulinkModel
Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based
Multi-core Processors Shared-Memory Multi-CPU board
PC
I
P
CI
RS-232, CAN, TCP/IP
IEC61850, LoadRunner
PCI PCIe Extension User has the possibility
to add PCI cards to the simulator with standard Protocol like TCP/IP, UDP/IP, RS-232
Or to develop and study its own protocols (IEC-61850, LoadRunner)
HILBox PC1HILBox PC1
PC
I E
XP
RE
SS
PC
I E
XP
RE
SS
CUCU
FastComFastCom
CPUCPU
Sh.Mem.Sh.Mem.
PCI Express
RT-LAB eMEGAsim Simulator Hardware Architecture
2222
Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based
Multi-core processors Shared-Memory Multi-CPU board
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
FP
GA
(o
p51
42)
FP
GA
(o
p51
42)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)
Digital IO requirements For power electronic
applications, the Digital I/O card is critical
It must be capable of sampling Thyristor/ IGBT/GTO/MOSFET gate with great accuracy
The latency must also be very low so it does not to slow down the simulation (PCI Express)
Sampling of fast PWM gate signals
23
For this purpose, PWM pulse are captured on the FPGA card by 100MHz counters
Normalized ratio (Time stamp) is send to the inverter models on the CPU
The model on the CPU use the Time Stamps to compute interpolated voltages
Simulator clock (50 s)
To wind generator model& Time Stamped Bridge
logic=1stamp=0.625
count at transition time= 3125max count =5000
FPGA counter card 10 ns clock (100 MHz)
External controller
Fiber optic cable
opto-isolator
Real-time simulator
Firing pulse unit
I/O
Pentium
Control algorithms
IGBT
Effect of switch gate sampling and interpolation
RTeDRIVE inverter model use the time stamps to produce very accurate results
Example: a simple DC chopper (PWM=10kHz, Ts=10µs) Bad sampling (like if we use regular SPS) causes
important non-linearity in the input-output characteristic But very linear caracteristic with RTeDrive TSB inverters
Tcarrier/Ts=10
SimPowerSystems
TSB
Effect of switch gate sampling and interpolation
Precise enough to take into account deadtime effect smaller that the sample Time
Below is the effect of dead time increment of 2 µs (with a sample time of 10µs!)
HILBox PC1HILBox PC1
PC
I E
XP
RE
SS
PC
I E
XP
RE
SS
CUCU
FastComFastCom
CPUCPU
Sh.Mem.Sh.Mem.
PCI Express
Hardware Architecture (FPGA models)
2626
Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based
Multi-core processors Shared-Memory, Multi-CPU board
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
FP
GA
(o
p51
42)
FP
GA
(o
p51
42)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)
Xilinx System Generator Blockset
Model
Xilinx System Generator Blockset
Model
Xilinx SG model
Models with 10 ns sample rate can be coded on this card!
FPGA user programmabilityfor advanced model design
The FPGA card can be programmed by the user using Xilinx System Generator
No VHDL language skill required. It is a Simulink blockset
HILBox PC2HILBox PC2DolphinDolphin
PC
IP
CI
Expandability FireWire INFINIBAND switch DOLPHIN SCI /PCIe
(2 to 5 us latency)
HILBox PC1HILBox PC1
PC
I E
XP
RE
SS
PC
I E
XP
RE
SS
CUCU
Simulator Hardware Architecture (Expandability)
2727
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
DolphinDolphin
CPUCPU
Sh.Mem.Sh.Mem.
Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based
Multi-core processors Shared-Memory Multi-CPU board
FP
GA
(o
p51
42)
FP
GA
(o
p51
42)
16 DO16 DO 16 DI16 DI
Carrier (op5210)Carrier (op5210)
16 AO16 AO 16 AI16 AI
Carrier w (op511x)Carrier w (op511x)PCI Express
28
Solver components of real-time simulator
29
Simulation solvers for power systems
Key characteristics of power systems Contains a wide range of frequency modes
Requires ‘stiff’ fixed-step solvers. Stiff solver remains stable even with mode above the simulation Nyquist limit.
Contains a lot of PWM-driven power electronics
The simulator must avoid sampling effect when computing IGBT pulse ‘events’ internally or when reading PWM pulses from its I/Os
Stiff solvers methods for power system simulation
Simulation methods electric systems: Nodal approach (EMTP, HYPERSIM) State-Space (SimPowerSystems, PLECS) Switching-function (inverter models only) FPGA-based methods
Stiff solvers methods for power system simulation
Classic method ‘Nodal Approach’ Each RLC branch is discretized with the
trapezoidal rule of integration (stiff solver)
Example: inductor S-domain equation: Discretization by Trapeze( time step: T):
Hummmm….. In depends on vn , a priori unknown nodal voltage Implicit problem, cannot iterate directly
vdtLi /1
11 22 nnnn vL
Tiv
L
Ti
Stiff solvers methods for power system simulation
‘Nodal Approach’: solution to implicitness All branches resistance ratio R=vn/in , are build into a
nodal matrix Known term Ih=in-1+(T/2L)vn-1 are built into a vector I For all nodes, a global matrix of admittance is built: YV=I Nodal voltages are found by solving this matrix problem,
either by direct inversion or LU decomposition. Re-solving of Y required if a switch change position
2 3
4
Y V= I
Ih
-Ih
R
R
-R
-R
Stiff solvers methods for power system simulation
State-Space approach We can also find the exact state-space solution
With k, matrix set index for switch permutations This can be discretized with the trapezoidal method like in
SimPowerSystems for Simulink Trapezoidal method: order 2.
It can also be discretized by higher order methods Higher order methods (order 5) implemented in
ARTEMiS, a solver package of eMEGAsim.
uDxCyuBxAx kkkk
Stiff solvers methods for power system simulation
State-Space approach Continuous time state-space expression
Solution for time step T:
How to compute the ‘matrix exponential’ eAT ? Trapezoidal method (order 2)
ARTEMiS art5 method (order 5)
uBxAx kk
t
Tt
tAn
ATn dBuexex )()(
1
2/
2/
ATI
ATIeAT
36012
203
53
2201
52
)()(
)(
ATATATI
ATATIeAT
...!
...!5!4!3!2!1
5432
n
ATATATATATATIe
nAT
TALYOREXPENSION
Effect of higher order discretization
Artemis ART5 solver more precise than Trapezoidal solver at 100 us
Simple case of RLC circuit energization
Numerical stability issues
Discretized systems is not guarantied to be stable It depends on how Laplace poles are ‘mapped’ in the z
domain. Ex: Forward Euler has poor stability A-stability (Stiff stability) (ex: trapeze method) guaranty
discrete stability (for linear systems)
y’=ly
Re{l}
Im{l}
-2/T
Forward EulerStability Region
RLC network Euler T=0.01µs
Laplace pole (s) mappingRLC network Trapeze T=100µs
TrapezeStability Region
Numerical stability issues with trapezoidal integration
Even if it is stable, the trapezoidal rule (tustin) is prone to numerical oscillations The z-domain mapping is stable
but oscillatory for high frequency Laplace poles
Numerical stability issues with trapezoidal integration
A-stable methods can be highly oscillatory How are mapped high frequency poles? It depends on the ‘stability function’ again
y’=ly
Re{l}
Im{l}
Laplace map
y(n+1)=zy(n)
Re{z}
Im{z}Z- domain map
X -1X
12/
2/lim
ATI
ATIAT
Trapeze (A-stable)
X
0)()(
)(lim
36012
203
53
2201
52
ATATATI
ATATIAT
ARTEMiS art5 (L-stable)
z mapping near -1 means oscillations
***
* V_load for positive I_load
V+
Gup
Glow
Load
V_load
Gup Glow
Other solver methods for power system simulation
Switching function approach A special solver method for power electronic system
using high-frequency PWM. It is a ‘simple’ controlled voltage source! Interpolation methods are used to obtain high accuracy
in the Opal-RT RTeDRIVE package High impedance mode can be implemented now.
~V+
~0
0
1gate
V_load
Interpolated switching functions: example case 1
Mitsubishi Electric CoJapan, 2004ARTEMiS used for rectifier sideRTeDRIVE used for inverter
40
© Opal-RT © Opal-RT MITSUBISHI
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
0 0.003 0.006 0.009 0.012-20
-10
0
10
20
Motor Current [A]
Time [sec]
HIL Simulation Physical System
PWM9kHz
PWM4.5kHz
PWM2.25kHz
permanentmagnet motor
Currents
External controller (sampling rate =55 s)
3-phasesource
reactor
dioderectifier
x6 x6
PWMinverter
N
S
Tload
IGBTpulses
Quadratureencoder signals
CPU 1: (Ts= 80 us) CPU 2: (Ts= 10 us)
(Fpwm =9 kHz)
3-level STATCOM with 72 IGBT (Mitsubishi Electric)
Interpolated switching functions: how high can you get?
20 µs, 3 CPU with the controller 1000 time faster than conventional
simulation software Actual diode/IGBT count: 10*6*3=180
Reference model In EMTP/RV (3us)
vs Simulink/SPS/ RT-LAB (50 us)
IPST 2009, Kyoto - Japan 41
RT-LAB XSG permits to use Xilinx System Generator models inside RT-LAB frame work
Enables complex model to run on the FPGA of RT-LAB
Examples: PMSM motor IGBT inverter, PWM modulator Power electronics
Subsystem #2 Simulink
Rate=50s
Subsystem #1 Simulink
Rate=10s Subsystem #3Xilinx System Generator
Rate= 10 ns
DIO
AIO
RTW XSGRT-LAB
Simulink Model
Code Generation
Distributed Real-Time Model
DIO
AIO
Single/dual multi-core CPU PC FPGA card with embedded IO
Host PC
SW
lin
k
Eth
ern
et
lin
k
Simulation On Chip (FPGA)
No need to know VHDL language But you need to know fixed-point arithmetic
Stiffness problem is resolved because of the very small time step used (10 nanoseconds)!
Simulation On Chip (FPGA)
A typical XSG model in RT-LAB
Simulation On Chip (FPGA) Example: PMSM Drive
Inverter and PMSM equation solved in FPGA
Back-EMF stored in the FPGA also
Inductance computed in CPU of the RT-LAB system at slower rate (40 µs)
Torque is computed on CPU at 40 µs also. This is fine because it is used to compute mechanical equations anyway.
N
S
iabc
IGBT inverter
Controller under test
Inductance and torquedata pre-computed from
JMAG software
iabc rotorL-1 (,iabc)
PMSM
rotor
CPU(Intel/AMD)
FPGA(Op5130)
Digital Input (10 ns)(IGBT gates)
Analog Output(Iabc, resolver)
BackEMF=f()(JMAG pre-computed)
vbackEMF
Digital Out(quad encoder)
6
Inductance
PMSM
I/Os
*C. Dufour et al. “Real-Time Simulation of Finite-Element Analysis Permanent Magnet Synchronous Machine Drives on a FPGA card”, Proceedings of 2007 European Conference on Power Electronics and Applications (EPE-07) , Aalborg, Danemark , Sept 2007
abcabcabc
abc IdtRIdt
dVL )(][ 1
45
Advanced solvers: State-Space Nodal (SSN) approach
For all user-defined groups or subsystems.one state-space equation is found
with some unknown entries, the NODAL voltage
For all nodes , Thevenin/Norton equivalent are computedThen the unknown nodal voltage are found
Advantages of the SSN approach
Fewer state-space iterations Fewer switches per
subsystems: precalculation is easier, which is important in RT-simulation
Possibility to make parallel computation of the state-space groups in SSN
Some similarities with MATE (J. Marti) GENE (K. Strunz)
State-Space
SSN
Advanced solvers: State-Space Nodal (SSN) approach
Brk0 Brk1
A1m
A2n
B1m
B2n
xn+1= xn + un+1
Y3,3I_non+1= u_non+1U
_n
o
SSN method:2 groups with x/2 states each
m=1...8
n=1...8
00
00
Brk0 Brk1
xn+1= xn + un+1Ak Bk
State space method with x states
k=1...64
47
ADVANTAGES NO DELAY between
subsystem solution Large number of switches
allowed
IN DEVELOPPEMENT Algorithm is tested in the the
SPS environement using m-file S-function
Currently ported to ‘C’
Advanced solvers: State-Space Nodal (SSN) approach
PERFECT MATCH WITH SPS
Small distribution system for breaker test coordination with: short pi line and 22 equivalent switches
Update March 2010Now releasedIn ARTEMiS 6.0
48
Advanced solvers: State-Space Nodal (SSN) approach
Open question
Is the SSN approach extendable to phasor-type (Transient Stability) simulation like MATE-type methods?
49
Comparison of solver methods
Nodal State-Space (Real-Time case)
SSN Switching function
FPGA
-Switch management is easier in RT application than SS.
-Higher order solution possible: more precise
-High order solution.- Switch mngt like nodal.-Possible to optimize calculation with groups choices
-Very Rapid -Very high number of switch can be handle- Very precise
-Most Rapid- Basic Euler solver can be use because sample time is so low.
-Order 2 method only- Risk of numerical oscillations when state dependence is present.
-Possible memory problems in RT if too many coupled switches are present
-Delay with the rest of the simulated(usually degligeable)
- More difficult to implement because Fixed Point is less common
Adv
anta
ges
Dis
adva
ntag
es
50
About the necessity for testing
Test sequencer
51
Test sequencer: a key part of real-time simulator
Test sequencer requirement Capability to launch test automatically Capability to record and analyze data Capability to manage models
52
Test sequencer: a key part of real-time simulator
Usage case: controller correlation testing Today’s controllers are real piece of software
Control algorithm may be less than 10% of the code 90% remaining: protections, diagnostics, user interface,
etc…
Each time the controller code is updated we need to verify its basic functionality are still working
Done by automated tests With a digital plant, correlation is easy to determine Using random (Monte-Carlo) techniques to find worst cases
53
Test sequencer: a key part of real-time simulator
Usage case: Monte-Carlo testing How to dimension correctly some power system
component considering switching surges?
ENTERGY POWER GRID86 3-ph. busses
86 lines23 loads
7-CPU simulation @ 50µs
Bus B17 3-phase-fault
54
Test sequencer: a key part of real-time simulator
By making automated randomized tests (Monte-Carlo), we can obtain probabilistic characteristics of overvoltages.
Test Automation with Python, ‘C’ or TestStand
RANDOMIZE?NO
YES
Initialize loop Variables
FORp <= Plen
Createrandom data
FORd <= Dlen
FORS <= Slen
p <= Plen
d <= Dlen
DoneConcatenate
Test Data
Launch Test
Apply100 ms delay
Done
n++s++
Delay ended
s <= Slen
LOOPon delay
n++d++
s > Slen
Initialize Test Variables
n++p++
Write To File
p > Plen
55
API of RT-LAB enable control by different software or methods
How to use RT-LAB for power system applications?
56
1- Design your model in Simulink and SimPowerSystems
2- Identify natural delay in your model (ex: transmission lines)
3- Make top-level groups in your Simulink model, these will be assigned to different CPUs of the simulator
4- Add I/O block in the model if necessary
How to use RT-LAB for power system applications?
57
1- Design your model in Simulink and SimPowerSystems We choose here a SPS demo named: power_PSS.mdl
How to use RT-LAB for power system applications?
58
2- Identify power line to make parallel distributed simulation
How to use RT-LAB for power system applications?
59
3- Choose a task separation and make Subsystems
CPU #1 CPU #2
How to use RT-LAB for power system applications?
60
4- Some optimizations: put controllers in a separate CPU because it can run at slower rate
Also put monitoring in a separate subsystem
Controls Monitoring
How to use RT-LAB for power system applications?
61
You can put your own ‘C’ code in any of the cores You just have to use a S-function ‘wrapper’
int main() { printf("hello, world");printf(“I want to do real-time simulations");return 0; }
How to use RT-LAB for power system applications?
62
5- Adding I/Os Let’s add an analog output from the RT-LAB library
How to use RT-LAB for power system applications?
63
Let’s output the Alternator Excitation voltage
How to use RT-LAB for power system applications?
64
The alternator excitation voltage can now be read on the front panel of the simulator
How to use RT-LAB for power system applications?
65
Most commercial I/O cards can be supported
Opal can supply the source code of communication driver examples to enable users to implement their own protocols through Ethernet for Internet Ex: Vestas proprietary
protocol for wind farm communication, LoadRunner.
Other examples of power systems in real-time
66
86 3-ph. Busses 86 lines, 23 loads 7-CPU simulation @ 50µs
67
eMEGAsim 24-CPU 330-Bus power system
System Diagram
2B6
3M15
3B15
3B14
3B13
3B10
3B9
3B12
3B11
2B9
2B112B10
2M10
2B4
2B52B82B7
2B1
2B2
2M1
2B3
3B8
1B9
3B7
3B5
3B6
1M10
1B51B61B71B8
1B4
1B3
1B2
1B1
1M1
3B4
3B3
3B2
3M4
3M3
3M11
1B10
1B111B12
1B13
1B16
2B12
1B151B14
2B13
2B14
2B15
2B16
3B1
3B16
PLANT
TRANSFORMER
BUS
LOAD
500KVHVAC
5B6
6B95B9
5B115B10
5M10
5B4
5B55B85B7
5B1
5B2
5M1
5B3
6B8
4B9
6B7
6B5
6B6
4M10
4B54B64B74B8
4B4
4B3
4B2
4B1
4M1
6B4
6B3
6B2
6M4
6M3
4B10
4B114B12
4B13
4B16
5B12
4B154B14
5B13
5B14
5B15
5B16
6B1
6B15
6B14
6B136B126B11
6M11
6B16
6B10
8B6
9M15
9B15
9B14
9B13
9B10
9B9
9B12
9B11
8B9
8B11 8B10
8M10
8B4
8B58B8 8B7
8B1
8B2
8M1
8B3
9B8
7B9
9B7
9B5
9B6
7M10
7B5 7B6 7B7 7B8
7B4
7B3
7B2
7B1
7M1
9B4
9B3
9B2
9M4
9M3
9M11
7B10
7B11 7B12
7B13
7B16
8B12
7B15 7B14
8B13
8B14
8B15
8B16
9B1
9B16
11B6
12B911B9
11B11 11B10
11M10
11B4
11B511B8 11B7
11B1
11B2
11M1
11B3
12B8
10B9
12B7
12B5
12B6
10M10
10B5 10B6 10B7 10B8
10B4
10B3
10B2
10B1
10M1
12B4
12B3
12B2
12M4
12M3
10B10
10B11 10B12
10B13
10B16
11B12
10B15 10B14
11B13
11B14
11B15
11B16
12B1
12B15
12B14
12B13 12B12 12B11
12M11
12B16
12B10
14B6
15B15
15B14
15B13
15B10
15B9
15B12
15B11
14B9
14B11 14B10
14M10
14B4
14B514B8 14B7
14B1
14B2
14M1
14B3
15B8
13B9
15B7
15B5
15B6
13M10
13B5 13B6 13B7 13B8
13B4
13B3
13B2
13B1
13M1
15B4
15B3
15B2
15M4
15M3
15M11
13B10
13B11 13B12
13B13
13B16
14B12
13B15 13B14
14B13
14B14
14B15
14B16
15B1
15B16
17B6
18B9 17B9
17B11 17B10
17M10
17B4
17B517B8 17B7
17B1
17B2
17M1
17B3
18B8
16B9
18B7
18B5
18B6
16M10
16B5 16B6 16B7 16B8
16B4
16B3
16B2
16B1
16M1
18B4
18B3
18B2
18M4
18M3
16B10
16B11 16B12
16B13
16B16
17B12
16B15 16B14
17B13
17B14
17B15
17B16
18B1
18B15
18B14
18B13 18B12 18B11
18M11
18B16
18B10
New MILESTONE as of JUNE 2009
# of bus 330
# of gen. 42(+1)
# of load 90
# of DPL 517
RT-LAB Electric Drive SimulatorRT-LAB Electric Drive Simulator
Example 3 – Industrial Motor Drives
68
Multi Level Inverter DriveCONVERTEAM-ALSTOM (France)
line voltage wave form
1200V
M3~~
PEC CONTROLLER
PRECHARGE
HV NETWORK
~LV NETWORK
12-PULSERECTIFIER
3-LEVEL NEUTRAL CLAMPEDBRIDGE
dV/dtFILTER
INDUCTION MOTOR12MW-6600V
This Controller is connectedExternally to the Simulator
Example 3 – Industrial Motor Drives
69
Multi Level Inverter DriveCONVERTEAM-ALSTOM (France)
M3~~
PEC CONTROLLER
PRECHARGE
HV NETWORK
~LV NETWORK
12-PULSERECTIFIER
3-LEVEL NEUTRAL CLAMPEDBRIDGE
dV/dtFILTER
INDUCTION MOTOR12MW-6600V
Motor Acceleration Emergency Pulse shutdown
Pulse shutdown modeled with the help of Converteam
Required the design of an hybrid switching-function with high-impedance capability
Results of Hardware-In-the-Loop Tests
70
Example 4 – Wind-Turbines
10 Doubly-Fed induction machine with controllers (detailed models) Simulation controlled from RT-LAB TestDrive interface (Lab-View based)
Other examples (RT-simulation on 2-cores)48-Pulse STATCOMcompensated network (27 us)
500kV 60 Hz8500 MVA
200 MW
75 km Line
200 km Line
180 km Line
500kV 60 Hz6500 MVA
500kV 60 Hz9000 MVA
300 MW
BUS1
BUS2
BUS3
STATCOM
SVC system (15 us)
735kV6000 MVA 333MVA
X=15%
To thyristorsTCR
109 MvarTSC1
94 MvarTSC2
94 MvarTSC3
94 Mvar
735 kV 16 kV
Voltageregulator
Synchro
Referencevoltage
+
-
24
Kundur system (18 us)
Fault
P= 413MW
Turbine andexcitation controls
Load: 967 MW
Filter andcompensators
25 km line
220 km line
220 km line
25 km line
Load: 1767 MW
Turbine andexcitation controlsTurbine and
excitation controls
Turbine andexcitation controls
M1
M2
M3
M4
12 pulse HVDC system (15 us)
12-pulsethyristorrectifier
500kV 60 Hz
0.5 H smoothingreactor (Q=150)
R= 1 ohms
Line (300 km)
345kV 50 Hz5000 MVA nom.
AC filters (600 MVars)
0.5 H smoothingreactor (Q=150)
R= 1 ohms
AC filters (600 MVars)
Invertercontrols &protection
1200 MVAZ=0.25 pu
1200 MVAZ=0.24 pu
Rectifiercontrols &protection
12-pulsethyristorinverter
Z
All measures in shared-memory mode on Opteron
Key References University of Alberta Power Systems Laboratory
based on RT-LAB L.-F. Pak, O. Faruque, X. Nie, V. Dinavahi, “A Versatile Cluster-Based Real-
Time Digital Simulator for Power Engineering Research”, IEEE Transactions on Power Systems, Vol. 21, No. 2, pp. 455-465, May 2006.
Hardware-In-The-Loop Testing of Motor Driveat Mitsubishi Electric Co. M. Harakawa, H. Yamasaki, T. Nagano, S. Abourida, C. Dufour and J.
Bélanger, “Real-Time Simulation of a Complete PMSM Drive at 10 us Time Step”, Proceedings of the 2005 International Power Electronics Conference (IPEC 2005) – April 4-8, 2005 , Niigata, Japan.
More about ARTEMiS solvers and power grid RT-simulation C. Dufour, S. Abourida, J. Bélanger,V. Lapointe, “InfiniBand-Based Real-
Time Simulation of HVDC, STATCOM, and SVC Devices with Commercial-Off-The-Shelf PCs and FPGAs”, 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON-06), Paris, France, Nov. 7-10, 2006
RT-LAB application booklet with over 30 applications explained from motor drives to large power systems.
Opal-RT Technologies 742006.09.28
Opal-RT Partial Customer List
75
Opal-RT - Partial «Electrical» Customer List for Power Electronics in Hybrid Vehicles and Industrial Systems
RailRail
R&DR&D
Ford
76
Thank you for your attention!
See www.opal-rt.com for more details
or email me at: