8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
1/40
SDD_discrete.slx
Design Description
The MathWorks, Inc.
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
2/40
SDD_discrete.slx
2
SDD_discrete.slx: Design DescriptionThe MathWorks, Inc.
Publication date 13-Aug-2015 03:56:00
Copyright© 2015
For Internal Distribution Only
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
3/40
iii
Table of Contents
1. Model Version ............................................................. ................................................... 1
2. Root System ................................................................................... ................................ 2
Description ................................................. ........................................................ ........ 2
Blocks ....................................................................................................................... 3
Parameters .................................................................. ....................................... 3Block Execution Order ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ...... ..... ...... ..... .... 14
3. System Design Variables ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ... 16
Design Variable Details ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ..... 16
4. System Model Configuration ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ...... .... 21
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
4/40
iv
List of Figures
2.1. SDD_discrete ................................................. ........................................................ ...... 2
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
5/40
v
List of Tables
2.1. "Filter" Parameters ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ... 3
2.2. "Integer Delay" Parameters ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ... 4
2.3. "Integrator" Parameters ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... .... 5
2.4. "Memory" Parameters ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ...... ..... 5
2.5. "Sine Wave" Parameters ................................................................................................. 62.6. "Sine Wave1" Parameters ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... . 6
2.7. "Sine Wave10" Parameters ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ..... 7
2.8. "Sine Wave2" Parameters ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... . 7
2.9. "Sine Wave3" Parameters ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... . 8
2.10. "Sine Wave4" Parameters ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ..... 8
2.11. "Sine Wave5" Parameters ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ..... 9
2.12. "Sine Wave6" Parameters ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ..... 9
2.13. "Sine Wave7" Parameters ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... ..... 9
2.14. "Sine Wave8" Parameters ............................................................................................ 10
2.15. "Sine Wave9" Parameters ............................................................................................ 10
2.16. "ss" Parameters .......................................................................................................... 11
2.17. "Tapped Delay" Parameters ..... ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... . 11
2.18. "tf" Parameters .......................................................................................................... 12
2.19. "Unit Delay" Parameters ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... .... 13
2.20. "wma" Parameters ........................................................ ............................ .................. 13
2.21. "ZOH" Parameters ..................................................... ............................... ................. 14
2.22. "zp" Parameters ................................................... ...................................................... 14
3.1. GainDataType ............................................................................................................. 16
3.2. OutDataType .............................................................................................................. 17
4.1. SDD_discrete Configuration Set ..................................................................................... 21
4.2. SDD_discrete Configuration Set.Components(1) .. ... ... ... ... ... ... ... ......................................... 21
4.3. SDD_discrete Configuration Set.Components(2) .. ... ... ... ... ... ... ... ......................................... 22
4.4. SDD_discrete Configuration Set.Components(3) .. ... ... ... ... ... ... ... ......................................... 23
4.5. SDD_discrete Configuration Set.Components(4) .. ... ... ... ... ... ... ... ......................................... 24
4.6. SDD_discrete Configuration Set.Components(5) .. ... ... ... ... ... ... ... ......................................... 274.7. SDD_discrete Configuration Set.Components(6) ................................................................ 28
4.8. SDD_discrete Configuration Set.Components(7) ................................................................ 28
4.9. SDD_discrete Configuration Set.Components(8) ................................................................ 29
4.10. SDD_discrete Configuration Set.Components(9) .............................................................. 31
4.11. SDD_discrete Configuration Set.Components(8).Components(1) ...... ...... ..... ...... ..... ...... ...... . 32
4.12. SDD_discrete Configuration Set.Components(8).Components(2) ...... ...... ..... ...... ..... ...... ...... . 33
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
6/40
1
Chapter 1. Model VersionVersion: 1.58
Last modified: Wed Mar 13 06:35:34 2013
Checksum: 261731490 3068364796 3551894547 772731642
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
7/40
2
Chapter 2. Root System
Table of Contents
Description ............................................... ........................................................ .................. 2
Blocks ............................................................................................................................... 3
Parameters ................................................................ ................................................. 3
Block Execution Order ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... 14
Figure 2.1. SDD_discrete
Copyright 2009-2011 The MathWorks, Inc.
This m ode l should contain all blocks in the Discre te library that a ren't virtual or made up e ntirely of other blocks.
(z-1)
z(z-0.5)
zp wma
1
z+0.5
tf
x(n+1)=Ax(n)+Bu(n)y(n)=Cx(n)+Du(n)
s s
ZO H
z
1
Unit Delay
4Delays
Tapped Delay
Sine Wave9
Sine Wave8
Sine Wave7
Sine Wave6
Sine Wave5
Sine Wave4
Sine Wave3
Sine Wave2
Sine Wave10
Sine Wave1
Sine Wave
Scope
Simulink Report Generator (SDD Report) Test ModelSDD_discrete
Memory
K Ts
z-1
Integrator
Z-4
Intege r Delay
1
1+0.5z -1
Filter
Description
Simulink Report Generator (SDD Report) Test Model
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
8/40
Root System
3
Blocks
Parameters
"Filter" (DiscreteFilter)
Table 2.1. "Filter" Parameters
Parameter Value
Numerator coefficients
source
Dialog
Numerator coefficients [1]
Denominator coefficients
source
Dialog
Denominator coefficients [1 0.5]
Initial states source Dialog
Initial states 0
Input processing Elements as channels (sample based)
External reset None
Initial states on denomin-
ator side
0
Filter structure Direct form II
Sample time (-1 for inhe-
rited)
-1
Optimize by skipping di-
vide by leading denomin-
ator coefficient (a0)
off
Numerator coefficient
minimum
[]
Numerator coefficient
maximum
[]
Denominator coefficient
minimum
[]
Denominator coefficient
maximum
[]
Output minimum []
Output maximum []
State data type Inherit: Same as input
Multiplicand data type Inherit: Same as input
Numerator coefficient
data type
Inherit: Inherit via internal rule
Denominator coefficient
data type
Inherit: Inherit via internal rule
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
9/40
Root System
4
Parameter Value
Numerator product outp-
ut data type
Inherit: Inherit via internal rule
Denominator product ou-
tput data type
Inherit: Inherit via internal rule
Numerator accumulatordata type
Inherit: Inherit via internal rule
Denominator accumulat-
or data type
Inherit: Inherit via internal rule
Output data type Inherit: Inherit via internal rule
Lock data type settings
against changes by the fi-
xed-point tools
off
Integer rounding mode Floor
Saturate on integer overf-
low
off
State name must resolve
to Simulink signal object
off
"Integer Delay" (Delay)
Table 2.2. "Integer Delay" Parameters
Parameter Value
Delay length source Dialog
Delay length 4
Delay upper limit 100
Initial condition source Dialog
Initial condition 0.0
External reset None
Show enable port off
Prevent direct feedthrou-
gh by increasing delay le-
ngth to lower limit
off
Diagnostic for out-of-ra-
nge delay length
None
Remove protection again-st out-of-range delay len-
gth in generated code
off
Input processing Inherited
Use circular buffer for st-
ate
off
Sample time (-1 for inhe-
rited)
-1
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
10/40
Root System
5
Parameter Value
State name must resolve
to Simulink signal object
off
"Integrator" (DiscreteIntegrator)
Table 2.3. "Integrator" Parameters
Parameter Value
Integrator method Integration: Forward Euler
Gain value 1.0
External reset none
Initial condition source internal
Initial condition 0
Initial condition setting Output
Sample time (-1 for inhe-
rited)
-1
Output minimum []
Output maximum []
Output data type Inherit: Inherit via internal rule
Lock output data type se-
tting against changes by
the fixed-point tools
off
Integer rounding mode Floor
Saturate on integer overf-
low
off
Limit output off
Upper saturation limit inf
Lower saturation limit -inf
Show saturation port off
Show state port off
Ignore limit and reset wh-
en linearizing
off
State name must resolve
to Simulink signal object
off
"Memory" (Memory)
Table 2.4. "Memory" Parameters
Parameter Value
Initial condition 0
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
11/40
Root System
6
Parameter Value
Inherit sample time off
Direct feedthrough of in-
put during linearization
off
Treat as a unit delay wh-
en linearizing with discre-te sample time
off
State name must resolve
to Simulink signal object
off
"Sine Wave" (Sin)
Table 2.5. "Sine Wave" Parameters
Parameter ValueSine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave1" (Sin)
Table 2.6. "Sine Wave1" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
12/40
Root System
7
Parameter Value
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave10" (Sin)
Table 2.7. "Sine Wave10" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave2" (Sin)
Table 2.8. "Sine Wave2" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
13/40
Root System
8
Parameter Value
Interpret vector paramet-
ers as 1-D
on
"Sine Wave3" (Sin)
Table 2.9. "Sine Wave3" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave4" (Sin)
Table 2.10. "Sine Wave4" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
14/40
Root System
9
"Sine Wave5" (Sin)
Table 2.11. "Sine Wave5" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-ers as 1-D
on
"Sine Wave6" (Sin)
Table 2.12. "Sine Wave6" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave7" (Sin)
Table 2.13. "Sine Wave7" Parameters
Parameter Value
Sine type Time based
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
15/40
Root System
10
Parameter Value
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave8" (Sin)
Table 2.14. "Sine Wave8" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
Frequency (rad/sec) 1
Phase (rad) 0Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"Sine Wave9" (Sin)
Table 2.15. "Sine Wave9" Parameters
Parameter Value
Sine type Time based
Time (t) Use simulation time
Amplitude 1
Bias 0
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
16/40
Root System
11
Parameter Value
Frequency (rad/sec) 1
Phase (rad) 0
Samples per period 10
Number of offset sampl-
es
0
Sample time .1
Interpret vector paramet-
ers as 1-D
on
"ss" (DiscreteStateSpace)
Table 2.16. "ss" Parameters
Parameter Value
A 0
B 1
C 1
D 0
Initial conditions 0
Sample time (-1 for inhe-
rited)
-1
State name must resolve
to Simulink signal object
off
"Tapped Delay" (S-Function)
Table 2.17. "Tapped Delay" Parameters
Parameter Value
SimulinkmasksInitialCo-
ndition_MP
0.0
SimulinkmasksSampleTi-
me_MP
-1
SimulinkmasksNumber-
OfDelays_MP
4
SimulinkmasksOrderOu-
tputVectorStartingWith_-
MP
Oldest
SimulinkmasksIncludeC-
urrentInputInOutputVect-
or_MP
off
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
17/40
Root System
12
"tf" (DiscreteTransferFcn)
Table 2.18. "tf" Parameters
Parameter Value
Numerator coefficients
source
Dialog
Numerator coefficients [1]
Denominator coefficients
source
Dialog
Denominator coefficients [1 0.5]
Initial states source Dialog
Initial states 0
Input processing Elements as channels (sample based)
External reset NoneInitial states on denomin-
ator side
0
Filter structure Direct form II
Sample time (-1 for inhe-
rited)
-1
Optimize by skipping di-
vide by leading denomin-
ator coefficient (a0)
off
Numerator coefficient
minimum
[]
Numerator coefficient
maximum
[]
Denominator coefficient
minimum
[]
Denominator coefficient
maximum
[]
Output minimum []
Output maximum []
State data type Inherit: Same as input
Multiplicand data type Inherit: Same as input
Numerator coefficientdata type
Inherit: Inherit via internal rule
Denominator coefficient
data type
Inherit: Inherit via internal rule
Numerator product outp-
ut data type
Inherit: Inherit via internal rule
Denominator product ou-
tput data type
Inherit: Inherit via internal rule
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
18/40
Root System
13
Parameter Value
Numerator accumulator
data type
Inherit: Inherit via internal rule
Denominator accumulat-
or data type
Inherit: Inherit via internal rule
Output data type Inherit: Inherit via internal rule
Lock data type settings
against changes by the fi-
xed-point tools
off
Integer rounding mode Floor
Saturate on integer overf-
low
off
State name must resolve
to Simulink signal object
off
"Unit Delay" (UnitDelay)
Table 2.19. "Unit Delay" Parameters
Parameter Value
Initial condition 0
Input processing Inherited
Sample time (-1 for inhe-
rited)
-1
State name must resolve
to Simulink signal object
off
"wma" (S-Function)
Table 2.20. "wma" Parameters
Parameter Value
Weights [.5 .5]
Initial condition 0.0
Sample time -1Output data type Inherit: Inherit via internal rule
Lock output scaling agai-
nst changes by the autosc-
aling tool
off
Integer rounding mode Floor
Saturate to max or min
when overflows occur
off
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
19/40
Root System
14
Parameter Value
Gain data type Inherit: Inherit via internal rule
"ZOH" (ZeroOrderHold)Table 2.21. "ZOH" Parameters
Parameter Value
Sample time (-1 for inhe-
rited)
-1
"zp" (DiscreteZeroPole)
Table 2.22. "zp" ParametersParameter Value
Zeros [1]
Poles [0 0.5]
Gain 1
Sample time (-1 for inhe-
rited)
-1
State name must resolve
to Simulink signal object
off
Block Execution Order1. Sine Wave [6] (Sin)
2. Filter [3] (DiscreteFilter)
3. Integer Delay [4] (Delay)
4. Sine Wave5 [8] (Sin)
5. Integrator [5] (DiscreteIntegrator)
6. Scope [6] (Scope)
7. Sine Wave4 [8] (Sin)
8. Memory [5] (Memory)
9. Sine Wave6 [9] (Sin)
10. Sine Wave1 [6] (Sin)
11. ss [11] (DiscreteStateSpace)
12. Sine Wave10 [7] (Sin)
13. ZOH [14] (ZeroOrderHold)
14. Sine Wave2 [7] (Sin)
15. tf [12] (DiscreteTransferFcn)
16. Sine Wave3 [8] (Sin)
17. zp [14] (DiscreteZeroPole)
18. Sine Wave7 [9] (Sin)
19. Tapped Delay [11] (S-Function)
20. Sine Wave8 [10] (Sin)
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
20/40
Root System
15
21. Unit Delay [13] (UnitDelay)
22. Sine Wave9 [10] (Sin)
23. wma [13] (S-Function)
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
21/40
16
Chapter 3. System Design Variables
Table of Contents
Design Variable Details ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... . 16
Design Variable Details
DblOver. 0
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
DelayOrder. 1
Used by Blocks:
• SDD_discrete/Tapped Delay [11]
Resolved in: mask workspace (SDD_discrete/Tapped Delay)
DoSatur. 0
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
Table 3.1. GainDataType
Property Value
DataTypeMode Fixed-point: unspecified scaling
Signedness Signed
SignednessBool true
WordLength 16
FixedExponent 0
FractionLength 0
Slope 1
SlopeAdjustmentFactor 1
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
22/40
System Design Variables
17
Bias 0
DataTypeOverride Inherit
IsAlias false
Description
DataScope Auto
HeaderFile
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
GainDataTypeScalingMode. 2
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
GainScaling. 9.7656e-04
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
MatRadixGroup. 5
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
NumDelays. 4
Used by Blocks:• SDD_discrete/Tapped Delay [11]
Resolved in: mask workspace (SDD_discrete/Tapped Delay)
Table 3.2. OutDataType
Property Value
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
23/40
System Design Variables
18
DataTypeMode Fixed-point: unspecified scaling
Signedness Signed
SignednessBool true
WordLength 16
FixedExponent 0
FractionLength 0
Slope 1
SlopeAdjustmentFactor 1
Bias 0
DataTypeOverride Inherit
IsAlias false
Description
DataScope Auto
HeaderFile
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
OutScaling. 9.7656e-04
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
OutputDataTypeScalingMode. 2
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
RndMeth. 3
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
dolog. 0
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
24/40
System Design Variables
19
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
includeCurrent. 0
Used by Blocks:
• SDD_discrete/Tapped Delay [11]
Resolved in: mask workspace (SDD_discrete/Tapped Delay)
mgainval. [0.5 0.5 ]
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
samptime. -1
Used by Blocks:
• SDD_discrete/Tapped Delay [11]
Resolved in: mask workspace (SDD_discrete/Tapped Delay)
samptime. -1
Used by Blocks:
• SDD_discrete/wma [13]
Resolved in: mask workspace (SDD_discrete/wma)
vinit. 0
Used by Blocks:
• SDD_discrete/Tapped Delay [11]
Resolved in: mask workspace (SDD_discrete/Tapped Delay)
vinit. 0
Used by Blocks:
• SDD_discrete/wma [13]
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
25/40
System Design Variables
20
Resolved in: mask workspace (SDD_discrete/wma)
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
26/40
21
Chapter 4. System Model ConfigurationSource: Model
Source Name: SDD_discrete
Table 4.1. SDD_discrete Configuration Set
Property Value
Description
Components [SDD_discrete Configuration Set.Components(1-
) [21], SDD_discrete Configuration Set.Com-
ponents(2) [22], SDD_discrete Configuration
Set.Components(3) [23], SDD_discrete Con-
figuration Set.Components(4) [24], SDD_dis-
crete Configuration Set.Components(5) [27],
SDD_discrete Configuration Set.Components(6) [-
28], SDD_discrete Configuration Set.Compon-ents(7) [28], SDD_discrete Configuration Set.-
Components(8) [29], SDD_discrete Configura-
tion Set.Components(9) [31]]
Name Configuration
SimulationMode normal
Table 4.2. SDD_discrete Configuration Set.Components [21](1)
Property Value
Name Solver
Description
Components
StartTime 0.0
StopTime 10
AbsTol auto
FixedStep 0.1
InitialStep auto
MaxNumMinSteps -1
MaxOrder 5
ZcThreshold auto
ConsecutiveZCsStepRelTol 10*128*eps
MaxConsecutiveZCs 1000
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep auto
MinStep auto
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
27/40
System Model Configuration
22
MaxConsecutiveMinStep 1
RelTol 1e-3
SolverMode Auto
EnableConcurrentExecution off
ConcurrentTasks off
Solver ode45
SolverName ode45
SolverType Variable-step
SolverJacobianMethodControl auto
ShapePreserveControl DisableAll
ZeroCrossControl UseLocalSettings
ZeroCrossAlgorithm Nonadaptive
SolverResetMethod Fast
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint Unconstrained
InsertRTBMode Whenever possible
SampleTimeProperty
Table 4.3. SDD_discrete Configuration Set.Components [21](2)
Property Value
Name Data Import/Export
Description
Components
Decimation 1
ExternalInput [t, u]
FinalStateName xFinal
InitialState xInitial
LimitDataPoints on
MaxDataPoints 1000
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat Array
SignalLoggingSaveFormat ModelDataLogs
SaveOutput on
SaveState off
SignalLogging on
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
28/40
System Model Configuration
23
DSMLogging on
InspectSignalLogs off
VisualizeSimOutput on
StreamToWorkspace off
StreamVariableName streamout
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName xout
TimeSaveName tout
OutputSaveName yout
SignalLoggingName logsout
DSMLoggingName dsmout
OutputOption RefineOutputTimes
OutputTimes []
ReturnWorkspaceOutputsName out
Refine 1
LoggingIntervals [-inf, inf]
Table 4.4. SDD_discrete Configuration Set.Components [21](3)
Property Value
Name Optimization
Description
Components
BlockReduction off
BooleanDataType on
ConditionallyExecuteInputs on
DefaultParameterBehavior Tunable
InlineParams off
UseDivisionForNetSlopeComputation off
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType double
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
GlobalBufferReuse on
GlobalVariableUsage None
StrengthReduction off
AdvancedOptControl
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
29/40
System Model Configuration
24
EnforceIntegerDowncast on
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType uint_T
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs Structure reference
PassReuseOutputArgsThreshold 12
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType Native Integer
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero on
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan inf
EvaledLifeSpan Inf
MaxStackSize Inherit from target
BufferReusableBoundary on
SimCompilerOptimization off
AccelVerboseBuild off
Table 4.5. SDD_discrete Configuration Set.Components [21](4)
Property Value
Name Diagnostics
Description
Components
RTPrefix error
ConsistencyChecking none
ArrayBoundsChecking none
SignalInfNanChecking none
SignalRangeChecking none
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
30/40
System Model Configuration
25
ReadBeforeWriteMsg UseLocalSettings
WriteAfterWriteMsg UseLocalSettings
WriteAfterReadMsg UseLocalSettings
AlgebraicLoopMsg warning
ArtificialAlgebraicLoopMsg warning
SaveWithDisabledLinksMsg warning
SaveWithParameterizedLinksMsg none
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection Classic
MergeDetectMultiDrivingBlocksExec none
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl TryResolveAllWithWarning
BlockPriorityViolationMsg warning
MinStepSizeMsg warning
TimeAdjustmentMsg none
MaxConsecutiveZCsMsg error
MaskedZcDiagnostic warning
IgnoredZcDiagnostic warning
SolverPrmCheckMsg none
InheritedTsInSrcMsg warning
MultiTaskDSMMsg warning
MultiTaskCondExecSysMsg none
MultiTaskRateTransMsg error
SingleTaskRateTransMsg none
TasksWithSamePriorityMsg warning
SigSpecEnsureSampleTimeMsg warning
CheckMatrixSingularityMsg none
IntegerOverflowMsg warning
Int32ToFloatConvMsg warning
ParameterDowncastMsg error
ParameterOverflowMsg error
ParameterUnderflowMsg noneParameterPrecisionLossMsg warning
ParameterTunabilityLossMsg warning
FixptConstUnderflowMsg none
FixptConstOverflowMsg none
FixptConstPrecisionLossMsg none
UnderSpecifiedDataTypeMsg none
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
31/40
System Model Configuration
26
UnnecessaryDatatypeConvMsg none
VectorMatrixConversionMsg none
InvalidFcnCallConnMsg error
FcnCallInpInsideContextMsg UseLocalSettings
SignalLabelMismatchMsg none
UnconnectedInputMsg warning
UnconnectedOutputMsg warning
UnconnectedLineMsg warning
SFcnCompatibilityMsg none
FrameProcessingCompatibilityMsg error
UniqueDataStoreMsg none
BusObjectLabelMismatch warning
RootOutportRequireBusObject warning
AssertControl UseLocalSettings
Echo
EnableOverflowDetection off
AllowSymbolicDim off
ModelReferenceIOMsg none
ModelReferenceVersionMismatchMessage none
ModelReferenceIOMismatchMessage none
ModelReferenceCSMismatchMessage none
ModelReferenceSimTargetVerbose off
UnknownTsInhSupMsg warning
ModelReferenceDataLoggingMessage warning
ModelReferenceSymbolNameMessage warning
ModelReferenceExtraNoncontSigs error
StateNameClashWarn warning
SimStateInterfaceChecksumMismatchMsg warning
SimStateOlderReleaseMsg error
InitInArrayFormatMsg warning
StrictBusMsg ErrorLevel1
BusNameAdapt WarnAndRepair
NonBusSignalsTreatedAsBus noneSFUnusedDataAndEventsDiag warning
SFUnexpectedBacktrackingDiag warning
SFInvalidInputDataAccessInChartInitDiag warning
SFNoUnconditionalDefaultTransitionDiag warning
SFTransitionOutsideNaturalParentDiag warning
SFUnconditionalTransitionShadowingDiag warning
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
32/40
System Model Configuration
27
SFUndirectedBroadcastEventsDiag warning
SFTransitionActionBeforeConditionDiag warning
SFOutputUsedAsStateInMooreChartDiag error
IntegerSaturationMsg warning
Table 4.6. SDD_discrete Configuration Set.Components [21](5)
Property Value
Name Hardware Implementation
Description
Components
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger Char
ProdLargestAtomicFloat None
ProdIntDivRoundTo Undefined
ProdEndianess Unspecified
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType 32-bit Generic
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger Char
TargetLargestAtomicFloat None
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo Undefined
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
33/40
System Model Configuration
28
TargetEndianess Unspecified
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType Specified
TargetUnknown off
ProdEqTarget on
Table 4.7. SDD_discrete Configuration Set.Components [21](6)
Property Value
Name Model Referencing
Description
Components
UpdateModelReferenceTargets IfOutOfDateOrStructuralChange
SkipRefExpFcnMdlSchedulingOrderCheck off
EnableRefExpFcnMdlSchedulingChecks on
CheckModelReferenceTargetMessage error
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit None
ModelReferenceNumInstancesAllowed Multi
PropagateVarSize Infer from blocks in model
ModelDependencies
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
Table 4.8. SDD_discrete Configuration Set.Components [21](7)
Property Value
Name Simulation Target
Description
Components
SimCustomSourceCode
SimCustomHeaderCode
SimCustomInitializer
SimCustomTerminator
SimReservedNameArray
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
34/40
System Model Configuration
29
SimUserSources
SimUserIncludeDirs
SimUserLibraries
SFSimEnableDebug off
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode sf_incremental_build
SimDataInitializer
SimGenImportedTypeDefs off
Table 4.9. SDD_discrete Configuration Set.Components [21](8)
Property Value
Name Code Generation
SystemTargetFile grt.tlc
TLCOptions
CodeGenDirectory
GenCodeOnly off
MakeCommand make_rtw
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName
TemplateMakefile grt_default_tmf
PostCodeGenCommand
Description
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode Default
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
35/40
System Model Configuration
30
ConfigurationMode Optimized
ProcessScript
ConfigurationScript
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode
CustomHeaderCode
CustomInclude
CustomSource
CustomLibrary
CustomInitializer
CustomTerminator
Toolchain Automatically locate an installed toolchain
BuildConfiguration Faster Builds
CustomToolchainOptions
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock None
CodeExecutionProfiling off
CodeExecutionProfileVariable executionProfile
CodeProfilingSaveOptions SummaryOnly
CodeProfilingInstrumentation off
SILDebugging off
TargetLang C
IncludeERTFirstTime on
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml offGenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization off
ObjectivePriorities
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
36/40
System Model Configuration
31
RTWCustomCompilerOptimizations
CheckMdlBeforeBuild Off
CustomRebuildMode OnUpdate
DataInitializer
Components [SDD_discrete Configuration Set.Components(8).-
Components(1) [31], SDD_discrete Configura-
tion Set.Components(8).Components(2) [33]]
Table 4.10. SDD_discrete Configuration Set.Components [21](9)
Property Value
Description Simulink Coverage Configuration Component
Components
Name Simulink Coverage
RecordCoverage onCovPath /
CovSaveName covdata
CovCompData
CovMetricSettings r
CovFilter
CovHTMLOptions
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
CovSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName covCumulativeData
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable off
CovModelRefExcluded
CovExternalEMLEnable off
CovSFcnEnable on
CovBoundaryAbsTol 1.0000e-05
CovBoundaryRelTol 0.0100
CovUseTimeInterval off
CovStartTime 0
CovStopTime 0
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
37/40
System Model Configuration
32
Table 4.11. SDD_discrete Configuration
Set.Components(8).Components [31](1)
Property Value
Name Code Appearance
DescriptionComponents
ForceParamTrailComments off
GenerateComments on
CommentStyle Auto
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
PrefixModelToSubsysFcnNames on
MangleLength 1
CustomSymbolStr $R$N$M
CustomSymbolStrGlobalVar $R$N$M
CustomSymbolStrType $N$R$M_T
CustomSymbolStrField $N$M
CustomSymbolStrFcn $R$N$M$F
CustomSymbolStrFcnArg rt$I$N$M
CustomSymbolStrBlkIO rtb_$N$M
CustomSymbolStrTmpVar $N$M
CustomSymbolStrMacro $R$N$M
CustomSymbolStrUtil $N$C
CustomCommentsFcn
DefineNamingRule None
DefineNamingFcn
ParamNamingRule None
ParamNamingFcn
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
38/40
System Model Configuration
33
SignalNamingRule None
SignalNamingFcn
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier Shortened
InlinedPrmAccess Literals
ReqsInCode off
UseSimReservedNames off
ReservedNameArray
Table 4.12. SDD_discrete Configuration
Set.Components(8).Components [31](2)
Property Value
Name Target
Description
Components
IsERTTarget off
TargetFcnLib ansi_tfl_tmw.mat
TargetLibSuffix
TargetPreCompLibLocation
GenFloatMathFcnCalls NOT IN USE
TargetLangStandard C89/C90 (ANSI)
TargetFunctionLibrary NOT IN USE
CodeReplacementLibrary None
UtilityFuncGeneration Auto
ERTMultiwordTypeDef System defined
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
InferredTypesCompatibility off
GenerateSampleERTMain off
GenerateTestInterfaces off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
39/40
System Model Configuration
34
IncludeMdlTerminateFcn on
CombineOutputUpdateFcns off
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter Auto
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier rt_
MatFileLogging on
MultiInstanceERTCode off
CodeInterfacePackaging Nonreusable function
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
ParenthesesLevel Nominal
CastingMode Nominal
GenerateClassInterface off
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant on
GRTInterface on
GenerateAllocFcn off
UseToolchainInfoCompliant on
GenerateSharedConstants on
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile ext_commExtModeMexArgs
ExtModeIntrfLevel Level1
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
8/20/2019 Qualkitdo Rptgenext Qualificationreport SDD Discrete
40/40
System Model Configuration
GenerateASAP2 off
MultiInstanceErrorCode Error
Recommended