Politecnico  di  Torino  -­‐  DAUIN  Electronic  CAD  and  Reliability  Group  

in  collabora*on  with  

THESIS OFFERS

Politecnico  di  Torino  reference  contact:  Ing.  Luca  Sterpone  

luca.sterpone@polito.it  

DURATION  

DESCRIPTION  

REQUIREMENTS  

4  months  full  *me  

The   topic   of   the   thesis   is   to   study   and   develop   a  microprocessor   based   self   test   core   on   an   Altera   Cyclone  FPGA   that   allow   on-­‐line   tes*ng   of   airplane   electronic  circuitry.   The   case   study   is   an   industrial   property   of   TESEO  SpA.  The  work  will  consists  on  the  development  of  HDL    and  C/C++  soJware  code  for  the  tes*ng  and  ac*va*on  of  the  HW  components  connected  to  the  main  FPGA  board.  

The   thesis   will   be   executed   at   the   TESEO   research  laboratories.  A   scholarship   of   500   €,   which   include   Teseo   Ticket  Restaurant,   as   reimbursement   of   out   of   pocket   expenses   is  provided.  In  case  of  highly  performing  students  (based  on  the  evalua*on  made   by   the   Professor   and   Teseo)   an   addi*onal  final  premium  of  500  €  will  be  granted.  

Good   knowledge   of   VHDL   language   and   FPGA   simula*on  tools  It  is  appreciated  the  basic  knowledge  of  tes*ng  techniques