School of Engineering & Information TechnologyUniversiti Malaysia Sabah
KE 18201 Engineering Lab
Lab 1: Digital Abstraction
Name: _____________________
Student ID: _____________________
Section: _____________________
Date: _____________________
KE18201 – ENGINEERING LAB LAB1
TITLE: Digital Abstraction OBJECTIVE:To build basic logic gates using transistors and passive components.
EQUIPMENT REQUIRED:
Item QuantityDC variable power supply 1Osilloscope, Digital multimeter, Function generator 1Resistors : (1/4 W) 1 kΩ 4.7 kΩ 10 kΩ 100 kΩ
1122
NPN 2N3906 (or equivalent)PNP 2N3904 (or equivalent)
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KE18201 – ENGINEERING LAB LAB1
Digital Abstraction PrelabQuestion No. 1
With reference to the schematic symbols, briefly describe how the bipolar junction transistor (BJT) works as a switch. Hint: How to turn on or turn off BJT?
Question No. 2
With the aid of some diagram and graph, describe the concept of noise margins in logic circuits. What are the parameters needed and how to determine the:
a) Noise Margin for Low Inputb) Noise Margin for High Input
Hint: If you know the graph of noise margins, then you know how to answer this question.
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KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 1
1. Assemble the circuit as in Figure 1.
2. Use +5 Vdc and 0 V as your logic HIGH and logic LOW input respectively. Record the corresponding outputs.
3. Make a truth-table for this circuit and verify its operation. Which logic gate is represented by this circuit?
4. Apply input voltages from 0 V to 5 V. Tabulate and plot the output voltage Q versus input voltage A.
5. Based on your measurement in step (4), what are the best values of VOH, VIH, VOL, VIL? Consequently, what are the noise margins NMH and NML?
6. Determine the power dissipated in the circuit by obtaining the voltage across each component in the circuit and the current through the transistor. Hence calculate the total power dissipated in the circuit.
3
Q2
2N3904
R11kΩ
R2
100kΩ
VCC5V
Input A
Output Q
Figure 1
KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 2
1. Reassemble the circuit in Figure 2 by adding a second PNP transistor and remove the collector resistor as in Figure 2.
2. Use +5 Vdc and 0 V as your logic HIGH and logic LOW input respectively. Record the corresponding outputs.
3. Make a truth-table for this circuit and verify its operation. Which logic gate is represented by this circuit?
4. Apply input voltages from 0 V to 5 V. Tabulate and plot the output voltage Q versus input voltage A.
5. Based on your measurement in step (4), what are the best values of VOH, VIH, VOL, VIL? Also, what are the noise margins NMH and NML?
6. Determine the power dissipated each component in the circuit, then calculate the total power dissipated in the circuit.
7. What are the advantages of this circuit even though it requires two BJTs?
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Figure 2
Q1
2N3906
Q2
2N3904
R1
100kΩ
R2
100kΩ
VCC5V
Input A Output Q
KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 3
1. Construct the circuit as in Figure 3.
2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V (Ground) as your LOW input logic.
3. Make a truth-table for this circuit and verify its operation. Which logic gate is represented by this circuit?
4. Design a circuit that is having an inverse input with the circuit in Figure 3. Make a truth-table and draw out the circuit. Write down the name of the gate.
5
Figure 3
Q1
2N3904
Q2
2N3904
R1
10kΩ
R2
10kΩ
VCC5V
R44.7kΩ
Input A
Input B
Output Q
KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 4
1. Construct the circuit as in Figure 4.
2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V (Ground) as your LOW input logic.
3. Make a truth-table for this circuit and verify its operation. Which logic gate is represented by this circuit?
4. Design a circuit that is having an inverse input with the circuit in Figure 4. Make the truth-table and draw out the circuit. Write down the name of the gate.
6
Figure 4
Q1
2N3904
Q2
2N3904
R1
10kΩ
R2
10kΩ
VCC5V
R44.7kΩ
Input A
Input B
Output Q
KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 5
1. Construct the circuit as in Figure 5.
2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V (Ground) as your LOW input logic.
3. Make a truth-table for this circuit and verify its operation. Which logic gate is represented by this circuit?
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Figure 5
Q1
2N3904
Q2
2N3904
R1
10kΩ
R2
10kΩ
VCC5V
R44.7kΩ
Input A
Input B
Output Q
KE18201 – ENGINEERING LAB LAB1
UNIVERSITI MALAYSIA SABAHSEKOLAH KEJURUTERAAN DAN TEKNOLOGI MAKLUMAT
KE18201 Engineering Lab
LAB # 2
DIGITAL ABSTRACTION
Name : ....………………………………………………………………………
Group Members : …………………………………………………………………………
…………………………………………………………………………
Section : …………………………………………………………………………
Date : …………………………………………………………………………
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KE18201 – ENGINEERING LAB LAB1
RESULT
Basic Logic Gate 1
Step (2): input: +5 V output: ______________ V input: 0 V output: ______________ V
Step (3):
Logic Gates Name: ____________________
Step (4):
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Input Output
KE18201 – ENGINEERING LAB LAB1
Step (5):
Step (6):
10
KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 2
Step (2): input: +5 V output: ______________ V input: 0 V output: ______________ V
Step (3):
Logic Gates Name: ____________________
Step (4):
11
Input Output
KE18201 – ENGINEERING LAB LAB1
Step (5):
Step (6):
Step (7):
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KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 3
Step (3):
Table AInput Output
A (Volts)LogicState
B (Volts)LogicState
Measured Vout
LogicState
Logic Gates Name: ____________________
Step (4):
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KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 4
Step (3):
Table AInput Output
A (Volts)LogicState
B (Volts)LogicState
Measured Vout
LogicState
Logic Gates Name: ____________________
Step (4):
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KE18201 – ENGINEERING LAB LAB1
Basic Logic Gate 5
Step (3):
Table AInput Output
A (Volts)LogicState
B (Volts)LogicState
Measured Vout
LogicState
Logic Gates Name: ____________________
CONCLUSION
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