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An Introduction to Solvers
Plexim GmbH
Outline
Variable-step simulation
Ideal switches
Piecewise linear simulation
Non-stiff, stiff solvers
Stability domain
Event detection
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Different Degrees of Simulation Detail
1. Power circuit modeled as linear transfer function
Small signal behavior
No switching, no harmonics
! Controller design
2. Power circuit modeled with ideal components
Large signal behavior, voltage and current waveforms
Overall system performance
! Circuit design and controller verification
3. Power circuit with manufacturer specific components
Parasitic effects (magnetic hysteresis)
Switching transitions (diode reverse recovery)
Component stress (electrical or thermal)
! Choice of components
Powerconverter
Controller
LoadPower input Power output
Controlsignals
Reference
Measurement
vi ii io vo
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Comparison - SPICE and PLECS
Passive component models are similar
R, L, C
The main difference is the semiconductor model
MOSFET model - SPICE
Detailed physical device model
Has 47 parameters
MOSFET model - PLECSSimplified behavioral model
Two parameters: Ronand T
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High Speed Simulations with Ideal Switches
Conventional continuous diode mode
Arbitrary static and
dynamic characteristicSnubber often required
Ideal diode model in PLECS
Instantaneous on/offcharacteristic
Optional on-resistanceand forward voltage
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Comparison: Diode Rectifier
Simulation with conventional and ideal switches
Simulation steps:1160"153
Computation time:0.6s "0.08s
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State Space Model: Buck Converter
State space description
Switch conducting Diode conducting
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Variable Time-Step Simulation: Buck Converter
Transistor conductsDiode blocks
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Variable Time-Step Simulation: Buck Converter
Transistor opens
Impulsive voltage acrossinductor
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Variable Time-Step Simulation: Buck Converter
Impulsive voltage closesdiode
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Variable Time-Step Simulation: Buck Converter
Transistor open
Diode conducts
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Variable Time-Step Simulation: Buck Converter
Switch timing Problem:Diode opens too late
Impulsive voltage acrossinductor
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Variable Time-Step Simulation: Buck Converter
Zero-Crossing Detection:
Time-step is reduced
Diode opens exactly at
the zero-crossing
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Operating Principle of PLECS
Circuit transformed into state-variable system
One set of matrices per switch combination
AB C
D
1s
Switchmanag
er
PLECS S-function
Solver
u
g
y
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Solver Overview
Continuous solvers
Taylor series polynomial
Step size control
Acceptable error
Relative, absolute tolerance
Output refining
Discrete solvers
Trapezoidal rule
Step size selection
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Taylor Series Expansion
Approximate a continuousfunction with a higher orderpolynomial
The higher the order, themore accurate the solution
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y=sin(x)
1storder
5thorder
Source: WikipediaTaylor series:
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Continuous Solver Operation
y(t) can be constructed using in a piecewise fashion usingp1(t) and p2(t), which are Taylor series polynomials
A continuous solver calculates the point yn+1by calculatingthe equivalent Taylor series for p1(t)
An nthorder solver has the same accuracy as an nthorderTaylor series.
"#$%!$%
'#$%
$$( $()"
'('()"
*( *()"
Solver Settings
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Acceptable Error
Local error
Difference between 4th and 5th order solutions
Acceptable errorDefines the local error limitDetermined by tolrelexcept for small state values
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Acceptable errorLocal error
Result valid if:
Step Size Control
Step size automatically controlled by the solver(variable step)
Goal: Keep error within acceptable error limits
Key advantage: Accuracy directly specified by the user
Step size calculated using
Relative error, !
Relative tolerance, tolrelPrevious time step, hold
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hold
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Tolerances
Relative tolerance
Determines acceptable error limit when x > 0
Start with 10-3
(0.1%)Numerical limit is 10-16
Absolute tolerance
Best to set to auto
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Example LC circuit
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Analytical solution:
Result: tolrel= 1e-3
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Example LC circuit
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Analytical solution:
Result: tolrel= 1e-6
Refining the Output
Option 1: Reduce tolrelor time step
Solver must recalculate polynomial coefficients at each timestep
Less efficient
Option 2: Increase refine factor
Solver uses existing polynomial coefficients to calculate
additional points.More efficient
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Solver Families
Non-stiff
Inherently more efficient (no iteration required)
Smaller stability domainForward Euler - 1st order
ode45/Dopri - 5th order
Stiff
Less efficient (iteration required)
Larger stability domain
Backward Euler - 1st order
Radau/ode23tb - 5th order
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Forward Euler
Truncate the Taylor Seriesafter the first term:
1st order accurate
Explicitintegrationalgorithm
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Numerical Experiment
Scalar system
Analytical solution
Forward Euler
Unstable for ah
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Stability Domain of Forward Euler
Integration algorithm
Stable if the eigenvalues of
Fare inside the unit circle
I.e. if the eigenvalues of Ah
are inside a unit circlearound (-1, 0)
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Analysis of RLC Example
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Floating Point Arithmetic
What is 0.3 - 0.2 - 0.1 ?
0.299999999999999989
- 0.200000000000000011
- 0.100000000000000006
= -0.000000000000000028
What MATLAB calculates:
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Floating Point Arithmetic (2)
a
b+
c+
a + b + c=
Summation of floating point numbers
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Backward Euler
Develop Taylor Seriesaround a time in the future:
Must be solved iterativelyfor the unknown x(t*+h)
Implicitintegrationalgorithm
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Numerical Experiment (Revisited)
Scalar system
Analytical solution
Backward Euler
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Stability Domain of Backward Euler
Integration algorithm
Stable if the eigenvalues ofAhare outside a unit circle
around (1, 0)
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Stability Domain
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Dopri
RadauTustin
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Higher Order Integration Methods
E.g. Explicit Midpoint Rule
Two stages (one intermediate, one final)
2nd order accurate
More accurate than two FE steps of half size!
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Event Detection
Define auxiliary functions that help locate discontinuities.
Function zeros must coincide with the discontinuities.
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Missed Events - Problem
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B
A
Output
0
0
Time step1 Time step2
Missed Events - Solution
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B
A
Output
0
0
1
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PWM Generation
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A
B
!
"#$%
$& $&'(
"&
"&'(
Trapezoidal Rule
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Time Step Selection
Accuracy is indirectly determined by the time step
To ensure accuracy, reduce the time step and observe any
changes in the outputOr: Compare with a continuous simulation
Continuous waveform
Highest transient frequency constrains sample time
Set tsample< ttransient/10
Integration underestimate approx 3%
Switched system
Switches turned on at sample instants
Set tsample< tsw/100
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Comparison - Continuous and Discrete solver
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Simulated current
Time steps:
Continuous: tolrel= 10-6
Discrete: ts = 50"s
Underdamped RLC circuit
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Conclusion
Variable step solver operation
Causes of model stiffness
Solutions to stiffnessExplicit (non-stiff) vs. Implicit (stiff) solvers
Limits of stability
Limits of numerical accuracy
Event detection
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Plexim GmbH
Tips to Achieve a Fast Simulation
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Introduction
The problemLarge simulation models can become slow
Many states, detailed component modelsSpeeding up the simulation
Model simplification
Model tuning
Real-time accelerator
Averaged modeling
Efficient PWM generation
Example - Three phase inverter
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Simplification of PV Cell Model
Exact model: accounts for non-linear VI characteristicNeeded for implementing MPPT simulation
Temperature and insolation dependency also important
Insolation = 1000 W/m2
T = 25 CMPP occurs at 17.6 V
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Diode PV Cell Model
Current = fn(voltage, insolation,temp)
Cell model
Shockley diode eq.
I
Reference:
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PV Lookup Table Implementation
Simplified implementation
Voltage-controlled current source
Capacitor included to add a state and avoid an algebraicloop
Precalculated PV data
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Model Tuning
Simulation settings.
Choose the correct solver.
Variable time step solver.
Reducing the switching frequency reduces the computationaloverhead.
Blockset StandaloneNon-stiff ode45 Dopri
Stiff ode23tb/ode15s Radau
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Real Time Accelerator
Converts model into c-code.
Compiles executable.
Runs as native rather than interpreted program.
PLECS circuit converted into C-code.
Automatically integrated with Simulink c-code.
Speed gain = 2 - 5 times.
Generate and compile takes 20 seconds.
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Averaged Converter Modeling
Averaged converter models
Retain the low frequency dynamics.
Averages switching action over one cycle.Requires specialized knowledge of topology.
Speed gains are an order of magnitude.
Procedure
Average inverter model.
Average space vector modulation.
Break algebraic loops.
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Averaging a Three Phase Converter
Full switching model
Simulates exact electrical dynamics.
Switching action slows down the simulation where slower dynamics arestudied.
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Inverter Leg
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d=0.3
d.T
Vdc
d.Vdc
d.ia
ia
Averaged Inverter Leg
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Va modeled using as a controlled voltage source
idc modeled as a controlled current source
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Averaged Inverter Model
Assumes AC voltages are ideally imposed
Used for rotor-side and grid-side converter
Averaging of inverter legs A and B
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Averaging Space Vector Modulation
Converter Vdq* to ma, mb, mcUse 3 phase PWM.
Extend operating range using overmodulation.
Approximation of space vector modulation with a continuous modulation index
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Overmodulation
Add zero-sequence signal to modulation index
Reference: Vector Control of a Double-Sided PWM Converter and Induction Machine Drive, R. Ottersten
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Algebraic Loops
What?
Multiple direct feedthrough blocks connected in a loop.
PLECS continuous inputs appear as a direct feedthrough system toSimulink.
In feedback control systems, this will cause an algebraic loop.
Problem: Algebraic loops must be solved iteratively
The simulation time of each step is increased
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Breaking Algebraic Loops
Option 1. Use memory block or similar
Time delay causes instability.
Step size may need to be limited.Option 2. Use a low pass filter
The extra state breaks the algebraic loop.
Time constant must be chosen with care.
Provides more deterministic behavior with variable stepsimulation.
Breaking an algebraic loop with a low-pass filter.
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Average DC-DC Converter Modeling
Average switch cell modeling
Replace switch/diode combination with a voltage current source.
Ref: Fundamentals of Power Electronics, Erickson & Maksimovic
Equations
I2= (1 - d)/I1
V1= (1 - d)/V2
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Simplification of Current Controlled Converters
Boost converter is current controlled
Can replace the inductor with a current source.
Efficient PWM Generation in PLECS
Doubly fed induction generator example, 0.1 s simulation, PLECS Blockset
Sampled PWM: 29.6 s
Continuous PWM: 45.1 s
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Sampled PWM Continuous PWM
=> 52 % faster
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Control aims
Sinusoidal input currents
Regulated dc bus voltage
Example - Three Phase Boost Rectifier
Block Diagram
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PWM
Stiff systemSimulated for 0.2 s in PLECS Blockset & Standalone
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Results - PLECS Blockset
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Controls in Simulink
ode23tb solver used (stiff)
Results - PLECS Standalone
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Radau solver used (stiff)
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Conclusion
Choose the right solver for the job (stiff or non-stiff)
Use sampled PWM
Make appropriate simplificationsFor extremely large models:
PLECS Standalone
Real-time workshop
Averaged converter modeling
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An Introduction to Thermal Modelingand Simulation
Plexim GmbH
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Why Thermal Simulation?
Reduce development time
Predict performance and investigate keytradeoffs early in the design process
Thermal measurements can be difficult andtime consuming
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Sources of Thermal Losses
Passive components
Resistive power loss: ploss(t) = vR(t) iR(t)
Loads e.g. break resistors
Filters
Winding resistance
Power semiconductors
Conduction lossSwitching loss
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Semiconductor Losses
Conduction loss
Switching loss
Gate signal
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Switching Losses
Switching energy loss dependent on:
Blocking voltage, device current, junction temperature, gate drive
Eon= f(Vce, Ic, Tj, Rg)
Turn on Turn off
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Example IGCT Turn-off: Varying Stray Inductance
Courtesy ABB
0.0
1.5
3.0
4.5kV
0.0
1.0
2.0
3.0kA
VPK= 3800V
VDC = 2 kV
TJ = 125C
5 10 15 s
300 nH (10.5 Ws)
800 nH (12 Ws)
1500 nH (13.5 Ws)
tf!2.5s, ttail!7s
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Switching Loss Calculation from Transients
Accurate physical device models required
Often unavailable
Physical parameters often unknown during design phase.
Stray inductance of PCB
Small simulation steps required
Large computation times
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Lookup Table Approach for Switching Losses
Instantaneous switching maintained for speed.
Switching losses are read from a database after switchingevent.
Esw= f(Tj, vblock, ion) (Rg= const)
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Example Lookup Table
Turn-off loss a function of:
Current before switching
Voltage after switching
Temperature at switching
Rgis assumed constant
Exact loss found using
interpolationNote the voltage andcurrent polarities!
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Semiconductor Conduction Losses
On-state loss
Conduction profile is nonlinear:
von= f(ion, Tj).Conduction profile stored inlookup table
Exact voltage found usinginterpolation
Conduction power loss:
ploss(t) = von(t) ion(t)
Off-state loss
Negligible - low leakage current
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Simulation of an Electrical-Thermal Model
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Combined Electrical-Thermal Simulation
Thermal and electricaldomains not coupled
Semiconductor losses dontappear in electrical circuit
Energy conservation can bemaintained by subtractingthermal losses from electricalcircuit
Switching losses added overzero time
Filtered by large capacitanceof thermal circuit
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Semiconductor Thermal Behavior
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Verification of Lookup Table Approach
IGBT loss modeling using an ideal switch and lookup table
Simulation speed increased by a factor of 20
Good agreement with measurements
Pt - simulated IGBT lossPtm - measured IGBT loss
Thermal Modeling of a Pulsed Resonant Converter
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Acknowledments: Dr. Fabio Carastro, University of Nottingham
Simulation results
Experimental results
"t = 1.4!
"t = 1.4!
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A combined electrical-thermal model
Losses, heatsink, ambient temperature.
How are these represented using PLECS?
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Thermal Domain
Thermal circuit analogous to electrical circuit.
Thermal and electrical circuits solved simultaneously.
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A complete electrical-thermal model
The heatsink is the interface between the two domains
Automatically absorbs component losses
Propagates temperature back to semiconductorsThermal impedance modeled with RC elements
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Hierarchical Modeling of Thermal Structures
Junctions
Dual IGBTmodule
Heatsink
IGBT Plate
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Different Thermal Equivalent Networks
Cauer equivalent
Physics based thermal equivalentcircuit
Each Rthand Cthpair represents a
physical layer in the thermal circuit.
Foster equivalentCurve fitting approach based onheating and cooling characteristics.
No correspondence between Rth,nresp. Cth,n and the physical structure!
Any modification of the systemrequires recalculation of all values
Junction-Case Thermal Impedance
Define in thermal editor to observe junction temp fluctuations
Foster coefficients often given in datasheet
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Example junction-case thermal impedance
Foster network coefficients
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Foster Network Pitfalls
Only accurate if reference point x is a constant temperature
Cannot be arbitrarily extended beyond point x
Tjuncimmediately affected by temperature changes at x
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Reference: M. Mrz and P. Nance, Thermal modeling of power electronic systems, www.iisb.fraunhofer.de
Solution 1 - Use First Order Cauer Network
Calculate #from 63% R value
C = #/R
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Vcreaches 63.2% Vfinalafter #
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Solution 2 - Use a Constant-Temperature Heatsink
Set Cheatsinkto 0
Set heatsink temperature with a const temperature source
Foster network can be used for junction thermal impedance
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Measuring Average Device Losses
ConceptCalculate total switching
and conduction energy lostduring a sw cycle
Output as an average
power pulse during thenext cycle
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ImplementationBased on a C-Script block
Conduction and switching losses measure with a Probe
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Challenge: Large Thermal Time Constants
Thermal time constants: 0.1 100 s
Switching frequency: 1 100 kHz
Long simulation time until thermal steady-state is reached
Example
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Newton Raphson Analysis
Newton iterationApproach: Finding the roots of
: initial state vector : final state vector after a time T
Iterative solution
Jacobian J calculated numerically
requires n+1 simulation runs (for n statevariables)
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Newton Raphson: Convergence
Typically converges after
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Thermal Loss Feedback 1
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Efficiency:
P1,Pi=100W Po=100WP2=95W
Thermal Loss Feedback 2
100
Efficiency:
P1=105W Po,P2=100WPi=100W
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Thermal Loss Feedback 3
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Efficiency:
Thermal feedback:
P1=105.3W Po,P2=100WPi=100W
Physical RdsImplementation
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Rdsconstant during switching cycle
Resistance resolution:
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Obtaining Switching Loss Data
Experimental measurements
Switching losses highly dependent on gate drive circuit andstray parameters
Use a switching loss setup to characterize loss dependency onvoltage and current for two temperatures
Datasheets
Given for a specific gate resistance and stray inductance
Good approximations can be made by extrapolatingmanufacturers data (or asking for complete lossmeasurements)
Conclusion
Fast & accurate thermal simulation using lookup tables
Operation of a combined electrical-thermal simulation
Calculating average device losses
Steady state analysis using Newton Raphson analysis
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Advanced PLECS Tools
Plexim GmbH
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Advanced Tools
C-Script block
Control design tools
Steady-state analysis
AC sweep
Impulse response analysis
Loop gain analysis
Other
Subsystem - custom components
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Small Signal Analysis Tools
Possible workflow for controller design using PLECS tools:
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AC Sweep Analysis
Impulse Response Analysis
Converter Open LoopTransfer Function
Voltage controller designFreq domain
Loop Gain Analysisplbodefunction
Calculate loop gain
Gain/phasemargins met?
Verify with simulation
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Frequency Sweep
Algorithm:
For each frequency:
1. Run steady-state analysis
2. Apply sinusoidal perturbation
3. Extract system response using Fourier analysis
Caveats:Period length: least common multiple of system period andperturbation period
Computationally expensive
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Impulse Response Analysis
Impulse responseof a buck converter
Transfer function:
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Impulse Response Analysis
The original Laplace transform:
Apply some math
Reference: D.Maksimovic, Computer-Aided Small-Signal Analysis Based on Impulse Response of DC/DCSwitching Power Converters, IEEE Trans. On Power Electronics, Vol. 15, No. 6, Nov. 2000, pp. 1183-1191
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Buck Converter: Transfer Function
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Stability Verification
Loop Gain
Use Loop Gain Analysis Tool (Blockset) AC Sweep (Standalone), or
Calculate using plbode function
Measure gain and phase margins to check stability
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Custom Components
Why?
Support the top-down design approach
Easy to reuse, configure and measureCustom component features
Formed using the subsystem
User defined parameter, icon, initialisation commands andprobe signals
! All machines in PLECS are custom components
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0
0.5
1
0510152025
0
0.5
1
1.5
2
2.5
3
3.5
4
Voltage (V)Insolation (kW/m2)
Current(A)
Example - PV String Model
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Current surface datain lookup table
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Masked Subsystem Implementation
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C-script Block
Plexim GmbH
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What can it do?
C-control code emulation
Model custom components
Efficient sequence generationState machine modeling
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Function call interface
Solver operation (PLECS or Simulink)
Some function calls dependent on continuous or discrete states
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Main loop
Always executed
Output() called at least onceUpdate() called after Output if discrete state variables exist
Integration loop
Executed if continuous states defined in settings
Used for solving continuous differential equations
Continuous states used for declaring DEs
Event detection loop
Executed if a zero crossing signal defined in settings
For detecting the exact instant of a discontinuity
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Function calls in C-script block
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C-Script parameter window
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Code editor window
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Sample time setting
Discrete
Value: +ve
Fixed sample time
Continuous
Value: 0
Inherited from solver
VariableValue: -2
At each time step the NextSampleHit must be specified.
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Hybrid fixed and variable step setting
Fixed and variable time
Format: [1/fs,0; -2, 0]
First row element is the time settingSecond element is the offset time
Continuous, only major time steps
Format: [0, -1]
C-Script not called during integration or event detection loop
Eliminates unnecessary calls for certain blocks.
Use for blocks with discrete output. Example: Lookup table
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Pitfalls - cascading C-Script blocks
124
Controller cycle hit time - fixed step:Cycle time obtained by multiplication: tn = 1/fs*n
PWM cycle hit time - variable step:Cycle time is obtained by addition: tn = 1/fs+ 1/fs + ... n
Synchronization may be lost due to accumulated rounding error
Solution
Use a hybrid fixed/variable step setting for PWM block
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Macros
For interacting with model or solver
Examples
Input(0)Output(0)
NextSampleHit
CurrentTime
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Example - Space Vector Control
Three phase boost rectifier
Sinusoidal input currents
Regulated dc bus voltage
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Control Strategy
Outer voltage control loopInner decoupled current control loop
Space vector modulation
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Space vector modulation
Timing calculationSwitch signal generation
C-script block1
C-script block2
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Efficient sequence generation
Typical switching sequence
Space vector modulation
Option blanking delayMethod 1: Fixed time step
Test if t > thit, apply new switch signal
Requires small steps for accuracy => increased computationaloverhead
Method 2: Variable time stepCalculate hit times at beginning of switching sequence
Fewer simulation steps more efficient
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Example: PWM with blanking
Calculate transition times, t1,t2,t3,t4at beginning of cycle
State machine program executes at each transition:
Switching signal is updated
NextSampleHit is updated
Bipolar switching signal 1: S1, S4 on-1: S2, S3 on
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Efficient state machine implementation
Event driven
Useful for controller mode sequencing.
Example: Startup, overload, shutdown.
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External event
C-ScriptState machine
>
Relational operator- generates major step
Time setting:Simulation model: variableC-Script: continuous
if (IsMajorStep) test_input(v1,i1);
update_state_machine();
v1
External event >i1
Conclusion
Implement complex nonlinear and/or piecewisefunctions without complex block diagrams
Model custom components and controls
Generate efficient sequencing with exact but flexibletime step control
State machine modeling
Incorporate external C code for hardware controllers