Würth Elektronik Circuit Board Technology · Würth Elektronik Circuit Board Technology page 1 03.09.2014. Agenda Impedance and the circuit board ... Signal time (Timing) / bus timing

Webinar 2014: Benefits of flex-rigid & Co.:

Impedance matching for good signal integrity

Würth Elektronik Circuit Board Technology

www.we-online.com page 1 03.09.2014

Agenda

Impedance and the circuit board

Signal integrity and flex-rigid

Design options with flex-rigid

Co-operative design flow

Measurement and documentation

Summary, Q&A

S

I

G

N

A

L


Reasons for a change in the signal

Quelle: Polar

Interface

specification


PCB not an optimal tranfer medium between transmitter and receiver

Change of the information on a pcb influenced by:

• Length and width of conductor

• Losses by ohmic, capacitive and inductive resistances

• Raw material - loss factor and permittivity

• Changes in connector´s cross-sectional area = Impedance jump

• Switch of reference layers = Impedance jumps

• Reflections due to PTHs

• Crosstalk between conductors

• Noise interference from external sources (EMC shielding)

Impedance and the circuit board


Core topics are:

Impedance power matching

Signal time (Timing) / bus timing

Reflections

Example from USB3-design:

Signal integrity and the PCB


Impedance matched PCB

PCB as an information carrier

Optimum situation: Power matching Z=constant Impedance matched PCB

Sender Receiver T

Z Source

=50Ω

Z Conductor

=50Ω

Z Receiver

=50Ω Circuit Board


Parameters for the circuit board

L

R

C R+jωL

G+jωC Z=

Assumption:

Loss-free transmission

R;G=0 Widerstands und Ableitungsbelag

L

C Z=

R;G=0

Simple modell: Single Strip Line with one reference layer


L

C Z=

L mainly length of

conductor

C mainly given by:

Length x Width; dielectric thickness; εr

L

R

C

Parameters for the circuit board


Models: Layers/ track configurations

Layer configurations:

Track configurations:

line width

line width

space

Single Ended

Differential Pair

Surface

Microstrip

Embedded

Microstrip Stripline

Surface

Coplanar


Parameters for impedance calculations

www.we-online.de Seite 10 01/10/2013

T1

copper thickness

W2

upper track width (head)

r dielectric constant

FR4

H1

layer distance

Signal > Reference

r dielectric constant

solder resist

[typ. 3,5]

C2

thickness solder resist

over track

S1

gap

layout

C1=C3

thickness solder resist

over FR4

W1

lower track width (foot)

= layout

Effect of parameters

Impedanz - Einflussgrößen

rε

strong

strong

low medium

w+h = layouter / developer

+ PCB producer

t = galvanic process, base copper

εr = base material h

w t

Track width Layer distance Copper thickness Dielectric constant


big material mix (rigid material, flexible cores, adhesives, Bondply,

etc.)

Different stack-up´s in rigid and flexible

areas

– See example: Symmetrical-Strip-Line in rigid

converts to Surface Strip Line in flexible area

Low r values for Polyimide

Low dielectric thicknesses

– Standard Polyimide: 50µm

– thicker PI-filmes are very expensive

Specialties with flex-rigid


Zflex = Zrigid

Specialties with flex-rigid

Solution:

Define target impedance value

Choose impedance model

Choose H of flexible layer

– (! 75µm / 100µm PI are cost drivers!)

– ? Are there mechanical requirements?

(i.e. bending radii, dynamical bendings?)

Simulation: fit line width

consider Wmin with PCB producer

„Hatch“ - Option for reference layer


Which parameter especially for flex-rigid has to be regarded carefully

and has a big impact on the impedance value?


So now we will have a….

50

55

60

65

70

75

80

85

90

95

100

100 150 200 250 300

Z d

iff

[]

Separation [µm]

Design line / width, Polyimide 50µm

100µm

125µm

150µm

Line width

Effect of line / width parameters


Hatch: reference / shield openings

60

70

80

90

100

110

120

130

25% 50% 75% 100%

Z d

iff

[]

cross-hatch copper area

Reference layer with cross-hatch microstrip 125µm/150µm/125µm

100µm

75µm

50µm

Polyimidfilm

Copper removal

• Improving bendability

• Improving drying process

• Rising impedance value

Tipp for diff. pair:

(here 20% Cu)


IPC 2223 Differential pairs in flexible area

• Below pairs 100% copper

• Rest of area with shield opening

Reference layer with “shield opening”


Calculation and documentation 5Ri-4F-5Ri






Layer configuration: 1-layer in flexible / bendable area

Surface Coplanar – without reference layer

Flex-rigid 1F–xRi

FR4 Semiflex 1Ri–xRi

Remark: no reasonable values with single ended – only differential pairs possible!


Layer configuration: 2-layers in flexible / bendable area

Surface Microstrip – with 1 referenece layer

Flex-rigid xRi–2F–xRi

FR4 Semiflex 2Ri–xRi


Layer configuration: > 2-layers in flexible / bendable area

Stripline – with 2 reference layers

Flex-rigid > xRi–2F–xRi, i.e. 1Ri–6F–1Ri


Impedance measurement with test coupons

Standard

– Single ended

– Differential pair

Specific

– Flex and flex-rigid possible

– Smaller for integration into panel-frame

– Mixed modules possible

23

mm

28

mm

150 mm


Impedance measurement

TDR Technology

Windows based

10% - 90% rise time lower than 65ps

Ultra stable time base (RMS-Jitter < 500fs)

Analog sampling bandwidth > 10GHz

All specifications valid for 0°C ≤ T ≤ 40°C

High stability w/o recurring calibrations

Product from Germany


Impedance measurement diagram


Impedance measurement protocol


Which of the following items is most important for you?


So now we will have a….

Summary

Dient-leistungen

Signal integrity with flex-rigid

There are system advantages with flex-rigid and

Semiflex

Stack-up constraints require special actions in

design & layout

NEW: integrative calculation and documentation

of rigid and flexible area

NEW: ability of calculation of hatched reference

layers

Design and measurement of specific flex-rigid

impedance test coupons with reduced area


Thank you very much for your attention! Andreas Schilpp

WÜRTH ELEKTRONIK GmbH & Co. KG

Produkt Management

Circuit Board Technology

T.: +49 7940 946 330

E. [email protected]

W. www.we-online.de/flex

Understanding the context is the secret to success!


Documents

Würth Elektronik Circuit Board Technology · Würth Elektronik Circuit Board Technology page 1 03.09.2014. Agenda Impedance and the circuit board ... Signal time (Timing) / bus timing