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vilsi introduction
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[1]
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ISWAR PRASAD TRIPATHY
ELECTRONICS DESIGN AND AUTOMATION &
VLSI DESIGN TOOLS
NIST, Berhampur
BY
ISWAR PRASAD TRIPATHY
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:VLSI TECHNOLOGY:
VLSI: Very Large Scale Integration
Integration of a large no of functions on a single chip provides:-
Less area/volume and therefore COMPACTNESS Less power consumption Less testing requirements at system level Higher RELIABILITY , mainly due to improved on-chip
interconnection Higher speed , due to significant reduced interconnection
length Significant cost saving
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:EDA DESIGN TOOLS:
Two types:- SEMICUSTOM and FULLCUSTOM
Semicustom design tools:- PSPICE: Schematic Capture-Netlist Generation-Simulation ALDEC:VHDL entry-FSM entry-Block Diagram entry-Delay models-Simulation XILINX: Schematic Capture-State Machine entry-VHDL entry-Functional
Simulation-Synthesis-Implementation-Timing Simulation-FPGA architechture/ FPGA editor-Downloading into Hardware
Fullcustom design tools:- TANNER TOOLS: Schematic entry- Symbol editor-Netlist generation-Simulation-
Waveform editor-Layout editor-LVS-Autolayout MENTOR GRAPHICS SYNOPSIS
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:PSPICE:
PSPICE: Personal Simulation Program with Integrated Circuit Emphasis
Developed by Dr. Lawrence Nagel and others at University of California in early 1970’s
Includes extensive libraries of common discrete devices like BJT, MOSFET, SCR, Zener Diode, OPAMP, COMPARATOR,AMPLIFIER etc
Capability to simulate digital circuits, analog circuits, mixed circuits as well
4 basic applications: Design Editor, Pspice AD Basics, Stimulus Editor, Model Editor
Platform where individual components are modeled, simulated, desired waveforms are generated and analysis of circuits is done
Includes a model file associated with each component which includes various parameters such as temp. coefficients, current and voltage behaviour, operating points, current and voltage gains etc
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:PSPICE ANALYSIS:
Basically 3 types:- DC analysis, AC analysis, Time-Based analysis
DC analysis type: DC Sweep, Bias point Detail, DC Sensitivity, Small Signal DC Transfer
AC analysis type: AC Sweep, Noise Time-Based analysis type: Transient Analysis,
Fourier Analysis Additional Types: Parametric and Temperature
Sweep and Statistical Analysis
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:XILINX:
XILINX: World’s largest supplier of programmable logic and market leader in FPGA design
Xilinx ISE: Provides new features and enhancements that increase design and simulation speed and simplifies project development
Features and Enhancements:- Improved simulation performance Waveform Editor Project Manager Schematic Editor Integrated HDL Editor Functional and Timing Simulator Device implementation software for Xilinx CPLDs and FPGAs Complete design environment with HDL editor, State machine editor,
Block diagram editor, simulation and implementation and Synthesis
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:WORKING WITH XILINX:
Design Flow:-
Functional Simulation
Timing simulation
Schematic Static Entry Time Analysis
DesignEntry
DesignVerification
DesignImplement
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:ALDEC VHDL:
VHDL: VHSIC(Very High Speed Integrated Circuits) Hardware Description Language
Developed as a standard design and documentation language for VHSIC by the U.S. Department of Defense in 1981
Standard design language to be able to communicate design descriptions at various levels of abstraction
Allows portability of Design and Annotation and is effective tool for capturing a design
In VHDL:” Everything is simulatable but not synthesizable”
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:DESIGN FLOW WITH VHDL:
SILICON
BehavioralSpecification
partitioning
SynthesisTest
High levelBuilding
Gate levelsimulation
Map to targetTechnology
Layout andRoute
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MULTILEVEL DESIGN ABSTACTION IN VHDL
3 levels of abstraction: Behavioral, Structural, Dataflow
BehavioralSynthesis
LogicSynthesis
MaskGeneration
Layout place&
Route
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:VHDL FEATURES:
High level design implementation Behavioral, Data flow and Structural modeling Package, components, library, subprograms, Data types and
operators Modeling combinational circuits Concurrency and Timing Modeling basic storage elements Modeling sequential circuits
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:TANNER TOOLS:
Full custom design tool with 5 integrated software packages:- S-EDIT (Schematic Editor) L-EDIT (Layout Editor) W-EDIT (Waveform Editor) T-SPICE LVS (Layout Versus Schematic) S-edit: Schematic capture tool that captures fully hierarchial IC designs L-edit: Mixed signal designing tool involved in layout and verification of
complex ICs W-edit: Waveform and data visualization tool that displays simulation and
analysis results T-SPICE: Powerful circuit simulator for fast and accurate simulations for analog
and mixed signal IC design LVS: Tool that compares two SPICE Netlists and optimizes the design
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:CMOS TECHNOLOGY:
CMOS: Complementary Metal Oxide Semiconductor CMOS= PMOS+NMOS ATTRIBUTES:- Wide supply voltage range from 3 to 15 volt High package density Less power consumption Fully restored logic level Low static power dissipation High input impedance High noise margin Bidirectional capability
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:BI-CMOS TECHNOLOGY:
BI-CMOS:- Bipolar CMOS= BJT + CMOS Most efficient design technology that combines merits of both
BJT and CMOS Merits from BJT: High speed of operation, Higher gain, better
high freq. characteristics etc Merits from CMOS: Low static power consumption and
dissipation, better output drive characteristics Mainly used for implementing high performance digital
systems
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