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DEPARTMENT OF ELECTRONICS amp COMMUNICATION
PAPER PRESENTATION ON VLSI DESIGN AND FABRICATION
BY CHANDRAKALAYP USN2BL10EC015 Email idchandrap2299gmailcom MANJUSHREEMM USN2BL10EC031 Email idmanjushreemashal922gmailcom
VLSI DESIGN
Introduction
Outline
Introduction Silicon p n-junctions and transistors A Brief History Operation of MOS Transistors CMOS circuits Fabrication
Introduction
Integrated circuits many transistors on one chip Very Large Scale Integration (VLSI) Complementary Metal Oxide Semiconductor (CMOS)
Fast cheap ldquolow-powerrdquo transistors circuits
Why VLSI
Integration improves the design Lower parasitics = higher speed Lower power consumption Physically smaller
Integration reduces manufacturing cost - (almost) no manual assembly
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
VLSI DESIGN
Introduction
Outline
Introduction Silicon p n-junctions and transistors A Brief History Operation of MOS Transistors CMOS circuits Fabrication
Introduction
Integrated circuits many transistors on one chip Very Large Scale Integration (VLSI) Complementary Metal Oxide Semiconductor (CMOS)
Fast cheap ldquolow-powerrdquo transistors circuits
Why VLSI
Integration improves the design Lower parasitics = higher speed Lower power consumption Physically smaller
Integration reduces manufacturing cost - (almost) no manual assembly
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Outline
Introduction Silicon p n-junctions and transistors A Brief History Operation of MOS Transistors CMOS circuits Fabrication
Introduction
Integrated circuits many transistors on one chip Very Large Scale Integration (VLSI) Complementary Metal Oxide Semiconductor (CMOS)
Fast cheap ldquolow-powerrdquo transistors circuits
Why VLSI
Integration improves the design Lower parasitics = higher speed Lower power consumption Physically smaller
Integration reduces manufacturing cost - (almost) no manual assembly
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Introduction
Integrated circuits many transistors on one chip Very Large Scale Integration (VLSI) Complementary Metal Oxide Semiconductor (CMOS)
Fast cheap ldquolow-powerrdquo transistors circuits
Why VLSI
Integration improves the design Lower parasitics = higher speed Lower power consumption Physically smaller
Integration reduces manufacturing cost - (almost) no manual assembly
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Why VLSI
Integration improves the design Lower parasitics = higher speed Lower power consumption Physically smaller
Integration reduces manufacturing cost - (almost) no manual assembly
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
WHY VLSI DESIGN
Money technology civilization
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Annual Sales
1018 transistors manufactured in 2003 100 million for every human on the planet
0
50
100
150
200
1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002
Year
Global S
emiconductor B
illings(B
illions of US
$)
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
MOS Transistors
Four terminal device gate source drain body
Gate ndash oxide ndash body stack looks like a capacitor Gate and body are conductors (body is also called the substrate) SiO2 (oxide) is a ldquogoodrdquo insulator (separates the gate from the body Called metalndashoxidendashsemiconductor (MOS) capacitor even though
gate is mostly made of poly-crystalline silicon (polysilicon)
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
NMOS PMOS
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Body is commonly tied to ground (0 V)Drain is at a higher voltage than SourceWhen the gate is at a low voltage
P-type body is at low voltageSource-body and drain-body ldquodiodesrdquo are OFFNo current flows transistor is OFF
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
0
S
NMOS Operation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
NMOS Operation Cont
When the gate is at a high voltage Positive charge on gate of MOS capacitor Negative charge is attracted to body under the gate Inverts a channel under gate to ldquon-typerdquo (N-channel hence
called the NMOS) if the gate voltage is above a threshold voltage (VT)
Now current can flow through ldquon-typerdquo silicon from source through channel to drain transistor is ON
n+
p
GateSource Drain
bulk Si
SiO2
Polysilicon
n+D
1
S
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
PMOS Transistor
Similar but doping and voltages reversed Body tied to high voltage (VDD)
Drain is at a lower voltage than the Source Gate low transistor ON Gate high transistor OFF Bubble indicates inverted behavior
SiO2
n
GateSource Drain
bulk Si
Polysilicon
p+ p+
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Physical Layout
Chips are specified with set of masks Minimum dimensions of masks determine transistor size
(and hence speed cost and power) Feature size f = distance between source and drain
Set by minimum width of polysilicon Feature size improves 30 every 3 years or so Normalize for feature size when describing design rules Express rules in terms of = f2
Eg = 03 m in 06 m process
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Simplified Design Rules
Conservative rules to get you started
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
httppublicitrsnetFiles2003ITRSHome2003htm
The FutureInternational Technology Roadmap for Semiconductors
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Summary MOS Transistors are stack of gate oxide silicon
and p-n junctions Can be viewed as electrically controlled switches Build logic gates out of switches Draw masks to specify layout of transistors Now you know everything necessary to start
designing schematics and layout for a simple chip
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Introduction toVLSI FabricationTechnologies
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Organization
1048708Materials Used in VLSI Fabrication 1048708VLSI Fabrication Technologies 1048708Overview of Fabrication Methods
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
3
Main Categories of Materials
Materials can be classified into three mainGroups regarding their electrical conductionproperties1048708Insulators1048708Conductors1048708Semiconductors
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
4
Conductors
Conductors are used in IC design for electricalconnectivity The following are good conductingelements1048708Silver1048708Gold1048708Copper1048708Aluminum1048708Platinum
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
5
Insulators
Insulators are use toisolate conductingandorsemi-conductingmaterialsfromeachotherMOS devicesand Capacitorsrelyon aninsulatorfortheirphysicaloperationThe choiceof the insulators(and the conductors)in IC design dependsheavilyon howthe materialsinteractwitheachother especiallywiththe semiconductors
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
6
Semiconductors
The basic semiconductor material usedin devicefabricationisSiliconThe success of thismaterial isdue to
PhisicalcharacteristicsAbundance in nature and very low costRelatively easy processReliable high volume fabrication
Othersemiconductors(eg GaAs) are usedforspecial applications
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Organization
MaterialsUsedin VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
8
Overviewof Processing Technologies
Althougha numberof processing technologiesareavailable the majority of the production isdonewithtraditionalCMOS Otherprocessesare limitedtoareaswhereCMOS isnotverysuitable(likehigh speedRF applications)Bipolar2SOI 1GaAs 2CMOS 90BiCMOS 5
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
9
CMOS technology
An Integrated Circuit (IC)is an electronic network fabricated in a single piece of a semiconductor materialThe semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patternsThe fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Simplified View of MOSFET
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
11
CMOS Process
The CMOS processallowsfabricationof nMOSand pMOStransistorsside-by-sideon the sameSiliconsubstrate
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
12
Organization
Materials Used in VLSI FabricationVLSI FabricationTechnologiesOverviewof FabricationMethodsDevicesimulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
13
Fabrication process sequence
Silicon manifactureWafer processingLithography
Oxide growth and removalDiffusion and ion implantationAnnealing
Silicon depositionMetallizationTestingAssembly and packaging
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
14
Single CrystalGrowth(I)
Pure siliconismeltedin a pot (1400ordm C) and a smallseedcontainingthe desiredcrystalorientationisinsertedintomoltensiliconand slowly(1mmminute) pulledout
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
15
Single CrystalGrowth(II)
The siliconcrystal(in some casesalsocontainingdoping) ismanufacturedasa cylinder(ingot) witha diameterof 8-12 inches(1rdquo=254cm)Thiscylinderiscarefullysawedintothin(050-075 mm thick) diskscalledwafers whichare laterpolishedand markedforcrystalorientation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
16
Lithography(I)
Lithography sequence stepsDesigner
Drawing the ldquolayerrdquo patterns on a layout editorSilicon FoundryMasks generation from the layer patterns in the design data basePrinting transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC
Lithography process used to transfer patterns to each layer of the IC
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
17
Lithography(II)
1Photoresistapplicationthe surface to be patterned is
spin-coated with a light-sensitive organic polymer called photoresist2Printing (exposure)
the mask pattern is developed on the photoresist with UV light exposuredepending on the type of photoresist(negative or positive) the exposed or unexposed parts become resistant to certain types of solvents
3Developmentthe soluble photoresistis chemically removed
The developed photoresistacts as a mask for patterning of underlying layers and then is removed1 Photoresist coatingSiO2PhotoresistSubstrate3 DevelopmentSubstrateSubstrateMaskUltra violet lightOpaqueExposedUnexposed2 Exposure
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
18
OxideGrowth OxideDeposition
Oxide can be grownfrom silicon through heating in an oxidizing atmosphere
Gate oxide device isolationOxidation consumes silicon
SiO2is depositedon materials other than silicon
through reaction between gaseous silicon compounds and oxidizersInsulation between different layers of metallizationXFOX054 XFOX046 XFOXSilicon waferSilicon surfaceField oxide
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
19
Etching
Once the desired shape is patterned with photoresist the etching process allows unprotected materials to be removed
Wet etching uses chemicalsDry or plasma etching uses ionized gases
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
20
Diffusionand IonImplantation
Doping materialsare addedtochangethe electricalcharacteristicsof siliconlocallythrough
Diffusion dopantsdeposited on silicon move through the lattice by thermal diffusion (high temperature process)
WellsIon implantation highly energized donor or acceptor atoms impinge on the surface and travel below it
The patterned SiO2serves as an implantation mask
Source and Drain regions
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
21
Annealing
Thermal annealingis a high temperature process which
allows doping impurities to diffuse further into the bulk
repairs lattice damage caused by the collisions with doping ions
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
22
Silicon Deposition and Metallization
Films of silicon can be added on the surface of a wafer
Epitaxy growthof a single-crystal semiconductor film on a crystalline substatePolysilicon polycrystalline film with a granular structure obtained through depositionof silicon on an amorphous material
MOSFET gatesMetallization deposition of metal layers by evaporation
interconnections
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
Advanced CMOS processes
Shallow trench isolationsource-drain halos (series resistance)Self-aligned silicide(spacers)hellip
MOS device simulation
MOS device simulation