V6000 Datasheet - vangotech.com · The V6000 contains a voltage-feedback TX amplifier and a programmable RX gain amplifier. Both of the amplifiers are designed to deal with the high-swing

V6000 Datasheet

Version: 0.3

Release Date: June 27, 2016

Specifications are subject to change without notice.

© 2016 Vango Technologies, Inc.

This document contains information that is proprietary to Vango Technologies, Inc.

Unauthorized reproduction of this information in whole or in part is strictly prohibited.

V6000 Datasheet

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Vango Technologies, Inc.

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Revision History

Date Version Description

2016.04.30 0.1 Initial release

2016.11.21 0.2 Updated single power supply range from 9V~18V to 9V~15V

2017.06.27 0.3 Added serial number and updated format

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General Description

The V6000 is a receiver (RX) integrated line driver, providing a high-current capability for driving the

low-impedance line applications. The fully-differential design can achieve a superior performance in terms

of MTPR (Multi-Tone Power Ratio) at 16 Vppd when 4 A peak current outputs. It also retains the bandwidth

and the linearity while operates at single power supply of 9V~15V and temperature range of -40 °C ~ +85

°C.

The V6000 contains a voltage-feedback TX amplifier and a programmable RX gain amplifier. Both of

the amplifiers are designed to deal with the high-swing signal. The V6000 is protected against Over

Temperature (OT) and Over Current (OC) by the built-in sensor. An internal-forced shutdown signal can be

used to set the device back to the initial state. Besides, the OC condition can be avoided once the alarm

alerts and is fed into the signal source. Via the SPI/I2C interface, the V6000 can be fully-controlled and

optimized by firmware configuration.

The V6000 is housed in a thermally-enhanced 40-pin QFN package.

Features

Supporting 4 A output driving capability

Accurate thermal sensor for Over

Temperature (OT) protection

Supporting built-in Over Current (OC)

protection

Programmable TX and RX gain

Single power supply range: 9V~15V

28 Vppd output under 18 V power supply

Zero-crossing detectors

Supporting SPI/I2C control interface

Package: 40-pin QFN EPAD

Operating temperature: -40 °C ~ +85 °C

Applications: Power Line Communication

(PLC)

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Table of Contents

Revision History ..................................................................................................................... 1

General Description ................................................................................................................ 2

Features ................................................................................................................................. 2

Table of Contents ................................................................................................................... 2

Figure List .............................................................................................................................. 3

Table List ............................................................................................................................... 4

1. Electrical Characteristics ............................................................................................... 5

1.1. Absolute Maximum Ratings ....................................................................................... 5

1.2. Analog Specifications ............................................................................................... 5

1.3. Digital Interface Specifications .................................................................................. 6

1.4. SPI Timing Specifications .......................................................................................... 7

2. Pin Assignments ............................................................................................................ 9

3. Pin Descriptions .......................................................................................................... 11

4. System Block Diagram ................................................................................................. 13

5. Outline Dimensions ..................................................................................................... 14

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Figure List

Figure 1-1 Timing Diagram .......................................................................................................................................... 8

Figure 4-1 System Block Diagram .......................................................................................................................... 13

Figure 5-1 Outline Dimensions ................................................................................................................................ 15

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Table List

Table 1-1 Absolut Maximum Ratings ...................................................................................................................... 5

Table 1-2 Analog Specifications for General Characteristics ...................................................................... 5

Table 1-3 Analog Specifications for RX PGA ....................................................................................................... 6

Table 1-4 Analog Specifications for TX LD ........................................................................................................... 6

Table 1-5 Digital Interface Specifications ............................................................................................................ 6

Table 1-6 SPI Timing Specifications (SPI Mode 0) .......................................................................................... 7

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1. Electrical Characteristics

1.1. Absolute Maximum Ratings

While the operating circumstance exceeding “Absolute Maximum Ratings”, it may cause the permanent

damage to the device.

Table 1-1 Absolut Maximum Ratings

Parameter Min. Typ. Max. Unit Conditions/Comments

Analog Power Supply(AVDD_PA) -0.3 +18 V

Analog Power Supply(AVDD33) -0.3 +4 V

Digital Power Supply(DVDD_IO) -0.3 +4 V

Storage Temperature -40 +125 ˚C

Operating Temperature -40 +85 ˚C

ESD 4000 V HBM

V CDM

Junction Temperature - 150 °C

Lead Temperature (Soldering, 10s) - 300 °C

1.2. Analog Specifications

All maximum and minimum specifications apply to the entire recommended operation range

(T = -40 °C ~ +85 °C, AVDD33 = 3.3 V ± 10%), unless otherwise noted. All typical specifications are at

TA = 25 °C and AVDD33 = 3.3 V ± 10%, unless otherwise noted.

Table 1-2 Analog Specifications for General Characteristics


Analog Power Supply(AVDD_PA) 9 12 15 V High voltage supply

Analog Power Supply(AVDD33) 2.97 3.3 3.63 V 3.3V supply

Temperature -40 85 °C

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Table 1-3 Analog Specifications for RX PGA


Gain -18 0 18 dB 6dB per step

Noise 40 nV/Hz0.5

Distortion (Worst Harmonic) -80 dBc Fc = 1MHz, Vout=4Vppd

-70 dBc Fc = 2MHz, Vout=4Vppd

Input 30 V Differential peak-to-peak

Output 4 V Differential peak-to-peak

Table 1-4 Analog Specifications for TX LD


Gain 4 7

Distortion(Worst Harmonic) -55 dBc RL=10Ω, Vout=16Vppd

-50 dBc RL=4Ω, Vout=16Vppd

Input 4 V Differential peak-to-peak

Output 16 20 28 V Differential peak-to-peak

Quiescent Current 100 mA

1.3. Digital Interface Specifications


(T = -40 °C ~ +85°C, DVDD_IO = 3.3 V ± 10%), unless otherwise noted.

Table 1-5 Digital Interface Specifications


Digital Power Supply(DVDD_IO) 2.97 3.3 3.63 V

Digital IO, Output

Output High Voltage, VOH 2.4 V

Output Low Voltage, VOL 0.4 V

ISOURCE 4 mA

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Digital IO, Input

Input High Voltage, VIH 2.0 3.63 V

Input Low Voltage, VINL -0.3 0.8 V

Internal Pull Resistance 22 k

1.4. SPI Timing Specifications


(T = -40 °C ~ +85 °C, DVDD_IO = 3.3 V ± 10%), unless otherwise noted.

Table 1-6 SPI Timing Specifications (SPI Mode 0)

Parameter Min. Max. Unit

tCYC SPI_CLK cycle time 8Ts ns

tPH SPI_CLK pulse high 3Ts ns

tPL SPI_CLK pulse low 3Ts ns

tDLY SPI_MISO delay time after SPI_CLK falling 2Ts 3Ts ns

tVLD SPI_MISO valid time after SPI_CLK rising 6Ts 7Ts ns

tSETUP SPI_MOSI setup time before SPI_CLK rising 2Ts ns

tHOLD SPI_MOSI hold time after SPI_CLK rising 2Ts ns

tCS_SETUP SPI_CS setup time before SPI_CLK rising 2Ts ns

tCS_HOLD SPI_CS hold time after SPI_CLK falling 2Ts ns

Note: Ts=1/Fs (Fs is the clock frequency of CLKIN input).

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SPI_CLK

SPI_MOSI

SPI_MISO

SPI_CS

tSETUP

tHOLD

tDLY tVLD

tCS_SETUP

tCS_HOLD

tCYC tPH tPL

Figure 1-1 Timing Diagram

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2. Pin Assignments

40-pin QFN

32

4 652 3 8

15

14

11

12

22

21

23

24

9

13

7

V6000

AVD

D33

RXIN

N

RXIN

P

PW

R_RD

Y

TXIN

P

CLKIN

ZCIN2

ZCOUT1

DVSS_IO

ZCIN1

RXOUTP

REXT

DVDD_IO

AVDD_PA

TXOUTP

SPI_

MIS

O

SPI_

CLK

SPI_

CS

ZCO

UT2

AVDD_PA

NC

TXIN

N

RXOUTN

16

31

10

NC

1N

C

AVDD_PA

TXOUTP

TXOUTN

TXOUTN

AVDD_PA

17

18

NC

NC

19

20

SPI_

MO

SI

GPIO

0

GPIO

1

TEST

NC

NC

25

26

27

28

29

30

33

34

36

35

37

38

39

40NC

NC

NOTE: The exposed thermal pad is connected to the ground.

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3. Pin Descriptions

(Pin type: “O”=Output, “I”= Input, “P”=Power, “G”=Ground)

No. Mnemonic Type Description

1 NC NC

2 TXINP I Line driver differential positive input

3 TXINN I Line driver differential negative input

4 PWR_RDY O Power ready signal output

5 RXINP I Receiver amplifier differential positive input

6 RXINN I Receiver amplifier differential negative input

7 AVDD33 P Analog 3.3 V power

8 REXT I/O For external resistor connection

9 NC NC

10 NC NC

11 NC NC

12 AVDD_PA P Line driver high-voltage power


14 TXOUTP O Line driver differential positive output

15 TXOUTP O Line driver differential positive output

16 TXOUTN O Line driver differential negative output

17 TXOUTN O Line driver differential negative output



20 NC NC

21 NC NC

22 TEST For test only

23 GPIO1 O General purpose output 1

24 GPIO0 O General purpose output 0

25 ZCOUT2 O Zero-crossing detector2 output

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No. Mnemonic Type Description

26 SPI_CS I SPI chip select input. Used as I2C_SCL in proprietary I2C mode

27 SPI_MOSI I SPI slave input

28 SPI_MISO I/O SPI slave output. Used as I2C_SDA in proprietary I2C mode

29 SPI_CLK I SPI clock input

30 NC NC

31 NC NC

32 DVDD_IO P IO 3.3 V power

33 CLKIN I 24 MHz clock input

34 DVSS_IO G IO 3.3 V ground

35 ZCOUT1 O Zero-crossing detector1 output

36 ZCIN2 I Zero-crossing detector2 input

37 ZCIN1 I Zero-crossing detector1 input

38 RXOUTN O Receiver amplifier differential negative output

39 RXOUTP O Receiver amplifier differential positive output

40 NC NC

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4. System Block Diagram

V6000

OverTemp

Sensor

ZeroCrossing

Detector

PowerOnReset

PGA

RX

TX

OverCurrent

Protection

LD

I2C/SPI

Interface

MISC

Figure 4-1 System Block Diagram

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5. Outline Dimensions

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Figure 5-1 Outline Dimensions

Documents

V6000 Datasheet - vangotech.com · The V6000 contains a voltage-feedback TX amplifier and a programmable RX gain amplifier. Both of the amplifiers are designed to deal with the high-swing