Sequential circuit
theoutputofacombinationalcircuitdependssolelyuponthe input - no
memory. Inordertobuildsophisticateddigitallogiccircuitsweneed
circuits that have memory whose output depends upon both the input
of the circuit and its previous state It is possible to produce
circuits with memory using the digital logic gates with the concept
of feedback. Latches and
flip-flopsGatesarethebuildingblocksofcombinatorial
circuits,latchesandflip-flopsarethebuilding blocks of sequential
circuits.Gateshadtobebuiltdirectlyfromtransistors- latches can be
built from gates, and flip-flops can be built from
latches.Bothlatchesandflip-flopsarecircuitelements
whoseoutputdependsnotonlyonthecurrent inputs, but also on previous
inputs and outputs.The difference between a latch and a flip-flop
is that a latch does not have aclock signal, whereas a flip-flop
always does.LatchesHow can we make a circuit out of gates that is
not combinatorial? The answer is feed-back, which means that we
create loops in the circuit diagramsIf such feed-back is positive
then the circuit tends to have stable states, and if it is negative
the circuit will tend to oscillateR !atch using "#"$ gateThe
circuit shown below is a basic "#"$ latch. The inputs are %% and
%R% for %et% and %Reset% respectively. Operation:&ase '( If
)*', R)*+, it will reset the R)) latch ,*+ and ,)*'&ase -( If
)*+, R)*', it will set the R)) latch ,*' and ,)*+&ase .( If
)*R)*', the latch will remain in previous state&ase /( If
)*R)*+, the latch is unpredictableInput OutputStateR' S' Q Q'0 0 1
1 Indeterminate0 1 0 1 Reset1 0 1 0 Set1 1 NC NC No ChaneR !atch
using "0R gate The circuit shown below is a basic "0R latch. The
inputs are %% and %R% for %et% and %Reset% respectively. Input
OutputStateR S Q Q'0 0 NC NC No Chane0 1 1 0 Set1 0 0 1 Reset1 1!
!IndeterminateOperation:&ase '( If *', R*+, it will set the R
latch ,*' and ,)*+&ase -( If *+, R*', it will reset the R latch
,*+ and ,)*'&ase .( If *R*', the latch is unpredictable&ase
/( If *R*+ "o &hange in the
latch1lip-flops!atchisanasynchronuscircuit2changeininputis
transmitted to the output , and
,)0perationofthelatchcanbemodifiedbyacontrol input called &lock
or clock pulse&lockwithlatchiscalledflip-flopworkingasa
synchronous versionBinarystoragedevice2storesbinarybit2-stable
states 3IG3 4 !05&hangetheoperationofthecircuitdependingonthe
state of one or more 1lip flopsTypes of
Flip-FlopsFlip-Flopscanbeclassifed accordingtothenumberofinputs
theypossessandthemannerin whichtheyafectthebinarystateof the
fip-fop. ! type "lip-fop or et # !esetT type "lip-fop or Triggered
#Toggle$ type "lip-fop or $ata # $elay%& type "lip-fopSR
Flip-fop - (Set / Reset)Basic ymbol of the &locked R 1lip flop
ig given in figure '!ogic diagram 6figure -7 reviews that it
consists of basic "0R !atch circuit and - #"$ gates at the
input.&lock * + ----#"$ gate * + ----circuit remains in same
state&lock * ' ----Input from #"$ gate reaches R !atch 5orks as
basic R !atchCase 1: R*+ and *+0utput of #"$ gate * +If ,*' and
,)*+ 0utput of 'st "0R gate *' and -nd gate *+3ence No chane
stateCase ": R*' and *+0utput of 'st #"$ gate * ' and -nd *+0utput
of 'st "0R gate *+ and -nd gate *'3ence Reset state Case #: R*+ and
*'0utput of 'st #"$ gate * + and -nd *'0utput of 'st "0R gate *'
and -nd gate *+3ence Set stateCase $: R*' and *'0utput of both #"$
gate * '0utput of both "0R gate *+3ence Indeterminate state$
"lip-"lop11 whose output follows it data input when the clock is
The $ flip-flop is a modification of the clocked R flip-flop. The $
input goes directly into theinput and the complement of the $ input
goes to the R input.If $*', the flip-flop is switched to the set
state 6unless it was already set7. If it is +, the flip-flop
switches to the Reset state%& "lip-"lop '%ack
&ilby(indeterminate state of the ! type is defned 'refned( in
the %& typeToggle) alternate between opposite binary states
with each applied clock pulseInputs % and & beha*e like
inputsand ! to set and clear the fip-fop '% - set and & -
clear(+hen logic , inputs are applied to both % and &
simultaneously- the fip-fop switches to its complement state- ie.-
if ./,- it switches to ./0 and *ice *ersa. Case 1: 8*9*+ Both #"$
gates are disbled &: 2 no effect 3ence No chane state Case ":
8*+ and 9*' 'st #"$ gate is disabled i.e., *+ and R*' 3ence Reset
state Case #: 8*' and 9*+ -nd #"$ gate is disabled i.e., *' and R*+
3ence Set state Case $: 8*9*' possible to et;Reset ,*3igh -nd #"$
gate is Reset and vice-versa 3ence %ole &Opposite' state T
"lip-"lopT flip-flop is obtained from the 89 type if both inputs
are tied together 6i.e 8*9 always7&:*+Both #"$ gate * + "o
change tate&:*'< T*+< Both #"$ gate * $isable "o change
tate&:*'< T*'< Both #"$ gate depend on previous output 4
finally toggles
