UNIT-I

8086 ARCHITECTURE:

Introduction:

Intel introduced its first 4-bit microprocessor 4004 in 1971 and 8-bit microprocessor 8008 in 1972. These microprocessors could not survive as general-purpose microprocessors due to their design and performance limitations. In 1974 Intel launched the first advanced general-purpose microprocessor. The microprocessor 8085 followed 8080, with a few more features added to its architecture, which resulted in a functionally complete microprocessor. The main limitations of the 8-bit microprocessors were their low speed of execution, low memory capability, limited number of general-purpose registers and a less powerful instruction set. The 8086 is Intel’s first 16-bit microprocessor, which was introduced in 1978. 8086 microprocessor has a much more powerful instruction set along with the architectural developments which imparted substantial programming flexibility and improvement in speed over the 8-bit microprocessors.

1.1 8086 Intel Architecture:

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Fig1.1 8086 internal block diagram

As shown in Fig1.1, the 8086 CPU is divided into two independent functional parts:

i. Bus Interface Unit or BIU andii. Execution Unit or EU

Dividing the work between these units speeds up processing.

The BIU sends out addresses, fetches instructions from memory, reads data and addresses on the buses for the execution unit.

The execution unit of the 8086 tells the BIU where to fetch instructions or data from, decodes instructions, and executes instructions.

The Execution Unit:

The EU contains control circuitry, which directs internal operations. A decoder in the EU translates instructions fetched from memory into a series of actions, which the EU carries out. The EU has a 16-bit arithmetic logic unit (ALU) which can add, subtract, AND, OR, XOR, increment, decrement, complement or shift binary numbers.

I. FLAG REGISTER: A flag is a flip-flop, which indicates some condition produced by the execution of an instruction or controls certain operations of the EU.

A 16-bit flag register in the EU contains 9 active flags in the flag register.

Six of the nine flags are used to indicate some condition produced by an instruction.

For example, a flip-flop called the carry flag will be set to a 1 if the addition of two 16-bit binary numbers produces a carry out of the most significant bit position. If no carry out of the MSB is produced by the addition, then the carry flag will be a 0.

The six conditional flags in this group are the carry flag (CF), the parity flag (PF), the auxiliary carry flag (AF), the zero flag (ZF), the sign flag (SF) and the overflow flag (OF)

The three remaining flags in the flag register are used to control certain operations of the processor. The six conditional flags are set or reset by the EU on the basis of the results of some arithmetic or logic operation.

The control flags are deliberately set or reset with specific instructions in the program. The three control flags are:

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i. Trap flag: Which is used for single stepping through a program.

ii. Interrupt flag: which is used to allow or prohibit the interruption of a program

iii. Direct flag: which is used with string instructions.

Fig1.2: 8086 flag register format

II. General Purpose Registers:

The EU has eight general-purpose registers, labeled AH, AL, BH, BL, CH, CL, DH and DL. These registers can be used individually for temporary storage of 8-bit data.

The AL register is also called the accumulator.

Certain pairs of these general-purpose registers can be used together to store 16-bit data words. The acceptable register pairs are AH and AL, BH and BL, CH and CL, and DH and DL.

The AH-AL pair is referred to as the AX register, the BH-BL pair is referred to as the BX register, the CH-CL pair is referred to as the CX register and the DH-DL pair is referred to as the DX register.

The BIUi. THE QUEUE:

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While the EU is decoding an instruction or executing an instruction, which does not require use of the buses, the BIU fetches up to six instruction bytes for the following instructions.

The BIU stores these pre-fetched bytes in a first-in-first-out register set called a queue.

When the EU is ready for its next instruction from the queue in the BIU. This is much faster than sending out an address to the system memory and waiting for memory to send back the next instruction byte or bytes.

Except in the case of JMP and CALL instructions, where the queue must be dumped and then reloaded starting from a new address, this pre-fetch and queue scheme greatly speeds up processing.

Fetching the next instruction while the current instruction executes is called pipelining.

ii. SEGMENT REGISTERS: The 8086 BIU sends out 20-bit address, so it can address any of

220 or 1,048,576 bytes in memory. However, at any given time the 8086 works only four 65,536-byte (64-kbyte) segments within this 1,048,576 bytes (1-Mbyte) range.

Four segment registers in the BIU are used to hold the upper 16-bits of the starting addresses of four memory segments that the 8086 is working with at a particular time.

The four segment registers are the code segment (CS) register, stack segment (SS), the extra segment (ES) and the data segment (DS) register. These segment registers are used to hold the upper 16-bits of the starting address of four segments that the 8086 is working with at a particular time.

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Fig1.3: One way that four 64K byte segments might be positioned within

1M- byte address space of 8086.

A 64K byte segment can be located anywhere within the 1M byte address space, but the segment will always start at an address with zeros in the lowest 4-bits. The part of a segment starting address stored in a segment register is often called the segment base.

A stack is a section of memory set aside to store addresses and data while a subprogram executes. The stack segment register is used for the upper 16-bits of the starting address for the program stack.

The extra segment register and the data segment register are used to hold the upper 16-bits of the starting addresses of two memory segments that are used for data.

iii. INSTRUCTION POINTER:

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The code segment register holds the upper 16-bits of the starting address of the segment from which the BIU is fetching instruction code bytes.

The instruction pointer register holds the 16-bit address of the next code byte within this code segment.

The value contained in the IP is often referred to as an offset, because this value must be offset from (added to) the segment base address in CS to produce the required 20-bit physical address.

Fig1.4: Addition of IP to CS to produce physical address of code byte(a) Diagram (b) computation.

The CS register points to the base or start of the current code segment. The IP contains the distance or offset from this base address to the next instruction byte to be fetched.

iv. Stack Pointer Register: A stack is a section of memory set aside to store addresses and data while a subprogram is executing. The 8086 allows to set aside an entire 64K byte segment as stack. The upper 16 bits of the starting address for this segment is kept in the stack segment register. The stack pointer (SP) register contains the 16-bit offset from the start of the segment to the memory location where a

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word was most recently stored on the stack. The memory location, where a word was most recently stored is called the top of stack.

Fig1.5: Addition of SS and SP to produce physical address of top of stack.

(a) Diagram (b) Computation

The physical address for a stack read or for a stack write is produced by adding the contents of stack pointer register to the segment base address in SS. To do this the contents of the stack segment register are shifted four bit positions left and the contents of SP are added to the shifted result. Fig1.5 (b) shows an example. The 5000H in SS is shifted left four bit positions to give 50000H. When FFE0H in the SP is added to this, the resultant physical address for the top of the stack will be 5FFE0H. The physical address can be represented either as a single number, 5FFE0H or it can be represented in SS: SP form as 5000:FFE0H.

v. Pointer and Index Registers:In addition to the stack pointer register, SP, the EU contains a 16-bit base pointer (BP) register. It also contains a 16-bit source index (SI) register and a 16-bit destination index (DI) register. These three registers can be used for temporary storage of data just as the general purpose registers. However, their main use is to hold the offset of a data word in the data segment. The physical address of data in

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memory will be generated in this case by shifting the contents of the data segment register four bit position to the left and adding the contents of SI to the result.

1.1.1 OVERVIEW OF MICROCOMPUTER SYSTEMS:

i) Hardware:A microcomputer system, just as any other computer system, includes two principal components, hardware and software. The hardware is, of course, the circuitry, cabinetry, etc., and the software is the collection of programs, which direct the computer while it performs its tasks.

In a microcomputer the CPU is microprocessor and is often referred to as the microprocessor unit (MPU. The purpose is to decode the instructions and use them to control the activity within the system. It also performs all arithmetic and logical computations. The timing circuitry, or clock, generates one or more trains of evenly spaced pulses and is needed to synchronize the activity within the microprocessor and the bus control logic.

The memory is used to store both the data and instructions that are currently being used. It is normally broken into several modules, with each module containing several thousand locations. Each location may contain part or all of a datum or instruction and is associated with an identifier called a memory address (or, simply, an address). The CPU does its work by successively inputting, or fetching, instructions from memory and carrying out the tasks dictated by them.

The system bus is a set of conductors that connects the CPU to its memory and I/O devices. It is over these conductors, which may be wires in a cable or lines on a printed circuit (PC) board that all information must travel. Exactly how information is transmitted over the bus is determined by the bus’s specifications. Normally, the bus conductors are separated into three groups:

1. The data lines for transmitting the information.2. The address lines, which indicate where the information is to come

from or is to be placed.3. The control lines, which regulate the activity on the bus.

The circuitry needed to connect the bus to device is called an interface, and the bus control logic is the interface to the CPU.

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Microprocessor

Timing

Bus control logic System

Bus

Interface

Interface I/ODevice

Mass storage device

MemoryModule

MemoryModule

InterfaceInterface

::

Fig1.6: Architecture of a typical microprocessor

ii) Software:Computer software is generally divided into two broad categories, system software and user software. System software is the collection of programs, which are needed in the creation, preparation, and execution of other programs. User software consists of those programs generated by the various users of the system in their attempts to apply the computer to solving their problems.

The operating system is a collection of system programs that provide an interface between the user and the machine and enable the machine to be used efficiently. The most important part of the operating system is the resident monitor. It is the part of the operating system that is in the computer’s memory at all times while the computer is turned on. The resident monitor must be capable of receiving commands from the users and initiating the corresponding actions to be performed by the operating system.

The operating system also includes programs, called I/O drivers and file management routines, for performing I/O operations and for handling large

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collections of data that are stored on mass storage devices. Whenever a user program or other system program needs to use an I/O device, it does not normally carry out the operation itself, but instead it requests the operating system to use an I/O driver to perform the task. This gives the operating system better control of the computer and alleviates the need to include I/O subroutines within user programs. The file management routines are used in conjunction with the mass storage I/O drivers and are for accessing, copying and otherwise manipulating files.

In addition, the system software may encompass a variety of high-level language translators, an assembler, a text editor, and programs for aiding in the preparation of other programs. There are three levels of programming. They are:

1. Machine language.2. Assembler language.3. High-level language.

A text editor is program for inputting or modifying text (letters, numbers, punctuation marks, etc.) that is to be stored or is stored on a mass storage device. The text may constitute an assembler or high-level language program, a set of data, or a report. There are two other system programs that are required in preparing programs for execution. It often occurs that the same task must be performed by a variety of programs. Therefore, most operating systems permit the creation of collections of subroutines, called libraries that can be attached to any system or user program. There is normally a system library for general use and, perhaps, the users may create their own libraries. The preparation program used for joining the program to be executed to library and other previously translated subroutines is referred to as a linker or linkage editor. The other preparation program is for transferring the program to be executed into memory and is called a loader. Sometimes the linking and loading functions are combined into a single program.

1.1.2 OVERVIEW OF A SIMPLE MICRO COMPUTER:

The major parts are the central processing unit or CPU, memory, and the input and output circuitry or I/O. Connecting these parts together are three sets of parallel lines called buses. The three buses are the address bus, the data bus, and the control bus.

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DATA BUS

Control bus Control bus

ADDRESS BUS

Fig1.7: Block diagram of simple computer or microcomputer.

i) MEMORY:The memory section usually consists of a mixture of RAM and ROM. It may also have magnetic floppy disks, magnetic hard disks, or laser optical disks. Memory has two purposes. The first purpose is to store the binary codes for the sequence of instructions you want the computer to carry out. When you write a computer program, what you are really doing is just writing a sequential list of instructions for the computer. The second purpose of the memory is to store the binary-coded data with which the computer is going to be working.

ii) INPUT/OUTPUT:The input/output or I/O section allows the computer to take in data from the outside world or send data to the outside world. These allow the user and the computer to communicate with each other. The actual physical devices used to interface the computer buses to external systems are often called ports.

iii) CPU:The central processing unit or CPU controls the operation of the computer. It fetches binary-coded instruction of the computer. It fetches binary-coded instructions from memory, decodes the instructions into a series of simple actions, and carries out these actions. The CPU contains an arithmetic logic unit, or ALU. Which can perform add, subtract, OR, AND, invert, or exclusive-OR operations on binary words when instructed to do so. The CPU also contains an address counter which is used to hold the address of the next instruction or data to be fetched from memory, general-purpose registers which are used for temporary storage of binary data, and circuitry which generates the control bus signals.

iv) ADDRESS BUS:

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INPUTDEVICE

OUTPUTDEVICE

I/O PORTS CPU MEMORY

The address bus consists of 16, 20, 24, or more parallel signal lines. On these lines the CPU sends out the address of the memory location that is to be written to or read from. The number of address lines determines the number of memory locations that the CPU can address. If the CPU has N address lines then it can directly address 2 to the N power memory locations.

v) DATA BUS:The data bus consists of 8, 16, 32 or more parallel signal lines. As indicated by the double-ended arrows on the data bus line, the data bus lines are bi-directional. This means that the CPU can read data in on these lines from memory or from a port as well as send data out on these lines to memory location or to a port. Many devices in a system will have their outputs connected to the data bus, but the outputs of only one device at a time will be enabled.

vi) CONTROL BUS:The control bus consists of 4-10 parallel signal lines. The CPU sends out signals on the control bus to enable the outputs of addressed memory devices or port devices. Typical control bus signals are memory read, memory write, I/O read, and I/O writer. To read a byte of data from a memory location, for example, the CPU sends out the address of the desired byte on the address bus and then sends out a memory read signal on the control bus.

1.1.3 OPERATIONS OF SIMPLE COMPUTER:1. A simple computer CPU fetches instructions or reads data from memory (reads memory) by sending out an address on the address bus and a memory read signal on the control bus. The addressed instruction or data is sent from memory to the CPU on the data bus.2. The CPU can write data in RAM by sending out an address on the address bus, sending out the data to be written on the data bus, and sending out a memory write signal on the control bus.

3. To read data from a port, the CPU sends the port address out on the address bus and sends an I/O read signal on the control bus. Data from the port comes into the CPU on the data bus.4. To write data to a port, the CPU sends out the port address on the address bus, sends the data to be written to the port out on the data bus, and sends an I/O write signal out on the control bus.5. A microcomputer fetches each program instruction in sequence, decodes the instruction, and executes it.

1.2 Introduction to Programming the 8086

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1.2.1 Programming Languages:

There are three language levels that can be used to write a program for a microcomputer.

i) Machine Language: The binary form of the program is referred to as machine language, because it is the form required by the machine.

Disadvantages: (1) It is difficult to remember thousands of binary instructions.(2) It is in the form of long series of 1’s and 0’s, so errors will easily occur.

ii) Assembly Language: To make programming easier, many programmers write programs in assembly language. Then they translate the assembly language program to machine language so that it can be loaded into memory and run. Assembly language uses two-, three-, or four- letter mnemonics to represent each instruction type. The letters in an assembly language mnemonics are usually initials or a shortened form of English word(s) for the operation performed by the instruction. For example, the mnemonic for subtract is SUB, the mnemonic for Exclusive OR is XOR, and the mnemonic for the instruction to copy data from one location to another is MOV.

Assembly language statements are usually written in a standard form that has four fields, as shown in Fig1.8

Label Field

Op-code field

Operand field Comment field

NEXT: ADD AL, 07H ; ADD CORRECTION FACTOR

Fig 1.8

The first field in an assembly language statement is the label field. A label is a symbol or group of symbols used to represent an address, which is not specifically known at the time the statement is written.

The opcode field of the instruction contains mnemonic for the instruction to be performed. Instruction mnemonics are sometimes called operation codes or opcodes.

Ex :- ADD is a mnemonic for addition.

The operand field of the statement contains the data, the memory address, the port address or the name of the register on which the instruction is to

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be performed. Operand is another name for the data item(s) acted on by an instruction. In the example instruction in Fig1.8, there are two operands, AL and 07H, specified in the operand field. AL represents the AL register, and 07H represents the number. This statement implies, add 07H to the contents of AL register and the result is stored in AL register.

The final field in an assembly language statement is the comment field, which starts with a semicolon.

Advantages: Assembly language program is easy to understand than a program written in Machine Language.

To translate an assembly language program into machine language, assembler is used, which is a program that can run on a personal computer or microcomputer development system.

iii) High-Level Languages: Another way of writing a program for a microcomputer is with a high-level language, such as BASIC, Pascal or C.

These languages use program statements, which are even more English-like than those of assembly language.

Each high level statement may represent many machine code instructions. An interpreter program or a compiler program is used to translate higher-

level language statements to machine codes, which can be loaded into memory and executed.

Addressing Modes of 8086: Addressing mode indicates a way of locating data or operands. The addressing modes describe the types of operands and the way they

are accessed for executing an instruction. According to the flow of instruction execution, the instructions may be

categorized asi) Sequential control flow instructions andii) Control transfer instructions

Sequential control flow instructions are the instructions, which after execution, transfer control to the next instruction appearing immediately after it (in the sequence) in the program

For example, the arithmetic, logic, data transfer and processor control instructions are sequential control flow instructions.

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The control transfer instructions, on the other hand, transfer control to same predefined address or the address some how specified in the instruction, after their execution

For example, INT, CALL, RET and JUMP instructions fall under this category.

The addressing modes for sequential control transfer instructions are:

1. Immediate: In this type of addressing, immediate data is a part of instruction and appears in the form of successive byte or bytes.

Ex: MOV AX, 0005HIn the above example, 0005H is the immediate data. The immediate data

may be 8-bit or 16-bit in size.

2. Direct: In the direct addressing mode a 16-bit memory address (offset) is directly specified in the instruction as a part of it.

Ex: MOV AX, [5000H]

Here, data resides in a memory location in the data segment, whose effective address may be completed using 5000H as the offset address and content of DS as segment address. The effective address, here, is 10H * DS + 5000H.

3. Register: In register addressing mode, the data is stored in a register and is referred using the particular register. All the registers, except IP, may be used in this mode.

Ex: MOV BX, AX

4. Register Indirect: Sometimes, the address of the memory location, which contains data or operand, is determined in an indirect way, using the offset register. This mode of addressing is known as register indirect mode. In this addressing mode, the offset address of data is in either BX or SI or DI register. The default segment is either DS or ES. The data is supposed to be available at the address pointed to by the content of any of the above registers in the default data segment.

Ex: MOV AX, BX]

Here, data is present in a memory location in DS whose offset address is in BX. The effective address of the data is given as 10H * DS+[BX].

5. Indexed: In this addressing mode, offset of the operand is stored in one of the index registers. DS and ES are the default segments for index registers, SI and DI respectively. This is a special case of register indirect addressing mode.

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Ex: MOV AX, [SI]

Here, data is available at an offset address stored in SI in DS. The effective address, in this case, is computed as 10*DS+[SI].

6. Register Relative: In this addressing mode, the data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX, BP, SI and DI in the default (either DS or ES) segment.

Ex: MOV AX, 50H[BX]Here, the effective address is given as 10H *DS+50H+[BX]

7. Based Indexed: The effective address of data is formed, in this addressing mode, by adding content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI). The default segment register may be ES or DS.

Ex: MOV AX, [BX][SI]

Here, BX is the base register and SI is the index register the effective address is computed as 10H * DS + [BX] + [SI].

8. Relative Based Indexed: The effective address is formed by adding an 8 or 16-bit displacement with the sum of the contents of any one of the base register (BX or BP) and any one of the index register, in a default segment.

Ex: MOV AX, 50H [BX] [SI]

Here, 50H is an immediate displacement, BX is base register and SI is an index register the effective address of data is computed as

10H * DS + [BX] + [SI] + 50H

For control transfer instructions, the addressing modes depend upon whether the destination is within the same segment or different one. It also depends upon the method of passing the destination address to the processor.

Basically, there are two addressing modes for the control transfer instructions, intersegment addressing and intrasegment addressing modes. If the location to which the control is to be transferred lies in a different segment other than the current one, the mode is called intersegment mode.

If the destination location lies in the same segment, the mode is called intrasegment mode.

Intersegment direct

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IntersegmentModes for control Intersegment indirectTransfer instructions Intrasegment direct

IntrasegmentIntrasegment indirect

Fig1.9: Addressing modes for Control Transfer Instructions

9. Intrasegment Direct Mode: In this mode, the address to which the control is to be transferred lies in the same segment in which the control transfer instruction lies and appears directly in the instruction as an immediate displacement value. In this addressing mode, the displacement is computed relative to the content of the instruction pointer IP.

The effective address to which the control will be transferred is given by the sum of 8 or 16-bit displacement and current content of IP. In the case of jump instruction, if the signed displacement (d) is of 8-bits (i.e –128<d<+128) we term it as short jump and if it is of 16-bits (i.e-32, 768<d<+32,768) it is termed as long jump.

10. Intrasegment Indirect Mode: In this mode, the displacement to which the control is to be transferred, is in the same segment in which the control transfer instruction lies, but it is passed to the instruction indirectly. Here, the branch address is found as the content of a register or a memory location. This addressing mode may be used in unconditional branch instructions.

11. Intersegment Direct: In this mode, the address to which the control is to be transferred is in a different segment. This addressing mode provides a means of branching from one code segment to another code segment. Here, the CS and IP of the destination address are specified directly in the instruction.

12. Intersegment Indirect: In this mode, the address to which the control is to be transferred lies in a different segment and it is passed to the instruction indirectly, i.e contents of a memory block containing four bytes, i.e IP (LSB), IP(MSB), CS(LSB) and CS (MSB) sequentially. The starting address of the memory block may be referred using any of the addressing modes, except immediate mode.

Forming the effective Addresses:The following examples explain forming of the effective addresses in the different modes.Ex: 1. The contents of different registers are given below. Form effective addresses for different addressing modes.

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Offset (displacement)=5000H[AX]-1000H, [BX]- 2000H, [SI]-3000H, [DI]-4000H, [BP]-5000H, [SP]-

6000H, [CS]-0000H, [DS]-1000H, [SS]-2000H, [IP]-7000H

shifting number 4 times is equivalent to multiplying it by 16D or 10H

i. Direct addressing mode:MOV AX,[5000H]

DS : OFFSET 1000H : 5000H 10H*DS 10000 offset +5000

_______ 15000H – Effective address

_______ii. Register indirect:

MOV AX, [BX]DS : BX 1000H : 2000H10H*DS 10000 [BX] +2000

________ 12000H – Effective address ________

iii. Register relative:MOV AX, 5000 [BX]

DS : [5000+BX]10H*DS 10000 offset +5000 [BX] +2000

________ 17000H – Effective address

________iv. Based indexed:

MOV AX, [BX] [SI]DS : [BX + SI]10H*DS 10000 [BX] +2000 [SI] +3000

_______ 15000H – Effective address _______

v. Relative based index:MOV AX, 5000[BX][SI]

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DS : [BX+SI+5000]10H*DS 10000 [BX] +2000 [SI] +3000

_+5000_ 1A000H – Effective address

Examples of address formation in control transfer instructions

Ex: 2 suppose our main program resides in the code segment where CS = 1000H. The main program calls a subroutine, which resides in the same code segment. The base register contains offset of the subroutine. i.e. BX = 0050H. Since the offset is specified indirectly, as the content of BX, this is indirect addressing. The instruction CALL [BX] calls the subroutine located at an address 10H*CS+[BX] = 10050H, i.e. in the same code segment. Since the control goes to the subroutine, which resides in the same segment, this is an intrasegment indirect addressing mode.

Ex: 3 Let us now assume that the subroutine resides in another code segment, where CS = 2000H. Now CALL 2000H: 0050H is an example of intersegment direct addressing mode, since the control now goes to different segment and the address is directly specified in the instruction. In this case, the address of the subroutine is 20050H.

1.4 8086 Instructions:The 8086/8088 instructions are categorized into the following main types:1. Data copy / Transfer Instruction: These types of instructions are used

to transfer data from source operand to destination operand. All the store, move, load, exchange, input and output instructions belong to this category.

2. Arithmetic and Logical Instructions: All the instructions performing arithmetic, logical, increment, decrement, compare and scan instructions belong to this category.

3. Branch Instructions: These instructions transfer control of execution to the specified address. All the call, jump, interrupt and return instructions belong to this category.

4. Loop Instructions: If these instructions have REP prefix with CX used as count register, they can be used to implement unconditional and conditional loops. The LOOP, LOOPNZ and LOOPZ instructions belong to this category. These are useful to implement different loop structures.

5. Machine control Instructions: These instructions control the machine status. NOP, HLT, WAIT and LOCK instructions belong to this class.

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6. Flag Manipulation Instructions: All the instructions, which directly affect the flag registers, came under this group of instructions. Instructions like CLD, STD, CLI, STI etc. belong to this category of instructions.

7. Shift and Rotate Instructions: These instructions involve the bit wise shifting or rotation in either direction with or without a count is CX.

8. Storing Instructions: These instructions involve various string manipulation operations like load, move, scan, compare, store etc. These instructions are only to be operated upon the strings.

Data Copy/ Transfer Instructions:MOV: MOVE: This data transfer instruction transfers data from one register / memory location to another register / memory location. The source may be any one of the segment register or other general purpose or special purpose registers or a memory location and another register or memory location may act as destination.

Syntax: 1) MOV mem/reg1, mem/reg2[mem/reg1] [mem/reg2]

Ex: MOV BX, 0210H MOV AL, BL

MOV [SI], [BX] is not valid

Memory uses DS as segment register. No memory to memory operation is allowed. It won’t affect flag bits in the flag register.

2) MOV mem, data [mem] dataEx: MOV [BX], 02H MOV [DI], 1231H

3) MOV reg, data[reg] data

Ex: MOV AL, 11H MOV CX, 1210H

4) MOV A, mem [A] [mem]Ex: MOV AL, [SI] MOV AX, [DI]

5) MOV mem, A

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[mem] A A : AL/AXEx: MOV [SI], AL MOV [SI], AX

6) MOV segreg,mem/reg [segreg] [mem/reg]Ex: MOV SS, [SI]

7) MOV mem/reg, segreg [mem/reg] [segreg]

Ex: MOV DX, SS

In the case of immediate addressing mode, a segment register cannot be destination register. In other words, direct loading of the segment registers with immediate data is not permitted. To load the segment registers with immediate data, one will have to load any general-purpose register with the data and then it will have to be moved to that particular segment register.

Ex: Load DS with 5000H1) MOV DS, 5000H; Not permitted (invalid)

Thus to transfer an immediate data into the segment register, the convert procedure is given below:

2) MOV AX, 5000H MOV DS, AX

Both the source and destination operands cannot be memory locations (Except for string instructions)

Other MOV instructions examples are given below with the corresponding addressing modes.

3) MOV AX, 5000H; Immediate4) MOV AX, BX; Register5) MOV AX, [SI]; Indirect6) MOV AX, [2000H]; Direct 7) MOV AX, 50H[BX]; Based relative, 50H

displacement

PUSH: Push to Stack: This instruction pushes the contents of the specified register/memory location on to the stack. The stack pointer is decremented by 2,

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after each execution of the instruction. The actual current stack-top is always occupied by the previously pushed data. Hence, the push operation decrements SP by two and this store the two-byte contents of the operand onto the stack. The higher byte is pushed first and then the lower byte. Thus out of the two decremental stack addresses the higher byte occupies the higher address and the lower byte occupies the lower address.

Syntax: PUSH reg[SP] [SP]-2[[S]] [reg]

Ex: 1) PUSH AX2) PUSH DS3) PUSH [5000H]; content of location 5000H & 5001H in DS are pushed

onto the stack.POP: Pop from stack: This instruction when executed, loads the specified register / memory location with the contents of the memory location of which address is formed using the current stack segment and stack pointer as usual. The stack pointer is incremented by 2. The POP instruction serves exactly opposite to the PUSH instruction.

Syntax: i) POP mem

[SP] [SP] +2[mem] [[SP]]

ii) POP reg[SP] [SP] + 2[reg] [[SP]]

Ex:1. POP AX2. POP DS3. POP [5000H]

XCHG: Exchange: This instruction exchanges the contents of the specified source and destination operands, which may be registers or one of them may be a memory location. However, exchange of data contents of two memory locations is not permitted.

Syntax:i) XCHG AX, reg 16

[AX] [reg 16]

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Ex: XCHG AX, DX

ii) XCHG mem, reg[mem] [reg]

Ex: XCHG [BX], DX

Register and memory can be both 8-bit or 16-bit and memory uses DS as segment register.

iii) XCHG reg, reg [reg] [ reg ]

Ex: XCHG AL, CL XCHG DX, BX

Other examples:1. XCHG [5000H], AX; This instruction exchanges data between AX and a

memory location [5000H] in the data segment.2. XCHG BX; This instruction exchanges data between AX and

BX.

I/O Operations:IN: Input the port: This instruction is used for reading an input port. The address of the input port may be specified in the instruction directly or indirectly AL and AX are the allowed destinations for 8 and 16-bit input operations. DX is the only register (implicit), which is allowed to carry the port address.

Ex: 1. IN AL, DX[AL] [PORT DX]

Input AL with the 8-bit contents of the port addressed by DX

2. IN AX, DX [AX] [PORT DX]3. IN AL, PORT [AL] [PORT]

4. IN AX, PORT[AX][PORT]

5. IN AL, 0300H; This instruction reads data from an 8-bit port whose

address is 0300H and stores it in AL.

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6. IN AX ; This instruction reads data from a 16-bit port whoseaddress is in DX (implicit) and stores it in AX.

OUT: Output to the Port: This instruction is used for writing to an output port.The address of the output port may be specified in the instruction directly or implicitly in DX. Contents of AX or AL are transferred to a directly or indirectly addressed port after execution of this instruction. The data to an odd addressed port is transferred on D8 –D15 while that to an even addressed port is transferred on D0-D7.The registers AL and AX are the allowed source operands for 8-bit and 16-bit operations respectively. Ex: 1. OUTDX,AL

[PORT DX] [AL] 2. OUT DX,AX

[PORT DX] [AX] 3. OUT PORT,AL

[PORT] [AL] 4. OUT PORT,AX

[PORT] [AX]Output the 8-bit or 16-bit contents of AL or AX into an I/O port addressed by the contents of DX or local port.

5. OUT 0300H,AL; This sends data available in AL to a port whose address is 0300H

6. OUT AX; This sends data available in AX to a port whose address is specified implicitly in DX.

Arithmetic Instructions:These instructions usually perform the arithmetic operations, like addition, subtraction, multiplication and division along with the respective ASCII and decimal adjust instructions. The increment and decrement operations also belong to this type of instructions. The arithmetic instructions affect all the conditional code flags. The operands are either the registers or memory locations immediate data depending upon the addressing mode.

ADD: Addition: This instruction adds an immediate data or contents of a memory location specified in the instruction or a register(source) to the contents of another register(destination) or memory location. The result is in the destination operand. However, both the source and destination operands cannot be memory operands. That means memory to memory addition is not possible. Also the contents of the segment registers cannot be added using this instruction. All the condition code flags are affected depending upon the result.

Syntax: i. ADD mem/reg1, mem/reg2 [mem/reg1] [mem/reg2] + [mem/reg2]

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Ex : ADD BL, [ST] ADD AX, BX

ii. ADD mem, data[mem][mem]+data

Ex: ADD Start, 02H ADD [SI], 0712H

iii. ADD reg, data[reg][reg]+data

Ex: ADD CL, 05H ADD DX, 0132H

iv. ADD A, data [A][A]+data Ex: ADD AL, 02H

ADD AX, 1211H

Examples with addressing modes:1. ADD AX, 0100H Immediate2. ADD AX, BX Register3. ADD AX, [SI] Register Indirect4. ADD AX, [5000H] Direct5. ADD [5000H], 0100H Immediate6. ADD 0100H Destination AX (implicit)

ADC: Add with carry: This instruction performs the same operation as ADD instruction, but adds the carry flag bit ( which may be set as a result of the previous calculations) to the result. All the condition code flags are affected by this instruction.

Syntax: i. ADC mem/reg1, mem/reg2 [mem/reg1][mem/reg1]+[mem/reg2]+CY

Ex: ADC BL, [SI] ADC AX, BX

ii. ADC mem,data[mem][mem]+data+CY

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Ex: ADC start, 02HADC [SI],0712H

iii. ADC reg, data[reg][reg]+data+CY

Ex: ADC AL, 02HADC AX, 1211H

Examples with addressing modes:1. ADC 0100H Immediate(AX implicit)2. ADC AX,BX Register3. ADC AX,[SI] Register indirect4. ADC AX,[5000H] Direct5. ADC [5000H],0100H Immediate

SUB: Subtract: The subtract instruction subtracts the source operand from the destination operand and the result is left in the destination operand. Source operand may be a register or a memory location, but source and destination operands both must not be memory operands. Destination operand cannot be an immediate data. All the condition code flags are affected by this instruction.

Syntax: i. Sub mem/reg1, mem/reg2 [mem/reg1][mem/reg2]-[mem/reg2] Ex: SUB BL,[SI] SUB AX, BX

ii. SUB mem/data [mem][mem]-data

Ex: SUB start, 02H SUB [SI],0712H

iii. SUB A,data [A][A]-data Ex: SUB AL, 02H

SUB AX, 1211H

Examples with addressing modes: 1. SUB 0100H Immediate [destination AX] 2. SUB AX, BX Register3. SUB AX,[5000H] Direct4. SUB [5000H], 0100 Immediate

SBB: Subtract with Borrow: The subtract with borrow instruction subtracts the source operand and the borrow flag (CF)which may reflect the result of the

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previous calculations, from the destination operand .Subtraction with borrow ,here means subtracting 1 from the subtraction obtained by SUB ,if carry (borrow) flag is set.

The result is stored in the destination operand. All the conditional code flags are affected by this instruction.

Syntax: i. SBB mem/reg1,mem/reg2 [mem/reg1] [mem/reg1]-[mem/reg2]-CY

Ex: SBB BL,[SI] SBB AX,BX

ii. SBB mem,data [mem] [mem]-data-CY Ex: SBB Start,02H SBB [SI],0712H

iii. SBB reg,data [reg] [reg]-data-CY

Ex: SBB CL,05HSBB DX,0132H

iv. SBB A,data [A] [A]-data-CY

Ex: SBB AL,02H SBB AX,1211H

INC: Increment: This instruction increments the contents of the specified register or memory location by 1. All the condition flags are affected except the carry flag CF. This instruction adds a to the content of the operand. Immediate data cannot be operand of this instruction.

Syntax: i. INC reg16[reg 16][reg 16]+1

Ex: INC BX

ii. INC mem/reg 8 [mem][mem]+1 [reg 8][reg 8]+1

Ex: INC BL INC SI

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Segment register cannot be incremented. This operation does not affect the carry flag.

Examples with addressing modes:1. INC AX Register2. INC [BX] Register indirect3. INC [5000H] Direct

DEC: Decrement: The decrement instruction subtracts 1 from the contents of the specified register or memory location. All the condition code flags except carry flag are affected depending upon the result. Immediate data cannot be operand of the instruction.

Syntax: i. DEC reg16[reg 16][reg 16]-1

Ex: DEC BX

ii. DEC mem/reg8[mem][mem-1[reg 8][reg 8]-1

Ex: DEC BL

Segment register cannot be decremented.

Examples with addressing mode:1. DEC AX Register2. DEC [5000H] Direct

MUL: Unsigned multiplication Byte or Word: This instruction multiplies unsigned byte or word by the content of AL. The unsigned byte or word may be in any one of the general-purpose register or memory locations. The most significant word of result is stored in DX, while the least significant word of the result is stored in AX. All the flags are modified depending upon the result. Immediate operand is not allowed in this instruction. If the most significant byte or word of the result is ‘0’ IF and OF both will be set.Syntax: MUL mem/reg

For 8X8[AX][AL]*[mem8/reg8]

Ex: MUL BL[AX][AL]*[BL]For 16X16

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[DX][AX][AX]*[mem16/reg16]

Ex: MUL BX[DX][AX][AX]*[BX]

higher lower 16-bit 16-bit

Ex: 1. MUL BH ; [AX][AL]*[BH]2. MUL CX ; [DX][AX][AX*[CX]3. MUL WORD PTR[SI];[DX][AX][AX]*[SI]

IMUL: Signed Multiplication: This instruction multiplies a signed byte in source operand by a signed byte in AL or signed word in source operand by signed word in AX. The source can be a general purpose register, memory operand, index register or base register, but it cannot be an immediate data. In case of 32-bit results, the higher order word(MSW) is stored in DX and the lower order word is stored in AX. The AF,PF,SF and ZF flags are undefined after IMUL. If AH and DH contain parts of 16 and 32-bit result respectively, CF and OF both will of set. The AL and AX are the implicit operands in case of 8-bit and 16-bit multiplications respectively . The unused higher bits of the result are filled by sign bit and CF, AF are cleared.

Syntax: IMUL mem/regFor 8X8[AX][AL]*[mem8/reg8]

Ex: IMUL BL [AX][AL]*[BL]

For 16X16[DX][AX][AX*[mem16/reg16]

Ex: IMUL BX[DX][AX][AX]*[BX]

Memory or register can be 8-bit or 16-bit and this instruction will affect carry flag & overflow flag.

Ex: 1. IMUL BH 2. IMUL CX 3. IMUL [SI]

DIV: Unsigned division: This instruction performs unsigned division. It divides an unsigned word or double word by a 16-bit or 8-bit operand. The

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dividend must be in AX for 16-bit operation and divisor may be specified using any one of the addressing modes except immediate. The result will be in AL (quotient) while AH will contain the remainder. If the result is too big to fit in AL, type 0(divide by zero) interrupt is generated. In case of a double word dividend (32-bit), the higher word should be in DX and lower word should be in AX. The divisor may be specified as already explained. The quotient and the remainder, in this case, will be in AX and DX respectively. This instruction does not affect any flag.

Syntax: DIV mem/reg

Ex: DIV BL (i.e. [AX]/[BX])

[AX] [AH] RemainderFor 16 8 ___________

[mem 8/reg 8] [AL] Quotient

[DX] [AX] [DX] RemainderFor 32 16 ___________

[mem 16/reg 16] [AX] Quotient

[DX][AX]Ex: DIV BX ( i.e. ________ )

[BX]

IDIV: Signed Division: This instruction performs same operation as the DIV instruction, but it with signed operands the results are stored similarly as in case of DIV instruction in both cases of word and double word divisions the results will also be signed numbers. The operands are also specified in the same way as DIV instruction. Divide by zero interrupt is generated, if the result is too big to fit in AX (16-bit dividend operation) or AX and DX (32-bit dividend operation) All the flags are undefined after IDIV instruction.

AAA: ASCII Adjust after addition: The AAA instruction is executed after an ADD instruction that adds two ASCII coded operands to give a byte of result in AL. The AAA instruction converts the resulting contents of AL to unpacked decimal digits. After the addition, the AAA instruction examines the lower 4-bits of AL to check whether it contains a valid BCD number in the range 0 to 9.

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If it is between 0 to 9 and AF is zero, AAA sets the 4- higher order bits of AL to 0. The AH must be cleared before addition. If the lower digit of AL is between 0 to 9 and AF is set, 06 is added to AL. The upper 4-bits of AL are cleared and AH is incremented by one. If the value of lower nibble of AL is greater than 9 then the AL is incremented by 06, AH is incremented by 1, the AF and CF flags are set to 1, and the higher4-bits of AL are cleared to 0. The remaining flags are unaffected. The AH is modified as sum of previous contents (usually 00) and the carry from the adjustment, as shown in Fig1.7. This instruction does not give exact ASCII codes of the sum, but they can be obtained by adding 3030H to AX.

1. AL - Before to AAA AL - After AAA execution

2. ALprevious to AAA

AH

A>9, hence A+6=1010+0110 = 10000 B = 10H

AX 0 0 5 A – previous to AAA

AX - After AAA execution

Fig1.7 ASCII Adjust After Addition Instruction

AAS: ASCII Adjust AL After Subtraction: AAS instruction corrects the result in AL register after subtracting two unpacked ASCII operands. The result is in unpacked decimal format. If the lower 4-bits of AL register are greater than 9 or if the AF flag is one, the AL is decremented by 6 and AH is decremented by 1, the CF and AF are set to 1. Otherwise, the CF and AF are set to 0, the result needs to no correction. As a result, the upper nibble of AL is 00 and the lower nibble may be any number from 0 to 9. The procedure similar to the AAA instruction AH is modified as difference of previous contents (usually 0) of AH and the borrow for adjustment.

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5 7

0 7

5 A

0 0

0 1 0 0

AAM: ASCII Adjust for Multiplication: This instruction, after execution, converts the product available in AL into unpacked BCD format. This follows a multiplication instruction. The lower byte of result (unpacked) remains in AL and the higher byte of result remains in AH.

The example given below explains execution of the instruction. Suppose, a product is available in AL, say AL=5D. AAM instruction will form unpacked BCD result in AX. DH is greater than 9, so add of 6(0110) to it D+6=13H. LSD of 13H is the lower unpacked byte for the result. Increment AH by 1, 5+1=6 will be the upper unpacked byte of the result. Thus after the execution, AH=06 and AL=03.

AAD: ASCII Adjust for Division :Though the names of these two instructions (AAM and AAD) appear to be similar, these is a lot of difference between their functions. The AAD instruction converts two unpacked BCD digits in AH and AL to the equivalent binary number in AL. This adjustment must be made before dividing number the two unpacked BCD digits in AX by an unpacked BCD byte. PF,SF,ZF are modified while AF,CF,OF are undefined, after the execution of the instruction AAD. The example explains the execution of the instruction.

Let AX contain 0508 unpacked BCD for 58 decimal and DH contain 02H.Ex:

AX

AAD result in AL 58D=3AH in ALThe result of AAD execution will give the hexadecimal number 3A in AL and 00 in AH.

DAA: Decimal Adjust Accumulator: This instruction is used to convert the result of the addition of two packed BCD numbers to a valid BCD number. The result has to be only in AL. If the lower nibble is greater than 9, after addition or if AF is set, it will add 06 to the lower nibble in AL. After adding 06 in the lower nibble of AL, if the upper nibble of AL is greater than 9 or if carry flag is set, DAA instruction adds 60H to AL.

The example given below explains the instruction:i. AL=53 CL=29

ADD AL,CL ; AL(AL)+(CL); AL53+29; AL7C; AL7C+06(as C>9)

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5 8

0 3A

; AL82ii. AL=73 CL=29

ADD AL,CL ; ALAL+CL; AL73+29; AL9C; AL9C

DAA ; AL02 & CF=1AL=73 +CL=29_______ 9C +6_______

A2 +60_______CF=1 02 in AL

The instruction DAA affects AF,CF,PF and ZF flags. The OF flag is undefined.

DAS: Decimal Adjust After Subtraction: This instruction converts the results of subtraction of two packed BCD numbers to a valid BCD number. The subtraction has to be in AL only. If the lower nibble of AL is greater than 9, this instruction will subtract 06 from lower nibble of AL. If the result of subtractions sets the carry flag or if upper nibble is greater than 9, it subtracts 60H from AL. This instruction modifier the AF, CF, PF and ZF flags. The OF is undefined after DAS instruction.The examples are as follows:

Ex: i. AL=75 BH=46SUB AL,BH ; AL2F=(AL)-(BH)

; AF=1DAS ; AL29 (as F>9,F-6=9)

ii. AL=38 CH=61SUB AL,CH ; ALD7 CF=1(borrow)DAS ; AL77(as D>9, D-6=7)

; CF=1(borrow)

NEG: Negate: The negate instruction forms 2’s complement of the specified destination in the instruction. For obtaining 2’s complement, it subtracts the contents of destination from zero. The result is stored back in the destination

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operand which may be a register or a memory location. If OF is set, it indicates that the operation could not be completed successfully. This instruction affects all the condition code flags.

CBW: Convert signed Byte to Word: This instruction converts a signed byte to a signed word. In other words, it copies the sign bit of a byte to be converted to all the bits in the higher byte of the result word. The byte to be converted must be in AL. The result will be in AX. It does not affect any flag.

CWD: Convert Signed Word to double Word: This instruction copies the sign bit of AX to all the bits of DX register. This operation is to be done before signed division. It does not affect any other flag.

Logical Instructions:These byte of instructions are used for carrying out the bit by bit shift, rotate or basic logical operations. All the conditional code flags are affected depending upon the result. Basic logical operations available with 8086 instruction set an AND,OR,NOT and XOR.

AND: Logical AND: This instruction bit by bit ANDs the source operand that may be an immediate, a register, or a memory location to the destination operand that may be a register or a memory location. The result is stored in the destination operand. At least one of the operand should be a register or a memory operand. Both the operands cannot be memory locations or immediate operand.

The examples of this instruction are as follows:

Syntax: i. AND mem/reg1, mem/reg2 [mem/reg1][mem/reg1][mem/reg2]

Ex: AND BL, CH

ii. AND mem,data [mem][mem] data Ex: AND start,05H

iii. AND reg,data[reg][reg] data

Ex: AND AL, FOH

iv. AND A,data [A][A] data A:AL/AX

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Ex: AND AX,1021H

OR: Logical OR: The OR instruction carries out the OR operation in the same way as described in case of the AND operation. The limitations on source and destination operands are also the same as in case of AND operation.

Syntax: i. OR mem/reg1, mem/reg2 [mem/reg1][mem/reg1] [mem/reg2] Ex: OR BL, CH

ii. OR mem,data [mem[mem] data Ex: OR start, 05H

iii. OR Start,05H [reg][reg] data Ex: OR AL, FOH

iv. OR A, data [A][A] data Ex: OR AL, 1021H A: AL/AX.

NOT: Logical Invert: The NOT instruction complements (inverts) the contents of an operand register or a memory location bit by bit.

Syntax: i. NOT reg [reg] [reg] Ex: NOT AX

ii. NOT mem [mem][mem] Ex: NOT [SI]

XOR: Logical Exclusive OR: The XOR operation is again carried out in a similar way to the AND and OR operation. The constraints on high output, when the 2 input bits are dissimilar. Otherwise, the output is zero.

Syntax: i. XOR mem/reg1, mem/reg2 [mem/reg1][mem/reg1] [mem/reg2] Ex: XOR BL, CH

ii. XOR mem,data

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[mem] [mem] data Ex: XOR start, 05H

iii. XOR reg, data [reg] [reg] data Ex: XOR AL, FOH

iv. XOR A, data [A] [A] data

A: AL/AX Ex: XOR AX, 1021H

CMP: Compare: This instruction compares the source operand, which may be a register or an immediate data or a memory location, with a destination operand that may be a register or a memory location. For comparison, it subtracts the source operand from the destination operand but does not store the result anywhere. The flags are affected depending on the result of subtraction. If both the operands are equal, zero flag is set. If the source operand is greater than the destination operand, carry flag is set or else, carry flag is reset.

Syntax: i. CMP mem/reg1, mem/reg2 [mem/reg1] – [mem/reg2] Ex: CMP CX, BX

ii. CMP mem/reg, data [mem/reg] – data Ex: CMP CH, 03H

iii. CMP A, data [A]- data A: AL/AX Ex: CMP AX, 1301H

TEST: Logical Compare Instruction: The TEST instruction performs a bit by bit logical AND operation on the two operands. Each bit of the result is then set to 1, if the corresponding bits of both operands are1, else the result bit is rest to 0. The result of this anding operation is not available for further use, but flags are affected. The affected flags are OF, CF, ZF and PF. The operands may be register, memory or immediate data.

Syntax: i. TEST mem/reg1, mem/reg2 [mem/reg1] [mem/reg2] Ex: Test CX,BX

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ii. TEST mem/reg, data [mem/reg] data Ex: TEST CH, 03H

iii. TEST A, data [A] data

A: AL/AX Ex: TEST AX, 1301H

SHL/SAL: Shift Logical/ Arithmetic Left: These instructions shift the operand word or byte bit by bit to the left and insert zeros in the newly introduced least significant bits. In case of all the SHIFT and ROTATE instructions, the count is either 1 or specified by register CL. The operand may reside in a register or memory location but cannot be immediate data. All flags are affected depending on the result.Ex: BIT POSITIONS: CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OPERAND: 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1

__________________________________________________SHL 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 RESULT1st _________________________________________________SHL 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 0 RESULT 2nd ___________________________________________________Syntax: i. SAL mem/reg,1

Shift arithmetic left once

7 0 0

ii. SAL mem/reg, CL

Shift arithmetic left a byte or word by shift count in CL register.

iii. SHL mem/reg,1 Shift Logical Left Ex: SHL BL, 01H

iv. SHL mem/reg, CLShift Logical Left once a byte or word in mem/reg.

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CF

SHR: Shift Logical Right: This instruction performs bit-wise right shifts on the operand word or byte that may reside in a register or a memory location, by the specified count in the instruction and inserts zeros in the shifted positions. The result is stored in the destination operand. This instruction shifts the operand through carry flag.

Ex: BIT POSITIONS : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFOPERAND : 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 _____________________________________________Count=1 0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 _____________________________________________Count=2 0 0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 _____________________________________________

SAR: Shift Arithmetic Right: This instruction performs right shifts on the operand word or byte, that may be a register or a memory location by the specified count in the instruction and inserts the most significant bit of the operand the newly inserted positions. The result is stored in the destination operand. All the condition code flags are affected. This shift operation shifts the operand through carry flag.

Ex: BIT POSITIONS: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFOPERAND: 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 _____________________________________________Count=1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1

_____________________________________________inserted MSB=1 _____________________________________________Count=2 1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 _____________________________________________

inserted MSB=1

Immediate operand is not allowed in any of the shift instructions.

Syntax: i. SAR mem/reg,1 ii. SAR mem/reg, CL

ROR: Rotate Right without Carry: This instruction rotates the contents of the destination operand to the right (bit- wise) either by one or by the count

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specified in CL, excluding carry. The least significant bit is pushed into the carry flag and simultaneously it is transferred into the most significant bit position at each operation. The remaining bits are shifted right by the specified positions. The PF, SF, and ZF flags are left unchanged by the rotate operation. The operand may be a register or a memory location but it can’t be an immediate operand. The destination operand may be a register (except a segment register) or a memory location.

Syntax: i. mem/reg, 01 Ex: ROR BL, 01

ii. ROR mem/reg, CL Ex: ROR BX, CL

Ex: BIT POSITIONS: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFOPERAND: 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 _____________________________________________Count=1 1 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 _____________________________________________Count=2 0 1 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 _____________________________________________

Execution of ROR Instruction.

ROL: Rotate Left Without Carry: This instruction rotates the content of the destination operand to the left by the specified count (bit-wise) excluding carry. The most significant bit is pushed into the carry flag as well as the least significant bit position at each operation. The remaining bits are shifted left subsequently by the specified count positions. The PF, SF and ZF flags are left unchanged by this rotate operation. The operand may be a register or a memory location.

Syntax: i. ROL mem/reg, 1 Rotate once left

ii. ROL mem/reg, CLRotate once left a byte or a word in mem/reg.

Ex: BIT POSITIONS :CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OPERAND : 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 _____________________________________________SHL RESULT 1st :1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 1

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______________________________________________SHL RESULT 2nd : 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 1 0

_______________________________________________Execution of ROL instruction

RCR: Rotate Right Through Carry: This instruction rotates the contents (bit-wise) of the destination operand right by the specified count through carry flag (CF) For each operation, the carry flag is pushed into the MSB of the operand, and the LSB is pushed into carry flag. The remaining bits are shifted right by the specified count positions. The SF, PF, ZF are left unchanged. The operand may be a register or memory location.

Syntax: i. RCL mem/reg, 1 Ex: RCL BL, 1

ii. mem/reg, CL Ex: RCL BX, CL

Rotate through carry left once a byte or word in mem/reg.

Ex: BIT POSITIONS : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFOPERAND : 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 0 _____________________________________________Count=1 0 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1

______________________________________________Execution of RCR Instruction

RCL: Rotate Left through Carry: This instruction rotates (bit-wise) the contents of the destination operand left by the specified count through the carry flag (CF) For each operation, the carry flag is pushed into LSB, and the MSB of the operand is pushed into carry flag. The remaining bits are shifted left by the specified positions. The SF, PF, ZF are left unchanged. The operand may be a register or a memory location.

Ex: BIT POSITIONS :CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OPERAND : 0 1 0 0 1 1 1 0 1 1 0 1 1 0 1 0 1 __________________________________________________Count=1 1 0 0 1 1 1 0 1 1 0 1 1 0 1 0 1 0 __________________________________________________ Execution of RCL Instruction

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The count for rotation or shifting is either 1 or is specified using register CL, in case of all the shift and rotate instructions. String Manipulation Instructions: A series of data bytes or words available in memory at consecutive locations, to be referred to collectively or individually are called as byte strings or word strings.

REP: Repeat Instruction Prefix: This instruction is used as a prefix to other instructions. The instruction to which the REP prefix is provided, is executed repeatedly until the CX register becomes zero (at each iteration CX is automatically decremented by one) When CX becomes zero, the execution proceeds to the next instruction in sequence. There are two more options of the REP instruction. The first is REPE/REPZ (i.e. repeat operation which equal/zero. The second is REPNE/REPNZ allows for repeating the operation which not equal/not zero. These options are used for CMPS, SCAS instructions only, as instruction prefixes.

MOVSB/MOVSW: Move String Byte or String Word: Suppose a string of bytes, stored in a set of consecutive memory locations is to be moved to another set of destination locations. The starting byte of the source string is located in the memory location whose address may be computed using SI (Source Index) and DS (Data Segment) contents. The starting address of the destination locations where this string has to be relocated is given by DI (Destination Index) and ES (Extra Segment) contents. The starting address of the source string is 10H * DS + [SI] while the starting address of the destination string is 10H * ES + [DI]. The MOVSB/MOVSW instruction thus, moves a string of bytes/words pointed to by DS:SI pair (source) to the memory location pointed to by ES:DI pair (destination) After the MOVS instruction is executed once, the index registers are automatically updated and CX is decremented. The incrementing or decrementing of the pointers, i.e. SI and DI depend upon the direction flag DF. If DF is 0, the index registers are incremented, otherwise, they are decremented, in case of all string manipulation instructions. Ex: MOV AX, 5000H ; Source segment address is 5000H.

MOV DS, AX ; Load it to DS.

MOV AX, 6000H ; Destination segment address is 6000H.

MOV ES, AX ; Load it to ES.

MOV CX, OFFH ; Move length of the string to counter register CX.

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MOV SI, 1000H ; Source index address 1000H is moved to SI.

MOV DI, 2000H ; Destination index address 2000H is moved to DI.

CLD ; clear DF, i.e. set autoincrement mode.

REP MOVSB ; Move OFFH string bytes from source address to destination.

Ex: A program to move a string from the location TEST-MESS to the location NEW-LOC.

INITIALIZE SOURCE POINTER,SIINITIALIZE DESTINATION POINTER,DIINITIALIZE COUNTER,CXREPEAT

COPY BYTE FROM SOURCE TO DESTINATIONINCREMENT SOURCE POINTERINCREMENT DESTINATION POINTERDECREMENT COUNTER

UNTIL COUNTER=0

00

23 bytes initialized 00 To zero start of NEW-LOC : :

??

Start of undefined ??Data block

: :

53 ASCII S

49 ASCII IStart of TEST 54 ASCII T

MESS

(a)

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DATA SEGMENT TEST-MESS DB “IT’S TIME FOR A NEW HOME” ;string to

moveDB 100 DUP(?) ;stationary block of text

NEW-LOC DB 23 DUP(0) ;string destination.DATA ENDS

CODE SEGMENT ASSUME CS:CODE,DS:DATA,ES:DATAMOV AX,DATA ;initialize data segment registerMOV DS,AXMOV ES,AX ;initialize extra segment registerLEA SI,TEST-MESS ;point SI at source stringLEA DI,NEW-LOC ;point DI at destination stringMOV CS,23 ;use CX register as counterCLD ;clear DF, so pointers auto increment

REP MOVSB ;after each string element is moved;move string byte until all moved

CODE ENDSEND

(b)Fig : program for moving a string from one location to another in

memory (a) Memory map (b) AL program.

Here, the REPEAT-UNTIL loop then consists of moving a byte, incrementing the pointers to point to the source and destination for next byte, and decrementing the counter to determine whether all bytes have been moved.

The single 8086 instruction MOVSB will perform all the actions in the REPEAT-UNTIL loop. The MOVSB instruction will copy a byte from the location pointed to by the DI register. It will then automatically increment SI to point to next destination location. The repeat (REP) prefix in front of the MOVSB instruction, the MOVSB instruction will be repeated and CX decremented until CX is counted down to zero. In other words, the REP MOVSB instruction will move the entire string from the source location to the destination location if the pointers are properly initialized.

CMPSB/CMPSW: Compare String Byte or String Word: The CMPS instruction is used to compare two strings of bytes or words. The length of the string must be stored in the register CX. If both the byte or word strings are equal, zero flag is set. The flags are affected in the same way as CMP instruction. The DS:SI and ES:DI point to the two strings. The REP instruction

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prefix is used to repeat the operation till CX (counter) becomes zero or the condition specified by the REP prefix is false.The following string of instructions explain the instruction. The comparison of the string starts from initial or word of the string, after each comparison the index registers are updated depending on the direction flag and the counter is decremented. This byte by byte or word by word comparison continues till a mismatch is found. When, a mismatch is found, the carry and zero flags are modified appropriately and the execution proceeds further.

Ex: MOV AX, SEG1 ; Segment address of String1, i.e. SEG1 is moved to AX.

MOV DS, AX ; Load it to DS.

MOV AX, SEG2 ; segment address of STRING2, i.e. SEG@ is moved to AX.

MOV ES, AX ; Load it to ES.

MOV SI, OFFSET STRING1 ; Offset of STRING1 Is moved to SI.

MOV DI, OFFSET STRING2 ; Offset of string2 is moved to DI.

MOV CX, 0110H ; Length of string is moved to CX.

CLD ; clear DF, i.e. set auto increment mode.

REPE CMPSW ; Compare 010H words of STRING1 And STRING2, while they are equal, IF a mismatch is found, modify the flags and proceed with further execution.

If both strings are completely equal, i.e. CX becomes zero, the ZF is set, otherwise ZF is reset.

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START

Next mainline

Is equal

Last ?

Is equal

Sound alarm

Compare bytes

STOP

SCAS: Scan String BYTE or String Word: This instruction scans a string of bytes or words for an operand byte or word specified in the register AL or AX. The string is pointed to by ES:DI register pair. The length of the string is stored in CX. The DF controls the mode for scanning of the string as stated in case of MOVSB instruction. Whenever a match to the specified operand, is found in the string, execution stops and the zero flag is set. If no match is found, the zero flag is reset. The REPNE prefix is used with the SCAS instruction. The pointers and counters are updated automatically, till a match is found.

Ex:MOV AX, SEG ; Segment address of the string, i.e. SEG is moved to AX.

MOV ES, AX ; Load it to ES.

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MOV DI, OFFSET ; String offset, i.e. OFFSET is moved to DI.

MOV CX,010H ; Length of the string is moved to CX.

MOV AX, WORD ; The word to be scanned for, i.e. WORD is in AL.

CLD ; Clear DF

REPNE SCASW ; Scan the 010H bytes of the string, till a match to WORD is found.

This string of instructions finds out, if it contains WORD. IF the WORD is found in the word string, before CX becomes zero, the ZF is set, otherwise the ZF is reset. The scanning will continue till a match is found. Once a match is found the execution of the program proceeds further.

LODS: Load string Byte or String word: The LODS instruction loads the AL/AX register by the content of a string pointed to by DS:SI register pair. The SI is modified automatically depending on DF. If it is a byte transfer (LODSB), the SI is modified bye one and if it is a word transfer (LODSW), the SI is modified by two. No other flags are affected by this instruction.

STOS: Store String Byte or String Word: The STOS instruction stores the AL/AX register contents to a location in the string pointed by ES:DI register pair. The DI is modified Accordingly. No flags are affected by this instruction.

The direction flag controls the string instruction execution. The source index SI and destination index DI are modified after each iteration automatically. If DF=1, then the execution follows auto decrement mode. In this mode, SI and DI are decremented automatically after each iteration (by1 or 2 depending on byte or word operations) Hence, in auto decrementing mode, the string are referred to by their ending addresses. If DF=0, then the execution follows auto increment mode. In this mode, SI and DI are incremented automatically (by 1 or 2 depending on byte or word operation) After each iteration, hence the strings, in this case, are referred to by their starting addresses.

Control Transfer or Branching Instruction: The control transfer instructions transfer the flow of execution of the program to a new address specified in the instruction directly or indirectly. When this type of instruction is executed, the CS and IP registers get loaded with new values of

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CS and IP corresponding to the location where the flow of execution is going to be transferred.

This type of instructions are classified in two types:i. Unconditional control Transfer (Branch) Instructions: In case of unconditional control transfer instructions; the execution control is transferred to the specified location independent of any status or condition. The CS and IP are unconditionally modified to the new CS and IP.

ii. Conditional Control Transfer (Branch) Instructions: In the conditional control transfer instructions, the control is transferred to the specified location provided the result of the previous operation satisfies a particular condition, otherwise, the execution continues in normal flow sequence. The results of the previous operations are replicated by condition code flags. In other words, using type of instruction the control will be transferred to a particular specified location, if a particular flag satisfies the condition.

Unconditional Branch Instructions:CALL: Unconditional Call: This instruction is used to call a subroutine procedure from a main program. The address of the procedure may specify directly or indirectly depending on the address mode.There are again two types of procedures depending on whether it is available in the same segment (Near CALL, i.e. + 2K displacement) or in another segment (Far CALL, i.e. anywhere outside the segment). The modes for them are respectively called as intrasegment and intersegment addressing (i.e. address of the next instruction) and CS onto the stack along with the flags and loads the CS and IP registers, respectively, with the segment and offset addresses of the procedure to be called.

RET: Return from the Procedure: At each CALL instruction, the IP and CS of the next instruction is pushed onto stack, before the control is transferred to the procedure. At the end of the procedure, the RET instruction must be executed. When it is executed, the previously stored content of IP and CS along with flags are retrieved into the CS, IP and flag registers from the stack and the execution of the main program continues further. In case of a FAR procedure the current contents of SP points to IP and CS at the time of return. While in case of a NEAR procedure, it points to only IP. Depending on the byte of procedure and the SP contents, the RET instruction is of four types:

i. Return within a segment.

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ii. Return within a segment adding 16-bit immediate displacement to the SP contents.

iii. Return intersegment.iv. Return intersegment adding 16-bit immediate displacement to the SP

contents.

INT N: Interrupt Type N: In the interrupt structure of 8086/8088, 256 interrupts are defined corresponding to the types from 00H to FFH. When an INT N instruction is executed, the TYPE byte N is multiplied by 4 and the contents of IP and CS of the interrupt service routine will be taken from the hexadecimal multiplication (N * 4) as offset address and 0000 as segment address. In other words, the multiplication of type N by 4 (offset) points to a memory block in 0000 segment, which contains the IP and CS values of the interrupt service routine. For the execution of this instruction, the IP must be enabled.

Ex: The INT 20H will find out the address of the interrupt service routine follows:

INT 20HType * 4 = 20 X 4 = 80H

Pointer to IP and CS of the ISR is 0000:0080H

The arrangement of CS and IP addresses of the ISR in the interrupt rector table is as follows.

Memory ContentsCS High CS Low : IP High IP Low

CS High

CS Low

IP High

IP Low

Contents of IVT.INTO: Interrupt on overflow: This is executed, when the overflow flag OF is set. The new contents of IP an CS are taken from the address 0000:0000 as explained in INT type instruction. This is equivalent to a type 4 instruction.

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0000:0083

0000:0082

0000:0081

0000:0080

15 87 0 15 87 0

JMP: Unconditional Jump: This instruction unconditionally transfer the control of execution to the specified address using an 8-bit or 16-bit displacement (intrasegment relative, short or long) or CS:IP (intersegment direct for) No flags are affected by this instruction. Corresponding to the three methods of specifying jump address, the JUMP instruction has the following three formats.

JUMP DISP 8-bit Intrasegment, relative, near jump

JUMP DISP 16-bit DISP 16-bit Intrasegment, relative, For jump

JUMP IP(LB) IP(UB) CS(LB) CS(UB) Intersegment, direct, jump

IRET: Return from ISR: When interrupt service routine is to be called, before transferring control to it, the IP, CS and flag register are stored on to the stack to indicate the location from where the execution is to be continued, after the ISR is executed. So, at the end of each ISR, when IRET is executed, the valuesof IP, CS and flags are retrieved from the stack to continue the execution of the main program. The stack is modified accordingly.

LOOP: Loop unconditionally: This instruction executes the part of the program from the label or address specified in the instruction up to the loop instruction, CX number of times. At each iteration, CX is decremented automatically, in other words, this instruction implements DECREMENT counter and JUMP IF NOT ZERO structure.

Ex: MOV CX,0005H ; Number of times in CXMOV BX, 0FF7H ; Data to BX

Label MOV AX, CODE1OR BX,AXAND DX,AXLOOP Label

The execution proceeds in sequence, after the loop is executed, CX number of times. IF CX is already 00H, the execution continues sequentially. No flags are affected by this instruction.

Conditional Branch Instructions: When these instructions are executed, they transfer execution control to the address specified relatively in the instruction, provided the condition in the opcode is satisfied, otherwise, the execution continues sequentially. The conditions, here means the status of the condition code flags. These type of instructions don’t affect any flags. The address has to be specified in the instruction relatively in terms of displacement, which must

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lie within – 80H to 7FH (or –128 to 127) bytes from the address of the branch instruction. In other words, only short jumps can be implemented using conditional branch instructions. A label may represent the displacement, if it has within the above-specified range.

The different 8086/8088 conditional branch instructions and their operations are listed in Table1

SL.No

Mnemonic Displacement

Operation

1 JZ/JE Label Transfer execution control to address ‘Label’, if ZF=1

2 JNZ/JNE Label Transfer execution control to address ‘Label’, if ZF=0

3 JS Label Transfer execution control to address ‘Label’, if SF=1

4 JNS Label Transfer execution control to address ‘Label’, if SF=0

5 JO Label Transfer execution control to address ‘Label’, if

6 JNO Label Transfer execution control to address ‘Label’, if OF=0

7 JP/JPE Label Transfer execution control to address ‘Label’, if PF=1

8 JNP Label Transfer execution control to address ‘Label’, if PF=0

9 JB/JNAE/JC Label Transfer execution control to address ‘Label’, if CF=1

10 JNB/JNE/JNC Label Transfer execution control to address ‘Label’, if CF=0

11 JBE/JNA Label Transfer execution control to address ‘Label’, if CF=1 or ZF=1

12 JNBE/JA Label Transfer execution control to address ‘Label’, if CF=0 or ZF=0

13 JL/JNGE Label Transfer execution control to address ‘Label’, if neither SF=1 nor OF=1

14 JNL/JGE Label Transfer execution control to address ‘Label’, if neither SF=0 nor OF=0

15 JNE/JNC Label Transfer execution control to address ‘Label’, if ZF=1or neither

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SF nor OF is 116 JNLE/JE Label Transfer execution control to

address ‘Label’, if ZF=0 or at least any are of SF & OF is 1

Table:1 Conditional branch instructions.

Flag Manipulation and Processor Control Instructions:These instructions control the functioning of the available hardware inside the processor chip.

These are categorized into 2 types:a) flag manipulation instructionsb) Machine control instructions.

The flag manipulation instructions directly modify same of the flags of 8086.

The flag manipulation instructions and their functions are as follows:CLC – clear carry flagCMC – Complement carry flagSTC – Set carry flagCLD – clear direction flagSTD - Set direction flagCLI – clear interrupt flagSTI – Set interrupt flag

These instructions modify the carry (CF), Direction (DF) and interrupt (IF) flags directly. The DF and IF, which may be the processor operation; like interrupt responses and auto increment or auto-decrement modes. Thus the respective instructions may also be called as machine or processor control instructions. The other flags can be modified using POPF and SAHF instructions, which are termed as data transfer instructions. No direct instructions are available for modifying the status flags except carry flags. The machine control instructions don’t require any operational. The machine control instructions supported by 8086/8088 are listed as follows along with their functions:

WAIT – Wait for Test input pin to go lowHLT – Halt the processorNUP – No operationESC – Escape to external device like NDPLOCK – Bus lock instruction prefix.

Assembly Language programming of 8086Introduction:An assembler is a program used to convert an assembly language program into the equivalent machine code modules which may further be converted to executable codes.

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An assembler decides the address of each label and substitutes the values for each of the constants and variables. If then forms the machine code for the mnemonics and data in assembly language program.

Program works with three general categories of data: constants, variables and addresses. Specific directives are used to give names to constants and variables in a program.

2.1 Assembler directives:Assembler directives help the assembler to correctly understand the assembly language programs to prepare the machine codes.

Assembly language programs are composed of two types of statements:i) The instructions, which are translated to machine code by the assembler.

ii) The directives, that direct the assembler during the assembly process, for which no machine code is generated.

Directive is a statement which gives direction to the assembler. The directives are also called pseudo instructions and are not translated into machine language. The directives are necessary for the assembler to assemble efficiently and correctly.

2.1.1. Data Definition and Storage Allocation Directives:Data definition directives are used to define the program variables and allocate a specified amount of memory to them.

a) DB: Define Byte:The DB directive is used to reserve byte or bytes of memory locations in the available memory.

Syntax: Name of the variable DB Initialization Value

Ex: i) RANKS DB 01H, 02H, 03H, 04H

This statement direct the assembler to reserve four memory locations for a list named RANKS and initialize them with the above specified four values.

ii) MESSAGE DB ‘GOOD MORNING’

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This makes the assembler to reserve the number of bytes of memory equal to the number of characters in the string names MESSAGE and initialize those locations by the ASCII equivalent of these characters.

iii) VALUE DB 50H

This statement directs the assembler to reserve 50H memory bytes and leave them uninitialized for the variable named VALUE.

b) DW: Define Word:The DW directive serves the same purposes as the DB directive, but it now makes the assembler the number of memory words (16-bit) instead of bytes.

Syntax: Name of the variable DW Initialization Value

Ex: i) WORDS DW 1234H, 4567H, 78AH, 045CH

This makes the assembler to reserve four words in memory (8 bytes), and initialize the words with the specified values in the statements. During the initialization, the lower bytes are stored in the lower memory addresses, which the upper bytes are stored in the higher addresses.

Another option of the DW directive is explained with the DUP operator.

ii) WDATA DW 5 DUP (6666H)

This statement reserves five words, i.e., 10-bytes of memory for a word label WDATA and initializes all the word locations with 6666H.

c) DQ: Define Quad word:This directive is used to direct the assembler to reserve 4 words (8 bytes) of memory for the specified variable and may initialize it with the specified values.

Syntax: Name of the variable DQ Initialization Value

Ex: TOTAL DQ 0

Reserves 8 bytes of memory for the variable TOTAL and initializes with 0.

d) DD: Define Double:The directive DD is used to define a double word (4 bytes) variable.

Syntax: Name of the variable DD Initialization value

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Ex: TOTAL DD 0

Reserves 4 bytes of memory for the variable TOTAL and initializes with 0.

e) DT: Define Ten bytes:Syntax: Name of the variable DT Initialization Value

The DT directive directs the assembler to define the specified variable requiring 10 bytes for its storage and initialize the 10 bytes with the specified values.

Ex: ACODE DT 0

The above statement informs the assembler to reserve 10 bytes of memory for a variable named ACODE and initialize with 0.

2.1.2. STRUCTURE DECLARATION:

STRUCT: The directive strut is used to declare the data types, which is a collection of programming primary data types, i.e., DB, DW, DT, DT and DQ.Syntax: Structurename Strut

::: Sequence of DB, DW, DQ, DD for declaration fields::Structurename ENDS

Ex: Student StrutRoll-no DW ?Name DW 10 DUP (?)Class DB ?Branch DB 10 DUP (?)Student ENDS

2.1.3. PROGRAM ORGANIZATION DIRECTIVES:The 8086 programs are organized as a collection of logical segments. The directives used to organize the program segments are: SEGMENT, ASSUME, ENDS etc.

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a) SEGMENT: The directive ‘SEGMENT’ is used to indicate the beginning of a logical segment. The directive segment follows the name of the segment. To end the segment, SEGMENT must be ended with ENDS statement.

Syntax: DATA SEGMENT;;;; program data definition;;;DATA ENDS

b) ENDS: The directive ENDS informs the assembler the end of the segment. The directives ENDS and SEGMENT must enclose the segment data or code of the program.

Syntax: Segmentname ENDS.

c) ASSUME: The directive assume informs the assembler the name of the logical segment that should be used for a specified segment when program is loaded and the processor segment registers should point to the respective logical segments.

Syntax: ASSUME segreg : segname, ……….., segreg : segname.

Ex: i) ASSUME CS : _codeii) ASSUME CS : _code, DS : _Data, SS : _stack

2.1.4. END: End of program: Program termination directive and it is used to inform the assembler the physical end of the program.

The statement after the directive END will be ignored by the assembler.

2.1.5. VALUE RETURNING ATTRIBUTE DIRECTIVES:The task of programming can be made easier by assigning assembler to compute the size of the data items it is performed using the directives LENGTH, SIZE, OFFSET and TYPE.

a) LENGTH: The directive LENGTH informs the assembler about the number of elements in a data item such as an array. If an array is defined with DB then

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it returns the number of bytes allocated to a variable. If an array is defined with DW then it returns the number of words allocated to the array variable.

Syntax: LENGTH Variablename

Ex: DATA SegmentName DB 100 dup (?)A DW 50 dup (?)

Total DW ?DATA ENDSMOV AX, LENGTH Name

then AX = 100 bytes i.e., array sizeMOV BX, LENGTH A

then BX = 50 words i.e., array size.

b) SIZE: The directive size is same as length except that it returns the number of bytes allocated to the data item instead of the number of elements in it.

Syntax: SIZE variablename

Ex: DATA Segment Name DB 100 DUP (?) A DW 50 DUP (?) TOTAL DW ? DATA ENDS MOV AX, Size Name then AX= 100 bytes i.e., array size. MOV BX, Size A then BX= 100 bytes i.e., array size MOV CX, Size TOTAL then CX= 2 bytes

c) OFFSET: The directive OFFSET informs the assembler to determine the displacement of the specified variable with respect to the base of the segment. It is usually used to load the offset of a variable into the register using this OFFSET value a variable can be referenced using indexed addressing modes.

Syntax: OFFSET VariableName

Ex: DATA SegmentMSG DB ‘Hello World’A DW 50 DUP (?)DATA ENDS

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MOV DX, OFFSET MSG

DX= offset of the variable MSGMOV SI, OFFSET A

SI= offset of the array.MOV AX, [SI];

AX= element of array pointed to by SI i.e.[SI] refers to A[1]

[SI+2] refers to A[2][SI+4] refers to A[3]

d) SEG: SEGMENT: The directive SEG is used to determine the segment in which specified data item is defined.

Syntax: SEG VariableName

Ex: DATA SegmentMSG DB ‘Hello World’A DW 50 DUP (?)DATA ENDSMOV DS, SEG MSG

DS= segment in which the variable MSG existsMOV DS, SEG A

DS= segment in which array A exists.

e) TYPE: The directive type is used to determine the type of data type. The assembler allocates one byte to DB. Two bytes to DW and 4 bytes to DD.

Syntax: TYPEVariable name

Ex: DATA SegmentMSG DB ‘A’A DW 100PI DD 3.17DATA ENDSADD BX, TYPE MSG (MSG is DB type)

BX BX + 1ADD BX, TYPE A (A is DW type)

BX BX + 2ADD BX, TYPE PI (PI is DD type) BX BX + 4

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2.1.6. Procedure Definition Directives:The procedure definition directives are used to define subroutines.

a) PROC: Procedure:

The directive PROC indicates the beginning of the procedure. The directive PROC follows the name of the procedure and the term NEAR or FAR follows the PROC indicating the type of procedure. The directive PROC is used with the directive ENDP to enclose the procedure code.

Syntax: Procedure Name PROC NEAR/FAR

Ex: ONE PROC NEARTWO PROC FARReadint PROC;;; Write procedure code to read integer data;;Readint ENDP

b) ENDP: End of Procedure: The directive ENDP informs the assembler the end of procedure.

Syntax: Procedure Name ENDP

Ex: ONE1ENDP.

2.1.7. Macro Definition Directives: These are used to define macro constants and macro functions.

a) EQU: Equate Macro Constant: The directive EQU is used to declare the symbols to which some constant value is assigned such symbols are called as macro symbols and macro assembler will replace every occurrence of the symbol in a program by its value.

Macros are used to increase the readability of a program. The advantage of macro is that the modification of the symbol value of the declaration will be reflected throughout the program.

Ex: Num EQU 100 H

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MOV AX, Num MOV AX, 100 H

b) MACRO: The directive macro informs the assembler the beginning of a macro. It consists of name of the macro followed by a keyword “MACRO” and macro arguments if any. The directive MACRO and ENDM must enclose the definition, declarations or a small part of the code which have to be substituted at the innocation of a macro.

Syntax: Macroname MACRO (arg1, arg2, ……………, argn)

Ex: Printstring MACRO MSGMOV AH, 09 HMOV DX, OFFSET MSGINT 21 HENDM

2.1.8. Data Control Directives: The data control directives are used to declare the variables used in communication of information between the program modules.

a) PUBLIC: The directive PUBLIC informs the assembler that the specified variable of segment can be accessed from other program modules. It helps in managing multiple program modules by sharing global variables (or) procedure. The variables and procedures to be shared must be declared as public in a module in which physically exists.

Ex: PUBLIC variable 1, variable 2, …………………., variable nPUBLIC XMAX, YMAX.

The variables XMAX, YMAX can be accessed from other program modules by declaring them as external using the directive EXTRN.

b) EXTRN: External: The directive EXTRN informs the assembler that the data items are labeled following the directive will be used in a program module which is defined in another program module.

Syntax: EXTRN XMAX, YMAX : WORDEXTRN Myprint : FAREXTRN FACT : NEAR

c) PTR: Pointer: The pointer operator is used to declare the type of a label, variable or memory operand. The operator PTR is prefixed by either BYTE or

59

WORD. If the prefix is BYTE, then the particular label, variable or memory operand is treated as an 8-bit quantity, while if WORD is prefix, then it is treated as a 16-bit quantity. In other words, the PTR operator is used to specify the data type byte or word.

Ex:i) MOV AL, BYTE PTR [SI]; Moves content of memory

location addressed by SI (8-bit) to AL.

ii) INC BYTE PTR [BX]; Increment byte contents of memory location

addressed by BX.

2.2 Implementation of IF – THEN:IF condition THENAction 1Action 2::

This structure says that if the stated condition is true, the series of actions following the THEN will be executed. If the condition is false then execution will skip over the action after the THEN and proceed with the next instruction in the program.

In 8086 programming, simple IF – THEN is implemented with conditional jump instructions. In some cases an instruction to set flags is needed before the conditional jump instruction.

Ex: CMP AX, BXJE NEXTADD AX, 0007 HNEXT: MOV CL, 07 H

In this program, we first compare BX with AX to set the required flags. If the zero flag is set after comparison indicating that AX=BX. The JE instruction will cause execution to jump to the MOV CL, 07 H instruction labeled next.

If AX BX then ADD AX, 0007 H instruction after the JE instruction will beexecuted before the MOV CL, 07 H instruction.

Largest number in a given set of n numbers.Program: MOV SI,4000H

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MOV CL,[SI]INC SIMOV AX,[SI]DEC CL

BACK ADD SI,02HCMP AX,[SI]JNC NEXTMOV AX,[SI]

NEXT DEC CLJNZ BACKADD SI,02HMOV [SI],AXINT 03

2.3 IF – THEN – ELSE:IF condition THENactionELSEactionEx: Read temperature

if temp<30 thenlight yellow lamp

elselight green lamp

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Fig 2.1:Flow Chart for IF-THEN-ELSE

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ReadTemperature

Temp<30

LightYellow

LightGreen

Read PHsensor

Program : MOV DX, CWRMOV AL, 99 H ;CWR sets port A input; Port B as output.OUT DX, ALMOV DX, PORT A ;PORT A input portIN AL, DX ;Read temperature in ALCMP AL, 30 ;Compare [AL], 30JB YellowJMP Green

Yellow MOV DX, PORT BMOV AL, 01 H ;code for yellow LEDOUT DX, ALJMP LAST

Green MOV DX, PORT BMOV AL, 02 H ;code for green LEDOUT DX, AL

Last INT 3

In above example PORT A is input port and PORT B is output port. The PORT B is an output PORT so we can output value to it to turn on LEDS.

2.4 Implementation of Multiple IF – THEN – ELSE :IF conditionTHEN actionELSE IF condition THEN action ELSE

action

Ex: Read tempIF temp<30THEN

Light yellow lamp

ELSE IF temp<40 THEN

Light Green lamp ELSE

Light Red lampgoto next machine instruction

Program:

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MOV DX, CWRMOV AL, 99 HOUT DX, ALMOV DX, PORT AIN AL, DXCMP AL, 30JB YellowCMP AL, 40JB GreenJMP Red

Yellow: MOV DX, PORT BMOV AL, 01 HOUT DX, ALJMP LAST

Green: MOV DX, PORT BMOV AL, 02 HOUT DX, ALJMP LAST

Red: MOV DX, PORT BMOV AL, 04 HOUT DX, AL

Last: INT 3

2.5 WHILE – DO:WHILE condition is true

DO action

Ex: Consider an example for controlling a chemical process where the temperature of a solution up to 1000C before going on to the next step in the process. If the solution temperature is below 1000C then turn-on a heater and wait for the temperature to reach 1000C then turn-off the heater and exit from the loop and start execute next instruction in the main program.

Read tempWHILE temp<100 DO

Turn-on Heater

Turn-off Heater

Program:MOV DX, CWR

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MOV AL, 99 HOUT DX, AL

Start: MOV DX, PORT AIN AL, DXCMP AL, 64 HJB Turn-onJMP Turn-off

Turn-on:MOV DX, PORT BMOV AL, 80 HOUT DX, ALJMP Start

Turn-off: MOV DX, PORT BMOV AL, 00 HOUT DX, ALINT 3

2.6 Implementation of REPEAT – UNTIL:REPEAT

actionUNTIL condition is true

In this structure the action or the series of actions are done once before the condition is checked. This is different from WHILE – DO structure, where the condition is checked before any action.

Ex: REPEATGet a price from the arrayAdd inflation FractionAdjust result to BCDPut result back in the array

UNTIL all prices are inflated.

Array SegmentPrices DB 12, 71, 83, 16, 20, 18, 96, 27, 82.Array ENDS

ASSUME CS: ArrayLEA SI: PricesMOV CL, 09 H

UP MOV AL, [SI]ADD AL, 05 HDAAMOV [SI], ALINC SI

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DEC CLJNZ UP

Program to find sum of n-numbers

Program:MOV SI,4000HMOV DX,0000HMOV AX,0000HMOV CX,[SI]

UP ADD SI,02HMOV BX,[SI]ADD AX,BXJNC DOWNINC DX

DOWN DEC CXJNZ UPADD SI,02HMOV [SI],AXADD SI,02HMOV [SI],DXINT 03

2.7 Implementation of FOR – DO loop :FOR count=1 to count=n DO

action1action2:::

Where ‘n’ is the number of times we want to repeat the sequence of actions.

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Program to find perfect square of the given number.

Program:MOV BX,0000HMOV SI,5000HMOV BX,[SI]MOV AX,0001H

UP PUSH AXMUL AXCMP AX,BXJE DOWNJG LASTPOP AXINC AXLOOP UP

DOWN POP AXADD SI,02HMOV [SI],AX

LASTADD SI,02HMOV CX,9AAAHADD CX,1000HMOV [SI],CXINT 03

Programs:

1.program to reverse the given string

Program:OUTPUT 2500ADSYMBOLSDATA SEGMENTS1 DB “SVEC”,00HS2 DB “ ”,00HPRINT EQU FE00:1B55HDATA ENDSCODE SEGMENTASSUME CS:CODEORG 3000HLEA SI,S1LEA DI,S2MOV CX,0004HADD SI,03H

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UP MOV AL,[SI]MOV [DI],ALDEC SIINC DILOOP UPLEA AX,S2CALL FAR PRINTINT 03

CODE ENDSEND

2. Program to compare the two given string.

Program:

OUTPUT 2500ADSYMBOLSDATA SEGMENTS1 DB “SVEC”,00HS2 DB “SVET”,00HS3 DB “EQUAL”,00HS4 DB “NOTEQUAL”,00H

PRINT EQU FE00:1B55HDATA ENDSCODE SEGMENTASSUME CS:CODEORG 3000HLEA SI,S1LEA DI,S2CLDMOV CX,0004H

UP CMPSB DI,SILOOP UPJNE DOWNLEA AX,S3CALL FAR PRINT

DOWN LEA AX,S4CALL FAR PRINTINT 03

CODE ENDSEND

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3. Program to transfer the block of data from one location to another location.

Program:OUTPUT 2500ADSYMBOLSCODE SEGMENTASSUME CS:CODEORG 3000HMOV SI,4000HMOV CL,[SI]INC SIMOV DI,4501HCLDREP MOVSBINT 03

CODE ENDSEND

2.8 Passing parameters to and from procedures:The addresses or data values passed back and forth between the mainline and the procedure are called parameters.

The four major ways of passing parameters to and from a procedure are:1.In registers2.In dedicated memory location accessed by name3.With pointers passed in registers4.With the stack

2.8.1 Passing parameters in registers:Example:To convert a packed BCD number to its binary equivalent.Packed BCD number: 0100 0101 1001 0110 (4596)Equivalent binary number: 0001000111110100 (11F4H)Since,4596=(4*1000)+(5*100)+(9*10)+(6*1)1 =0001H therefore 6 = 6*0001H = 0006H10 =000AH therefore 90 = 9*000AH = 005AH100 =0064H therefore 500 = 5*0064H = 0AF4H1000=03E8H therefore 4000 = 4*03E8H = 0FA0H

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_______ _______ 4596 11F4H _______ _______Fig 2.2: BCD-to-binary algorithm.

The algorithm for this program has the following simple sequence of operations.1. Separate nibbles.2. Save lower nibble (don’t need to multiply by 1).3. Multiply upper nibble by 0AH.

4. Add lower nibble to result of multiplication.

This program is implemented as a procedure which can be called from any where in mainline program.

Program code:

DATA SEGMENTBCD-INPUT DB 17H ; storage for BCD valueBIN-VALUE DB ? ; storage for binary valueDATA ENDS

STACK-SEG SEGMENT STACKDW 100 DUP(0) ; stack of 100 wordsTOP-STACK LABEL WORDSTACK-SEG ENDS

CODE SEGMENTASSUME CS:CODE,DS:DATA,SS:STACK-SEGMOV AX,DATA ; Initialize data segmentMOV DS,AX ; registerMOV AX,STACK-SEG ;;Initialize data segmentMOV SS,AX ;registerMOV SP,OFFSET TOP-STACK ;Initialize stack pointerMOV AL,BCD-INPUTCALL BCD-BIN ; Do the conversionMOV BIN-VALUE,AL ; Store the resultNOP ; continue with program hereNOPBCD-BIN PROC NEARPUSHF ; Save flagsPUSHBX ; and registers used in procedure

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PUSHCX ; before starting the conversion do the

conversionMOV BL,AL ; save copy of BCD in BLAND BL,0FH ; and maskAND AL,F0H ; separate upper nibbleMOV CL,04H ; move upper BCD digit to lowerROR AL,CL ; nibble position formultiplyMOV BH,0AH ; load conversion factor in BHMUL BH ; multiply upper BCD digit in AL by

0AH in BH, leave result in ALADD AL,BL ; add lower BCD digit to MUL resultend

of conversion, binary result in AL.

POP CX ; Restore registersPOP BXPOPFRET ; and return mainline

BCD-BIN ENDPCODE ENDS

END

The disadvantage of using registers to pass parameters is that the number of registers limits the number of parameters we can pass. We can’t, for example, pass an array of 100 elements to a procedure in registers.

2.8.2.Passing parameters in general memory:Program code:

DATA SEGMENTBCD-INPUT DB 17H ; storage for BCD valueBIN-VALUE DB ? ; storage for binary valueDATA ENDSSTACK-SEG SEGMENT STACKDW 100 DUP(0) ; stack of 100 wordsTOP-STACK LABEL WORDSTACK-SEG ENDSCODE SEGMENTASSUME CS:CODE,DS:DATA,SS:STACK-SEG

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MOV AX,DATA ;Initialize data segmentMOV DS,AX ; registerMOV AX,STACK-SEG ; Initialize data segmentMOV SS,AX ; registerMOV SP,OFFSET TOP-STACK ;Initialize stack pointerCALL BCD-BIN ; Do the conversionNOP ; continue with program hereNOPBCD-BIN PROC NEARPUSHF ; Save flagsPUSHAXPUSHBX ; and registers used in procedurePUSHCX ; before starting the

conversion do the conversion

MOV AL,BCD-INPUT ; Get BCD value from memoryMOV BL,AL ; save copy of BCD in BLAND BL,0FH ; and maskAND AL,F0H ; separate upper nibbleMOV CL,04H ; move upper BCD digit to lowROR AL,CL ; nibble position for multiplyMOV BH,0AH ; load conversion factor in BHMUL BH ; multiply upper BCD digit in AL by

0AH in BH, leave result in ALADD AL,BL ; add lower BCD digit to MUL result

end of conversion, binary result in AL.

MOV BIN-VALUE,AL ; store binary value in memoryPOP CX ; Restore registersPOP BXPOP AXPOPFRET ; and return mainline

BCD-BIN ENDP

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CODE ENDSEND

This method has problem that it makes the procedure non reentrant.

2.8.3.Passing parameters using pointers:A parameter passing method which overcomes the disadvantage of using data item names directly in a procedure is to use registers to pass the procedure pointers to the desired data.

Program code:

DATA SEGMENTBCD-INPUT DB 17H ; storage for BCD valueBIN-VALUE DB ? ; storage for binary valueDATA ENDSSTACK-SEG SEGMENT STACKDW 100 DUP(0) ; stack of 100 wordsTOP-STACK LABEL WORDSTACK-SEG ENDSCODE SEGMENTASSUME CS:CODE,DS:DATA,SS:STACK-SEGMOV AX,DATA ; Initialize data segmentMOV DS,AX ; registerMOV AX,STACK-SEG ; Initialize data segmentMOV SS,AX ; registerMOV SP,OFFSET TOP-STACK ;Initialize stack pointer put pointer to

BCD storage in SI and pointer to binary storage in DI.

MOV SI,OFFSET BCD-INPUT ; create pointers to BCDMOV DI,OFFSET BCD-VALUE ; and binary storageCALL BCD-BIN ; Do the conversionNOP ; continue with program hereBCD-BIN PROC NEARPUSHF ; Save flagsPUSHBX ; and registers used in procedurePUSHCX ; before starting the

conversion do the conversionPUSHAXMOV AL,[SI] ; Get BCD value from memory

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; Do the conversionMOV BL,AL ; save copy of BCD in BLAND BL,0FH ; and maskAND AL,F0H ; separate upper nibbleMOV CL,04H ; move upper BCD digit to lowROR AL,CL ; nibble position for multiplyMOV BH,0AH ; load conversion factor in BHMUL BH ; multiply upper BCD digit in AL by

0AH in BH, leave result in ALADD AL, BL ; add lower BCD digit to MUL result

end of conversion, binary result in AL.

; End of conversion, binary value in AL.

MOV [DI],AL ; store binary value in memoryPOP AXPOP CX ; Restore registersPOP BXPOPFRET ; and return mainline

BCD-BIN ENDPCODE ENDS

END

This pointer approach is more versatile because we can pass the procedure pointers to data anywhere in memory. We can pass pointers to individual values or pointers to arrays or strings. To access complex data structures, we can use registers to pass the segment base and the offset of a table of pointers in memory. The procedure then can read in a pointer from the table and use the pointer to access the desired data.

2.8.4.Passing parameters using the stack:To pass parameters to a procedure using the stack, we push the parameters on the stack somewhere in the mainline program before we call the parameters from the stack as needed. Likewise, parameters to be passed back to the calling program are written to the stack by the instructions in the procedure and read off the stack by instructions in the mainline program.

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Program code:

DATA SEGMENTBCD-INPUT DB 17H ; storage for BCD valueBIN-VALUE DB ? ; storage for binary valueDATA ENDSSTACK-SEG SEGMENT STACKDW 100 DUP(0) ; stack of 100 wordsTOP-STACK LABEL WORDSTACK-SEG ENDSCODE SEGMENTASSUME CS:CODE,DS:DATA,SS:STACK-SEGMOV AX,DATA ; Initialize data segmentMOV DS,AX ; registerMOV AX,STACK-SEG ; Initialize data segmentMOV SS,AX ; registerMOV SP,OFFSET TOP-STACK ;Initialize stack pointer put pointer to

BCD storage in SI and pointer to binary storage in DI.

MOV AL,OFFSET BCD-INPUT ; create pointers to BCDPUSHAX ; and push it onto the stackCALL BCD-BIN ; Do the conversionPOP AX ; Get the binary valueMOV BIN-VALUE,AL ; and store itNOP ; continue with program hereBCD-BIN PROC NEARPUSHF ; Save flagsPUSHAXPUSHBX ; and registers used in procedurePUSHCX ; before starting the conversion do the

conversionPUSHBPMOV BP,SP ; make a copy of the stack pointerMOV AX,[BP+12] ; Get BCD value from stack

; Do the conversionMOV BL,AL ; save copy of BCD in BLAND BL,0FH ; and maskAND AL,F0H ; separate upper nibbleMOV CL,04H ; move upper BCD digit to low

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ROR AL,CL ; nibble position for multiplyMOV BH,0AH ; load conversion factor in BHMUL BH ; multiply upper BCD digitin AL by 0AH in BH,

leave result in ALADD AL, BL ;add lower BCD digit to MUL result end of

conversion, binary result in AL.; End of conversion, binary value in AL.

MOV [BP+12],AX ;store binary value on stackPOP BPPOP CX ;Restore registersPOP BXPOP AXPOPFRET ;and return mainline

BCD-BIN ENDPCODE ENDS

END

2.9 Stack in memory SP

Before push AX 0050H

After push AX 004EH

After push BP 0042H

stack segment base 7000H

XAHALIPHIGHIPLOWFLAGHFLAGLAHALBHBLCHCLBP HIGHBP LOW

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For simple programs with just a few parameters to pass, registers and usually the easiest to use. For passing arrays or other data structures to and from procedures we can use registers to pass pointers to the strut of these data structures. Passing pointers to the procedure is much more versatile method than having the procedure access the data structure directly by name. for procedures in a multi-user system program, procedures that will be called from a high-level language program or procedures that call themselves, parameters should be passed on to the stack.

2.9.1 Reentrant and recursive procedures:

Fig 2.3: program execution flow for reentrant procedure.

Suppose that the 8086 was in the middle of executing a multiply procedure when the interrupt signal occurred, and that we also need to use the multiply procedure in the interrupt service subroutine. When the interrupt occurs, execution goes to the interrupt service procedure. The interrupt service procedure then calls the multiply procedure when it needs it. The RET instruction at the end of the multiply procedure returns execution to the interrupt service procedure. A special return instruction at the end of the interrupt service procedure returns execution to the multiply procedure when it was executing when the interrupt occurred.

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mainline

Call multiply

Next mainline instruction after call

Interrupt occurs here

Multiply procedure Interrupt

procedure

Call multiply

Return to interrupted program

Return to calling program

The multiply procedure must be written in such a way that it can be interrupted, used and ‘reentered’ without losing or writing over anything. A procedure which can function in this way is said to be reentrant.To be reentrant, a procedure must first of all push the flags and all registers used in the procedure. Also, to be reentrant, a program should use only registers or the stack to pass parameters.

2.9.2 Recursive procedures:A recursive procedure is a procedure which calls itself. Recursive procedures are often used to work with complex data structures called trees.We usually write recursive procedures in a high-level language such as c or Pascal, except in those cases where we need the speed gained by writing in assembly language.

Ex: Factorial of a given number.Here a recursive procedure is needed, which will compute the factorial of a number N which we pass to it on the stack, then pass the factorial back to the calling program on the stack.The basic algorithm can be expressed very simply as,

IF N=1 THEN factorial = 1ELSE factorial = N*(factorial(N-1))This says that if the number we pass to the procedure is 1, the procedure should return the factorial of 1, which is 1. if the number we pass it not 1, then the procedure should multiply this number by the factorial of the number minus 1.

(a)

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mainline Procedure facto

Procedure facto

Procedure facto

mainline

Call facto

Procedure facto

RET with 11

(b)

PROCEDURE FACTOIF N=1

FACTORIAL =1RET

ELSEREPEAT

DECREMENT NCALL FACTO

UNTIL N=1MULTIPLY (N-1)! * PREVIOUS NRET

(c)

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call call

RET with 31

RET with 21

RET with 11

Call facto

next mainline instruction

START

(d)

Fig 2.4: Algorithm for program to compute factorial for a number N between 1 to 8 (a)Flow diagram for N=1 (b) Flow diagram for N=3 (c) Pseudo code (d) Flowchart

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GET N

N=1FACTORIAL = 1

DECREMENT N

CALL FACTO

MULTIPLY (N-1)!* PREVIOUS N

RETURN

RETURN

STACK-SEG SEGMENT STACKDW 200 DUP(0) ; set aside 200 words for stackSTACK-TOP LABEL WORDSTACK-SEG ENDSNUMBER EQU 08 ; 8!=40320=9D80HCODE SEGMENTASSUME CS: CODE, SS: STACK-SEGMOV AX, STACK-SEG ; initialize stackMOV SS, AX ; segment registerMOV SP, OFFSET STACK-TOP ;initialize stack pointerSUB SP, 0004H ; make space in stackMOV AX, NUMBER ; for factorial to bePUSH AX ;returned and put number to be

passed on stackCALL FACTO ;compute factorial of numberADD SP, 2 ;get over original in stackPOP AX ;get low word of the resultPOP DX ;get high word or the resultNOP ;simulate next mainline instructionJMP FIN ;or EMT program.FACTO PROC NEARPUSHF ;save flags and registersPUSH AX ;on the stackPUSH DXPUSH BPMOV BP,SP ;point BP at top of stackMOV AX,[BP+10] ;copy number from stack to AXCMP AX,0001H ;If N not =1 THENJNE GO-ON ;compute factorialMOV WORD PTR [BP+12],0001H ;ELSE load 1! On stackMOV WORD PTR [BP+14],0000H ;and return to calling programJMP EXITGO-ON SUB SP,0004H ;make space in stack for preliminary

factorialDEC AX ;decrement number now in AXPUSH AX ;save N-1 on stack

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CALL FACTO ;compute factorial of N-1MOV BP,SP ;point BP at top of stackMOV AX,[BP+2] ;last (N-1)! From stack to AXMUL WORD PTR [BP+16] ;multiply by previous NMOV [BP+20],DXADD SP,0006H ; point SP at pushed registerEXIT POP BP ;restore registersPOP DXPOP AXPOPFRET

FACTO ENDPFIN NOPCODE ENDS

END

Fig 2.5: Program which uses a recursive procedure to calculate the factorial of a number between 1 and 8.

We start the mainline program by declaring a stack segment and setting aside a stack of 200 words with a label at the top of the stack. The first three instructions in the code segment of the mainline program initialize the stack segment register and the stack pointer register. The SUB SP, 04 after this instruction will decrement the stack pointer register by 4. In other words, we skip the stack pointer down over 2 words in the stack. These two words locations will be used to pass the computed factorial from the procedure back to the mainline program. Next we load the number whose factorial we want into ax and push the value on the stack where the procedure will access it. Then we call the procedure. The procedure is near because it is in the same code segment as the instruction, which calls it.At the start of the procedure, we save flags and all the registers used in the procedure on the stack.

N! HIGH WORD

N! LOW WORDNIPFLAGSAXDXBP

N-1IPFLAGSAXDXBP

(N-1)-1IPFLAGSAXDXBP

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0080H007EH 4-byte space reserved for final factorial007CH007AH SP after final RET0078H0076H0074H0072H0070H SP after +6 balance006EH006CH 4-byte space for (N-1)!006AH0068H SP after second RET0066H0064H0062H0060H005EH005CH005AH0058H SP after first RET0056H0054H0052H0050H SP after last CALL and PUSHES004EH

Fig 2.6: Stack diagram for the previous program showing the contents of stack for N=3.

The stack now has the space for the result, the passed value, the return addresses, and the pushed registers. Unfortunately, the value of N is buried 10 addresses up the stack from where the stack pointer value, we first copy SP to BP with the MOV BP, SP instruction so that BP points to the top of the stack. Then we use the MOV AX, [BP+10] instruction to copy N from the stack to AX. Now, the procedure has value N.If the value of N read in is 1, then the factorial is 1. We want to put 00000001Hin the stack locations we reserved for the result, restore the registers, and return to the mainline program.

The MOV WORD PTR [BP+12], 0001H instruction is used to load a value to a location buried in the stack. The MOV WORD PTR [BP+14], 0000H

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instruction is used move a word value to the stack location reserved for high word of the factorial.Let N=3 the CMP AX, 0001H instruction and JNE GO-ON instruction determine that N is not 1 and send execution to the SUB SP, 04H instruction. According to the algorithm, we are going to find the value of N! By multiplying N times the value of (N-1)! . We will be calling FACTO again to find the value of (N-1)!. The SUB SP, 04H instruction skips the stack pointer down over four addresses in the stack to offset 006CH for an example. The value of (3-1)! will be returned in these locations.The next step in the program is to decrement N by 1 and push the value of N-1 on the stack at offset 006AH, where it can be accessed during the next call of FACTO.

2.9.4 FAR PROCEDURESA far procedure is one that is located in a segment, which has a different name from the segment containing the CALL instruction. To get to the starting address of a far procedure, the 8086 must change the contents of both the code segment register and the instruction pointer.

CODE SEGMENTASSUME CS:CODE,DS:DATA,SS:STACK-SEG:::::CALL MULTIPLY-32::

CODE ENDSPROCEDURES SEGMENTMULTIPLY-32 PROC FARASSUME CS: PROCEDURES:::

MULTIPLY-32 ENDPPROCEDURES ENDS

Intersegment CALL must be used with this FAR procedures AT the end of a FAR procedure, both the contents of the code segment register and the contents of the instruction pointer must be popped off the stack to return to calling program, so one of the intersegment forms of the RET instruction must be used.

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2.9.4.1 ACCESSING A PROCEDURE IN ANOTHER SEGMENT:If a procedure is in a different segment from the CALL instruction, we must declare it far with the FAR directive also, we must put an ASSUME statement in the procedure to tell the assembler what segment base to use when calculating the offsets of the instructions in procedure.

1. ACCESSING A PROCEDURE AND DATA IN A SEPARATE ASSEMBLY MODULE:The best way to write a large program is to divide it into a series of modules, so that each module is written, assembled, tested and debugged. The object code files for the modules can then be linked together. Finally, the resulting link file can be located, run and tested.The individual modules of a large program are often written as procedures and called from a mainline or executive program.1. PUBLIC: In the module where a variable or procedure is declared, we must use the PUBLIC directive to set the linker so that a variable or procedure can be accessed from other modules.The statement PUBLIC DISPLAY, for example, tells the linker that a procedure or variable named DISPLAY can be legally accessed from another assembly module.2. EXTRN: In a module which calls a procedure or accesses a variable in another module, we must use the EXTRN directive to let the assembler know that the procedure or variable is not in this module. The EXTRN statement also gives the linker some needed information about the procedure or variable.

Ex: The statement EXTRN DISPLAY : FAR, SECONDS : BYTE

Tells the linker that DISPLAY is a far procedure and SECONDS is a variable of type byte located in another assembly module.

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ASM MODULE ASM MODULE ASM MODULE

ASSEMBLE

.OBJ FILE .OBJ FILE .OBJ FILE

ASSEMBLE ASSEMBLE

TEST

RUN

LOAD

.BIN FILE

LOCATE

.LINK OR .EXEFILE

LINK

Fig 2.7 : Chart showing the steps needed to run a program that has been written in modular form.

2.10 MACRO:

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Where we need to write a group of instructions several times in a program then there are 2 ways to avoid repetitive coding:1. Using procedures.2. Using macros.

The advantage of using procedure is that machine codes for the group of instructions in the procedure only have to be put in memory once. Disadvantage of using a procedure are the need for a stack, and the overhead time required to call the procedure and return to the calling program.When the repeated group of instructions is too short or not appropriate to be written as a procedure, we use a macro. “A macro is a group of instructions we bracket and give a name to at the start of a program.” Each time we call the macro in a program, the assembler will insert the defined group of instructions in place of the call. The assembler generates machine codes for the group of instructions each time the macro is called.Using a macro avoids the overhead time involved in calling and returning from a procedure. A disadvantage of generating in line code each time a macro is called is that this will make the program take up more memory than using a procedure.

2.10.1 DEFINING AND CALLING A MACRO WITHOUT PARAMETERS:A macro is written to save all the registers:

PUSH-ALL MACROPUSHFPUSH AXPUSH BXPUSHCXPUSH DXPUSH BPPUSH SIPUSH DIPUSH ESPUSH SSENDM

PROCEDURE IN WHICH MACRO IS USED:BREATH-RATE PROC FARASSUME CS:PROCEDURES,DS:PATIENTS-PARAMETERPUSH-ALLMOV AX,PATIENTS-PARAMETERSMOV DS,AX

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2.10.2 PASSING PARAMETERS TO MACROS:MACRO:

MOVE-ASCII MACRO NUMBER,SOURCE,DESTINATIONMOV CX,NUMBERLEA SI,SOURCELEA DI,DESTINATIONCLDREP MOVSBENDM

EX: MOV-ASCII 03DH,BLOCK-START,BLOCK-DEST thenMOV CX,03DHLEA SI,BLOCK-STARTLEA DI,BLOCK-DESTCLDREP MOVSB

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