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TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD, USA ISPD 2012

TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

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Page 1: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

TSV-Constrained Micro-Channel Infrastructure

Design for Cooling Stacked 3D-ICs

Bing Shi and Ankur Srivastava, University of Maryland, College

Park, MD, USA

ISPD 2012

Page 2: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Outline

• Introduction and Motivation• Thermal and Power model with micro-

channels• Formulation and Micro-channel

design algorithms• Experimental results• Conclusions

Page 3: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Introduction

• Conventional air cooling might be not enough for stacked 3D-ICs.– Micro-channel based liquid cooling is

developed.

• Micro-channel heat sinks are embedded below each silicon layer and the coolant fluid is pumped through the micro-channels.

Page 4: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Schematics

Page 5: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Effectiveness

Page 6: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Motivating example

• Conventionally, straight channels are used.– But TSVs will block the route of straight

channels.

Page 7: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Introduction (cont.)

• With bended structure, the micro-channels can reach those TSV-blocked hotspot regions which straight micro-channels cannot reach.

• Compared to straight channel design, up to 87% pumping power could be saved.

Page 8: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Thermal and Power model with micro-channels

• Thermal modeling– Use RC network to represent.– Steady states: pure resistive network.– Solve GT=Q, where G is the thermal conductivity

matrix and Q is the power profile.• G depends on many factors including the

material properties, location of channels and TSVs, fluid flow rate etc.

• Hotspot is the location that its temperature T is greater than maximum temperature constraint .

Page 9: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Micro-channel power consumption• Pumping power

– where N is the total number of channels, and are the pressure drop and fluid flow rate of the n-th micro-channel.

• Laminar liquid flow– pressure drop in a straight micro-channel – L is the length of micro-channel, is hydraulic

diameter, v is fluid velocity, μ is fluid viscosity and γ is determined by the micro-channel dimension.

Page 10: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Fluid flow rate

• Fluid flow rate – are the channel width and height.

• Flow rate could be controlled by changing the pressure drop.

• Usually fluid pumps are designed to work such that all the micro-channels experience the same pressure drop.– So that higher pressure drop results in

higher flow rate and better cooling.

Page 11: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Modeling Micro-channels with bends

• Three types of region– Fully developed laminar flow region.– The bend corner.– The developing/turbulent region after the

bend.

Page 12: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Pressure drop

• Pressure drop in fully developed region

• Pressure drop in developing region

• Pressure drop in corner region

• Total pressure drop

– A quadratic function of v.

Page 13: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Total pumping power

• Solve the equation for fluid velocity.• Estimate the fluid flow rate f, and thus

estimate the thermal resistance and pumping power for this channel.

• Hence, the pumping power as well as cooling effectiveness of micro-channels with bends is a function of– Number of bends.– Location of channels.– Pressure drop across the channel.

• Slower velocity means lower cooling efficiency.– More pumping power is needed.

Page 14: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Problem to be solved

• To find micro-channel routes from one side to the other such that– The routes do not intersect.– Avoid TSVs.– Provide sufficient cooling at

minimum pumping energy.

Page 15: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Represent the routing problem

• Each grid on the layout is a node.• Edge exists if

– Two nodes are adjacent.– Non of them is a TSV.

• Formulate the problem Minimize pumping power

I/O nodes

Routable nodes

TSV constraints

Temperature constraints

Edge constraints

The same edge

Page 16: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

The grid graph

Page 17: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

But…

• This is a very complex problem since – The variables need to be discrete.– The thermal and pumping power models

are highly nonlinear.• Propose a min-cost flow based

method to do the job.

Page 18: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Overall flow

• The flow– Full scale thermal analysis.– Initial micro-channel design– Iterative refinement with thermal

analysis

Page 19: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Min-cost flow based micro-channel design

• Initialization– I/O nodes are assigned a supply/demand

of one flow unit.– All nodes in the grid graph have a

capacity one.– The edges have unlimited capacity and

are bi-directional.• Assigning the node capacity to be 1

would ensure that all the flow from inlet to outlet follows simple paths (non-intersecting and non-cyclic).

Page 20: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Cooling demand

• A silicon layer would be cooled by the micro-channels both above and below.– Unless the silicon layer is at the very top

or very bottom of the stack.• For a location that need cooling.

– is the heat load partitioning factor.– cooling demand assigned to the top.– cooling demand assigned to the bottom.

Page 21: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Cooling demand (cont.)

• The top(bottom)-most layer only cooled by its bottom(top) micro-channel.– is set to 0(1) accordingly.

• Otherwise, is set according to the ratio of number of TSVs in the adjacent layer.– Less TSVs, more space for micro-channel.

Page 22: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Cost assignment

• Higher demand leads to lower cost since we would like micro-channels to pass through high cooling demand regions.

• Let be the heat load partitioning factor of grid on silicon layer , .

Page 23: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Cost assignment (cont.)

• If the hotspot exists in both side

• If the hotspot only exists in one side

• If the hotspot does not exist in both side– The node cost is assigned to a

small positive value

Page 24: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,
Page 25: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Micro-channel refinement

• Two situation that degrade the cooling quality.– Some channels have several

bends.– It may be routed over

disproportionately large number of hotspots.

• Iteratively refine the results

Page 26: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

How to get the minimum required pumping power

• Linearly increase the pressure drop until the temperature met the goal.

Page 27: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Iterative micro-channel optimization

• The objective of minimum cost flow formulation did not capture cooling energy and/or number of bends in the channels.

• Such imbalance (in cooling demand and bend count) leads to increase in the required pressure drop and thereby increasing the pumping energy.

Page 28: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Iterative micro-channel optimization (cont.)

• The basic idea is that all the channels should have similar levels of heat load, length and number of bends.

• Based on these considerations, the initial design is refined by– Balancing the heat loads among

micro-channels.– Reducing unnecessary bends.

Page 29: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Iterative micro-channel optimization (cont.)

• Micro-channel heat load balancing:

Page 30: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Iterative micro-channel optimization (cont.)

• Bend Elimination– Identify all unnecessary bends and

replace them with equivalent straight channels or patterns with lesser corners.

– Removing corners in the hotspot region might lead to reduction in the cooling performance.

– Only remove those corners in the non-hotspot regions which can easily be identified by the thermal analysis.

Page 31: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Experimental setting

• Two-tier stacked 3D-IC with 4-core CPU on each.– Different number of TSVs which are

randomly distributed.• SPEC 2000 CPU benchmarks

– Simulate 20 such benchmarks to get power profile and randomly choose 4 of these profiles to compose a one-tier profile.

• Combine two of these power profiles to form a two-tier profile.

Page 32: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Parameters

• The area of each chip stack is • The grid size is (so grids in each layer).• The channel dimensions are .• The maximum temperature constraint .• The maximum available pressure drop is

500kPa.

Page 33: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Experimental results (cont.)

• Uses 20 micro-channels.

Page 34: TSV-Constrained Micro- Channel Infrastructure Design for Cooling Stacked 3D-ICs Bing Shi and Ankur Srivastava, University of Maryland, College Park, MD,

Conclusions

• Micro-channel cooling will be needed in the near future.

• Proposes a flow which designs TSV-constrained micro-channel infrastructure.

• Up to 87% pumping power saving compared with the micro-channel structure using straight channels.